1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cluster0_opp: opp_table0 { 64 compatible = "operating-points-v2"; 65 opp-shared; 66 67 opp-500000000 { 68 opp-hz = /bits/ 64 <500000000>; 69 opp-microvolt = <830000>; 70 clock-latency-ns = <300000>; 71 }; 72 opp-1000000000 { 73 opp-hz = /bits/ 64 <1000000000>; 74 opp-microvolt = <830000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1500000000 { 78 opp-hz = /bits/ 64 <1500000000>; 79 opp-microvolt = <830000>; 80 clock-latency-ns = <300000>; 81 opp-suspend; 82 }; 83 opp-1600000000 { 84 opp-hz = /bits/ 64 <1600000000>; 85 opp-microvolt = <900000>; 86 clock-latency-ns = <300000>; 87 turbo-mode; 88 }; 89 opp-1700000000 { 90 opp-hz = /bits/ 64 <1700000000>; 91 opp-microvolt = <900000>; 92 clock-latency-ns = <300000>; 93 turbo-mode; 94 }; 95 opp-1800000000 { 96 opp-hz = /bits/ 64 <1800000000>; 97 opp-microvolt = <960000>; 98 clock-latency-ns = <300000>; 99 turbo-mode; 100 }; 101 }; 102 103 cpus { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 a57_0: cpu@0 { 108 compatible = "arm,cortex-a57", "arm,armv8"; 109 reg = <0x0>; 110 device_type = "cpu"; 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 112 next-level-cache = <&L2_CA57>; 113 enable-method = "psci"; 114 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 115 operating-points-v2 = <&cluster0_opp>; 116 }; 117 118 a57_1: cpu@1 { 119 compatible = "arm,cortex-a57", "arm,armv8"; 120 reg = <0x1>; 121 device_type = "cpu"; 122 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 123 next-level-cache = <&L2_CA57>; 124 enable-method = "psci"; 125 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 126 operating-points-v2 = <&cluster0_opp>; 127 }; 128 129 L2_CA57: cache-controller-0 { 130 compatible = "cache"; 131 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 132 cache-unified; 133 cache-level = <2>; 134 }; 135 }; 136 137 extal_clk: extal { 138 compatible = "fixed-clock"; 139 #clock-cells = <0>; 140 /* This value must be overridden by the board */ 141 clock-frequency = <0>; 142 }; 143 144 extalr_clk: extalr { 145 compatible = "fixed-clock"; 146 #clock-cells = <0>; 147 /* This value must be overridden by the board */ 148 clock-frequency = <0>; 149 }; 150 151 /* External PCIe clock - can be overridden by the board */ 152 pcie_bus_clk: pcie_bus { 153 compatible = "fixed-clock"; 154 #clock-cells = <0>; 155 clock-frequency = <0>; 156 }; 157 158 pmu_a57 { 159 compatible = "arm,cortex-a57-pmu"; 160 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 161 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 162 interrupt-affinity = <&a57_0>, 163 <&a57_1>; 164 }; 165 166 psci { 167 compatible = "arm,psci-1.0", "arm,psci-0.2"; 168 method = "smc"; 169 }; 170 171 /* External SCIF clock - to be overridden by boards that provide it */ 172 scif_clk: scif { 173 compatible = "fixed-clock"; 174 #clock-cells = <0>; 175 clock-frequency = <0>; 176 }; 177 178 soc { 179 compatible = "simple-bus"; 180 interrupt-parent = <&gic>; 181 #address-cells = <2>; 182 #size-cells = <2>; 183 ranges; 184 185 rwdt: watchdog@e6020000 { 186 compatible = "renesas,r8a77965-wdt", 187 "renesas,rcar-gen3-wdt"; 188 reg = <0 0xe6020000 0 0x0c>; 189 clocks = <&cpg CPG_MOD 402>; 190 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 191 resets = <&cpg 402>; 192 status = "disabled"; 193 }; 194 195 gpio0: gpio@e6050000 { 196 compatible = "renesas,gpio-r8a77965", 197 "renesas,rcar-gen3-gpio"; 198 reg = <0 0xe6050000 0 0x50>; 199 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 200 #gpio-cells = <2>; 201 gpio-controller; 202 gpio-ranges = <&pfc 0 0 16>; 203 #interrupt-cells = <2>; 204 interrupt-controller; 205 clocks = <&cpg CPG_MOD 912>; 206 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 207 resets = <&cpg 912>; 208 }; 209 210 gpio1: gpio@e6051000 { 211 compatible = "renesas,gpio-r8a77965", 212 "renesas,rcar-gen3-gpio"; 213 reg = <0 0xe6051000 0 0x50>; 214 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 215 #gpio-cells = <2>; 216 gpio-controller; 217 gpio-ranges = <&pfc 0 32 29>; 218 #interrupt-cells = <2>; 219 interrupt-controller; 220 clocks = <&cpg CPG_MOD 911>; 221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 222 resets = <&cpg 911>; 223 }; 224 225 gpio2: gpio@e6052000 { 226 compatible = "renesas,gpio-r8a77965", 227 "renesas,rcar-gen3-gpio"; 228 reg = <0 0xe6052000 0 0x50>; 229 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 230 #gpio-cells = <2>; 231 gpio-controller; 232 gpio-ranges = <&pfc 0 64 15>; 233 #interrupt-cells = <2>; 234 interrupt-controller; 235 clocks = <&cpg CPG_MOD 910>; 236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 237 resets = <&cpg 910>; 238 }; 239 240 gpio3: gpio@e6053000 { 241 compatible = "renesas,gpio-r8a77965", 242 "renesas,rcar-gen3-gpio"; 243 reg = <0 0xe6053000 0 0x50>; 244 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 245 #gpio-cells = <2>; 246 gpio-controller; 247 gpio-ranges = <&pfc 0 96 16>; 248 #interrupt-cells = <2>; 249 interrupt-controller; 250 clocks = <&cpg CPG_MOD 909>; 251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 252 resets = <&cpg 909>; 253 }; 254 255 gpio4: gpio@e6054000 { 256 compatible = "renesas,gpio-r8a77965", 257 "renesas,rcar-gen3-gpio"; 258 reg = <0 0xe6054000 0 0x50>; 259 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 260 #gpio-cells = <2>; 261 gpio-controller; 262 gpio-ranges = <&pfc 0 128 18>; 263 #interrupt-cells = <2>; 264 interrupt-controller; 265 clocks = <&cpg CPG_MOD 908>; 266 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 267 resets = <&cpg 908>; 268 }; 269 270 gpio5: gpio@e6055000 { 271 compatible = "renesas,gpio-r8a77965", 272 "renesas,rcar-gen3-gpio"; 273 reg = <0 0xe6055000 0 0x50>; 274 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 275 #gpio-cells = <2>; 276 gpio-controller; 277 gpio-ranges = <&pfc 0 160 26>; 278 #interrupt-cells = <2>; 279 interrupt-controller; 280 clocks = <&cpg CPG_MOD 907>; 281 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 282 resets = <&cpg 907>; 283 }; 284 285 gpio6: gpio@e6055400 { 286 compatible = "renesas,gpio-r8a77965", 287 "renesas,rcar-gen3-gpio"; 288 reg = <0 0xe6055400 0 0x50>; 289 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 290 #gpio-cells = <2>; 291 gpio-controller; 292 gpio-ranges = <&pfc 0 192 32>; 293 #interrupt-cells = <2>; 294 interrupt-controller; 295 clocks = <&cpg CPG_MOD 906>; 296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 297 resets = <&cpg 906>; 298 }; 299 300 gpio7: gpio@e6055800 { 301 compatible = "renesas,gpio-r8a77965", 302 "renesas,rcar-gen3-gpio"; 303 reg = <0 0xe6055800 0 0x50>; 304 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 305 #gpio-cells = <2>; 306 gpio-controller; 307 gpio-ranges = <&pfc 0 224 4>; 308 #interrupt-cells = <2>; 309 interrupt-controller; 310 clocks = <&cpg CPG_MOD 905>; 311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 312 resets = <&cpg 905>; 313 }; 314 315 pfc: pin-controller@e6060000 { 316 compatible = "renesas,pfc-r8a77965"; 317 reg = <0 0xe6060000 0 0x50c>; 318 }; 319 320 cpg: clock-controller@e6150000 { 321 compatible = "renesas,r8a77965-cpg-mssr"; 322 reg = <0 0xe6150000 0 0x1000>; 323 clocks = <&extal_clk>, <&extalr_clk>; 324 clock-names = "extal", "extalr"; 325 #clock-cells = <2>; 326 #power-domain-cells = <0>; 327 #reset-cells = <1>; 328 }; 329 330 rst: reset-controller@e6160000 { 331 compatible = "renesas,r8a77965-rst"; 332 reg = <0 0xe6160000 0 0x0200>; 333 }; 334 335 sysc: system-controller@e6180000 { 336 compatible = "renesas,r8a77965-sysc"; 337 reg = <0 0xe6180000 0 0x0400>; 338 #power-domain-cells = <1>; 339 }; 340 341 tsc: thermal@e6198000 { 342 compatible = "renesas,r8a77965-thermal"; 343 reg = <0 0xe6198000 0 0x100>, 344 <0 0xe61a0000 0 0x100>, 345 <0 0xe61a8000 0 0x100>; 346 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 349 clocks = <&cpg CPG_MOD 522>; 350 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 351 resets = <&cpg 522>; 352 #thermal-sensor-cells = <1>; 353 }; 354 355 intc_ex: interrupt-controller@e61c0000 { 356 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 357 #interrupt-cells = <2>; 358 interrupt-controller; 359 reg = <0 0xe61c0000 0 0x200>; 360 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 361 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 362 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 363 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 364 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 365 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 366 clocks = <&cpg CPG_MOD 407>; 367 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 368 resets = <&cpg 407>; 369 }; 370 371 i2c0: i2c@e6500000 { 372 #address-cells = <1>; 373 #size-cells = <0>; 374 compatible = "renesas,i2c-r8a77965", 375 "renesas,rcar-gen3-i2c"; 376 reg = <0 0xe6500000 0 0x40>; 377 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 378 clocks = <&cpg CPG_MOD 931>; 379 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 380 resets = <&cpg 931>; 381 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 382 <&dmac2 0x91>, <&dmac2 0x90>; 383 dma-names = "tx", "rx", "tx", "rx"; 384 i2c-scl-internal-delay-ns = <110>; 385 status = "disabled"; 386 }; 387 388 i2c1: i2c@e6508000 { 389 #address-cells = <1>; 390 #size-cells = <0>; 391 compatible = "renesas,i2c-r8a77965", 392 "renesas,rcar-gen3-i2c"; 393 reg = <0 0xe6508000 0 0x40>; 394 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 395 clocks = <&cpg CPG_MOD 930>; 396 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 397 resets = <&cpg 930>; 398 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 399 <&dmac2 0x93>, <&dmac2 0x92>; 400 dma-names = "tx", "rx", "tx", "rx"; 401 i2c-scl-internal-delay-ns = <6>; 402 status = "disabled"; 403 }; 404 405 i2c2: i2c@e6510000 { 406 #address-cells = <1>; 407 #size-cells = <0>; 408 compatible = "renesas,i2c-r8a77965", 409 "renesas,rcar-gen3-i2c"; 410 reg = <0 0xe6510000 0 0x40>; 411 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 412 clocks = <&cpg CPG_MOD 929>; 413 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 414 resets = <&cpg 929>; 415 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 416 <&dmac2 0x95>, <&dmac2 0x94>; 417 dma-names = "tx", "rx", "tx", "rx"; 418 i2c-scl-internal-delay-ns = <6>; 419 status = "disabled"; 420 }; 421 422 i2c3: i2c@e66d0000 { 423 #address-cells = <1>; 424 #size-cells = <0>; 425 compatible = "renesas,i2c-r8a77965", 426 "renesas,rcar-gen3-i2c"; 427 reg = <0 0xe66d0000 0 0x40>; 428 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 429 clocks = <&cpg CPG_MOD 928>; 430 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 431 resets = <&cpg 928>; 432 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 433 dma-names = "tx", "rx"; 434 i2c-scl-internal-delay-ns = <110>; 435 status = "disabled"; 436 }; 437 438 i2c4: i2c@e66d8000 { 439 #address-cells = <1>; 440 #size-cells = <0>; 441 compatible = "renesas,i2c-r8a77965", 442 "renesas,rcar-gen3-i2c"; 443 reg = <0 0xe66d8000 0 0x40>; 444 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 927>; 446 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 447 resets = <&cpg 927>; 448 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 449 dma-names = "tx", "rx"; 450 i2c-scl-internal-delay-ns = <110>; 451 status = "disabled"; 452 }; 453 454 i2c5: i2c@e66e0000 { 455 #address-cells = <1>; 456 #size-cells = <0>; 457 compatible = "renesas,i2c-r8a77965", 458 "renesas,rcar-gen3-i2c"; 459 reg = <0 0xe66e0000 0 0x40>; 460 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 461 clocks = <&cpg CPG_MOD 919>; 462 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 463 resets = <&cpg 919>; 464 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 465 dma-names = "tx", "rx"; 466 i2c-scl-internal-delay-ns = <110>; 467 status = "disabled"; 468 }; 469 470 i2c6: i2c@e66e8000 { 471 #address-cells = <1>; 472 #size-cells = <0>; 473 compatible = "renesas,i2c-r8a77965", 474 "renesas,rcar-gen3-i2c"; 475 reg = <0 0xe66e8000 0 0x40>; 476 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 477 clocks = <&cpg CPG_MOD 918>; 478 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 479 resets = <&cpg 918>; 480 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 481 dma-names = "tx", "rx"; 482 i2c-scl-internal-delay-ns = <6>; 483 status = "disabled"; 484 }; 485 486 i2c_dvfs: i2c@e60b0000 { 487 #address-cells = <1>; 488 #size-cells = <0>; 489 compatible = "renesas,iic-r8a77965", 490 "renesas,rcar-gen3-iic", 491 "renesas,rmobile-iic"; 492 reg = <0 0xe60b0000 0 0x425>; 493 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 494 clocks = <&cpg CPG_MOD 926>; 495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 496 resets = <&cpg 926>; 497 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 498 dma-names = "tx", "rx"; 499 status = "disabled"; 500 }; 501 502 hscif0: serial@e6540000 { 503 compatible = "renesas,hscif-r8a77965", 504 "renesas,rcar-gen3-hscif", 505 "renesas,hscif"; 506 reg = <0 0xe6540000 0 0x60>; 507 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 508 clocks = <&cpg CPG_MOD 520>, 509 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 510 <&scif_clk>; 511 clock-names = "fck", "brg_int", "scif_clk"; 512 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 513 <&dmac2 0x31>, <&dmac2 0x30>; 514 dma-names = "tx", "rx", "tx", "rx"; 515 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 516 resets = <&cpg 520>; 517 status = "disabled"; 518 }; 519 520 hscif1: serial@e6550000 { 521 compatible = "renesas,hscif-r8a77965", 522 "renesas,rcar-gen3-hscif", 523 "renesas,hscif"; 524 reg = <0 0xe6550000 0 0x60>; 525 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 526 clocks = <&cpg CPG_MOD 519>, 527 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 528 <&scif_clk>; 529 clock-names = "fck", "brg_int", "scif_clk"; 530 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 531 <&dmac2 0x33>, <&dmac2 0x32>; 532 dma-names = "tx", "rx", "tx", "rx"; 533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 534 resets = <&cpg 519>; 535 status = "disabled"; 536 }; 537 538 hscif2: serial@e6560000 { 539 compatible = "renesas,hscif-r8a77965", 540 "renesas,rcar-gen3-hscif", 541 "renesas,hscif"; 542 reg = <0 0xe6560000 0 0x60>; 543 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 544 clocks = <&cpg CPG_MOD 518>, 545 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 546 <&scif_clk>; 547 clock-names = "fck", "brg_int", "scif_clk"; 548 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 549 <&dmac2 0x35>, <&dmac2 0x34>; 550 dma-names = "tx", "rx", "tx", "rx"; 551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 552 resets = <&cpg 518>; 553 status = "disabled"; 554 }; 555 556 hscif3: serial@e66a0000 { 557 compatible = "renesas,hscif-r8a77965", 558 "renesas,rcar-gen3-hscif", 559 "renesas,hscif"; 560 reg = <0 0xe66a0000 0 0x60>; 561 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 562 clocks = <&cpg CPG_MOD 517>, 563 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 564 <&scif_clk>; 565 clock-names = "fck", "brg_int", "scif_clk"; 566 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 567 dma-names = "tx", "rx"; 568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 569 resets = <&cpg 517>; 570 status = "disabled"; 571 }; 572 573 hscif4: serial@e66b0000 { 574 compatible = "renesas,hscif-r8a77965", 575 "renesas,rcar-gen3-hscif", 576 "renesas,hscif"; 577 reg = <0 0xe66b0000 0 0x60>; 578 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 579 clocks = <&cpg CPG_MOD 516>, 580 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 581 <&scif_clk>; 582 clock-names = "fck", "brg_int", "scif_clk"; 583 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 584 dma-names = "tx", "rx"; 585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 586 resets = <&cpg 516>; 587 status = "disabled"; 588 }; 589 590 hsusb: usb@e6590000 { 591 compatible = "renesas,usbhs-r8a77965", 592 "renesas,rcar-gen3-usbhs"; 593 reg = <0 0xe6590000 0 0x200>; 594 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 596 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 597 <&usb_dmac1 0>, <&usb_dmac1 1>; 598 dma-names = "ch0", "ch1", "ch2", "ch3"; 599 renesas,buswait = <11>; 600 phys = <&usb2_phy0>; 601 phy-names = "usb"; 602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 603 resets = <&cpg 704>, <&cpg 703>; 604 status = "disabled"; 605 }; 606 607 usb_dmac0: dma-controller@e65a0000 { 608 compatible = "renesas,r8a77965-usb-dmac", 609 "renesas,usb-dmac"; 610 reg = <0 0xe65a0000 0 0x100>; 611 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 612 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 613 interrupt-names = "ch0", "ch1"; 614 clocks = <&cpg CPG_MOD 330>; 615 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 616 resets = <&cpg 330>; 617 #dma-cells = <1>; 618 dma-channels = <2>; 619 }; 620 621 usb_dmac1: dma-controller@e65b0000 { 622 compatible = "renesas,r8a77965-usb-dmac", 623 "renesas,usb-dmac"; 624 reg = <0 0xe65b0000 0 0x100>; 625 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 626 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 627 interrupt-names = "ch0", "ch1"; 628 clocks = <&cpg CPG_MOD 331>; 629 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 630 resets = <&cpg 331>; 631 #dma-cells = <1>; 632 dma-channels = <2>; 633 }; 634 635 usb3_phy0: usb-phy@e65ee000 { 636 compatible = "renesas,r8a77965-usb3-phy", 637 "renesas,rcar-gen3-usb3-phy"; 638 reg = <0 0xe65ee000 0 0x90>; 639 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 640 <&usb_extal_clk>; 641 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 642 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 643 resets = <&cpg 328>; 644 #phy-cells = <0>; 645 status = "disabled"; 646 }; 647 648 dmac0: dma-controller@e6700000 { 649 compatible = "renesas,dmac-r8a77965", 650 "renesas,rcar-dmac"; 651 reg = <0 0xe6700000 0 0x10000>; 652 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 653 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 654 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 655 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 656 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 657 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 658 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 659 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 660 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 661 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 662 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 663 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 664 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 665 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 666 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 667 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 668 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 669 interrupt-names = "error", 670 "ch0", "ch1", "ch2", "ch3", 671 "ch4", "ch5", "ch6", "ch7", 672 "ch8", "ch9", "ch10", "ch11", 673 "ch12", "ch13", "ch14", "ch15"; 674 clocks = <&cpg CPG_MOD 219>; 675 clock-names = "fck"; 676 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 677 resets = <&cpg 219>; 678 #dma-cells = <1>; 679 dma-channels = <16>; 680 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 681 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 682 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 683 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 684 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 685 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 686 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 687 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 688 }; 689 690 dmac1: dma-controller@e7300000 { 691 compatible = "renesas,dmac-r8a77965", 692 "renesas,rcar-dmac"; 693 reg = <0 0xe7300000 0 0x10000>; 694 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 695 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 696 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 697 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 698 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 699 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 700 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 701 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 702 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 703 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 704 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 705 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 706 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 707 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 708 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 709 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 710 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 711 interrupt-names = "error", 712 "ch0", "ch1", "ch2", "ch3", 713 "ch4", "ch5", "ch6", "ch7", 714 "ch8", "ch9", "ch10", "ch11", 715 "ch12", "ch13", "ch14", "ch15"; 716 clocks = <&cpg CPG_MOD 218>; 717 clock-names = "fck"; 718 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 719 resets = <&cpg 218>; 720 #dma-cells = <1>; 721 dma-channels = <16>; 722 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 723 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 724 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 725 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 726 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 727 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 728 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 729 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 730 }; 731 732 dmac2: dma-controller@e7310000 { 733 compatible = "renesas,dmac-r8a77965", 734 "renesas,rcar-dmac"; 735 reg = <0 0xe7310000 0 0x10000>; 736 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 737 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 738 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 739 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 740 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 741 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 742 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 743 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 744 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 745 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 746 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 747 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 748 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 749 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 750 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 751 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 752 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 753 interrupt-names = "error", 754 "ch0", "ch1", "ch2", "ch3", 755 "ch4", "ch5", "ch6", "ch7", 756 "ch8", "ch9", "ch10", "ch11", 757 "ch12", "ch13", "ch14", "ch15"; 758 clocks = <&cpg CPG_MOD 217>; 759 clock-names = "fck"; 760 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 761 resets = <&cpg 217>; 762 #dma-cells = <1>; 763 dma-channels = <16>; 764 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 765 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 766 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 767 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 768 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 769 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 770 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 771 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 772 }; 773 774 ipmmu_ds0: mmu@e6740000 { 775 compatible = "renesas,ipmmu-r8a77965"; 776 reg = <0 0xe6740000 0 0x1000>; 777 renesas,ipmmu-main = <&ipmmu_mm 0>; 778 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 779 #iommu-cells = <1>; 780 }; 781 782 ipmmu_ds1: mmu@e7740000 { 783 compatible = "renesas,ipmmu-r8a77965"; 784 reg = <0 0xe7740000 0 0x1000>; 785 renesas,ipmmu-main = <&ipmmu_mm 1>; 786 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 787 #iommu-cells = <1>; 788 }; 789 790 ipmmu_hc: mmu@e6570000 { 791 compatible = "renesas,ipmmu-r8a77965"; 792 reg = <0 0xe6570000 0 0x1000>; 793 renesas,ipmmu-main = <&ipmmu_mm 2>; 794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 795 #iommu-cells = <1>; 796 }; 797 798 ipmmu_ir: mmu@ff8b0000 { 799 compatible = "renesas,ipmmu-r8a77965"; 800 reg = <0 0xff8b0000 0 0x1000>; 801 renesas,ipmmu-main = <&ipmmu_mm 3>; 802 power-domains = <&sysc R8A77965_PD_A3IR>; 803 #iommu-cells = <1>; 804 }; 805 806 ipmmu_mm: mmu@e67b0000 { 807 compatible = "renesas,ipmmu-r8a77965"; 808 reg = <0 0xe67b0000 0 0x1000>; 809 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 811 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 812 #iommu-cells = <1>; 813 }; 814 815 ipmmu_mp: mmu@ec670000 { 816 compatible = "renesas,ipmmu-r8a77965"; 817 reg = <0 0xec670000 0 0x1000>; 818 renesas,ipmmu-main = <&ipmmu_mm 4>; 819 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 820 #iommu-cells = <1>; 821 }; 822 823 ipmmu_pv0: mmu@fd800000 { 824 compatible = "renesas,ipmmu-r8a77965"; 825 reg = <0 0xfd800000 0 0x1000>; 826 renesas,ipmmu-main = <&ipmmu_mm 6>; 827 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 828 #iommu-cells = <1>; 829 }; 830 831 ipmmu_rt: mmu@ffc80000 { 832 compatible = "renesas,ipmmu-r8a77965"; 833 reg = <0 0xffc80000 0 0x1000>; 834 renesas,ipmmu-main = <&ipmmu_mm 10>; 835 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 836 #iommu-cells = <1>; 837 }; 838 839 ipmmu_vc0: mmu@fe6b0000 { 840 compatible = "renesas,ipmmu-r8a77965"; 841 reg = <0 0xfe6b0000 0 0x1000>; 842 renesas,ipmmu-main = <&ipmmu_mm 12>; 843 power-domains = <&sysc R8A77965_PD_A3VC>; 844 #iommu-cells = <1>; 845 }; 846 847 ipmmu_vi0: mmu@febd0000 { 848 compatible = "renesas,ipmmu-r8a77965"; 849 reg = <0 0xfebd0000 0 0x1000>; 850 renesas,ipmmu-main = <&ipmmu_mm 14>; 851 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 852 #iommu-cells = <1>; 853 }; 854 855 ipmmu_vp0: mmu@fe990000 { 856 compatible = "renesas,ipmmu-r8a77965"; 857 reg = <0 0xfe990000 0 0x1000>; 858 renesas,ipmmu-main = <&ipmmu_mm 16>; 859 power-domains = <&sysc R8A77965_PD_A3VP>; 860 #iommu-cells = <1>; 861 }; 862 863 avb: ethernet@e6800000 { 864 compatible = "renesas,etheravb-r8a77965", 865 "renesas,etheravb-rcar-gen3"; 866 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 867 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 892 interrupt-names = "ch0", "ch1", "ch2", "ch3", 893 "ch4", "ch5", "ch6", "ch7", 894 "ch8", "ch9", "ch10", "ch11", 895 "ch12", "ch13", "ch14", "ch15", 896 "ch16", "ch17", "ch18", "ch19", 897 "ch20", "ch21", "ch22", "ch23", 898 "ch24"; 899 clocks = <&cpg CPG_MOD 812>; 900 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 901 resets = <&cpg 812>; 902 phy-mode = "rgmii"; 903 iommus = <&ipmmu_ds0 16>; 904 #address-cells = <1>; 905 #size-cells = <0>; 906 status = "disabled"; 907 }; 908 909 can0: can@e6c30000 { 910 reg = <0 0xe6c30000 0 0x1000>; 911 /* placeholder */ 912 }; 913 914 can1: can@e6c38000 { 915 reg = <0 0xe6c38000 0 0x1000>; 916 /* placeholder */ 917 }; 918 919 pwm0: pwm@e6e30000 { 920 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 921 reg = <0 0xe6e30000 0 8>; 922 #pwm-cells = <2>; 923 clocks = <&cpg CPG_MOD 523>; 924 resets = <&cpg 523>; 925 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 926 status = "disabled"; 927 }; 928 929 pwm1: pwm@e6e31000 { 930 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 931 reg = <0 0xe6e31000 0 8>; 932 #pwm-cells = <2>; 933 clocks = <&cpg CPG_MOD 523>; 934 resets = <&cpg 523>; 935 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 936 status = "disabled"; 937 }; 938 939 pwm2: pwm@e6e32000 { 940 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 941 reg = <0 0xe6e32000 0 8>; 942 #pwm-cells = <2>; 943 clocks = <&cpg CPG_MOD 523>; 944 resets = <&cpg 523>; 945 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 946 status = "disabled"; 947 }; 948 949 pwm3: pwm@e6e33000 { 950 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 951 reg = <0 0xe6e33000 0 8>; 952 #pwm-cells = <2>; 953 clocks = <&cpg CPG_MOD 523>; 954 resets = <&cpg 523>; 955 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 956 status = "disabled"; 957 }; 958 959 pwm4: pwm@e6e34000 { 960 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 961 reg = <0 0xe6e34000 0 8>; 962 #pwm-cells = <2>; 963 clocks = <&cpg CPG_MOD 523>; 964 resets = <&cpg 523>; 965 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 966 status = "disabled"; 967 }; 968 969 pwm5: pwm@e6e35000 { 970 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 971 reg = <0 0xe6e35000 0 8>; 972 #pwm-cells = <2>; 973 clocks = <&cpg CPG_MOD 523>; 974 resets = <&cpg 523>; 975 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 976 status = "disabled"; 977 }; 978 979 pwm6: pwm@e6e36000 { 980 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 981 reg = <0 0xe6e36000 0 8>; 982 #pwm-cells = <2>; 983 clocks = <&cpg CPG_MOD 523>; 984 resets = <&cpg 523>; 985 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 986 status = "disabled"; 987 }; 988 989 scif0: serial@e6e60000 { 990 compatible = "renesas,scif-r8a77965", 991 "renesas,rcar-gen3-scif", "renesas,scif"; 992 reg = <0 0xe6e60000 0 64>; 993 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 994 clocks = <&cpg CPG_MOD 207>, 995 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 996 <&scif_clk>; 997 clock-names = "fck", "brg_int", "scif_clk"; 998 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 999 <&dmac2 0x51>, <&dmac2 0x50>; 1000 dma-names = "tx", "rx", "tx", "rx"; 1001 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1002 resets = <&cpg 207>; 1003 status = "disabled"; 1004 }; 1005 1006 scif1: serial@e6e68000 { 1007 compatible = "renesas,scif-r8a77965", 1008 "renesas,rcar-gen3-scif", "renesas,scif"; 1009 reg = <0 0xe6e68000 0 64>; 1010 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1011 clocks = <&cpg CPG_MOD 206>, 1012 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1013 <&scif_clk>; 1014 clock-names = "fck", "brg_int", "scif_clk"; 1015 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1016 <&dmac2 0x53>, <&dmac2 0x52>; 1017 dma-names = "tx", "rx", "tx", "rx"; 1018 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1019 resets = <&cpg 206>; 1020 status = "disabled"; 1021 }; 1022 1023 scif2: serial@e6e88000 { 1024 compatible = "renesas,scif-r8a77965", 1025 "renesas,rcar-gen3-scif", "renesas,scif"; 1026 reg = <0 0xe6e88000 0 64>; 1027 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1028 clocks = <&cpg CPG_MOD 310>, 1029 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1030 <&scif_clk>; 1031 clock-names = "fck", "brg_int", "scif_clk"; 1032 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1033 resets = <&cpg 310>; 1034 status = "disabled"; 1035 }; 1036 1037 scif3: serial@e6c50000 { 1038 compatible = "renesas,scif-r8a77965", 1039 "renesas,rcar-gen3-scif", "renesas,scif"; 1040 reg = <0 0xe6c50000 0 64>; 1041 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1042 clocks = <&cpg CPG_MOD 204>, 1043 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1044 <&scif_clk>; 1045 clock-names = "fck", "brg_int", "scif_clk"; 1046 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1047 dma-names = "tx", "rx"; 1048 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1049 resets = <&cpg 204>; 1050 status = "disabled"; 1051 }; 1052 1053 scif4: serial@e6c40000 { 1054 compatible = "renesas,scif-r8a77965", 1055 "renesas,rcar-gen3-scif", "renesas,scif"; 1056 reg = <0 0xe6c40000 0 64>; 1057 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1058 clocks = <&cpg CPG_MOD 203>, 1059 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1060 <&scif_clk>; 1061 clock-names = "fck", "brg_int", "scif_clk"; 1062 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1063 dma-names = "tx", "rx"; 1064 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1065 resets = <&cpg 203>; 1066 status = "disabled"; 1067 }; 1068 1069 scif5: serial@e6f30000 { 1070 compatible = "renesas,scif-r8a77965", 1071 "renesas,rcar-gen3-scif", "renesas,scif"; 1072 reg = <0 0xe6f30000 0 64>; 1073 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1074 clocks = <&cpg CPG_MOD 202>, 1075 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1076 <&scif_clk>; 1077 clock-names = "fck", "brg_int", "scif_clk"; 1078 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1079 <&dmac2 0x5b>, <&dmac2 0x5a>; 1080 dma-names = "tx", "rx", "tx", "rx"; 1081 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1082 resets = <&cpg 202>; 1083 status = "disabled"; 1084 }; 1085 1086 msiof0: spi@e6e90000 { 1087 compatible = "renesas,msiof-r8a77965", 1088 "renesas,rcar-gen3-msiof"; 1089 reg = <0 0xe6e90000 0 0x0064>; 1090 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1091 clocks = <&cpg CPG_MOD 211>; 1092 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1093 <&dmac2 0x41>, <&dmac2 0x40>; 1094 dma-names = "tx", "rx", "tx", "rx"; 1095 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1096 resets = <&cpg 211>; 1097 #address-cells = <1>; 1098 #size-cells = <0>; 1099 status = "disabled"; 1100 }; 1101 1102 msiof1: spi@e6ea0000 { 1103 compatible = "renesas,msiof-r8a77965", 1104 "renesas,rcar-gen3-msiof"; 1105 reg = <0 0xe6ea0000 0 0x0064>; 1106 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1107 clocks = <&cpg CPG_MOD 210>; 1108 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1109 <&dmac2 0x43>, <&dmac2 0x42>; 1110 dma-names = "tx", "rx", "tx", "rx"; 1111 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1112 resets = <&cpg 210>; 1113 #address-cells = <1>; 1114 #size-cells = <0>; 1115 status = "disabled"; 1116 }; 1117 1118 msiof2: spi@e6c00000 { 1119 compatible = "renesas,msiof-r8a77965", 1120 "renesas,rcar-gen3-msiof"; 1121 reg = <0 0xe6c00000 0 0x0064>; 1122 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1123 clocks = <&cpg CPG_MOD 209>; 1124 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1125 dma-names = "tx", "rx"; 1126 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1127 resets = <&cpg 209>; 1128 #address-cells = <1>; 1129 #size-cells = <0>; 1130 status = "disabled"; 1131 }; 1132 1133 msiof3: spi@e6c10000 { 1134 compatible = "renesas,msiof-r8a77965", 1135 "renesas,rcar-gen3-msiof"; 1136 reg = <0 0xe6c10000 0 0x0064>; 1137 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1138 clocks = <&cpg CPG_MOD 208>; 1139 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1140 dma-names = "tx", "rx"; 1141 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1142 resets = <&cpg 208>; 1143 #address-cells = <1>; 1144 #size-cells = <0>; 1145 status = "disabled"; 1146 }; 1147 1148 vin0: video@e6ef0000 { 1149 compatible = "renesas,vin-r8a77965"; 1150 reg = <0 0xe6ef0000 0 0x1000>; 1151 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1152 clocks = <&cpg CPG_MOD 811>; 1153 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1154 resets = <&cpg 811>; 1155 renesas,id = <0>; 1156 status = "disabled"; 1157 1158 ports { 1159 #address-cells = <1>; 1160 #size-cells = <0>; 1161 1162 port@1 { 1163 #address-cells = <1>; 1164 #size-cells = <0>; 1165 1166 reg = <1>; 1167 1168 vin0csi20: endpoint@0 { 1169 reg = <0>; 1170 remote-endpoint = <&csi20vin0>; 1171 }; 1172 vin0csi40: endpoint@2 { 1173 reg = <2>; 1174 remote-endpoint = <&csi40vin0>; 1175 }; 1176 }; 1177 }; 1178 }; 1179 1180 vin1: video@e6ef1000 { 1181 compatible = "renesas,vin-r8a77965"; 1182 reg = <0 0xe6ef1000 0 0x1000>; 1183 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1184 clocks = <&cpg CPG_MOD 810>; 1185 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1186 resets = <&cpg 810>; 1187 renesas,id = <1>; 1188 status = "disabled"; 1189 1190 ports { 1191 #address-cells = <1>; 1192 #size-cells = <0>; 1193 1194 port@1 { 1195 #address-cells = <1>; 1196 #size-cells = <0>; 1197 1198 reg = <1>; 1199 1200 vin1csi20: endpoint@0 { 1201 reg = <0>; 1202 remote-endpoint = <&csi20vin1>; 1203 }; 1204 vin1csi40: endpoint@2 { 1205 reg = <2>; 1206 remote-endpoint = <&csi40vin1>; 1207 }; 1208 }; 1209 }; 1210 }; 1211 1212 vin2: video@e6ef2000 { 1213 compatible = "renesas,vin-r8a77965"; 1214 reg = <0 0xe6ef2000 0 0x1000>; 1215 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1216 clocks = <&cpg CPG_MOD 809>; 1217 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1218 resets = <&cpg 809>; 1219 renesas,id = <2>; 1220 status = "disabled"; 1221 1222 ports { 1223 #address-cells = <1>; 1224 #size-cells = <0>; 1225 1226 port@1 { 1227 #address-cells = <1>; 1228 #size-cells = <0>; 1229 1230 reg = <1>; 1231 1232 vin2csi20: endpoint@0 { 1233 reg = <0>; 1234 remote-endpoint = <&csi20vin2>; 1235 }; 1236 vin2csi40: endpoint@2 { 1237 reg = <2>; 1238 remote-endpoint = <&csi40vin2>; 1239 }; 1240 }; 1241 }; 1242 }; 1243 1244 vin3: video@e6ef3000 { 1245 compatible = "renesas,vin-r8a77965"; 1246 reg = <0 0xe6ef3000 0 0x1000>; 1247 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1248 clocks = <&cpg CPG_MOD 808>; 1249 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1250 resets = <&cpg 808>; 1251 renesas,id = <3>; 1252 status = "disabled"; 1253 1254 ports { 1255 #address-cells = <1>; 1256 #size-cells = <0>; 1257 1258 port@1 { 1259 #address-cells = <1>; 1260 #size-cells = <0>; 1261 1262 reg = <1>; 1263 1264 vin3csi20: endpoint@0 { 1265 reg = <0>; 1266 remote-endpoint = <&csi20vin3>; 1267 }; 1268 vin3csi40: endpoint@2 { 1269 reg = <2>; 1270 remote-endpoint = <&csi40vin3>; 1271 }; 1272 }; 1273 }; 1274 }; 1275 1276 vin4: video@e6ef4000 { 1277 compatible = "renesas,vin-r8a77965"; 1278 reg = <0 0xe6ef4000 0 0x1000>; 1279 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1280 clocks = <&cpg CPG_MOD 807>; 1281 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1282 resets = <&cpg 807>; 1283 renesas,id = <4>; 1284 status = "disabled"; 1285 1286 ports { 1287 #address-cells = <1>; 1288 #size-cells = <0>; 1289 1290 port@1 { 1291 #address-cells = <1>; 1292 #size-cells = <0>; 1293 1294 reg = <1>; 1295 1296 vin4csi20: endpoint@0 { 1297 reg = <0>; 1298 remote-endpoint = <&csi20vin4>; 1299 }; 1300 vin4csi40: endpoint@2 { 1301 reg = <2>; 1302 remote-endpoint = <&csi40vin4>; 1303 }; 1304 }; 1305 }; 1306 }; 1307 1308 vin5: video@e6ef5000 { 1309 compatible = "renesas,vin-r8a77965"; 1310 reg = <0 0xe6ef5000 0 0x1000>; 1311 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1312 clocks = <&cpg CPG_MOD 806>; 1313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1314 resets = <&cpg 806>; 1315 renesas,id = <5>; 1316 status = "disabled"; 1317 1318 ports { 1319 #address-cells = <1>; 1320 #size-cells = <0>; 1321 1322 port@1 { 1323 #address-cells = <1>; 1324 #size-cells = <0>; 1325 1326 reg = <1>; 1327 1328 vin5csi20: endpoint@0 { 1329 reg = <0>; 1330 remote-endpoint = <&csi20vin5>; 1331 }; 1332 vin5csi40: endpoint@2 { 1333 reg = <2>; 1334 remote-endpoint = <&csi40vin5>; 1335 }; 1336 }; 1337 }; 1338 }; 1339 1340 vin6: video@e6ef6000 { 1341 compatible = "renesas,vin-r8a77965"; 1342 reg = <0 0xe6ef6000 0 0x1000>; 1343 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1344 clocks = <&cpg CPG_MOD 805>; 1345 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1346 resets = <&cpg 805>; 1347 renesas,id = <6>; 1348 status = "disabled"; 1349 1350 ports { 1351 #address-cells = <1>; 1352 #size-cells = <0>; 1353 1354 port@1 { 1355 #address-cells = <1>; 1356 #size-cells = <0>; 1357 1358 reg = <1>; 1359 1360 vin6csi20: endpoint@0 { 1361 reg = <0>; 1362 remote-endpoint = <&csi20vin6>; 1363 }; 1364 vin6csi40: endpoint@2 { 1365 reg = <2>; 1366 remote-endpoint = <&csi40vin6>; 1367 }; 1368 }; 1369 }; 1370 }; 1371 1372 vin7: video@e6ef7000 { 1373 compatible = "renesas,vin-r8a77965"; 1374 reg = <0 0xe6ef7000 0 0x1000>; 1375 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1376 clocks = <&cpg CPG_MOD 804>; 1377 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1378 resets = <&cpg 804>; 1379 renesas,id = <7>; 1380 status = "disabled"; 1381 1382 ports { 1383 #address-cells = <1>; 1384 #size-cells = <0>; 1385 1386 port@1 { 1387 #address-cells = <1>; 1388 #size-cells = <0>; 1389 1390 reg = <1>; 1391 1392 vin7csi20: endpoint@0 { 1393 reg = <0>; 1394 remote-endpoint = <&csi20vin7>; 1395 }; 1396 vin7csi40: endpoint@2 { 1397 reg = <2>; 1398 remote-endpoint = <&csi40vin7>; 1399 }; 1400 }; 1401 }; 1402 }; 1403 1404 rcar_sound: sound@ec500000 { 1405 /* 1406 * #sound-dai-cells is required 1407 * 1408 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1409 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1410 */ 1411 /* 1412 * #clock-cells is required for audio_clkout0/1/2/3 1413 * 1414 * clkout : #clock-cells = <0>; <&rcar_sound>; 1415 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1416 */ 1417 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1418 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1419 <0 0xec5a0000 0 0x100>, /* ADG */ 1420 <0 0xec540000 0 0x1000>, /* SSIU */ 1421 <0 0xec541000 0 0x280>, /* SSI */ 1422 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1423 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1424 1425 clocks = <&cpg CPG_MOD 1005>, 1426 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1427 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1428 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1429 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1430 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1431 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1432 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1433 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1434 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1435 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1436 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1437 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1438 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1439 <&audio_clk_a>, <&audio_clk_b>, 1440 <&audio_clk_c>, 1441 <&cpg CPG_CORE R8A77965_CLK_S0D4>; 1442 clock-names = "ssi-all", 1443 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1444 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1445 "ssi.1", "ssi.0", 1446 "src.9", "src.8", "src.7", "src.6", 1447 "src.5", "src.4", "src.3", "src.2", 1448 "src.1", "src.0", 1449 "mix.1", "mix.0", 1450 "ctu.1", "ctu.0", 1451 "dvc.0", "dvc.1", 1452 "clk_a", "clk_b", "clk_c", "clk_i"; 1453 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1454 resets = <&cpg 1005>, 1455 <&cpg 1006>, <&cpg 1007>, 1456 <&cpg 1008>, <&cpg 1009>, 1457 <&cpg 1010>, <&cpg 1011>, 1458 <&cpg 1012>, <&cpg 1013>, 1459 <&cpg 1014>, <&cpg 1015>; 1460 reset-names = "ssi-all", 1461 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1462 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1463 "ssi.1", "ssi.0"; 1464 status = "disabled"; 1465 1466 rcar_sound,dvc { 1467 dvc0: dvc-0 { 1468 dmas = <&audma1 0xbc>; 1469 dma-names = "tx"; 1470 }; 1471 dvc1: dvc-1 { 1472 dmas = <&audma1 0xbe>; 1473 dma-names = "tx"; 1474 }; 1475 }; 1476 1477 rcar_sound,mix { 1478 mix0: mix-0 { }; 1479 mix1: mix-1 { }; 1480 }; 1481 1482 rcar_sound,ctu { 1483 ctu00: ctu-0 { }; 1484 ctu01: ctu-1 { }; 1485 ctu02: ctu-2 { }; 1486 ctu03: ctu-3 { }; 1487 ctu10: ctu-4 { }; 1488 ctu11: ctu-5 { }; 1489 ctu12: ctu-6 { }; 1490 ctu13: ctu-7 { }; 1491 }; 1492 1493 rcar_sound,src { 1494 src0: src-0 { 1495 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1496 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1497 dma-names = "rx", "tx"; 1498 }; 1499 src1: src-1 { 1500 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1501 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1502 dma-names = "rx", "tx"; 1503 }; 1504 src2: src-2 { 1505 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1506 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1507 dma-names = "rx", "tx"; 1508 }; 1509 src3: src-3 { 1510 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1511 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1512 dma-names = "rx", "tx"; 1513 }; 1514 src4: src-4 { 1515 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1516 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1517 dma-names = "rx", "tx"; 1518 }; 1519 src5: src-5 { 1520 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1521 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1522 dma-names = "rx", "tx"; 1523 }; 1524 src6: src-6 { 1525 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1526 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1527 dma-names = "rx", "tx"; 1528 }; 1529 src7: src-7 { 1530 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1531 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1532 dma-names = "rx", "tx"; 1533 }; 1534 src8: src-8 { 1535 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1536 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1537 dma-names = "rx", "tx"; 1538 }; 1539 src9: src-9 { 1540 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1541 dmas = <&audma0 0x97>, <&audma1 0xba>; 1542 dma-names = "rx", "tx"; 1543 }; 1544 }; 1545 1546 rcar_sound,ssi { 1547 ssi0: ssi-0 { 1548 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1549 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1550 dma-names = "rx", "tx", "rxu", "txu"; 1551 }; 1552 ssi1: ssi-1 { 1553 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1554 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1555 dma-names = "rx", "tx", "rxu", "txu"; 1556 }; 1557 ssi2: ssi-2 { 1558 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1559 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1560 dma-names = "rx", "tx", "rxu", "txu"; 1561 }; 1562 ssi3: ssi-3 { 1563 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1564 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1565 dma-names = "rx", "tx", "rxu", "txu"; 1566 }; 1567 ssi4: ssi-4 { 1568 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1569 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1570 dma-names = "rx", "tx", "rxu", "txu"; 1571 }; 1572 ssi5: ssi-5 { 1573 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1574 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1575 dma-names = "rx", "tx", "rxu", "txu"; 1576 }; 1577 ssi6: ssi-6 { 1578 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1579 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1580 dma-names = "rx", "tx", "rxu", "txu"; 1581 }; 1582 ssi7: ssi-7 { 1583 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1584 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1585 dma-names = "rx", "tx", "rxu", "txu"; 1586 }; 1587 ssi8: ssi-8 { 1588 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1589 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1590 dma-names = "rx", "tx", "rxu", "txu"; 1591 }; 1592 ssi9: ssi-9 { 1593 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1594 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1595 dma-names = "rx", "tx", "rxu", "txu"; 1596 }; 1597 }; 1598 }; 1599 1600 audma0: dma-controller@ec700000 { 1601 compatible = "renesas,dmac-r8a77965", 1602 "renesas,rcar-dmac"; 1603 reg = <0 0xec700000 0 0x10000>; 1604 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1605 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1606 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1607 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1608 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1609 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1610 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1611 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1612 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1613 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1614 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1615 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1616 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1617 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1618 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1619 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1620 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1621 interrupt-names = "error", 1622 "ch0", "ch1", "ch2", "ch3", 1623 "ch4", "ch5", "ch6", "ch7", 1624 "ch8", "ch9", "ch10", "ch11", 1625 "ch12", "ch13", "ch14", "ch15"; 1626 clocks = <&cpg CPG_MOD 502>; 1627 clock-names = "fck"; 1628 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1629 resets = <&cpg 502>; 1630 #dma-cells = <1>; 1631 dma-channels = <16>; 1632 }; 1633 1634 audma1: dma-controller@ec720000 { 1635 compatible = "renesas,dmac-r8a77965", 1636 "renesas,rcar-dmac"; 1637 reg = <0 0xec720000 0 0x10000>; 1638 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH 1639 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 1640 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 1641 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 1642 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 1643 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 1644 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 1645 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 1646 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 1647 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 1648 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH 1649 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 1650 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 1651 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 1652 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH 1653 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 1654 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 1655 interrupt-names = "error", 1656 "ch0", "ch1", "ch2", "ch3", 1657 "ch4", "ch5", "ch6", "ch7", 1658 "ch8", "ch9", "ch10", "ch11", 1659 "ch12", "ch13", "ch14", "ch15"; 1660 clocks = <&cpg CPG_MOD 501>; 1661 clock-names = "fck"; 1662 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1663 resets = <&cpg 501>; 1664 #dma-cells = <1>; 1665 dma-channels = <16>; 1666 }; 1667 1668 xhci0: usb@ee000000 { 1669 compatible = "renesas,xhci-r8a77965", 1670 "renesas,rcar-gen3-xhci"; 1671 reg = <0 0xee000000 0 0xc00>; 1672 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1673 clocks = <&cpg CPG_MOD 328>; 1674 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1675 resets = <&cpg 328>; 1676 status = "disabled"; 1677 }; 1678 1679 usb3_peri0: usb@ee020000 { 1680 compatible = "renesas,r8a77965-usb3-peri", 1681 "renesas,rcar-gen3-usb3-peri"; 1682 reg = <0 0xee020000 0 0x400>; 1683 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1684 clocks = <&cpg CPG_MOD 328>; 1685 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1686 resets = <&cpg 328>; 1687 status = "disabled"; 1688 }; 1689 1690 ohci0: usb@ee080000 { 1691 compatible = "generic-ohci"; 1692 reg = <0 0xee080000 0 0x100>; 1693 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1694 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1695 phys = <&usb2_phy0>; 1696 phy-names = "usb"; 1697 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1698 resets = <&cpg 703>, <&cpg 704>; 1699 status = "disabled"; 1700 }; 1701 1702 ohci1: usb@ee0a0000 { 1703 compatible = "generic-ohci"; 1704 reg = <0 0xee0a0000 0 0x100>; 1705 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1706 clocks = <&cpg CPG_MOD 702>; 1707 phys = <&usb2_phy1>; 1708 phy-names = "usb"; 1709 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1710 resets = <&cpg 702>; 1711 status = "disabled"; 1712 }; 1713 1714 ehci0: usb@ee080100 { 1715 compatible = "generic-ehci"; 1716 reg = <0 0xee080100 0 0x100>; 1717 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1718 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1719 phys = <&usb2_phy0>; 1720 phy-names = "usb"; 1721 companion = <&ohci0>; 1722 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1723 resets = <&cpg 703>, <&cpg 704>; 1724 status = "disabled"; 1725 }; 1726 1727 ehci1: usb@ee0a0100 { 1728 compatible = "generic-ehci"; 1729 reg = <0 0xee0a0100 0 0x100>; 1730 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1731 clocks = <&cpg CPG_MOD 702>; 1732 phys = <&usb2_phy1>; 1733 phy-names = "usb"; 1734 companion = <&ohci1>; 1735 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1736 resets = <&cpg 702>; 1737 status = "disabled"; 1738 }; 1739 1740 usb2_phy0: usb-phy@ee080200 { 1741 compatible = "renesas,usb2-phy-r8a77965", 1742 "renesas,rcar-gen3-usb2-phy"; 1743 reg = <0 0xee080200 0 0x700>; 1744 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1745 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1746 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1747 resets = <&cpg 703>, <&cpg 704>; 1748 #phy-cells = <0>; 1749 status = "disabled"; 1750 }; 1751 1752 usb2_phy1: usb-phy@ee0a0200 { 1753 compatible = "renesas,usb2-phy-r8a77965", 1754 "renesas,rcar-gen3-usb2-phy"; 1755 reg = <0 0xee0a0200 0 0x700>; 1756 clocks = <&cpg CPG_MOD 702>; 1757 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1758 resets = <&cpg 702>; 1759 #phy-cells = <0>; 1760 status = "disabled"; 1761 }; 1762 1763 sdhi0: sd@ee100000 { 1764 compatible = "renesas,sdhi-r8a77965", 1765 "renesas,rcar-gen3-sdhi"; 1766 reg = <0 0xee100000 0 0x2000>; 1767 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1768 clocks = <&cpg CPG_MOD 314>; 1769 max-frequency = <200000000>; 1770 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1771 resets = <&cpg 314>; 1772 status = "disabled"; 1773 }; 1774 1775 sdhi1: sd@ee120000 { 1776 compatible = "renesas,sdhi-r8a77965", 1777 "renesas,rcar-gen3-sdhi"; 1778 reg = <0 0xee120000 0 0x2000>; 1779 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1780 clocks = <&cpg CPG_MOD 313>; 1781 max-frequency = <200000000>; 1782 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1783 resets = <&cpg 313>; 1784 status = "disabled"; 1785 }; 1786 1787 sdhi2: sd@ee140000 { 1788 compatible = "renesas,sdhi-r8a77965", 1789 "renesas,rcar-gen3-sdhi"; 1790 reg = <0 0xee140000 0 0x2000>; 1791 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1792 clocks = <&cpg CPG_MOD 312>; 1793 max-frequency = <200000000>; 1794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1795 resets = <&cpg 312>; 1796 status = "disabled"; 1797 }; 1798 1799 sdhi3: sd@ee160000 { 1800 compatible = "renesas,sdhi-r8a77965", 1801 "renesas,rcar-gen3-sdhi"; 1802 reg = <0 0xee160000 0 0x2000>; 1803 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1804 clocks = <&cpg CPG_MOD 311>; 1805 max-frequency = <200000000>; 1806 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1807 resets = <&cpg 311>; 1808 status = "disabled"; 1809 }; 1810 1811 sata: sata@ee300000 { 1812 compatible = "renesas,sata-r8a77965", 1813 "renesas,rcar-gen3-sata"; 1814 reg = <0 0xee300000 0 0x200000>; 1815 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1816 clocks = <&cpg CPG_MOD 815>; 1817 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1818 resets = <&cpg 815>; 1819 status = "disabled"; 1820 }; 1821 1822 gic: interrupt-controller@f1010000 { 1823 compatible = "arm,gic-400"; 1824 #interrupt-cells = <3>; 1825 #address-cells = <0>; 1826 interrupt-controller; 1827 reg = <0x0 0xf1010000 0 0x1000>, 1828 <0x0 0xf1020000 0 0x20000>, 1829 <0x0 0xf1040000 0 0x20000>, 1830 <0x0 0xf1060000 0 0x20000>; 1831 interrupts = <GIC_PPI 9 1832 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1833 clocks = <&cpg CPG_MOD 408>; 1834 clock-names = "clk"; 1835 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1836 resets = <&cpg 408>; 1837 }; 1838 1839 pciec0: pcie@fe000000 { 1840 compatible = "renesas,pcie-r8a77965", 1841 "renesas,pcie-rcar-gen3"; 1842 reg = <0 0xfe000000 0 0x80000>; 1843 #address-cells = <3>; 1844 #size-cells = <2>; 1845 bus-range = <0x00 0xff>; 1846 device_type = "pci"; 1847 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1848 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1849 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1850 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1851 /* Map all possible DDR as inbound ranges */ 1852 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1853 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1854 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1855 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1856 #interrupt-cells = <1>; 1857 interrupt-map-mask = <0 0 0 0>; 1858 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1859 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1860 clock-names = "pcie", "pcie_bus"; 1861 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1862 resets = <&cpg 319>; 1863 status = "disabled"; 1864 }; 1865 1866 pciec1: pcie@ee800000 { 1867 compatible = "renesas,pcie-r8a77965", 1868 "renesas,pcie-rcar-gen3"; 1869 reg = <0 0xee800000 0 0x80000>; 1870 #address-cells = <3>; 1871 #size-cells = <2>; 1872 bus-range = <0x00 0xff>; 1873 device_type = "pci"; 1874 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 1875 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 1876 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 1877 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 1878 /* Map all possible DDR as inbound ranges */ 1879 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1880 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 1881 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 1882 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 1883 #interrupt-cells = <1>; 1884 interrupt-map-mask = <0 0 0 0>; 1885 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1886 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 1887 clock-names = "pcie", "pcie_bus"; 1888 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1889 resets = <&cpg 318>; 1890 status = "disabled"; 1891 }; 1892 1893 fdp1@fe940000 { 1894 compatible = "renesas,fdp1"; 1895 reg = <0 0xfe940000 0 0x2400>; 1896 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1897 clocks = <&cpg CPG_MOD 119>; 1898 power-domains = <&sysc R8A77965_PD_A3VP>; 1899 resets = <&cpg 119>; 1900 renesas,fcp = <&fcpf0>; 1901 }; 1902 1903 fcpf0: fcp@fe950000 { 1904 compatible = "renesas,fcpf"; 1905 reg = <0 0xfe950000 0 0x200>; 1906 clocks = <&cpg CPG_MOD 615>; 1907 power-domains = <&sysc R8A77965_PD_A3VP>; 1908 resets = <&cpg 615>; 1909 }; 1910 1911 vspb: vsp@fe960000 { 1912 compatible = "renesas,vsp2"; 1913 reg = <0 0xfe960000 0 0x8000>; 1914 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1915 clocks = <&cpg CPG_MOD 626>; 1916 power-domains = <&sysc R8A77965_PD_A3VP>; 1917 resets = <&cpg 626>; 1918 1919 renesas,fcp = <&fcpvb0>; 1920 }; 1921 1922 fcpvb0: fcp@fe96f000 { 1923 compatible = "renesas,fcpv"; 1924 reg = <0 0xfe96f000 0 0x200>; 1925 clocks = <&cpg CPG_MOD 607>; 1926 power-domains = <&sysc R8A77965_PD_A3VP>; 1927 resets = <&cpg 607>; 1928 }; 1929 1930 vspi0: vsp@fe9a0000 { 1931 compatible = "renesas,vsp2"; 1932 reg = <0 0xfe9a0000 0 0x8000>; 1933 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1934 clocks = <&cpg CPG_MOD 631>; 1935 power-domains = <&sysc R8A77965_PD_A3VP>; 1936 resets = <&cpg 631>; 1937 1938 renesas,fcp = <&fcpvi0>; 1939 }; 1940 1941 fcpvi0: fcp@fe9af000 { 1942 compatible = "renesas,fcpv"; 1943 reg = <0 0xfe9af000 0 0x200>; 1944 clocks = <&cpg CPG_MOD 611>; 1945 power-domains = <&sysc R8A77965_PD_A3VP>; 1946 resets = <&cpg 611>; 1947 }; 1948 1949 vspd0: vsp@fea20000 { 1950 compatible = "renesas,vsp2"; 1951 reg = <0 0xfea20000 0 0x5000>; 1952 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1953 clocks = <&cpg CPG_MOD 623>; 1954 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1955 resets = <&cpg 623>; 1956 1957 renesas,fcp = <&fcpvd0>; 1958 }; 1959 1960 fcpvd0: fcp@fea27000 { 1961 compatible = "renesas,fcpv"; 1962 reg = <0 0xfea27000 0 0x200>; 1963 clocks = <&cpg CPG_MOD 603>; 1964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1965 resets = <&cpg 603>; 1966 }; 1967 1968 vspd1: vsp@fea28000 { 1969 compatible = "renesas,vsp2"; 1970 reg = <0 0xfea28000 0 0x5000>; 1971 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1972 clocks = <&cpg CPG_MOD 622>; 1973 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1974 resets = <&cpg 622>; 1975 1976 renesas,fcp = <&fcpvd1>; 1977 }; 1978 1979 fcpvd1: fcp@fea2f000 { 1980 compatible = "renesas,fcpv"; 1981 reg = <0 0xfea2f000 0 0x200>; 1982 clocks = <&cpg CPG_MOD 602>; 1983 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1984 resets = <&cpg 602>; 1985 }; 1986 1987 csi20: csi2@fea80000 { 1988 compatible = "renesas,r8a77965-csi2"; 1989 reg = <0 0xfea80000 0 0x10000>; 1990 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1991 clocks = <&cpg CPG_MOD 714>; 1992 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1993 resets = <&cpg 714>; 1994 status = "disabled"; 1995 1996 ports { 1997 #address-cells = <1>; 1998 #size-cells = <0>; 1999 2000 port@1 { 2001 #address-cells = <1>; 2002 #size-cells = <0>; 2003 2004 reg = <1>; 2005 2006 csi20vin0: endpoint@0 { 2007 reg = <0>; 2008 remote-endpoint = <&vin0csi20>; 2009 }; 2010 csi20vin1: endpoint@1 { 2011 reg = <1>; 2012 remote-endpoint = <&vin1csi20>; 2013 }; 2014 csi20vin2: endpoint@2 { 2015 reg = <2>; 2016 remote-endpoint = <&vin2csi20>; 2017 }; 2018 csi20vin3: endpoint@3 { 2019 reg = <3>; 2020 remote-endpoint = <&vin3csi20>; 2021 }; 2022 csi20vin4: endpoint@4 { 2023 reg = <4>; 2024 remote-endpoint = <&vin4csi20>; 2025 }; 2026 csi20vin5: endpoint@5 { 2027 reg = <5>; 2028 remote-endpoint = <&vin5csi20>; 2029 }; 2030 csi20vin6: endpoint@6 { 2031 reg = <6>; 2032 remote-endpoint = <&vin6csi20>; 2033 }; 2034 csi20vin7: endpoint@7 { 2035 reg = <7>; 2036 remote-endpoint = <&vin7csi20>; 2037 }; 2038 }; 2039 }; 2040 }; 2041 2042 csi40: csi2@feaa0000 { 2043 compatible = "renesas,r8a77965-csi2"; 2044 reg = <0 0xfeaa0000 0 0x10000>; 2045 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2046 clocks = <&cpg CPG_MOD 716>; 2047 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2048 resets = <&cpg 716>; 2049 status = "disabled"; 2050 2051 ports { 2052 #address-cells = <1>; 2053 #size-cells = <0>; 2054 2055 port@1 { 2056 #address-cells = <1>; 2057 #size-cells = <0>; 2058 2059 reg = <1>; 2060 2061 csi40vin0: endpoint@0 { 2062 reg = <0>; 2063 remote-endpoint = <&vin0csi40>; 2064 }; 2065 csi40vin1: endpoint@1 { 2066 reg = <1>; 2067 remote-endpoint = <&vin1csi40>; 2068 }; 2069 csi40vin2: endpoint@2 { 2070 reg = <2>; 2071 remote-endpoint = <&vin2csi40>; 2072 }; 2073 csi40vin3: endpoint@3 { 2074 reg = <3>; 2075 remote-endpoint = <&vin3csi40>; 2076 }; 2077 csi40vin4: endpoint@4 { 2078 reg = <4>; 2079 remote-endpoint = <&vin4csi40>; 2080 }; 2081 csi40vin5: endpoint@5 { 2082 reg = <5>; 2083 remote-endpoint = <&vin5csi40>; 2084 }; 2085 csi40vin6: endpoint@6 { 2086 reg = <6>; 2087 remote-endpoint = <&vin6csi40>; 2088 }; 2089 csi40vin7: endpoint@7 { 2090 reg = <7>; 2091 remote-endpoint = <&vin7csi40>; 2092 }; 2093 }; 2094 }; 2095 }; 2096 2097 hdmi0: hdmi@fead0000 { 2098 compatible = "renesas,r8a77965-hdmi", 2099 "renesas,rcar-gen3-hdmi"; 2100 reg = <0 0xfead0000 0 0x10000>; 2101 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2102 clocks = <&cpg CPG_MOD 729>, 2103 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2104 clock-names = "iahb", "isfr"; 2105 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2106 resets = <&cpg 729>; 2107 status = "disabled"; 2108 2109 ports { 2110 #address-cells = <1>; 2111 #size-cells = <0>; 2112 port@0 { 2113 reg = <0>; 2114 dw_hdmi0_in: endpoint { 2115 remote-endpoint = <&du_out_hdmi0>; 2116 }; 2117 }; 2118 port@1 { 2119 reg = <1>; 2120 }; 2121 }; 2122 }; 2123 2124 du: display@feb00000 { 2125 compatible = "renesas,du-r8a77965"; 2126 reg = <0 0xfeb00000 0 0x80000>; 2127 reg-names = "du"; 2128 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2129 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2130 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2131 clocks = <&cpg CPG_MOD 724>, 2132 <&cpg CPG_MOD 723>, 2133 <&cpg CPG_MOD 721>; 2134 clock-names = "du.0", "du.1", "du.3"; 2135 status = "disabled"; 2136 2137 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; 2138 2139 ports { 2140 #address-cells = <1>; 2141 #size-cells = <0>; 2142 2143 port@0 { 2144 reg = <0>; 2145 du_out_rgb: endpoint { 2146 }; 2147 }; 2148 port@1 { 2149 reg = <1>; 2150 du_out_hdmi0: endpoint { 2151 remote-endpoint = <&dw_hdmi0_in>; 2152 }; 2153 }; 2154 port@2 { 2155 reg = <2>; 2156 du_out_lvds0: endpoint { 2157 remote-endpoint = <&lvds0_in>; 2158 }; 2159 }; 2160 }; 2161 }; 2162 2163 lvds0: lvds@feb90000 { 2164 compatible = "renesas,r8a77965-lvds"; 2165 reg = <0 0xfeb90000 0 0x14>; 2166 clocks = <&cpg CPG_MOD 727>; 2167 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2168 resets = <&cpg 727>; 2169 status = "disabled"; 2170 2171 ports { 2172 #address-cells = <1>; 2173 #size-cells = <0>; 2174 2175 port@0 { 2176 reg = <0>; 2177 lvds0_in: endpoint { 2178 remote-endpoint = <&du_out_lvds0>; 2179 }; 2180 }; 2181 port@1 { 2182 reg = <1>; 2183 lvds0_out: endpoint { 2184 }; 2185 }; 2186 }; 2187 }; 2188 2189 prr: chipid@fff00044 { 2190 compatible = "renesas,prr"; 2191 reg = <0 0xfff00044 0 4>; 2192 }; 2193 }; 2194 2195 thermal-zones { 2196 sensor_thermal1: sensor-thermal1 { 2197 polling-delay-passive = <250>; 2198 polling-delay = <1000>; 2199 thermal-sensors = <&tsc 0>; 2200 2201 trips { 2202 sensor1_crit: sensor1-crit { 2203 temperature = <120000>; 2204 hysteresis = <1000>; 2205 type = "critical"; 2206 }; 2207 }; 2208 }; 2209 2210 sensor_thermal2: sensor-thermal2 { 2211 polling-delay-passive = <250>; 2212 polling-delay = <1000>; 2213 thermal-sensors = <&tsc 1>; 2214 2215 trips { 2216 sensor2_crit: sensor2-crit { 2217 temperature = <120000>; 2218 hysteresis = <1000>; 2219 type = "critical"; 2220 }; 2221 }; 2222 }; 2223 2224 sensor_thermal3: sensor-thermal3 { 2225 polling-delay-passive = <250>; 2226 polling-delay = <1000>; 2227 thermal-sensors = <&tsc 2>; 2228 2229 trips { 2230 sensor3_crit: sensor3-crit { 2231 temperature = <120000>; 2232 hysteresis = <1000>; 2233 type = "critical"; 2234 }; 2235 }; 2236 }; 2237 }; 2238 2239 timer { 2240 compatible = "arm,armv8-timer"; 2241 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2242 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2243 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2244 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2245 }; 2246 2247 /* External USB clocks - can be overridden by the board */ 2248 usb3s0_clk: usb3s0 { 2249 compatible = "fixed-clock"; 2250 #clock-cells = <0>; 2251 clock-frequency = <0>; 2252 }; 2253 2254 usb_extal_clk: usb_extal { 2255 compatible = "fixed-clock"; 2256 #clock-cells = <0>; 2257 clock-frequency = <0>; 2258 }; 2259}; 2260