1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cluster0_opp: opp_table0 { 64 compatible = "operating-points-v2"; 65 opp-shared; 66 67 opp-500000000 { 68 opp-hz = /bits/ 64 <500000000>; 69 opp-microvolt = <830000>; 70 clock-latency-ns = <300000>; 71 }; 72 opp-1000000000 { 73 opp-hz = /bits/ 64 <1000000000>; 74 opp-microvolt = <830000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1500000000 { 78 opp-hz = /bits/ 64 <1500000000>; 79 opp-microvolt = <830000>; 80 clock-latency-ns = <300000>; 81 opp-suspend; 82 }; 83 opp-1600000000 { 84 opp-hz = /bits/ 64 <1600000000>; 85 opp-microvolt = <900000>; 86 clock-latency-ns = <300000>; 87 turbo-mode; 88 }; 89 opp-1700000000 { 90 opp-hz = /bits/ 64 <1700000000>; 91 opp-microvolt = <900000>; 92 clock-latency-ns = <300000>; 93 turbo-mode; 94 }; 95 opp-1800000000 { 96 opp-hz = /bits/ 64 <1800000000>; 97 opp-microvolt = <960000>; 98 clock-latency-ns = <300000>; 99 turbo-mode; 100 }; 101 }; 102 103 cpus { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 a57_0: cpu@0 { 108 compatible = "arm,cortex-a57", "arm,armv8"; 109 reg = <0x0>; 110 device_type = "cpu"; 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 112 next-level-cache = <&L2_CA57>; 113 enable-method = "psci"; 114 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 115 operating-points-v2 = <&cluster0_opp>; 116 }; 117 118 a57_1: cpu@1 { 119 compatible = "arm,cortex-a57", "arm,armv8"; 120 reg = <0x1>; 121 device_type = "cpu"; 122 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 123 next-level-cache = <&L2_CA57>; 124 enable-method = "psci"; 125 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 126 operating-points-v2 = <&cluster0_opp>; 127 }; 128 129 L2_CA57: cache-controller-0 { 130 compatible = "cache"; 131 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 132 cache-unified; 133 cache-level = <2>; 134 }; 135 }; 136 137 extal_clk: extal { 138 compatible = "fixed-clock"; 139 #clock-cells = <0>; 140 /* This value must be overridden by the board */ 141 clock-frequency = <0>; 142 }; 143 144 extalr_clk: extalr { 145 compatible = "fixed-clock"; 146 #clock-cells = <0>; 147 /* This value must be overridden by the board */ 148 clock-frequency = <0>; 149 }; 150 151 /* External PCIe clock - can be overridden by the board */ 152 pcie_bus_clk: pcie_bus { 153 compatible = "fixed-clock"; 154 #clock-cells = <0>; 155 clock-frequency = <0>; 156 }; 157 158 pmu_a57 { 159 compatible = "arm,cortex-a57-pmu"; 160 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 161 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 162 interrupt-affinity = <&a57_0>, 163 <&a57_1>; 164 }; 165 166 psci { 167 compatible = "arm,psci-1.0", "arm,psci-0.2"; 168 method = "smc"; 169 }; 170 171 /* External SCIF clock - to be overridden by boards that provide it */ 172 scif_clk: scif { 173 compatible = "fixed-clock"; 174 #clock-cells = <0>; 175 clock-frequency = <0>; 176 }; 177 178 soc { 179 compatible = "simple-bus"; 180 interrupt-parent = <&gic>; 181 #address-cells = <2>; 182 #size-cells = <2>; 183 ranges; 184 185 rwdt: watchdog@e6020000 { 186 compatible = "renesas,r8a77965-wdt", 187 "renesas,rcar-gen3-wdt"; 188 reg = <0 0xe6020000 0 0x0c>; 189 clocks = <&cpg CPG_MOD 402>; 190 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 191 resets = <&cpg 402>; 192 status = "disabled"; 193 }; 194 195 gpio0: gpio@e6050000 { 196 compatible = "renesas,gpio-r8a77965", 197 "renesas,rcar-gen3-gpio"; 198 reg = <0 0xe6050000 0 0x50>; 199 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 200 #gpio-cells = <2>; 201 gpio-controller; 202 gpio-ranges = <&pfc 0 0 16>; 203 #interrupt-cells = <2>; 204 interrupt-controller; 205 clocks = <&cpg CPG_MOD 912>; 206 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 207 resets = <&cpg 912>; 208 }; 209 210 gpio1: gpio@e6051000 { 211 compatible = "renesas,gpio-r8a77965", 212 "renesas,rcar-gen3-gpio"; 213 reg = <0 0xe6051000 0 0x50>; 214 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 215 #gpio-cells = <2>; 216 gpio-controller; 217 gpio-ranges = <&pfc 0 32 29>; 218 #interrupt-cells = <2>; 219 interrupt-controller; 220 clocks = <&cpg CPG_MOD 911>; 221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 222 resets = <&cpg 911>; 223 }; 224 225 gpio2: gpio@e6052000 { 226 compatible = "renesas,gpio-r8a77965", 227 "renesas,rcar-gen3-gpio"; 228 reg = <0 0xe6052000 0 0x50>; 229 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 230 #gpio-cells = <2>; 231 gpio-controller; 232 gpio-ranges = <&pfc 0 64 15>; 233 #interrupt-cells = <2>; 234 interrupt-controller; 235 clocks = <&cpg CPG_MOD 910>; 236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 237 resets = <&cpg 910>; 238 }; 239 240 gpio3: gpio@e6053000 { 241 compatible = "renesas,gpio-r8a77965", 242 "renesas,rcar-gen3-gpio"; 243 reg = <0 0xe6053000 0 0x50>; 244 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 245 #gpio-cells = <2>; 246 gpio-controller; 247 gpio-ranges = <&pfc 0 96 16>; 248 #interrupt-cells = <2>; 249 interrupt-controller; 250 clocks = <&cpg CPG_MOD 909>; 251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 252 resets = <&cpg 909>; 253 }; 254 255 gpio4: gpio@e6054000 { 256 compatible = "renesas,gpio-r8a77965", 257 "renesas,rcar-gen3-gpio"; 258 reg = <0 0xe6054000 0 0x50>; 259 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 260 #gpio-cells = <2>; 261 gpio-controller; 262 gpio-ranges = <&pfc 0 128 18>; 263 #interrupt-cells = <2>; 264 interrupt-controller; 265 clocks = <&cpg CPG_MOD 908>; 266 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 267 resets = <&cpg 908>; 268 }; 269 270 gpio5: gpio@e6055000 { 271 compatible = "renesas,gpio-r8a77965", 272 "renesas,rcar-gen3-gpio"; 273 reg = <0 0xe6055000 0 0x50>; 274 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 275 #gpio-cells = <2>; 276 gpio-controller; 277 gpio-ranges = <&pfc 0 160 26>; 278 #interrupt-cells = <2>; 279 interrupt-controller; 280 clocks = <&cpg CPG_MOD 907>; 281 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 282 resets = <&cpg 907>; 283 }; 284 285 gpio6: gpio@e6055400 { 286 compatible = "renesas,gpio-r8a77965", 287 "renesas,rcar-gen3-gpio"; 288 reg = <0 0xe6055400 0 0x50>; 289 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 290 #gpio-cells = <2>; 291 gpio-controller; 292 gpio-ranges = <&pfc 0 192 32>; 293 #interrupt-cells = <2>; 294 interrupt-controller; 295 clocks = <&cpg CPG_MOD 906>; 296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 297 resets = <&cpg 906>; 298 }; 299 300 gpio7: gpio@e6055800 { 301 compatible = "renesas,gpio-r8a77965", 302 "renesas,rcar-gen3-gpio"; 303 reg = <0 0xe6055800 0 0x50>; 304 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 305 #gpio-cells = <2>; 306 gpio-controller; 307 gpio-ranges = <&pfc 0 224 4>; 308 #interrupt-cells = <2>; 309 interrupt-controller; 310 clocks = <&cpg CPG_MOD 905>; 311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 312 resets = <&cpg 905>; 313 }; 314 315 pfc: pin-controller@e6060000 { 316 compatible = "renesas,pfc-r8a77965"; 317 reg = <0 0xe6060000 0 0x50c>; 318 }; 319 320 cpg: clock-controller@e6150000 { 321 compatible = "renesas,r8a77965-cpg-mssr"; 322 reg = <0 0xe6150000 0 0x1000>; 323 clocks = <&extal_clk>, <&extalr_clk>; 324 clock-names = "extal", "extalr"; 325 #clock-cells = <2>; 326 #power-domain-cells = <0>; 327 #reset-cells = <1>; 328 }; 329 330 rst: reset-controller@e6160000 { 331 compatible = "renesas,r8a77965-rst"; 332 reg = <0 0xe6160000 0 0x0200>; 333 }; 334 335 sysc: system-controller@e6180000 { 336 compatible = "renesas,r8a77965-sysc"; 337 reg = <0 0xe6180000 0 0x0400>; 338 #power-domain-cells = <1>; 339 }; 340 341 tsc: thermal@e6198000 { 342 compatible = "renesas,r8a77965-thermal"; 343 reg = <0 0xe6198000 0 0x100>, 344 <0 0xe61a0000 0 0x100>, 345 <0 0xe61a8000 0 0x100>; 346 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 349 clocks = <&cpg CPG_MOD 522>; 350 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 351 resets = <&cpg 522>; 352 #thermal-sensor-cells = <1>; 353 }; 354 355 intc_ex: interrupt-controller@e61c0000 { 356 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 357 #interrupt-cells = <2>; 358 interrupt-controller; 359 reg = <0 0xe61c0000 0 0x200>; 360 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 361 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 362 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 363 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 364 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 365 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 366 clocks = <&cpg CPG_MOD 407>; 367 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 368 resets = <&cpg 407>; 369 }; 370 371 i2c0: i2c@e6500000 { 372 #address-cells = <1>; 373 #size-cells = <0>; 374 compatible = "renesas,i2c-r8a77965", 375 "renesas,rcar-gen3-i2c"; 376 reg = <0 0xe6500000 0 0x40>; 377 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 378 clocks = <&cpg CPG_MOD 931>; 379 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 380 resets = <&cpg 931>; 381 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 382 <&dmac2 0x91>, <&dmac2 0x90>; 383 dma-names = "tx", "rx", "tx", "rx"; 384 i2c-scl-internal-delay-ns = <110>; 385 status = "disabled"; 386 }; 387 388 i2c1: i2c@e6508000 { 389 #address-cells = <1>; 390 #size-cells = <0>; 391 compatible = "renesas,i2c-r8a77965", 392 "renesas,rcar-gen3-i2c"; 393 reg = <0 0xe6508000 0 0x40>; 394 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 395 clocks = <&cpg CPG_MOD 930>; 396 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 397 resets = <&cpg 930>; 398 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 399 <&dmac2 0x93>, <&dmac2 0x92>; 400 dma-names = "tx", "rx", "tx", "rx"; 401 i2c-scl-internal-delay-ns = <6>; 402 status = "disabled"; 403 }; 404 405 i2c2: i2c@e6510000 { 406 #address-cells = <1>; 407 #size-cells = <0>; 408 compatible = "renesas,i2c-r8a77965", 409 "renesas,rcar-gen3-i2c"; 410 reg = <0 0xe6510000 0 0x40>; 411 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 412 clocks = <&cpg CPG_MOD 929>; 413 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 414 resets = <&cpg 929>; 415 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 416 <&dmac2 0x95>, <&dmac2 0x94>; 417 dma-names = "tx", "rx", "tx", "rx"; 418 i2c-scl-internal-delay-ns = <6>; 419 status = "disabled"; 420 }; 421 422 i2c3: i2c@e66d0000 { 423 #address-cells = <1>; 424 #size-cells = <0>; 425 compatible = "renesas,i2c-r8a77965", 426 "renesas,rcar-gen3-i2c"; 427 reg = <0 0xe66d0000 0 0x40>; 428 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 429 clocks = <&cpg CPG_MOD 928>; 430 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 431 resets = <&cpg 928>; 432 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 433 dma-names = "tx", "rx"; 434 i2c-scl-internal-delay-ns = <110>; 435 status = "disabled"; 436 }; 437 438 i2c4: i2c@e66d8000 { 439 #address-cells = <1>; 440 #size-cells = <0>; 441 compatible = "renesas,i2c-r8a77965", 442 "renesas,rcar-gen3-i2c"; 443 reg = <0 0xe66d8000 0 0x40>; 444 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 927>; 446 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 447 resets = <&cpg 927>; 448 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 449 dma-names = "tx", "rx"; 450 i2c-scl-internal-delay-ns = <110>; 451 status = "disabled"; 452 }; 453 454 i2c5: i2c@e66e0000 { 455 #address-cells = <1>; 456 #size-cells = <0>; 457 compatible = "renesas,i2c-r8a77965", 458 "renesas,rcar-gen3-i2c"; 459 reg = <0 0xe66e0000 0 0x40>; 460 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 461 clocks = <&cpg CPG_MOD 919>; 462 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 463 resets = <&cpg 919>; 464 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 465 dma-names = "tx", "rx"; 466 i2c-scl-internal-delay-ns = <110>; 467 status = "disabled"; 468 }; 469 470 i2c6: i2c@e66e8000 { 471 #address-cells = <1>; 472 #size-cells = <0>; 473 compatible = "renesas,i2c-r8a77965", 474 "renesas,rcar-gen3-i2c"; 475 reg = <0 0xe66e8000 0 0x40>; 476 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 477 clocks = <&cpg CPG_MOD 918>; 478 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 479 resets = <&cpg 918>; 480 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 481 dma-names = "tx", "rx"; 482 i2c-scl-internal-delay-ns = <6>; 483 status = "disabled"; 484 }; 485 486 i2c_dvfs: i2c@e60b0000 { 487 #address-cells = <1>; 488 #size-cells = <0>; 489 compatible = "renesas,iic-r8a77965", 490 "renesas,rcar-gen3-iic", 491 "renesas,rmobile-iic"; 492 reg = <0 0xe60b0000 0 0x425>; 493 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 494 clocks = <&cpg CPG_MOD 926>; 495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 496 resets = <&cpg 926>; 497 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 498 dma-names = "tx", "rx"; 499 status = "disabled"; 500 }; 501 502 hscif0: serial@e6540000 { 503 compatible = "renesas,hscif-r8a77965", 504 "renesas,rcar-gen3-hscif", 505 "renesas,hscif"; 506 reg = <0 0xe6540000 0 0x60>; 507 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 508 clocks = <&cpg CPG_MOD 520>, 509 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 510 <&scif_clk>; 511 clock-names = "fck", "brg_int", "scif_clk"; 512 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 513 <&dmac2 0x31>, <&dmac2 0x30>; 514 dma-names = "tx", "rx", "tx", "rx"; 515 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 516 resets = <&cpg 520>; 517 status = "disabled"; 518 }; 519 520 hscif1: serial@e6550000 { 521 compatible = "renesas,hscif-r8a77965", 522 "renesas,rcar-gen3-hscif", 523 "renesas,hscif"; 524 reg = <0 0xe6550000 0 0x60>; 525 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 526 clocks = <&cpg CPG_MOD 519>, 527 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 528 <&scif_clk>; 529 clock-names = "fck", "brg_int", "scif_clk"; 530 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 531 <&dmac2 0x33>, <&dmac2 0x32>; 532 dma-names = "tx", "rx", "tx", "rx"; 533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 534 resets = <&cpg 519>; 535 status = "disabled"; 536 }; 537 538 hscif2: serial@e6560000 { 539 compatible = "renesas,hscif-r8a77965", 540 "renesas,rcar-gen3-hscif", 541 "renesas,hscif"; 542 reg = <0 0xe6560000 0 0x60>; 543 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 544 clocks = <&cpg CPG_MOD 518>, 545 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 546 <&scif_clk>; 547 clock-names = "fck", "brg_int", "scif_clk"; 548 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 549 <&dmac2 0x35>, <&dmac2 0x34>; 550 dma-names = "tx", "rx", "tx", "rx"; 551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 552 resets = <&cpg 518>; 553 status = "disabled"; 554 }; 555 556 hscif3: serial@e66a0000 { 557 compatible = "renesas,hscif-r8a77965", 558 "renesas,rcar-gen3-hscif", 559 "renesas,hscif"; 560 reg = <0 0xe66a0000 0 0x60>; 561 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 562 clocks = <&cpg CPG_MOD 517>, 563 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 564 <&scif_clk>; 565 clock-names = "fck", "brg_int", "scif_clk"; 566 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 567 dma-names = "tx", "rx"; 568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 569 resets = <&cpg 517>; 570 status = "disabled"; 571 }; 572 573 hscif4: serial@e66b0000 { 574 compatible = "renesas,hscif-r8a77965", 575 "renesas,rcar-gen3-hscif", 576 "renesas,hscif"; 577 reg = <0 0xe66b0000 0 0x60>; 578 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 579 clocks = <&cpg CPG_MOD 516>, 580 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 581 <&scif_clk>; 582 clock-names = "fck", "brg_int", "scif_clk"; 583 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 584 dma-names = "tx", "rx"; 585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 586 resets = <&cpg 516>; 587 status = "disabled"; 588 }; 589 590 hsusb: usb@e6590000 { 591 compatible = "renesas,usbhs-r8a77965", 592 "renesas,rcar-gen3-usbhs"; 593 reg = <0 0xe6590000 0 0x200>; 594 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 596 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 597 <&usb_dmac1 0>, <&usb_dmac1 1>; 598 dma-names = "ch0", "ch1", "ch2", "ch3"; 599 renesas,buswait = <11>; 600 phys = <&usb2_phy0>; 601 phy-names = "usb"; 602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 603 resets = <&cpg 704>, <&cpg 703>; 604 status = "disabled"; 605 }; 606 607 usb_dmac0: dma-controller@e65a0000 { 608 compatible = "renesas,r8a77965-usb-dmac", 609 "renesas,usb-dmac"; 610 reg = <0 0xe65a0000 0 0x100>; 611 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 612 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 613 interrupt-names = "ch0", "ch1"; 614 clocks = <&cpg CPG_MOD 330>; 615 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 616 resets = <&cpg 330>; 617 #dma-cells = <1>; 618 dma-channels = <2>; 619 }; 620 621 usb_dmac1: dma-controller@e65b0000 { 622 compatible = "renesas,r8a77965-usb-dmac", 623 "renesas,usb-dmac"; 624 reg = <0 0xe65b0000 0 0x100>; 625 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 626 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 627 interrupt-names = "ch0", "ch1"; 628 clocks = <&cpg CPG_MOD 331>; 629 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 630 resets = <&cpg 331>; 631 #dma-cells = <1>; 632 dma-channels = <2>; 633 }; 634 635 usb3_phy0: usb-phy@e65ee000 { 636 compatible = "renesas,r8a77965-usb3-phy", 637 "renesas,rcar-gen3-usb3-phy"; 638 reg = <0 0xe65ee000 0 0x90>; 639 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 640 <&usb_extal_clk>; 641 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 642 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 643 resets = <&cpg 328>; 644 #phy-cells = <0>; 645 status = "disabled"; 646 }; 647 648 dmac0: dma-controller@e6700000 { 649 compatible = "renesas,dmac-r8a77965", 650 "renesas,rcar-dmac"; 651 reg = <0 0xe6700000 0 0x10000>; 652 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 653 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 654 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 655 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 656 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 657 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 658 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 659 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 660 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 661 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 662 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 663 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 664 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 665 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 666 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 667 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 668 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 669 interrupt-names = "error", 670 "ch0", "ch1", "ch2", "ch3", 671 "ch4", "ch5", "ch6", "ch7", 672 "ch8", "ch9", "ch10", "ch11", 673 "ch12", "ch13", "ch14", "ch15"; 674 clocks = <&cpg CPG_MOD 219>; 675 clock-names = "fck"; 676 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 677 resets = <&cpg 219>; 678 #dma-cells = <1>; 679 dma-channels = <16>; 680 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 681 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 682 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 683 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 684 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 685 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 686 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 687 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 688 }; 689 690 dmac1: dma-controller@e7300000 { 691 compatible = "renesas,dmac-r8a77965", 692 "renesas,rcar-dmac"; 693 reg = <0 0xe7300000 0 0x10000>; 694 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 695 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 696 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 697 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 698 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 699 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 700 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 701 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 702 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 703 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 704 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 705 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 706 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 707 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 708 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 709 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 710 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 711 interrupt-names = "error", 712 "ch0", "ch1", "ch2", "ch3", 713 "ch4", "ch5", "ch6", "ch7", 714 "ch8", "ch9", "ch10", "ch11", 715 "ch12", "ch13", "ch14", "ch15"; 716 clocks = <&cpg CPG_MOD 218>; 717 clock-names = "fck"; 718 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 719 resets = <&cpg 218>; 720 #dma-cells = <1>; 721 dma-channels = <16>; 722 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 723 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 724 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 725 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 726 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 727 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 728 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 729 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 730 }; 731 732 dmac2: dma-controller@e7310000 { 733 compatible = "renesas,dmac-r8a77965", 734 "renesas,rcar-dmac"; 735 reg = <0 0xe7310000 0 0x10000>; 736 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 737 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 738 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 739 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 740 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 741 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 742 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 743 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 744 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 745 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 746 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 747 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 748 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 749 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 750 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 751 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 752 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 753 interrupt-names = "error", 754 "ch0", "ch1", "ch2", "ch3", 755 "ch4", "ch5", "ch6", "ch7", 756 "ch8", "ch9", "ch10", "ch11", 757 "ch12", "ch13", "ch14", "ch15"; 758 clocks = <&cpg CPG_MOD 217>; 759 clock-names = "fck"; 760 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 761 resets = <&cpg 217>; 762 #dma-cells = <1>; 763 dma-channels = <16>; 764 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 765 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 766 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 767 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 768 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 769 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 770 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 771 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 772 }; 773 774 ipmmu_ds0: mmu@e6740000 { 775 compatible = "renesas,ipmmu-r8a77965"; 776 reg = <0 0xe6740000 0 0x1000>; 777 renesas,ipmmu-main = <&ipmmu_mm 0>; 778 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 779 #iommu-cells = <1>; 780 }; 781 782 ipmmu_ds1: mmu@e7740000 { 783 compatible = "renesas,ipmmu-r8a77965"; 784 reg = <0 0xe7740000 0 0x1000>; 785 renesas,ipmmu-main = <&ipmmu_mm 1>; 786 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 787 #iommu-cells = <1>; 788 }; 789 790 ipmmu_hc: mmu@e6570000 { 791 compatible = "renesas,ipmmu-r8a77965"; 792 reg = <0 0xe6570000 0 0x1000>; 793 renesas,ipmmu-main = <&ipmmu_mm 2>; 794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 795 #iommu-cells = <1>; 796 }; 797 798 ipmmu_ir: mmu@ff8b0000 { 799 compatible = "renesas,ipmmu-r8a77965"; 800 reg = <0 0xff8b0000 0 0x1000>; 801 renesas,ipmmu-main = <&ipmmu_mm 3>; 802 power-domains = <&sysc R8A77965_PD_A3IR>; 803 #iommu-cells = <1>; 804 }; 805 806 ipmmu_mm: mmu@e67b0000 { 807 compatible = "renesas,ipmmu-r8a77965"; 808 reg = <0 0xe67b0000 0 0x1000>; 809 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 811 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 812 #iommu-cells = <1>; 813 }; 814 815 ipmmu_mp: mmu@ec670000 { 816 compatible = "renesas,ipmmu-r8a77965"; 817 reg = <0 0xec670000 0 0x1000>; 818 renesas,ipmmu-main = <&ipmmu_mm 4>; 819 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 820 #iommu-cells = <1>; 821 }; 822 823 ipmmu_pv0: mmu@fd800000 { 824 compatible = "renesas,ipmmu-r8a77965"; 825 reg = <0 0xfd800000 0 0x1000>; 826 renesas,ipmmu-main = <&ipmmu_mm 6>; 827 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 828 #iommu-cells = <1>; 829 }; 830 831 ipmmu_rt: mmu@ffc80000 { 832 compatible = "renesas,ipmmu-r8a77965"; 833 reg = <0 0xffc80000 0 0x1000>; 834 renesas,ipmmu-main = <&ipmmu_mm 10>; 835 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 836 #iommu-cells = <1>; 837 }; 838 839 ipmmu_vc0: mmu@fe6b0000 { 840 compatible = "renesas,ipmmu-r8a77965"; 841 reg = <0 0xfe6b0000 0 0x1000>; 842 renesas,ipmmu-main = <&ipmmu_mm 12>; 843 power-domains = <&sysc R8A77965_PD_A3VC>; 844 #iommu-cells = <1>; 845 }; 846 847 ipmmu_vi0: mmu@febd0000 { 848 compatible = "renesas,ipmmu-r8a77965"; 849 reg = <0 0xfebd0000 0 0x1000>; 850 renesas,ipmmu-main = <&ipmmu_mm 14>; 851 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 852 #iommu-cells = <1>; 853 }; 854 855 ipmmu_vp0: mmu@fe990000 { 856 compatible = "renesas,ipmmu-r8a77965"; 857 reg = <0 0xfe990000 0 0x1000>; 858 renesas,ipmmu-main = <&ipmmu_mm 16>; 859 power-domains = <&sysc R8A77965_PD_A3VP>; 860 #iommu-cells = <1>; 861 }; 862 863 avb: ethernet@e6800000 { 864 compatible = "renesas,etheravb-r8a77965", 865 "renesas,etheravb-rcar-gen3"; 866 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 867 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 892 interrupt-names = "ch0", "ch1", "ch2", "ch3", 893 "ch4", "ch5", "ch6", "ch7", 894 "ch8", "ch9", "ch10", "ch11", 895 "ch12", "ch13", "ch14", "ch15", 896 "ch16", "ch17", "ch18", "ch19", 897 "ch20", "ch21", "ch22", "ch23", 898 "ch24"; 899 clocks = <&cpg CPG_MOD 812>; 900 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 901 resets = <&cpg 812>; 902 phy-mode = "rgmii"; 903 iommus = <&ipmmu_ds0 16>; 904 #address-cells = <1>; 905 #size-cells = <0>; 906 status = "disabled"; 907 }; 908 909 can0: can@e6c30000 { 910 compatible = "renesas,can-r8a77965", 911 "renesas,rcar-gen3-can"; 912 reg = <0 0xe6c30000 0 0x1000>; 913 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 914 clocks = <&cpg CPG_MOD 916>, 915 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 916 <&can_clk>; 917 clock-names = "clkp1", "clkp2", "can_clk"; 918 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 919 assigned-clock-rates = <40000000>; 920 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 921 resets = <&cpg 916>; 922 status = "disabled"; 923 }; 924 925 can1: can@e6c38000 { 926 compatible = "renesas,can-r8a77965", 927 "renesas,rcar-gen3-can"; 928 reg = <0 0xe6c38000 0 0x1000>; 929 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 930 clocks = <&cpg CPG_MOD 915>, 931 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 932 <&can_clk>; 933 clock-names = "clkp1", "clkp2", "can_clk"; 934 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 935 assigned-clock-rates = <40000000>; 936 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 937 resets = <&cpg 915>; 938 status = "disabled"; 939 }; 940 941 canfd: can@e66c0000 { 942 compatible = "renesas,r8a77965-canfd", 943 "renesas,rcar-gen3-canfd"; 944 reg = <0 0xe66c0000 0 0x8000>; 945 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 947 clocks = <&cpg CPG_MOD 914>, 948 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 949 <&can_clk>; 950 clock-names = "fck", "canfd", "can_clk"; 951 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 952 assigned-clock-rates = <40000000>; 953 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 954 resets = <&cpg 914>; 955 status = "disabled"; 956 957 channel0 { 958 status = "disabled"; 959 }; 960 961 channel1 { 962 status = "disabled"; 963 }; 964 }; 965 966 pwm0: pwm@e6e30000 { 967 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 968 reg = <0 0xe6e30000 0 8>; 969 #pwm-cells = <2>; 970 clocks = <&cpg CPG_MOD 523>; 971 resets = <&cpg 523>; 972 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 973 status = "disabled"; 974 }; 975 976 pwm1: pwm@e6e31000 { 977 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 978 reg = <0 0xe6e31000 0 8>; 979 #pwm-cells = <2>; 980 clocks = <&cpg CPG_MOD 523>; 981 resets = <&cpg 523>; 982 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 983 status = "disabled"; 984 }; 985 986 pwm2: pwm@e6e32000 { 987 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 988 reg = <0 0xe6e32000 0 8>; 989 #pwm-cells = <2>; 990 clocks = <&cpg CPG_MOD 523>; 991 resets = <&cpg 523>; 992 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 993 status = "disabled"; 994 }; 995 996 pwm3: pwm@e6e33000 { 997 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 998 reg = <0 0xe6e33000 0 8>; 999 #pwm-cells = <2>; 1000 clocks = <&cpg CPG_MOD 523>; 1001 resets = <&cpg 523>; 1002 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1003 status = "disabled"; 1004 }; 1005 1006 pwm4: pwm@e6e34000 { 1007 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1008 reg = <0 0xe6e34000 0 8>; 1009 #pwm-cells = <2>; 1010 clocks = <&cpg CPG_MOD 523>; 1011 resets = <&cpg 523>; 1012 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1013 status = "disabled"; 1014 }; 1015 1016 pwm5: pwm@e6e35000 { 1017 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1018 reg = <0 0xe6e35000 0 8>; 1019 #pwm-cells = <2>; 1020 clocks = <&cpg CPG_MOD 523>; 1021 resets = <&cpg 523>; 1022 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1023 status = "disabled"; 1024 }; 1025 1026 pwm6: pwm@e6e36000 { 1027 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1028 reg = <0 0xe6e36000 0 8>; 1029 #pwm-cells = <2>; 1030 clocks = <&cpg CPG_MOD 523>; 1031 resets = <&cpg 523>; 1032 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1033 status = "disabled"; 1034 }; 1035 1036 scif0: serial@e6e60000 { 1037 compatible = "renesas,scif-r8a77965", 1038 "renesas,rcar-gen3-scif", "renesas,scif"; 1039 reg = <0 0xe6e60000 0 64>; 1040 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1041 clocks = <&cpg CPG_MOD 207>, 1042 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1043 <&scif_clk>; 1044 clock-names = "fck", "brg_int", "scif_clk"; 1045 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1046 <&dmac2 0x51>, <&dmac2 0x50>; 1047 dma-names = "tx", "rx", "tx", "rx"; 1048 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1049 resets = <&cpg 207>; 1050 status = "disabled"; 1051 }; 1052 1053 scif1: serial@e6e68000 { 1054 compatible = "renesas,scif-r8a77965", 1055 "renesas,rcar-gen3-scif", "renesas,scif"; 1056 reg = <0 0xe6e68000 0 64>; 1057 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1058 clocks = <&cpg CPG_MOD 206>, 1059 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1060 <&scif_clk>; 1061 clock-names = "fck", "brg_int", "scif_clk"; 1062 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1063 <&dmac2 0x53>, <&dmac2 0x52>; 1064 dma-names = "tx", "rx", "tx", "rx"; 1065 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1066 resets = <&cpg 206>; 1067 status = "disabled"; 1068 }; 1069 1070 scif2: serial@e6e88000 { 1071 compatible = "renesas,scif-r8a77965", 1072 "renesas,rcar-gen3-scif", "renesas,scif"; 1073 reg = <0 0xe6e88000 0 64>; 1074 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1075 clocks = <&cpg CPG_MOD 310>, 1076 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1077 <&scif_clk>; 1078 clock-names = "fck", "brg_int", "scif_clk"; 1079 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1080 resets = <&cpg 310>; 1081 status = "disabled"; 1082 }; 1083 1084 scif3: serial@e6c50000 { 1085 compatible = "renesas,scif-r8a77965", 1086 "renesas,rcar-gen3-scif", "renesas,scif"; 1087 reg = <0 0xe6c50000 0 64>; 1088 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1089 clocks = <&cpg CPG_MOD 204>, 1090 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1091 <&scif_clk>; 1092 clock-names = "fck", "brg_int", "scif_clk"; 1093 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1094 dma-names = "tx", "rx"; 1095 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1096 resets = <&cpg 204>; 1097 status = "disabled"; 1098 }; 1099 1100 scif4: serial@e6c40000 { 1101 compatible = "renesas,scif-r8a77965", 1102 "renesas,rcar-gen3-scif", "renesas,scif"; 1103 reg = <0 0xe6c40000 0 64>; 1104 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1105 clocks = <&cpg CPG_MOD 203>, 1106 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1107 <&scif_clk>; 1108 clock-names = "fck", "brg_int", "scif_clk"; 1109 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1110 dma-names = "tx", "rx"; 1111 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1112 resets = <&cpg 203>; 1113 status = "disabled"; 1114 }; 1115 1116 scif5: serial@e6f30000 { 1117 compatible = "renesas,scif-r8a77965", 1118 "renesas,rcar-gen3-scif", "renesas,scif"; 1119 reg = <0 0xe6f30000 0 64>; 1120 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1121 clocks = <&cpg CPG_MOD 202>, 1122 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1123 <&scif_clk>; 1124 clock-names = "fck", "brg_int", "scif_clk"; 1125 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1126 <&dmac2 0x5b>, <&dmac2 0x5a>; 1127 dma-names = "tx", "rx", "tx", "rx"; 1128 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1129 resets = <&cpg 202>; 1130 status = "disabled"; 1131 }; 1132 1133 msiof0: spi@e6e90000 { 1134 compatible = "renesas,msiof-r8a77965", 1135 "renesas,rcar-gen3-msiof"; 1136 reg = <0 0xe6e90000 0 0x0064>; 1137 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1138 clocks = <&cpg CPG_MOD 211>; 1139 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1140 <&dmac2 0x41>, <&dmac2 0x40>; 1141 dma-names = "tx", "rx", "tx", "rx"; 1142 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1143 resets = <&cpg 211>; 1144 #address-cells = <1>; 1145 #size-cells = <0>; 1146 status = "disabled"; 1147 }; 1148 1149 msiof1: spi@e6ea0000 { 1150 compatible = "renesas,msiof-r8a77965", 1151 "renesas,rcar-gen3-msiof"; 1152 reg = <0 0xe6ea0000 0 0x0064>; 1153 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1154 clocks = <&cpg CPG_MOD 210>; 1155 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1156 <&dmac2 0x43>, <&dmac2 0x42>; 1157 dma-names = "tx", "rx", "tx", "rx"; 1158 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1159 resets = <&cpg 210>; 1160 #address-cells = <1>; 1161 #size-cells = <0>; 1162 status = "disabled"; 1163 }; 1164 1165 msiof2: spi@e6c00000 { 1166 compatible = "renesas,msiof-r8a77965", 1167 "renesas,rcar-gen3-msiof"; 1168 reg = <0 0xe6c00000 0 0x0064>; 1169 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1170 clocks = <&cpg CPG_MOD 209>; 1171 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1172 dma-names = "tx", "rx"; 1173 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1174 resets = <&cpg 209>; 1175 #address-cells = <1>; 1176 #size-cells = <0>; 1177 status = "disabled"; 1178 }; 1179 1180 msiof3: spi@e6c10000 { 1181 compatible = "renesas,msiof-r8a77965", 1182 "renesas,rcar-gen3-msiof"; 1183 reg = <0 0xe6c10000 0 0x0064>; 1184 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1185 clocks = <&cpg CPG_MOD 208>; 1186 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1187 dma-names = "tx", "rx"; 1188 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1189 resets = <&cpg 208>; 1190 #address-cells = <1>; 1191 #size-cells = <0>; 1192 status = "disabled"; 1193 }; 1194 1195 vin0: video@e6ef0000 { 1196 compatible = "renesas,vin-r8a77965"; 1197 reg = <0 0xe6ef0000 0 0x1000>; 1198 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1199 clocks = <&cpg CPG_MOD 811>; 1200 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1201 resets = <&cpg 811>; 1202 renesas,id = <0>; 1203 status = "disabled"; 1204 1205 ports { 1206 #address-cells = <1>; 1207 #size-cells = <0>; 1208 1209 port@1 { 1210 #address-cells = <1>; 1211 #size-cells = <0>; 1212 1213 reg = <1>; 1214 1215 vin0csi20: endpoint@0 { 1216 reg = <0>; 1217 remote-endpoint = <&csi20vin0>; 1218 }; 1219 vin0csi40: endpoint@2 { 1220 reg = <2>; 1221 remote-endpoint = <&csi40vin0>; 1222 }; 1223 }; 1224 }; 1225 }; 1226 1227 vin1: video@e6ef1000 { 1228 compatible = "renesas,vin-r8a77965"; 1229 reg = <0 0xe6ef1000 0 0x1000>; 1230 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1231 clocks = <&cpg CPG_MOD 810>; 1232 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1233 resets = <&cpg 810>; 1234 renesas,id = <1>; 1235 status = "disabled"; 1236 1237 ports { 1238 #address-cells = <1>; 1239 #size-cells = <0>; 1240 1241 port@1 { 1242 #address-cells = <1>; 1243 #size-cells = <0>; 1244 1245 reg = <1>; 1246 1247 vin1csi20: endpoint@0 { 1248 reg = <0>; 1249 remote-endpoint = <&csi20vin1>; 1250 }; 1251 vin1csi40: endpoint@2 { 1252 reg = <2>; 1253 remote-endpoint = <&csi40vin1>; 1254 }; 1255 }; 1256 }; 1257 }; 1258 1259 vin2: video@e6ef2000 { 1260 compatible = "renesas,vin-r8a77965"; 1261 reg = <0 0xe6ef2000 0 0x1000>; 1262 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1263 clocks = <&cpg CPG_MOD 809>; 1264 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1265 resets = <&cpg 809>; 1266 renesas,id = <2>; 1267 status = "disabled"; 1268 1269 ports { 1270 #address-cells = <1>; 1271 #size-cells = <0>; 1272 1273 port@1 { 1274 #address-cells = <1>; 1275 #size-cells = <0>; 1276 1277 reg = <1>; 1278 1279 vin2csi20: endpoint@0 { 1280 reg = <0>; 1281 remote-endpoint = <&csi20vin2>; 1282 }; 1283 vin2csi40: endpoint@2 { 1284 reg = <2>; 1285 remote-endpoint = <&csi40vin2>; 1286 }; 1287 }; 1288 }; 1289 }; 1290 1291 vin3: video@e6ef3000 { 1292 compatible = "renesas,vin-r8a77965"; 1293 reg = <0 0xe6ef3000 0 0x1000>; 1294 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1295 clocks = <&cpg CPG_MOD 808>; 1296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1297 resets = <&cpg 808>; 1298 renesas,id = <3>; 1299 status = "disabled"; 1300 1301 ports { 1302 #address-cells = <1>; 1303 #size-cells = <0>; 1304 1305 port@1 { 1306 #address-cells = <1>; 1307 #size-cells = <0>; 1308 1309 reg = <1>; 1310 1311 vin3csi20: endpoint@0 { 1312 reg = <0>; 1313 remote-endpoint = <&csi20vin3>; 1314 }; 1315 vin3csi40: endpoint@2 { 1316 reg = <2>; 1317 remote-endpoint = <&csi40vin3>; 1318 }; 1319 }; 1320 }; 1321 }; 1322 1323 vin4: video@e6ef4000 { 1324 compatible = "renesas,vin-r8a77965"; 1325 reg = <0 0xe6ef4000 0 0x1000>; 1326 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1327 clocks = <&cpg CPG_MOD 807>; 1328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1329 resets = <&cpg 807>; 1330 renesas,id = <4>; 1331 status = "disabled"; 1332 1333 ports { 1334 #address-cells = <1>; 1335 #size-cells = <0>; 1336 1337 port@1 { 1338 #address-cells = <1>; 1339 #size-cells = <0>; 1340 1341 reg = <1>; 1342 1343 vin4csi20: endpoint@0 { 1344 reg = <0>; 1345 remote-endpoint = <&csi20vin4>; 1346 }; 1347 vin4csi40: endpoint@2 { 1348 reg = <2>; 1349 remote-endpoint = <&csi40vin4>; 1350 }; 1351 }; 1352 }; 1353 }; 1354 1355 vin5: video@e6ef5000 { 1356 compatible = "renesas,vin-r8a77965"; 1357 reg = <0 0xe6ef5000 0 0x1000>; 1358 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1359 clocks = <&cpg CPG_MOD 806>; 1360 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1361 resets = <&cpg 806>; 1362 renesas,id = <5>; 1363 status = "disabled"; 1364 1365 ports { 1366 #address-cells = <1>; 1367 #size-cells = <0>; 1368 1369 port@1 { 1370 #address-cells = <1>; 1371 #size-cells = <0>; 1372 1373 reg = <1>; 1374 1375 vin5csi20: endpoint@0 { 1376 reg = <0>; 1377 remote-endpoint = <&csi20vin5>; 1378 }; 1379 vin5csi40: endpoint@2 { 1380 reg = <2>; 1381 remote-endpoint = <&csi40vin5>; 1382 }; 1383 }; 1384 }; 1385 }; 1386 1387 vin6: video@e6ef6000 { 1388 compatible = "renesas,vin-r8a77965"; 1389 reg = <0 0xe6ef6000 0 0x1000>; 1390 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1391 clocks = <&cpg CPG_MOD 805>; 1392 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1393 resets = <&cpg 805>; 1394 renesas,id = <6>; 1395 status = "disabled"; 1396 1397 ports { 1398 #address-cells = <1>; 1399 #size-cells = <0>; 1400 1401 port@1 { 1402 #address-cells = <1>; 1403 #size-cells = <0>; 1404 1405 reg = <1>; 1406 1407 vin6csi20: endpoint@0 { 1408 reg = <0>; 1409 remote-endpoint = <&csi20vin6>; 1410 }; 1411 vin6csi40: endpoint@2 { 1412 reg = <2>; 1413 remote-endpoint = <&csi40vin6>; 1414 }; 1415 }; 1416 }; 1417 }; 1418 1419 vin7: video@e6ef7000 { 1420 compatible = "renesas,vin-r8a77965"; 1421 reg = <0 0xe6ef7000 0 0x1000>; 1422 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1423 clocks = <&cpg CPG_MOD 804>; 1424 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1425 resets = <&cpg 804>; 1426 renesas,id = <7>; 1427 status = "disabled"; 1428 1429 ports { 1430 #address-cells = <1>; 1431 #size-cells = <0>; 1432 1433 port@1 { 1434 #address-cells = <1>; 1435 #size-cells = <0>; 1436 1437 reg = <1>; 1438 1439 vin7csi20: endpoint@0 { 1440 reg = <0>; 1441 remote-endpoint = <&csi20vin7>; 1442 }; 1443 vin7csi40: endpoint@2 { 1444 reg = <2>; 1445 remote-endpoint = <&csi40vin7>; 1446 }; 1447 }; 1448 }; 1449 }; 1450 1451 rcar_sound: sound@ec500000 { 1452 /* 1453 * #sound-dai-cells is required 1454 * 1455 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1456 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1457 */ 1458 /* 1459 * #clock-cells is required for audio_clkout0/1/2/3 1460 * 1461 * clkout : #clock-cells = <0>; <&rcar_sound>; 1462 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1463 */ 1464 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1465 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1466 <0 0xec5a0000 0 0x100>, /* ADG */ 1467 <0 0xec540000 0 0x1000>, /* SSIU */ 1468 <0 0xec541000 0 0x280>, /* SSI */ 1469 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1470 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1471 1472 clocks = <&cpg CPG_MOD 1005>, 1473 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1474 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1475 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1476 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1477 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1478 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1479 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1480 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1481 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1482 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1483 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1484 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1485 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1486 <&audio_clk_a>, <&audio_clk_b>, 1487 <&audio_clk_c>, 1488 <&cpg CPG_CORE R8A77965_CLK_S0D4>; 1489 clock-names = "ssi-all", 1490 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1491 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1492 "ssi.1", "ssi.0", 1493 "src.9", "src.8", "src.7", "src.6", 1494 "src.5", "src.4", "src.3", "src.2", 1495 "src.1", "src.0", 1496 "mix.1", "mix.0", 1497 "ctu.1", "ctu.0", 1498 "dvc.0", "dvc.1", 1499 "clk_a", "clk_b", "clk_c", "clk_i"; 1500 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1501 resets = <&cpg 1005>, 1502 <&cpg 1006>, <&cpg 1007>, 1503 <&cpg 1008>, <&cpg 1009>, 1504 <&cpg 1010>, <&cpg 1011>, 1505 <&cpg 1012>, <&cpg 1013>, 1506 <&cpg 1014>, <&cpg 1015>; 1507 reset-names = "ssi-all", 1508 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1509 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1510 "ssi.1", "ssi.0"; 1511 status = "disabled"; 1512 1513 rcar_sound,dvc { 1514 dvc0: dvc-0 { 1515 dmas = <&audma1 0xbc>; 1516 dma-names = "tx"; 1517 }; 1518 dvc1: dvc-1 { 1519 dmas = <&audma1 0xbe>; 1520 dma-names = "tx"; 1521 }; 1522 }; 1523 1524 rcar_sound,mix { 1525 mix0: mix-0 { }; 1526 mix1: mix-1 { }; 1527 }; 1528 1529 rcar_sound,ctu { 1530 ctu00: ctu-0 { }; 1531 ctu01: ctu-1 { }; 1532 ctu02: ctu-2 { }; 1533 ctu03: ctu-3 { }; 1534 ctu10: ctu-4 { }; 1535 ctu11: ctu-5 { }; 1536 ctu12: ctu-6 { }; 1537 ctu13: ctu-7 { }; 1538 }; 1539 1540 rcar_sound,src { 1541 src0: src-0 { 1542 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1543 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1544 dma-names = "rx", "tx"; 1545 }; 1546 src1: src-1 { 1547 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1548 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1549 dma-names = "rx", "tx"; 1550 }; 1551 src2: src-2 { 1552 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1553 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1554 dma-names = "rx", "tx"; 1555 }; 1556 src3: src-3 { 1557 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1558 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1559 dma-names = "rx", "tx"; 1560 }; 1561 src4: src-4 { 1562 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1563 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1564 dma-names = "rx", "tx"; 1565 }; 1566 src5: src-5 { 1567 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1568 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1569 dma-names = "rx", "tx"; 1570 }; 1571 src6: src-6 { 1572 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1573 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1574 dma-names = "rx", "tx"; 1575 }; 1576 src7: src-7 { 1577 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1578 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1579 dma-names = "rx", "tx"; 1580 }; 1581 src8: src-8 { 1582 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1583 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1584 dma-names = "rx", "tx"; 1585 }; 1586 src9: src-9 { 1587 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1588 dmas = <&audma0 0x97>, <&audma1 0xba>; 1589 dma-names = "rx", "tx"; 1590 }; 1591 }; 1592 1593 rcar_sound,ssi { 1594 ssi0: ssi-0 { 1595 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1596 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1597 dma-names = "rx", "tx", "rxu", "txu"; 1598 }; 1599 ssi1: ssi-1 { 1600 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1601 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1602 dma-names = "rx", "tx", "rxu", "txu"; 1603 }; 1604 ssi2: ssi-2 { 1605 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1606 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1607 dma-names = "rx", "tx", "rxu", "txu"; 1608 }; 1609 ssi3: ssi-3 { 1610 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1611 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1612 dma-names = "rx", "tx", "rxu", "txu"; 1613 }; 1614 ssi4: ssi-4 { 1615 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1616 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1617 dma-names = "rx", "tx", "rxu", "txu"; 1618 }; 1619 ssi5: ssi-5 { 1620 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1621 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1622 dma-names = "rx", "tx", "rxu", "txu"; 1623 }; 1624 ssi6: ssi-6 { 1625 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1626 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1627 dma-names = "rx", "tx", "rxu", "txu"; 1628 }; 1629 ssi7: ssi-7 { 1630 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1631 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1632 dma-names = "rx", "tx", "rxu", "txu"; 1633 }; 1634 ssi8: ssi-8 { 1635 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1636 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1637 dma-names = "rx", "tx", "rxu", "txu"; 1638 }; 1639 ssi9: ssi-9 { 1640 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1641 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1642 dma-names = "rx", "tx", "rxu", "txu"; 1643 }; 1644 }; 1645 }; 1646 1647 audma0: dma-controller@ec700000 { 1648 compatible = "renesas,dmac-r8a77965", 1649 "renesas,rcar-dmac"; 1650 reg = <0 0xec700000 0 0x10000>; 1651 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1652 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1653 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1654 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1655 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1656 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1657 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1658 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1659 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1660 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1661 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1662 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1663 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1664 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1665 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1666 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1667 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1668 interrupt-names = "error", 1669 "ch0", "ch1", "ch2", "ch3", 1670 "ch4", "ch5", "ch6", "ch7", 1671 "ch8", "ch9", "ch10", "ch11", 1672 "ch12", "ch13", "ch14", "ch15"; 1673 clocks = <&cpg CPG_MOD 502>; 1674 clock-names = "fck"; 1675 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1676 resets = <&cpg 502>; 1677 #dma-cells = <1>; 1678 dma-channels = <16>; 1679 }; 1680 1681 audma1: dma-controller@ec720000 { 1682 compatible = "renesas,dmac-r8a77965", 1683 "renesas,rcar-dmac"; 1684 reg = <0 0xec720000 0 0x10000>; 1685 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH 1686 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 1687 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 1688 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 1689 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 1690 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 1691 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 1692 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 1693 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 1694 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 1695 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH 1696 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 1697 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 1698 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 1699 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH 1700 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 1701 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 1702 interrupt-names = "error", 1703 "ch0", "ch1", "ch2", "ch3", 1704 "ch4", "ch5", "ch6", "ch7", 1705 "ch8", "ch9", "ch10", "ch11", 1706 "ch12", "ch13", "ch14", "ch15"; 1707 clocks = <&cpg CPG_MOD 501>; 1708 clock-names = "fck"; 1709 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1710 resets = <&cpg 501>; 1711 #dma-cells = <1>; 1712 dma-channels = <16>; 1713 }; 1714 1715 xhci0: usb@ee000000 { 1716 compatible = "renesas,xhci-r8a77965", 1717 "renesas,rcar-gen3-xhci"; 1718 reg = <0 0xee000000 0 0xc00>; 1719 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1720 clocks = <&cpg CPG_MOD 328>; 1721 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1722 resets = <&cpg 328>; 1723 status = "disabled"; 1724 }; 1725 1726 usb3_peri0: usb@ee020000 { 1727 compatible = "renesas,r8a77965-usb3-peri", 1728 "renesas,rcar-gen3-usb3-peri"; 1729 reg = <0 0xee020000 0 0x400>; 1730 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1731 clocks = <&cpg CPG_MOD 328>; 1732 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1733 resets = <&cpg 328>; 1734 status = "disabled"; 1735 }; 1736 1737 ohci0: usb@ee080000 { 1738 compatible = "generic-ohci"; 1739 reg = <0 0xee080000 0 0x100>; 1740 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1741 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1742 phys = <&usb2_phy0>; 1743 phy-names = "usb"; 1744 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1745 resets = <&cpg 703>, <&cpg 704>; 1746 status = "disabled"; 1747 }; 1748 1749 ohci1: usb@ee0a0000 { 1750 compatible = "generic-ohci"; 1751 reg = <0 0xee0a0000 0 0x100>; 1752 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1753 clocks = <&cpg CPG_MOD 702>; 1754 phys = <&usb2_phy1>; 1755 phy-names = "usb"; 1756 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1757 resets = <&cpg 702>; 1758 status = "disabled"; 1759 }; 1760 1761 ehci0: usb@ee080100 { 1762 compatible = "generic-ehci"; 1763 reg = <0 0xee080100 0 0x100>; 1764 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1765 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1766 phys = <&usb2_phy0>; 1767 phy-names = "usb"; 1768 companion = <&ohci0>; 1769 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1770 resets = <&cpg 703>, <&cpg 704>; 1771 status = "disabled"; 1772 }; 1773 1774 ehci1: usb@ee0a0100 { 1775 compatible = "generic-ehci"; 1776 reg = <0 0xee0a0100 0 0x100>; 1777 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1778 clocks = <&cpg CPG_MOD 702>; 1779 phys = <&usb2_phy1>; 1780 phy-names = "usb"; 1781 companion = <&ohci1>; 1782 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1783 resets = <&cpg 702>; 1784 status = "disabled"; 1785 }; 1786 1787 usb2_phy0: usb-phy@ee080200 { 1788 compatible = "renesas,usb2-phy-r8a77965", 1789 "renesas,rcar-gen3-usb2-phy"; 1790 reg = <0 0xee080200 0 0x700>; 1791 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1792 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1793 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1794 resets = <&cpg 703>, <&cpg 704>; 1795 #phy-cells = <0>; 1796 status = "disabled"; 1797 }; 1798 1799 usb2_phy1: usb-phy@ee0a0200 { 1800 compatible = "renesas,usb2-phy-r8a77965", 1801 "renesas,rcar-gen3-usb2-phy"; 1802 reg = <0 0xee0a0200 0 0x700>; 1803 clocks = <&cpg CPG_MOD 702>; 1804 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1805 resets = <&cpg 702>; 1806 #phy-cells = <0>; 1807 status = "disabled"; 1808 }; 1809 1810 sdhi0: sd@ee100000 { 1811 compatible = "renesas,sdhi-r8a77965", 1812 "renesas,rcar-gen3-sdhi"; 1813 reg = <0 0xee100000 0 0x2000>; 1814 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1815 clocks = <&cpg CPG_MOD 314>; 1816 max-frequency = <200000000>; 1817 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1818 resets = <&cpg 314>; 1819 status = "disabled"; 1820 }; 1821 1822 sdhi1: sd@ee120000 { 1823 compatible = "renesas,sdhi-r8a77965", 1824 "renesas,rcar-gen3-sdhi"; 1825 reg = <0 0xee120000 0 0x2000>; 1826 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1827 clocks = <&cpg CPG_MOD 313>; 1828 max-frequency = <200000000>; 1829 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1830 resets = <&cpg 313>; 1831 status = "disabled"; 1832 }; 1833 1834 sdhi2: sd@ee140000 { 1835 compatible = "renesas,sdhi-r8a77965", 1836 "renesas,rcar-gen3-sdhi"; 1837 reg = <0 0xee140000 0 0x2000>; 1838 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1839 clocks = <&cpg CPG_MOD 312>; 1840 max-frequency = <200000000>; 1841 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1842 resets = <&cpg 312>; 1843 status = "disabled"; 1844 }; 1845 1846 sdhi3: sd@ee160000 { 1847 compatible = "renesas,sdhi-r8a77965", 1848 "renesas,rcar-gen3-sdhi"; 1849 reg = <0 0xee160000 0 0x2000>; 1850 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1851 clocks = <&cpg CPG_MOD 311>; 1852 max-frequency = <200000000>; 1853 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1854 resets = <&cpg 311>; 1855 status = "disabled"; 1856 }; 1857 1858 sata: sata@ee300000 { 1859 compatible = "renesas,sata-r8a77965", 1860 "renesas,rcar-gen3-sata"; 1861 reg = <0 0xee300000 0 0x200000>; 1862 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1863 clocks = <&cpg CPG_MOD 815>; 1864 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1865 resets = <&cpg 815>; 1866 status = "disabled"; 1867 }; 1868 1869 gic: interrupt-controller@f1010000 { 1870 compatible = "arm,gic-400"; 1871 #interrupt-cells = <3>; 1872 #address-cells = <0>; 1873 interrupt-controller; 1874 reg = <0x0 0xf1010000 0 0x1000>, 1875 <0x0 0xf1020000 0 0x20000>, 1876 <0x0 0xf1040000 0 0x20000>, 1877 <0x0 0xf1060000 0 0x20000>; 1878 interrupts = <GIC_PPI 9 1879 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1880 clocks = <&cpg CPG_MOD 408>; 1881 clock-names = "clk"; 1882 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1883 resets = <&cpg 408>; 1884 }; 1885 1886 pciec0: pcie@fe000000 { 1887 compatible = "renesas,pcie-r8a77965", 1888 "renesas,pcie-rcar-gen3"; 1889 reg = <0 0xfe000000 0 0x80000>; 1890 #address-cells = <3>; 1891 #size-cells = <2>; 1892 bus-range = <0x00 0xff>; 1893 device_type = "pci"; 1894 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1895 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1896 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1897 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1898 /* Map all possible DDR as inbound ranges */ 1899 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1900 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1901 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1902 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1903 #interrupt-cells = <1>; 1904 interrupt-map-mask = <0 0 0 0>; 1905 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1906 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1907 clock-names = "pcie", "pcie_bus"; 1908 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1909 resets = <&cpg 319>; 1910 status = "disabled"; 1911 }; 1912 1913 pciec1: pcie@ee800000 { 1914 compatible = "renesas,pcie-r8a77965", 1915 "renesas,pcie-rcar-gen3"; 1916 reg = <0 0xee800000 0 0x80000>; 1917 #address-cells = <3>; 1918 #size-cells = <2>; 1919 bus-range = <0x00 0xff>; 1920 device_type = "pci"; 1921 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 1922 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 1923 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 1924 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 1925 /* Map all possible DDR as inbound ranges */ 1926 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1927 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 1928 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 1929 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 1930 #interrupt-cells = <1>; 1931 interrupt-map-mask = <0 0 0 0>; 1932 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1933 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 1934 clock-names = "pcie", "pcie_bus"; 1935 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1936 resets = <&cpg 318>; 1937 status = "disabled"; 1938 }; 1939 1940 fdp1@fe940000 { 1941 compatible = "renesas,fdp1"; 1942 reg = <0 0xfe940000 0 0x2400>; 1943 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1944 clocks = <&cpg CPG_MOD 119>; 1945 power-domains = <&sysc R8A77965_PD_A3VP>; 1946 resets = <&cpg 119>; 1947 renesas,fcp = <&fcpf0>; 1948 }; 1949 1950 fcpf0: fcp@fe950000 { 1951 compatible = "renesas,fcpf"; 1952 reg = <0 0xfe950000 0 0x200>; 1953 clocks = <&cpg CPG_MOD 615>; 1954 power-domains = <&sysc R8A77965_PD_A3VP>; 1955 resets = <&cpg 615>; 1956 }; 1957 1958 vspb: vsp@fe960000 { 1959 compatible = "renesas,vsp2"; 1960 reg = <0 0xfe960000 0 0x8000>; 1961 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1962 clocks = <&cpg CPG_MOD 626>; 1963 power-domains = <&sysc R8A77965_PD_A3VP>; 1964 resets = <&cpg 626>; 1965 1966 renesas,fcp = <&fcpvb0>; 1967 }; 1968 1969 fcpvb0: fcp@fe96f000 { 1970 compatible = "renesas,fcpv"; 1971 reg = <0 0xfe96f000 0 0x200>; 1972 clocks = <&cpg CPG_MOD 607>; 1973 power-domains = <&sysc R8A77965_PD_A3VP>; 1974 resets = <&cpg 607>; 1975 }; 1976 1977 vspi0: vsp@fe9a0000 { 1978 compatible = "renesas,vsp2"; 1979 reg = <0 0xfe9a0000 0 0x8000>; 1980 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1981 clocks = <&cpg CPG_MOD 631>; 1982 power-domains = <&sysc R8A77965_PD_A3VP>; 1983 resets = <&cpg 631>; 1984 1985 renesas,fcp = <&fcpvi0>; 1986 }; 1987 1988 fcpvi0: fcp@fe9af000 { 1989 compatible = "renesas,fcpv"; 1990 reg = <0 0xfe9af000 0 0x200>; 1991 clocks = <&cpg CPG_MOD 611>; 1992 power-domains = <&sysc R8A77965_PD_A3VP>; 1993 resets = <&cpg 611>; 1994 }; 1995 1996 vspd0: vsp@fea20000 { 1997 compatible = "renesas,vsp2"; 1998 reg = <0 0xfea20000 0 0x5000>; 1999 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2000 clocks = <&cpg CPG_MOD 623>; 2001 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2002 resets = <&cpg 623>; 2003 2004 renesas,fcp = <&fcpvd0>; 2005 }; 2006 2007 fcpvd0: fcp@fea27000 { 2008 compatible = "renesas,fcpv"; 2009 reg = <0 0xfea27000 0 0x200>; 2010 clocks = <&cpg CPG_MOD 603>; 2011 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2012 resets = <&cpg 603>; 2013 }; 2014 2015 vspd1: vsp@fea28000 { 2016 compatible = "renesas,vsp2"; 2017 reg = <0 0xfea28000 0 0x5000>; 2018 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2019 clocks = <&cpg CPG_MOD 622>; 2020 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2021 resets = <&cpg 622>; 2022 2023 renesas,fcp = <&fcpvd1>; 2024 }; 2025 2026 fcpvd1: fcp@fea2f000 { 2027 compatible = "renesas,fcpv"; 2028 reg = <0 0xfea2f000 0 0x200>; 2029 clocks = <&cpg CPG_MOD 602>; 2030 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2031 resets = <&cpg 602>; 2032 }; 2033 2034 csi20: csi2@fea80000 { 2035 compatible = "renesas,r8a77965-csi2"; 2036 reg = <0 0xfea80000 0 0x10000>; 2037 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2038 clocks = <&cpg CPG_MOD 714>; 2039 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2040 resets = <&cpg 714>; 2041 status = "disabled"; 2042 2043 ports { 2044 #address-cells = <1>; 2045 #size-cells = <0>; 2046 2047 port@1 { 2048 #address-cells = <1>; 2049 #size-cells = <0>; 2050 2051 reg = <1>; 2052 2053 csi20vin0: endpoint@0 { 2054 reg = <0>; 2055 remote-endpoint = <&vin0csi20>; 2056 }; 2057 csi20vin1: endpoint@1 { 2058 reg = <1>; 2059 remote-endpoint = <&vin1csi20>; 2060 }; 2061 csi20vin2: endpoint@2 { 2062 reg = <2>; 2063 remote-endpoint = <&vin2csi20>; 2064 }; 2065 csi20vin3: endpoint@3 { 2066 reg = <3>; 2067 remote-endpoint = <&vin3csi20>; 2068 }; 2069 csi20vin4: endpoint@4 { 2070 reg = <4>; 2071 remote-endpoint = <&vin4csi20>; 2072 }; 2073 csi20vin5: endpoint@5 { 2074 reg = <5>; 2075 remote-endpoint = <&vin5csi20>; 2076 }; 2077 csi20vin6: endpoint@6 { 2078 reg = <6>; 2079 remote-endpoint = <&vin6csi20>; 2080 }; 2081 csi20vin7: endpoint@7 { 2082 reg = <7>; 2083 remote-endpoint = <&vin7csi20>; 2084 }; 2085 }; 2086 }; 2087 }; 2088 2089 csi40: csi2@feaa0000 { 2090 compatible = "renesas,r8a77965-csi2"; 2091 reg = <0 0xfeaa0000 0 0x10000>; 2092 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2093 clocks = <&cpg CPG_MOD 716>; 2094 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2095 resets = <&cpg 716>; 2096 status = "disabled"; 2097 2098 ports { 2099 #address-cells = <1>; 2100 #size-cells = <0>; 2101 2102 port@1 { 2103 #address-cells = <1>; 2104 #size-cells = <0>; 2105 2106 reg = <1>; 2107 2108 csi40vin0: endpoint@0 { 2109 reg = <0>; 2110 remote-endpoint = <&vin0csi40>; 2111 }; 2112 csi40vin1: endpoint@1 { 2113 reg = <1>; 2114 remote-endpoint = <&vin1csi40>; 2115 }; 2116 csi40vin2: endpoint@2 { 2117 reg = <2>; 2118 remote-endpoint = <&vin2csi40>; 2119 }; 2120 csi40vin3: endpoint@3 { 2121 reg = <3>; 2122 remote-endpoint = <&vin3csi40>; 2123 }; 2124 csi40vin4: endpoint@4 { 2125 reg = <4>; 2126 remote-endpoint = <&vin4csi40>; 2127 }; 2128 csi40vin5: endpoint@5 { 2129 reg = <5>; 2130 remote-endpoint = <&vin5csi40>; 2131 }; 2132 csi40vin6: endpoint@6 { 2133 reg = <6>; 2134 remote-endpoint = <&vin6csi40>; 2135 }; 2136 csi40vin7: endpoint@7 { 2137 reg = <7>; 2138 remote-endpoint = <&vin7csi40>; 2139 }; 2140 }; 2141 }; 2142 }; 2143 2144 hdmi0: hdmi@fead0000 { 2145 compatible = "renesas,r8a77965-hdmi", 2146 "renesas,rcar-gen3-hdmi"; 2147 reg = <0 0xfead0000 0 0x10000>; 2148 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2149 clocks = <&cpg CPG_MOD 729>, 2150 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2151 clock-names = "iahb", "isfr"; 2152 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2153 resets = <&cpg 729>; 2154 status = "disabled"; 2155 2156 ports { 2157 #address-cells = <1>; 2158 #size-cells = <0>; 2159 port@0 { 2160 reg = <0>; 2161 dw_hdmi0_in: endpoint { 2162 remote-endpoint = <&du_out_hdmi0>; 2163 }; 2164 }; 2165 port@1 { 2166 reg = <1>; 2167 }; 2168 }; 2169 }; 2170 2171 du: display@feb00000 { 2172 compatible = "renesas,du-r8a77965"; 2173 reg = <0 0xfeb00000 0 0x80000>; 2174 reg-names = "du"; 2175 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2176 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2177 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2178 clocks = <&cpg CPG_MOD 724>, 2179 <&cpg CPG_MOD 723>, 2180 <&cpg CPG_MOD 721>; 2181 clock-names = "du.0", "du.1", "du.3"; 2182 status = "disabled"; 2183 2184 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; 2185 2186 ports { 2187 #address-cells = <1>; 2188 #size-cells = <0>; 2189 2190 port@0 { 2191 reg = <0>; 2192 du_out_rgb: endpoint { 2193 }; 2194 }; 2195 port@1 { 2196 reg = <1>; 2197 du_out_hdmi0: endpoint { 2198 remote-endpoint = <&dw_hdmi0_in>; 2199 }; 2200 }; 2201 port@2 { 2202 reg = <2>; 2203 du_out_lvds0: endpoint { 2204 remote-endpoint = <&lvds0_in>; 2205 }; 2206 }; 2207 }; 2208 }; 2209 2210 lvds0: lvds@feb90000 { 2211 compatible = "renesas,r8a77965-lvds"; 2212 reg = <0 0xfeb90000 0 0x14>; 2213 clocks = <&cpg CPG_MOD 727>; 2214 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2215 resets = <&cpg 727>; 2216 status = "disabled"; 2217 2218 ports { 2219 #address-cells = <1>; 2220 #size-cells = <0>; 2221 2222 port@0 { 2223 reg = <0>; 2224 lvds0_in: endpoint { 2225 remote-endpoint = <&du_out_lvds0>; 2226 }; 2227 }; 2228 port@1 { 2229 reg = <1>; 2230 lvds0_out: endpoint { 2231 }; 2232 }; 2233 }; 2234 }; 2235 2236 prr: chipid@fff00044 { 2237 compatible = "renesas,prr"; 2238 reg = <0 0xfff00044 0 4>; 2239 }; 2240 }; 2241 2242 thermal-zones { 2243 sensor_thermal1: sensor-thermal1 { 2244 polling-delay-passive = <250>; 2245 polling-delay = <1000>; 2246 thermal-sensors = <&tsc 0>; 2247 2248 trips { 2249 sensor1_crit: sensor1-crit { 2250 temperature = <120000>; 2251 hysteresis = <1000>; 2252 type = "critical"; 2253 }; 2254 }; 2255 }; 2256 2257 sensor_thermal2: sensor-thermal2 { 2258 polling-delay-passive = <250>; 2259 polling-delay = <1000>; 2260 thermal-sensors = <&tsc 1>; 2261 2262 trips { 2263 sensor2_crit: sensor2-crit { 2264 temperature = <120000>; 2265 hysteresis = <1000>; 2266 type = "critical"; 2267 }; 2268 }; 2269 }; 2270 2271 sensor_thermal3: sensor-thermal3 { 2272 polling-delay-passive = <250>; 2273 polling-delay = <1000>; 2274 thermal-sensors = <&tsc 2>; 2275 2276 trips { 2277 sensor3_crit: sensor3-crit { 2278 temperature = <120000>; 2279 hysteresis = <1000>; 2280 type = "critical"; 2281 }; 2282 }; 2283 }; 2284 }; 2285 2286 timer { 2287 compatible = "arm,armv8-timer"; 2288 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2289 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2290 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2291 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2292 }; 2293 2294 /* External USB clocks - can be overridden by the board */ 2295 usb3s0_clk: usb3s0 { 2296 compatible = "fixed-clock"; 2297 #clock-cells = <0>; 2298 clock-frequency = <0>; 2299 }; 2300 2301 usb_extal_clk: usb_extal { 2302 compatible = "fixed-clock"; 2303 #clock-cells = <0>; 2304 clock-frequency = <0>; 2305 }; 2306}; 2307