xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/r8a77965.dtsi (revision df863d6f95f57dbb4f7c2f5ec2f230809551b17f) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77965 SoC
4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
10
11#include <dt-bindings/clock/renesas-cpg-mssr.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13
14#define CPG_AUDIO_CLK_I		10
15
16/ {
17	compatible = "renesas,r8a77965";
18	#address-cells = <2>;
19	#size-cells = <2>;
20
21	psci {
22		compatible = "arm,psci-1.0", "arm,psci-0.2";
23		method = "smc";
24	};
25
26	cpus {
27		#address-cells = <1>;
28		#size-cells = <0>;
29
30		a57_0: cpu@0 {
31			compatible = "arm,cortex-a57", "arm,armv8";
32			reg = <0x0>;
33			device_type = "cpu";
34			power-domains = <&sysc 0>;
35			next-level-cache = <&L2_CA57>;
36			enable-method = "psci";
37		};
38
39		a57_1: cpu@1 {
40			compatible = "arm,cortex-a57","arm,armv8";
41			reg = <0x1>;
42			device_type = "cpu";
43			power-domains = <&sysc 1>;
44			next-level-cache = <&L2_CA57>;
45			enable-method = "psci";
46		};
47
48		L2_CA57: cache-controller-0 {
49			compatible = "cache";
50			reg = <0>;
51			power-domains = <&sysc 12>;
52			cache-unified;
53			cache-level = <2>;
54		};
55	};
56
57	extal_clk: extal {
58		compatible = "fixed-clock";
59		#clock-cells = <0>;
60		/* This value must be overridden by the board */
61		clock-frequency = <0>;
62	};
63
64	extalr_clk: extalr {
65		compatible = "fixed-clock";
66		#clock-cells = <0>;
67		/* This value must be overridden by the board */
68		clock-frequency = <0>;
69	};
70
71	/*
72	 * The external audio clocks are configured as 0 Hz fixed frequency
73	 * clocks by default.
74	 * Boards that provide audio clocks should override them.
75	 */
76	audio_clk_a: audio_clk_a {
77		compatible = "fixed-clock";
78		#clock-cells = <0>;
79		clock-frequency = <0>;
80	};
81
82	audio_clk_b: audio_clk_b {
83		compatible = "fixed-clock";
84		#clock-cells = <0>;
85		clock-frequency = <0>;
86	};
87
88	audio_clk_c: audio_clk_c {
89		compatible = "fixed-clock";
90		#clock-cells = <0>;
91		clock-frequency = <0>;
92	};
93
94	/* External CAN clock - to be overridden by boards that provide it */
95	can_clk: can {
96		compatible = "fixed-clock";
97		#clock-cells = <0>;
98		clock-frequency = <0>;
99	};
100
101	/* External SCIF clock - to be overridden by boards that provide it */
102	scif_clk: scif {
103		compatible = "fixed-clock";
104		#clock-cells = <0>;
105		clock-frequency = <0>;
106	};
107
108	/* External PCIe clock - can be overridden by the board */
109	pcie_bus_clk: pcie_bus {
110		compatible = "fixed-clock";
111		#clock-cells = <0>;
112		clock-frequency = <0>;
113	};
114
115	/* External USB clocks - can be overridden by the board */
116	usb3s0_clk: usb3s0 {
117		compatible = "fixed-clock";
118		#clock-cells = <0>;
119		clock-frequency = <0>;
120	};
121
122	usb_extal_clk: usb_extal {
123		compatible = "fixed-clock";
124		#clock-cells = <0>;
125		clock-frequency = <0>;
126	};
127
128	timer {
129		compatible = "arm,armv8-timer";
130		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
131				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
132				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
133				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
134	};
135
136	pmu_a57 {
137		compatible = "arm,cortex-a57-pmu";
138		interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
139				      <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
140		interrupt-affinity = <&a57_0>,
141				     <&a57_1>;
142	};
143
144	soc {
145		compatible = "simple-bus";
146		interrupt-parent = <&gic>;
147		#address-cells = <2>;
148		#size-cells = <2>;
149		ranges;
150
151		gic: interrupt-controller@f1010000 {
152			compatible = "arm,gic-400";
153			#interrupt-cells = <3>;
154			#address-cells = <0>;
155			interrupt-controller;
156			reg = <0x0 0xf1010000 0 0x1000>,
157			      <0x0 0xf1020000 0 0x20000>,
158			      <0x0 0xf1040000 0 0x20000>,
159			      <0x0 0xf1060000 0 0x20000>;
160			interrupts = <GIC_PPI 9
161					(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
162			clocks = <&cpg CPG_MOD 408>;
163			clock-names = "clk";
164			power-domains = <&sysc 32>;
165			resets = <&cpg 408>;
166		};
167
168		pfc: pin-controller@e6060000 {
169			compatible = "renesas,pfc-r8a77965";
170			reg = <0 0xe6060000 0 0x50c>;
171		};
172
173		cpg: clock-controller@e6150000 {
174			compatible = "renesas,r8a77965-cpg-mssr";
175			reg = <0 0xe6150000 0 0x1000>;
176			clocks = <&extal_clk>, <&extalr_clk>;
177			clock-names = "extal", "extalr";
178			#clock-cells = <2>;
179			#power-domain-cells = <0>;
180			#reset-cells = <1>;
181		};
182
183		rst: reset-controller@e6160000 {
184			compatible = "renesas,r8a77965-rst";
185			reg = <0 0xe6160000 0 0x0200>;
186		};
187
188		prr: chipid@fff00044 {
189			compatible = "renesas,prr";
190			reg = <0 0xfff00044 0 4>;
191		};
192
193		sysc: system-controller@e6180000 {
194			compatible = "renesas,r8a77965-sysc";
195			reg = <0 0xe6180000 0 0x0400>;
196			#power-domain-cells = <1>;
197		};
198
199		gpio0: gpio@e6050000 {
200			/* placeholder */
201		};
202
203		gpio1: gpio@e6051000 {
204			/* placeholder */
205		};
206
207		gpio2: gpio@e6052000 {
208			/* placeholder */
209		};
210
211		gpio3: gpio@e6053000 {
212			/* placeholder */
213		};
214
215		gpio4: gpio@e6054000 {
216			/* placeholder */
217		};
218
219		gpio5: gpio@e6055000 {
220			/* placeholder */
221		};
222
223		gpio6: gpio@e6055400 {
224			/* placeholder */
225		};
226
227		gpio7: gpio@e6055800 {
228			/* placeholder */
229		};
230
231		intc_ex: interrupt-controller@e61c0000 {
232			/* placeholder */
233		};
234
235		dmac0: dma-controller@e6700000 {
236			/* placeholder */
237		};
238
239		dmac1: dma-controller@e7300000 {
240			/* placeholder */
241		};
242
243		dmac2: dma-controller@e7310000 {
244			/* placeholder */
245		};
246
247		scif0: serial@e6e60000 {
248			/* placeholder */
249		};
250
251		scif1: serial@e6e68000 {
252			/* placeholder */
253		};
254
255		scif2: serial@e6e88000 {
256			/* placeholder */
257		};
258
259		scif3: serial@e6c50000 {
260			/* placeholder */
261		};
262
263		scif4: serial@e6c40000 {
264			/* placeholder */
265		};
266
267		scif5: serial@e6f30000 {
268			/* placeholder */
269		};
270
271		avb: ethernet@e6800000 {
272			/* placeholder */
273		};
274
275		csi20: csi2@fea80000 {
276			/* placeholder */
277		};
278
279		csi40: csi2@feaa0000 {
280			/* placeholder */
281		};
282
283		vin0: video@e6ef0000 {
284			/* placeholder */
285		};
286
287		vin1: video@e6ef1000 {
288			/* placeholder */
289		};
290
291		vin2: video@e6ef2000 {
292			/* placeholder */
293		};
294
295		vin3: video@e6ef3000 {
296			/* placeholder */
297		};
298
299		vin4: video@e6ef4000 {
300			/* placeholder */
301		};
302
303		vin5: video@e6ef5000 {
304			/* placeholder */
305		};
306
307		vin6: video@e6ef6000 {
308			/* placeholder */
309		};
310
311		vin7: video@e6ef7000 {
312			/* placeholder */
313		};
314
315		ohci0: usb@ee080000 {
316			/* placeholder */
317		};
318
319		ehci0: usb@ee080100 {
320			/* placeholder */
321		};
322
323		usb2_phy0: usb-phy@ee080200 {
324			/* placeholder */
325		};
326
327		ohci1: usb@ee0a0000 {
328			/* placeholder */
329		};
330
331		ehci1: usb@ee0a0100 {
332			/* placeholder */
333		};
334
335		i2c0: i2c@e6500000 {
336			/* placeholder */
337		};
338
339		i2c1: i2c@e6508000 {
340			/* placeholder */
341		};
342
343		i2c2: i2c@e6510000 {
344			/* placeholder */
345		};
346
347		i2c3: i2c@e66d0000 {
348			/* placeholder */
349		};
350
351		i2c4: i2c@e66d8000 {
352			/* placeholder */
353		};
354
355		i2c5: i2c@e66e0000 {
356			/* placeholder */
357		};
358
359		i2c6: i2c@e66e8000 {
360			/* placeholder */
361		};
362
363		i2c_dvfs: i2c@e60b0000 {
364			/* placeholder */
365		};
366
367		pwm0: pwm@e6e30000 {
368			/* placeholder */
369		};
370
371		pwm1: pwm@e6e31000 {
372			/* placeholder */
373		};
374
375		pwm2: pwm@e6e32000 {
376			/* placeholder */
377		};
378
379		pwm3: pwm@e6e33000 {
380			/* placeholder */
381		};
382
383		pwm4: pwm@e6e34000 {
384			/* placeholder */
385		};
386
387		pwm5: pwm@e6e35000 {
388			/* placeholder */
389		};
390
391		pwm6: pwm@e6e36000 {
392			/* placeholder */
393		};
394
395		du: display@feb00000 {
396			/* placeholder */
397
398			ports {
399				port@0 {
400					reg = <0>;
401					du_out_rgb: endpoint {
402					};
403				};
404				port@1 {
405					reg = <1>;
406					du_out_hdmi0: endpoint {
407					};
408				};
409				port@2 {
410					reg = <2>;
411					du_out_lvds0: endpoint {
412					};
413				};
414			};
415		};
416
417		hsusb: usb@e6590000 {
418			/* placeholder */
419		};
420
421		pciec0: pcie@fe000000 {
422			/* placeholder */
423		};
424
425		pciec1: pcie@ee800000 {
426			/* placeholder */
427		};
428
429		rcar_sound: sound@ec500000 {
430			/* placeholder */
431
432			rcar_sound,dvc {
433				dvc0: dvc-0 {
434				};
435				dvc1: dvc-1 {
436				};
437			};
438
439			rcar_sound,src {
440				src0: src-0 {
441				};
442				src1: src-1 {
443				};
444			};
445
446			rcar_sound,ssi {
447				ssi0: ssi-0 {
448				};
449				ssi1: ssi-1 {
450				};
451			};
452		};
453
454		usb2_phy1: usb-phy@ee0a0200 {
455			/* placeholder */
456		};
457
458		sdhi0: sd@ee100000 {
459			/* placeholder */
460		};
461
462		sdhi1: sd@ee120000 {
463			/* placeholder */
464		};
465
466		sdhi2: sd@ee140000 {
467			/* placeholder */
468		};
469
470		sdhi3: sd@ee160000 {
471			/* placeholder */
472		};
473
474		usb3_phy0: usb-phy@e65ee000 {
475			/* placeholder */
476		};
477
478		usb3_peri0: usb@ee020000 {
479			/* placeholder */
480		};
481
482		xhci0: usb@ee000000 {
483			/* placeholder */
484		};
485
486		wdt0: watchdog@e6020000 {
487			/* placeholder */
488		};
489	};
490};
491