1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a77965 SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I 10 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cpus { 64 #address-cells = <1>; 65 #size-cells = <0>; 66 67 a57_0: cpu@0 { 68 compatible = "arm,cortex-a57", "arm,armv8"; 69 reg = <0x0>; 70 device_type = "cpu"; 71 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 72 next-level-cache = <&L2_CA57>; 73 enable-method = "psci"; 74 }; 75 76 a57_1: cpu@1 { 77 compatible = "arm,cortex-a57", "arm,armv8"; 78 reg = <0x1>; 79 device_type = "cpu"; 80 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 81 next-level-cache = <&L2_CA57>; 82 enable-method = "psci"; 83 }; 84 85 L2_CA57: cache-controller-0 { 86 compatible = "cache"; 87 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 88 cache-unified; 89 cache-level = <2>; 90 }; 91 }; 92 93 extal_clk: extal { 94 compatible = "fixed-clock"; 95 #clock-cells = <0>; 96 /* This value must be overridden by the board */ 97 clock-frequency = <0>; 98 }; 99 100 extalr_clk: extalr { 101 compatible = "fixed-clock"; 102 #clock-cells = <0>; 103 /* This value must be overridden by the board */ 104 clock-frequency = <0>; 105 }; 106 107 /* External PCIe clock - can be overridden by the board */ 108 pcie_bus_clk: pcie_bus { 109 compatible = "fixed-clock"; 110 #clock-cells = <0>; 111 clock-frequency = <0>; 112 }; 113 114 pmu_a57 { 115 compatible = "arm,cortex-a57-pmu"; 116 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 117 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 118 interrupt-affinity = <&a57_0>, 119 <&a57_1>; 120 }; 121 122 psci { 123 compatible = "arm,psci-1.0", "arm,psci-0.2"; 124 method = "smc"; 125 }; 126 127 /* External SCIF clock - to be overridden by boards that provide it */ 128 scif_clk: scif { 129 compatible = "fixed-clock"; 130 #clock-cells = <0>; 131 clock-frequency = <0>; 132 }; 133 134 soc { 135 compatible = "simple-bus"; 136 interrupt-parent = <&gic>; 137 #address-cells = <2>; 138 #size-cells = <2>; 139 ranges; 140 141 wdt0: watchdog@e6020000 { 142 compatible = "renesas,r8a77965-wdt", 143 "renesas,rcar-gen3-wdt"; 144 reg = <0 0xe6020000 0 0x0c>; 145 clocks = <&cpg CPG_MOD 402>; 146 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 147 resets = <&cpg 402>; 148 status = "disabled"; 149 }; 150 151 gpio0: gpio@e6050000 { 152 compatible = "renesas,gpio-r8a77965", 153 "renesas,rcar-gen3-gpio"; 154 reg = <0 0xe6050000 0 0x50>; 155 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 156 #gpio-cells = <2>; 157 gpio-controller; 158 gpio-ranges = <&pfc 0 0 16>; 159 #interrupt-cells = <2>; 160 interrupt-controller; 161 clocks = <&cpg CPG_MOD 912>; 162 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 163 resets = <&cpg 912>; 164 }; 165 166 gpio1: gpio@e6051000 { 167 compatible = "renesas,gpio-r8a77965", 168 "renesas,rcar-gen3-gpio"; 169 reg = <0 0xe6051000 0 0x50>; 170 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 171 #gpio-cells = <2>; 172 gpio-controller; 173 gpio-ranges = <&pfc 0 32 29>; 174 #interrupt-cells = <2>; 175 interrupt-controller; 176 clocks = <&cpg CPG_MOD 911>; 177 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 178 resets = <&cpg 911>; 179 }; 180 181 gpio2: gpio@e6052000 { 182 compatible = "renesas,gpio-r8a77965", 183 "renesas,rcar-gen3-gpio"; 184 reg = <0 0xe6052000 0 0x50>; 185 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 186 #gpio-cells = <2>; 187 gpio-controller; 188 gpio-ranges = <&pfc 0 64 15>; 189 #interrupt-cells = <2>; 190 interrupt-controller; 191 clocks = <&cpg CPG_MOD 910>; 192 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 193 resets = <&cpg 910>; 194 }; 195 196 gpio3: gpio@e6053000 { 197 compatible = "renesas,gpio-r8a77965", 198 "renesas,rcar-gen3-gpio"; 199 reg = <0 0xe6053000 0 0x50>; 200 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 201 #gpio-cells = <2>; 202 gpio-controller; 203 gpio-ranges = <&pfc 0 96 16>; 204 #interrupt-cells = <2>; 205 interrupt-controller; 206 clocks = <&cpg CPG_MOD 909>; 207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 208 resets = <&cpg 909>; 209 }; 210 211 gpio4: gpio@e6054000 { 212 compatible = "renesas,gpio-r8a77965", 213 "renesas,rcar-gen3-gpio"; 214 reg = <0 0xe6054000 0 0x50>; 215 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 216 #gpio-cells = <2>; 217 gpio-controller; 218 gpio-ranges = <&pfc 0 128 18>; 219 #interrupt-cells = <2>; 220 interrupt-controller; 221 clocks = <&cpg CPG_MOD 908>; 222 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 223 resets = <&cpg 908>; 224 }; 225 226 gpio5: gpio@e6055000 { 227 compatible = "renesas,gpio-r8a77965", 228 "renesas,rcar-gen3-gpio"; 229 reg = <0 0xe6055000 0 0x50>; 230 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 231 #gpio-cells = <2>; 232 gpio-controller; 233 gpio-ranges = <&pfc 0 160 26>; 234 #interrupt-cells = <2>; 235 interrupt-controller; 236 clocks = <&cpg CPG_MOD 907>; 237 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 238 resets = <&cpg 907>; 239 }; 240 241 gpio6: gpio@e6055400 { 242 compatible = "renesas,gpio-r8a77965", 243 "renesas,rcar-gen3-gpio"; 244 reg = <0 0xe6055400 0 0x50>; 245 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 246 #gpio-cells = <2>; 247 gpio-controller; 248 gpio-ranges = <&pfc 0 192 32>; 249 #interrupt-cells = <2>; 250 interrupt-controller; 251 clocks = <&cpg CPG_MOD 906>; 252 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 253 resets = <&cpg 906>; 254 }; 255 256 gpio7: gpio@e6055800 { 257 compatible = "renesas,gpio-r8a77965", 258 "renesas,rcar-gen3-gpio"; 259 reg = <0 0xe6055800 0 0x50>; 260 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 261 #gpio-cells = <2>; 262 gpio-controller; 263 gpio-ranges = <&pfc 0 224 4>; 264 #interrupt-cells = <2>; 265 interrupt-controller; 266 clocks = <&cpg CPG_MOD 905>; 267 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 268 resets = <&cpg 905>; 269 }; 270 271 pfc: pin-controller@e6060000 { 272 compatible = "renesas,pfc-r8a77965"; 273 reg = <0 0xe6060000 0 0x50c>; 274 }; 275 276 cpg: clock-controller@e6150000 { 277 compatible = "renesas,r8a77965-cpg-mssr"; 278 reg = <0 0xe6150000 0 0x1000>; 279 clocks = <&extal_clk>, <&extalr_clk>; 280 clock-names = "extal", "extalr"; 281 #clock-cells = <2>; 282 #power-domain-cells = <0>; 283 #reset-cells = <1>; 284 }; 285 286 rst: reset-controller@e6160000 { 287 compatible = "renesas,r8a77965-rst"; 288 reg = <0 0xe6160000 0 0x0200>; 289 }; 290 291 sysc: system-controller@e6180000 { 292 compatible = "renesas,r8a77965-sysc"; 293 reg = <0 0xe6180000 0 0x0400>; 294 #power-domain-cells = <1>; 295 }; 296 297 tsc: thermal@e6198000 { 298 compatible = "renesas,r8a77965-thermal"; 299 reg = <0 0xe6198000 0 0x100>, 300 <0 0xe61a0000 0 0x100>, 301 <0 0xe61a8000 0 0x100>; 302 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 303 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 304 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 305 clocks = <&cpg CPG_MOD 522>; 306 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 307 resets = <&cpg 522>; 308 #thermal-sensor-cells = <1>; 309 status = "okay"; 310 }; 311 312 intc_ex: interrupt-controller@e61c0000 { 313 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 314 #interrupt-cells = <2>; 315 interrupt-controller; 316 reg = <0 0xe61c0000 0 0x200>; 317 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 318 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 319 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 320 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 321 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 322 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 323 clocks = <&cpg CPG_MOD 407>; 324 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 325 resets = <&cpg 407>; 326 }; 327 328 i2c0: i2c@e6500000 { 329 #address-cells = <1>; 330 #size-cells = <0>; 331 compatible = "renesas,i2c-r8a77965", 332 "renesas,rcar-gen3-i2c"; 333 reg = <0 0xe6500000 0 0x40>; 334 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 335 clocks = <&cpg CPG_MOD 931>; 336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 337 resets = <&cpg 931>; 338 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 339 <&dmac2 0x91>, <&dmac2 0x90>; 340 dma-names = "tx", "rx", "tx", "rx"; 341 i2c-scl-internal-delay-ns = <110>; 342 status = "disabled"; 343 }; 344 345 i2c1: i2c@e6508000 { 346 #address-cells = <1>; 347 #size-cells = <0>; 348 compatible = "renesas,i2c-r8a77965", 349 "renesas,rcar-gen3-i2c"; 350 reg = <0 0xe6508000 0 0x40>; 351 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 930>; 353 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 354 resets = <&cpg 930>; 355 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 356 <&dmac2 0x93>, <&dmac2 0x92>; 357 dma-names = "tx", "rx", "tx", "rx"; 358 i2c-scl-internal-delay-ns = <6>; 359 status = "disabled"; 360 }; 361 362 i2c2: i2c@e6510000 { 363 #address-cells = <1>; 364 #size-cells = <0>; 365 compatible = "renesas,i2c-r8a77965", 366 "renesas,rcar-gen3-i2c"; 367 reg = <0 0xe6510000 0 0x40>; 368 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 369 clocks = <&cpg CPG_MOD 929>; 370 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 371 resets = <&cpg 929>; 372 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 373 <&dmac2 0x95>, <&dmac2 0x94>; 374 dma-names = "tx", "rx", "tx", "rx"; 375 i2c-scl-internal-delay-ns = <6>; 376 status = "disabled"; 377 }; 378 379 i2c3: i2c@e66d0000 { 380 #address-cells = <1>; 381 #size-cells = <0>; 382 compatible = "renesas,i2c-r8a77965", 383 "renesas,rcar-gen3-i2c"; 384 reg = <0 0xe66d0000 0 0x40>; 385 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 386 clocks = <&cpg CPG_MOD 928>; 387 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 388 resets = <&cpg 928>; 389 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 390 dma-names = "tx", "rx"; 391 i2c-scl-internal-delay-ns = <110>; 392 status = "disabled"; 393 }; 394 395 i2c4: i2c@e66d8000 { 396 #address-cells = <1>; 397 #size-cells = <0>; 398 compatible = "renesas,i2c-r8a77965", 399 "renesas,rcar-gen3-i2c"; 400 reg = <0 0xe66d8000 0 0x40>; 401 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 402 clocks = <&cpg CPG_MOD 927>; 403 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 404 resets = <&cpg 927>; 405 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 406 dma-names = "tx", "rx"; 407 i2c-scl-internal-delay-ns = <110>; 408 status = "disabled"; 409 }; 410 411 i2c5: i2c@e66e0000 { 412 #address-cells = <1>; 413 #size-cells = <0>; 414 compatible = "renesas,i2c-r8a77965", 415 "renesas,rcar-gen3-i2c"; 416 reg = <0 0xe66e0000 0 0x40>; 417 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 418 clocks = <&cpg CPG_MOD 919>; 419 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 420 resets = <&cpg 919>; 421 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 422 dma-names = "tx", "rx"; 423 i2c-scl-internal-delay-ns = <110>; 424 status = "disabled"; 425 }; 426 427 i2c6: i2c@e66e8000 { 428 #address-cells = <1>; 429 #size-cells = <0>; 430 compatible = "renesas,i2c-r8a77965", 431 "renesas,rcar-gen3-i2c"; 432 reg = <0 0xe66e8000 0 0x40>; 433 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 434 clocks = <&cpg CPG_MOD 918>; 435 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 436 resets = <&cpg 918>; 437 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 438 dma-names = "tx", "rx"; 439 i2c-scl-internal-delay-ns = <6>; 440 status = "disabled"; 441 }; 442 443 i2c_dvfs: i2c@e60b0000 { 444 #address-cells = <1>; 445 #size-cells = <0>; 446 compatible = "renesas,iic-r8a77965", 447 "renesas,rcar-gen3-iic", 448 "renesas,rmobile-iic"; 449 reg = <0 0xe60b0000 0 0x425>; 450 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 451 clocks = <&cpg CPG_MOD 926>; 452 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 453 resets = <&cpg 926>; 454 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 455 dma-names = "tx", "rx"; 456 status = "disabled"; 457 }; 458 459 hsusb: usb@e6590000 { 460 compatible = "renesas,usbhs-r8a7796", 461 "renesas,rcar-gen3-usbhs"; 462 reg = <0 0xe6590000 0 0x100>; 463 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 464 clocks = <&cpg CPG_MOD 704>; 465 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 466 <&usb_dmac1 0>, <&usb_dmac1 1>; 467 dma-names = "ch0", "ch1", "ch2", "ch3"; 468 renesas,buswait = <11>; 469 phys = <&usb2_phy0>; 470 phy-names = "usb"; 471 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 472 resets = <&cpg 704>; 473 status = "disabled"; 474 }; 475 476 usb_dmac0: dma-controller@e65a0000 { 477 compatible = "renesas,r8a77965-usb-dmac", 478 "renesas,usb-dmac"; 479 reg = <0 0xe65a0000 0 0x100>; 480 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 481 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 482 interrupt-names = "ch0", "ch1"; 483 clocks = <&cpg CPG_MOD 330>; 484 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 485 resets = <&cpg 330>; 486 #dma-cells = <1>; 487 dma-channels = <2>; 488 }; 489 490 usb_dmac1: dma-controller@e65b0000 { 491 compatible = "renesas,r8a77965-usb-dmac", 492 "renesas,usb-dmac"; 493 reg = <0 0xe65b0000 0 0x100>; 494 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 495 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 496 interrupt-names = "ch0", "ch1"; 497 clocks = <&cpg CPG_MOD 331>; 498 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 499 resets = <&cpg 331>; 500 #dma-cells = <1>; 501 dma-channels = <2>; 502 }; 503 504 usb3_phy0: usb-phy@e65ee000 { 505 compatible = "renesas,r8a77965-usb3-phy", 506 "renesas,rcar-gen3-usb3-phy"; 507 reg = <0 0xe65ee000 0 0x90>; 508 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 509 <&usb_extal_clk>; 510 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 511 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 512 resets = <&cpg 328>; 513 #phy-cells = <0>; 514 status = "disabled"; 515 }; 516 517 dmac0: dma-controller@e6700000 { 518 compatible = "renesas,dmac-r8a77965", 519 "renesas,rcar-dmac"; 520 reg = <0 0xe6700000 0 0x10000>; 521 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 522 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 523 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 524 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 525 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 526 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 527 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 528 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 529 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 530 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 531 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 532 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 533 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 534 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 535 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 536 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 537 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 538 interrupt-names = "error", 539 "ch0", "ch1", "ch2", "ch3", 540 "ch4", "ch5", "ch6", "ch7", 541 "ch8", "ch9", "ch10", "ch11", 542 "ch12", "ch13", "ch14", "ch15"; 543 clocks = <&cpg CPG_MOD 219>; 544 clock-names = "fck"; 545 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 546 resets = <&cpg 219>; 547 #dma-cells = <1>; 548 dma-channels = <16>; 549 }; 550 551 dmac1: dma-controller@e7300000 { 552 compatible = "renesas,dmac-r8a77965", 553 "renesas,rcar-dmac"; 554 reg = <0 0xe7300000 0 0x10000>; 555 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 556 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 557 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 558 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 559 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 560 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 561 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 562 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 563 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 564 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 565 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 566 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 567 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 568 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 569 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 570 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 571 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 572 interrupt-names = "error", 573 "ch0", "ch1", "ch2", "ch3", 574 "ch4", "ch5", "ch6", "ch7", 575 "ch8", "ch9", "ch10", "ch11", 576 "ch12", "ch13", "ch14", "ch15"; 577 clocks = <&cpg CPG_MOD 218>; 578 clock-names = "fck"; 579 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 580 resets = <&cpg 218>; 581 #dma-cells = <1>; 582 dma-channels = <16>; 583 }; 584 585 dmac2: dma-controller@e7310000 { 586 compatible = "renesas,dmac-r8a77965", 587 "renesas,rcar-dmac"; 588 reg = <0 0xe7310000 0 0x10000>; 589 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 590 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 591 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 592 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 593 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 594 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 595 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 596 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 597 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 598 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 599 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 600 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 601 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 602 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 603 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 604 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 605 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 606 interrupt-names = "error", 607 "ch0", "ch1", "ch2", "ch3", 608 "ch4", "ch5", "ch6", "ch7", 609 "ch8", "ch9", "ch10", "ch11", 610 "ch12", "ch13", "ch14", "ch15"; 611 clocks = <&cpg CPG_MOD 217>; 612 clock-names = "fck"; 613 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 614 resets = <&cpg 217>; 615 #dma-cells = <1>; 616 dma-channels = <16>; 617 }; 618 619 avb: ethernet@e6800000 { 620 compatible = "renesas,etheravb-r8a77965", 621 "renesas,etheravb-rcar-gen3"; 622 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 623 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 624 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 625 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 626 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 627 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 628 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 629 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 630 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 631 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 632 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 633 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 634 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 635 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 636 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 637 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 638 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 639 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 640 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 643 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 644 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 648 interrupt-names = "ch0", "ch1", "ch2", "ch3", 649 "ch4", "ch5", "ch6", "ch7", 650 "ch8", "ch9", "ch10", "ch11", 651 "ch12", "ch13", "ch14", "ch15", 652 "ch16", "ch17", "ch18", "ch19", 653 "ch20", "ch21", "ch22", "ch23", 654 "ch24"; 655 clocks = <&cpg CPG_MOD 812>; 656 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 657 resets = <&cpg 812>; 658 phy-mode = "rgmii"; 659 #address-cells = <1>; 660 #size-cells = <0>; 661 status = "disabled"; 662 }; 663 664 pwm0: pwm@e6e30000 { 665 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 666 reg = <0 0xe6e30000 0 8>; 667 #pwm-cells = <2>; 668 clocks = <&cpg CPG_MOD 523>; 669 resets = <&cpg 523>; 670 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 671 status = "disabled"; 672 }; 673 674 pwm1: pwm@e6e31000 { 675 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 676 reg = <0 0xe6e31000 0 8>; 677 #pwm-cells = <2>; 678 clocks = <&cpg CPG_MOD 523>; 679 resets = <&cpg 523>; 680 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 681 status = "disabled"; 682 }; 683 684 pwm2: pwm@e6e32000 { 685 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 686 reg = <0 0xe6e32000 0 8>; 687 #pwm-cells = <2>; 688 clocks = <&cpg CPG_MOD 523>; 689 resets = <&cpg 523>; 690 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 691 status = "disabled"; 692 }; 693 694 pwm3: pwm@e6e33000 { 695 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 696 reg = <0 0xe6e33000 0 8>; 697 #pwm-cells = <2>; 698 clocks = <&cpg CPG_MOD 523>; 699 resets = <&cpg 523>; 700 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 701 status = "disabled"; 702 }; 703 704 pwm4: pwm@e6e34000 { 705 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 706 reg = <0 0xe6e34000 0 8>; 707 #pwm-cells = <2>; 708 clocks = <&cpg CPG_MOD 523>; 709 resets = <&cpg 523>; 710 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 711 status = "disabled"; 712 }; 713 714 pwm5: pwm@e6e35000 { 715 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 716 reg = <0 0xe6e35000 0 8>; 717 #pwm-cells = <2>; 718 clocks = <&cpg CPG_MOD 523>; 719 resets = <&cpg 523>; 720 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 721 status = "disabled"; 722 }; 723 724 pwm6: pwm@e6e36000 { 725 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 726 reg = <0 0xe6e36000 0 8>; 727 #pwm-cells = <2>; 728 clocks = <&cpg CPG_MOD 523>; 729 resets = <&cpg 523>; 730 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 731 status = "disabled"; 732 }; 733 734 scif0: serial@e6e60000 { 735 compatible = "renesas,scif-r8a77965", 736 "renesas,rcar-gen3-scif", "renesas,scif"; 737 reg = <0 0xe6e60000 0 64>; 738 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 739 clocks = <&cpg CPG_MOD 207>, 740 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 741 <&scif_clk>; 742 clock-names = "fck", "brg_int", "scif_clk"; 743 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 744 <&dmac2 0x51>, <&dmac2 0x50>; 745 dma-names = "tx", "rx", "tx", "rx"; 746 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 747 resets = <&cpg 207>; 748 status = "disabled"; 749 }; 750 751 scif1: serial@e6e68000 { 752 compatible = "renesas,scif-r8a77965", 753 "renesas,rcar-gen3-scif", "renesas,scif"; 754 reg = <0 0xe6e68000 0 64>; 755 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 756 clocks = <&cpg CPG_MOD 206>, 757 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 758 <&scif_clk>; 759 clock-names = "fck", "brg_int", "scif_clk"; 760 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 761 <&dmac2 0x53>, <&dmac2 0x52>; 762 dma-names = "tx", "rx", "tx", "rx"; 763 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 764 resets = <&cpg 206>; 765 status = "disabled"; 766 }; 767 768 scif2: serial@e6e88000 { 769 compatible = "renesas,scif-r8a77965", 770 "renesas,rcar-gen3-scif", "renesas,scif"; 771 reg = <0 0xe6e88000 0 64>; 772 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 773 clocks = <&cpg CPG_MOD 310>, 774 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 775 <&scif_clk>; 776 clock-names = "fck", "brg_int", "scif_clk"; 777 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 778 resets = <&cpg 310>; 779 status = "disabled"; 780 }; 781 782 scif3: serial@e6c50000 { 783 compatible = "renesas,scif-r8a77965", 784 "renesas,rcar-gen3-scif", "renesas,scif"; 785 reg = <0 0xe6c50000 0 64>; 786 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 787 clocks = <&cpg CPG_MOD 204>, 788 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 789 <&scif_clk>; 790 clock-names = "fck", "brg_int", "scif_clk"; 791 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 792 dma-names = "tx", "rx"; 793 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 794 resets = <&cpg 204>; 795 status = "disabled"; 796 }; 797 798 scif4: serial@e6c40000 { 799 compatible = "renesas,scif-r8a77965", 800 "renesas,rcar-gen3-scif", "renesas,scif"; 801 reg = <0 0xe6c40000 0 64>; 802 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 803 clocks = <&cpg CPG_MOD 203>, 804 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 805 <&scif_clk>; 806 clock-names = "fck", "brg_int", "scif_clk"; 807 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 808 dma-names = "tx", "rx"; 809 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 810 resets = <&cpg 203>; 811 status = "disabled"; 812 }; 813 814 scif5: serial@e6f30000 { 815 compatible = "renesas,scif-r8a77965", 816 "renesas,rcar-gen3-scif", "renesas,scif"; 817 reg = <0 0xe6f30000 0 64>; 818 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 819 clocks = <&cpg CPG_MOD 202>, 820 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 821 <&scif_clk>; 822 clock-names = "fck", "brg_int", "scif_clk"; 823 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 824 <&dmac2 0x5b>, <&dmac2 0x5a>; 825 dma-names = "tx", "rx", "tx", "rx"; 826 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 827 resets = <&cpg 202>; 828 status = "disabled"; 829 }; 830 831 msiof0: spi@e6e90000 { 832 compatible = "renesas,msiof-r8a77965", 833 "renesas,rcar-gen3-msiof"; 834 reg = <0 0xe6e90000 0 0x0064>; 835 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 836 clocks = <&cpg CPG_MOD 211>; 837 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 838 <&dmac2 0x41>, <&dmac2 0x40>; 839 dma-names = "tx", "rx", "tx", "rx"; 840 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 841 resets = <&cpg 211>; 842 #address-cells = <1>; 843 #size-cells = <0>; 844 status = "disabled"; 845 }; 846 847 msiof1: spi@e6ea0000 { 848 compatible = "renesas,msiof-r8a77965", 849 "renesas,rcar-gen3-msiof"; 850 reg = <0 0xe6ea0000 0 0x0064>; 851 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 852 clocks = <&cpg CPG_MOD 210>; 853 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 854 <&dmac2 0x43>, <&dmac2 0x42>; 855 dma-names = "tx", "rx", "tx", "rx"; 856 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 857 resets = <&cpg 210>; 858 #address-cells = <1>; 859 #size-cells = <0>; 860 status = "disabled"; 861 }; 862 863 msiof2: spi@e6c00000 { 864 compatible = "renesas,msiof-r8a77965", 865 "renesas,rcar-gen3-msiof"; 866 reg = <0 0xe6c00000 0 0x0064>; 867 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 868 clocks = <&cpg CPG_MOD 209>; 869 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 870 dma-names = "tx", "rx"; 871 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 872 resets = <&cpg 209>; 873 #address-cells = <1>; 874 #size-cells = <0>; 875 status = "disabled"; 876 }; 877 878 msiof3: spi@e6c10000 { 879 compatible = "renesas,msiof-r8a77965", 880 "renesas,rcar-gen3-msiof"; 881 reg = <0 0xe6c10000 0 0x0064>; 882 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 883 clocks = <&cpg CPG_MOD 208>; 884 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 885 dma-names = "tx", "rx"; 886 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 887 resets = <&cpg 208>; 888 #address-cells = <1>; 889 #size-cells = <0>; 890 status = "disabled"; 891 }; 892 893 vin0: video@e6ef0000 { 894 compatible = "renesas,vin-r8a77965"; 895 reg = <0 0xe6ef0000 0 0x1000>; 896 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 897 clocks = <&cpg CPG_MOD 811>; 898 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 899 resets = <&cpg 811>; 900 renesas,id = <0>; 901 status = "disabled"; 902 903 ports { 904 #address-cells = <1>; 905 #size-cells = <0>; 906 907 port@1 { 908 #address-cells = <1>; 909 #size-cells = <0>; 910 911 reg = <1>; 912 913 vin0csi20: endpoint@0 { 914 reg = <0>; 915 remote-endpoint= <&csi20vin0>; 916 }; 917 vin0csi40: endpoint@2 { 918 reg = <2>; 919 remote-endpoint= <&csi40vin0>; 920 }; 921 }; 922 }; 923 }; 924 925 vin1: video@e6ef1000 { 926 compatible = "renesas,vin-r8a77965"; 927 reg = <0 0xe6ef1000 0 0x1000>; 928 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 929 clocks = <&cpg CPG_MOD 810>; 930 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 931 resets = <&cpg 810>; 932 renesas,id = <1>; 933 status = "disabled"; 934 935 ports { 936 #address-cells = <1>; 937 #size-cells = <0>; 938 939 port@1 { 940 #address-cells = <1>; 941 #size-cells = <0>; 942 943 reg = <1>; 944 945 vin1csi20: endpoint@0 { 946 reg = <0>; 947 remote-endpoint= <&csi20vin1>; 948 }; 949 vin1csi40: endpoint@2 { 950 reg = <2>; 951 remote-endpoint= <&csi40vin1>; 952 }; 953 }; 954 }; 955 }; 956 957 vin2: video@e6ef2000 { 958 compatible = "renesas,vin-r8a77965"; 959 reg = <0 0xe6ef2000 0 0x1000>; 960 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 961 clocks = <&cpg CPG_MOD 809>; 962 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 963 resets = <&cpg 809>; 964 renesas,id = <2>; 965 status = "disabled"; 966 967 ports { 968 #address-cells = <1>; 969 #size-cells = <0>; 970 971 port@1 { 972 #address-cells = <1>; 973 #size-cells = <0>; 974 975 reg = <1>; 976 977 vin2csi20: endpoint@0 { 978 reg = <0>; 979 remote-endpoint= <&csi20vin2>; 980 }; 981 vin2csi40: endpoint@2 { 982 reg = <2>; 983 remote-endpoint= <&csi40vin2>; 984 }; 985 }; 986 }; 987 }; 988 989 vin3: video@e6ef3000 { 990 compatible = "renesas,vin-r8a77965"; 991 reg = <0 0xe6ef3000 0 0x1000>; 992 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 993 clocks = <&cpg CPG_MOD 808>; 994 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 995 resets = <&cpg 808>; 996 renesas,id = <3>; 997 status = "disabled"; 998 999 ports { 1000 #address-cells = <1>; 1001 #size-cells = <0>; 1002 1003 port@1 { 1004 #address-cells = <1>; 1005 #size-cells = <0>; 1006 1007 reg = <1>; 1008 1009 vin3csi20: endpoint@0 { 1010 reg = <0>; 1011 remote-endpoint= <&csi20vin3>; 1012 }; 1013 vin3csi40: endpoint@2 { 1014 reg = <2>; 1015 remote-endpoint= <&csi40vin3>; 1016 }; 1017 }; 1018 }; 1019 }; 1020 1021 vin4: video@e6ef4000 { 1022 compatible = "renesas,vin-r8a77965"; 1023 reg = <0 0xe6ef4000 0 0x1000>; 1024 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1025 clocks = <&cpg CPG_MOD 807>; 1026 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1027 resets = <&cpg 807>; 1028 renesas,id = <4>; 1029 status = "disabled"; 1030 1031 ports { 1032 #address-cells = <1>; 1033 #size-cells = <0>; 1034 1035 port@1 { 1036 #address-cells = <1>; 1037 #size-cells = <0>; 1038 1039 reg = <1>; 1040 1041 vin4csi20: endpoint@0 { 1042 reg = <0>; 1043 remote-endpoint= <&csi20vin4>; 1044 }; 1045 vin4csi40: endpoint@2 { 1046 reg = <2>; 1047 remote-endpoint= <&csi40vin4>; 1048 }; 1049 }; 1050 }; 1051 }; 1052 1053 vin5: video@e6ef5000 { 1054 compatible = "renesas,vin-r8a77965"; 1055 reg = <0 0xe6ef5000 0 0x1000>; 1056 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1057 clocks = <&cpg CPG_MOD 806>; 1058 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1059 resets = <&cpg 806>; 1060 renesas,id = <5>; 1061 status = "disabled"; 1062 1063 ports { 1064 #address-cells = <1>; 1065 #size-cells = <0>; 1066 1067 port@1 { 1068 #address-cells = <1>; 1069 #size-cells = <0>; 1070 1071 reg = <1>; 1072 1073 vin5csi20: endpoint@0 { 1074 reg = <0>; 1075 remote-endpoint= <&csi20vin5>; 1076 }; 1077 vin5csi40: endpoint@2 { 1078 reg = <2>; 1079 remote-endpoint= <&csi40vin5>; 1080 }; 1081 }; 1082 }; 1083 }; 1084 1085 vin6: video@e6ef6000 { 1086 compatible = "renesas,vin-r8a77965"; 1087 reg = <0 0xe6ef6000 0 0x1000>; 1088 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1089 clocks = <&cpg CPG_MOD 805>; 1090 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1091 resets = <&cpg 805>; 1092 renesas,id = <6>; 1093 status = "disabled"; 1094 1095 ports { 1096 #address-cells = <1>; 1097 #size-cells = <0>; 1098 1099 port@1 { 1100 #address-cells = <1>; 1101 #size-cells = <0>; 1102 1103 reg = <1>; 1104 1105 vin6csi20: endpoint@0 { 1106 reg = <0>; 1107 remote-endpoint= <&csi20vin6>; 1108 }; 1109 vin6csi40: endpoint@2 { 1110 reg = <2>; 1111 remote-endpoint= <&csi40vin6>; 1112 }; 1113 }; 1114 }; 1115 }; 1116 1117 vin7: video@e6ef7000 { 1118 compatible = "renesas,vin-r8a77965"; 1119 reg = <0 0xe6ef7000 0 0x1000>; 1120 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1121 clocks = <&cpg CPG_MOD 804>; 1122 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1123 resets = <&cpg 804>; 1124 renesas,id = <7>; 1125 status = "disabled"; 1126 1127 ports { 1128 #address-cells = <1>; 1129 #size-cells = <0>; 1130 1131 port@1 { 1132 #address-cells = <1>; 1133 #size-cells = <0>; 1134 1135 reg = <1>; 1136 1137 vin7csi20: endpoint@0 { 1138 reg = <0>; 1139 remote-endpoint= <&csi20vin7>; 1140 }; 1141 vin7csi40: endpoint@2 { 1142 reg = <2>; 1143 remote-endpoint= <&csi40vin7>; 1144 }; 1145 }; 1146 }; 1147 }; 1148 1149 rcar_sound: sound@ec500000 { 1150 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1151 <0 0xec5a0000 0 0x100>, /* ADG */ 1152 <0 0xec540000 0 0x1000>, /* SSIU */ 1153 <0 0xec541000 0 0x280>, /* SSI */ 1154 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1155 /* placeholder */ 1156 1157 rcar_sound,dvc { 1158 dvc0: dvc-0 { 1159 }; 1160 dvc1: dvc-1 { 1161 }; 1162 }; 1163 1164 rcar_sound,src { 1165 src0: src-0 { 1166 }; 1167 src1: src-1 { 1168 }; 1169 }; 1170 1171 rcar_sound,ssi { 1172 ssi0: ssi-0 { 1173 }; 1174 ssi1: ssi-1 { 1175 }; 1176 }; 1177 1178 ports { 1179 #address-cells = <1>; 1180 #size-cells = <0>; 1181 port@0 { 1182 reg = <0>; 1183 }; 1184 }; 1185 }; 1186 1187 xhci0: usb@ee000000 { 1188 compatible = "renesas,xhci-r8a77965", 1189 "renesas,rcar-gen3-xhci"; 1190 reg = <0 0xee000000 0 0xc00>; 1191 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1192 clocks = <&cpg CPG_MOD 328>; 1193 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1194 resets = <&cpg 328>; 1195 status = "disabled"; 1196 }; 1197 1198 usb3_peri0: usb@ee020000 { 1199 compatible = "renesas,r8a77965-usb3-peri", 1200 "renesas,rcar-gen3-usb3-peri"; 1201 reg = <0 0xee020000 0 0x400>; 1202 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1203 clocks = <&cpg CPG_MOD 328>; 1204 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1205 resets = <&cpg 328>; 1206 status = "disabled"; 1207 }; 1208 1209 ohci0: usb@ee080000 { 1210 compatible = "generic-ohci"; 1211 reg = <0 0xee080000 0 0x100>; 1212 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1213 clocks = <&cpg CPG_MOD 703>; 1214 phys = <&usb2_phy0>; 1215 phy-names = "usb"; 1216 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1217 resets = <&cpg 703>; 1218 status = "disabled"; 1219 }; 1220 1221 ohci1: usb@ee0a0000 { 1222 compatible = "generic-ohci"; 1223 reg = <0 0xee0a0000 0 0x100>; 1224 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1225 clocks = <&cpg CPG_MOD 702>; 1226 phys = <&usb2_phy1>; 1227 phy-names = "usb"; 1228 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1229 resets = <&cpg 702>; 1230 status = "disabled"; 1231 }; 1232 1233 ehci0: usb@ee080100 { 1234 compatible = "generic-ehci"; 1235 reg = <0 0xee080100 0 0x100>; 1236 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1237 clocks = <&cpg CPG_MOD 703>; 1238 phys = <&usb2_phy0>; 1239 phy-names = "usb"; 1240 companion = <&ohci0>; 1241 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1242 resets = <&cpg 703>; 1243 status = "disabled"; 1244 }; 1245 1246 ehci1: usb@ee0a0100 { 1247 compatible = "generic-ehci"; 1248 reg = <0 0xee0a0100 0 0x100>; 1249 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1250 clocks = <&cpg CPG_MOD 702>; 1251 phys = <&usb2_phy1>; 1252 phy-names = "usb"; 1253 companion = <&ohci1>; 1254 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1255 resets = <&cpg 702>; 1256 status = "disabled"; 1257 }; 1258 1259 usb2_phy0: usb-phy@ee080200 { 1260 compatible = "renesas,usb2-phy-r8a77965", 1261 "renesas,rcar-gen3-usb2-phy"; 1262 reg = <0 0xee080200 0 0x700>; 1263 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1264 clocks = <&cpg CPG_MOD 703>; 1265 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1266 resets = <&cpg 703>; 1267 #phy-cells = <0>; 1268 status = "disabled"; 1269 }; 1270 1271 usb2_phy1: usb-phy@ee0a0200 { 1272 compatible = "renesas,usb2-phy-r8a77965", 1273 "renesas,rcar-gen3-usb2-phy"; 1274 reg = <0 0xee0a0200 0 0x700>; 1275 clocks = <&cpg CPG_MOD 703>; 1276 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1277 resets = <&cpg 703>; 1278 #phy-cells = <0>; 1279 status = "disabled"; 1280 }; 1281 1282 sdhi0: sd@ee100000 { 1283 compatible = "renesas,sdhi-r8a77965", 1284 "renesas,rcar-gen3-sdhi"; 1285 reg = <0 0xee100000 0 0x2000>; 1286 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1287 clocks = <&cpg CPG_MOD 314>; 1288 max-frequency = <200000000>; 1289 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1290 resets = <&cpg 314>; 1291 status = "disabled"; 1292 }; 1293 1294 sdhi1: sd@ee120000 { 1295 compatible = "renesas,sdhi-r8a77965", 1296 "renesas,rcar-gen3-sdhi"; 1297 reg = <0 0xee120000 0 0x2000>; 1298 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1299 clocks = <&cpg CPG_MOD 313>; 1300 max-frequency = <200000000>; 1301 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1302 resets = <&cpg 313>; 1303 status = "disabled"; 1304 }; 1305 1306 sdhi2: sd@ee140000 { 1307 compatible = "renesas,sdhi-r8a77965", 1308 "renesas,rcar-gen3-sdhi"; 1309 reg = <0 0xee140000 0 0x2000>; 1310 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1311 clocks = <&cpg CPG_MOD 312>; 1312 max-frequency = <200000000>; 1313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1314 resets = <&cpg 312>; 1315 status = "disabled"; 1316 }; 1317 1318 sdhi3: sd@ee160000 { 1319 compatible = "renesas,sdhi-r8a77965", 1320 "renesas,rcar-gen3-sdhi"; 1321 reg = <0 0xee160000 0 0x2000>; 1322 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1323 clocks = <&cpg CPG_MOD 311>; 1324 max-frequency = <200000000>; 1325 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1326 resets = <&cpg 311>; 1327 status = "disabled"; 1328 }; 1329 1330 gic: interrupt-controller@f1010000 { 1331 compatible = "arm,gic-400"; 1332 #interrupt-cells = <3>; 1333 #address-cells = <0>; 1334 interrupt-controller; 1335 reg = <0x0 0xf1010000 0 0x1000>, 1336 <0x0 0xf1020000 0 0x20000>, 1337 <0x0 0xf1040000 0 0x20000>, 1338 <0x0 0xf1060000 0 0x20000>; 1339 interrupts = <GIC_PPI 9 1340 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1341 clocks = <&cpg CPG_MOD 408>; 1342 clock-names = "clk"; 1343 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1344 resets = <&cpg 408>; 1345 }; 1346 1347 pciec0: pcie@fe000000 { 1348 reg = <0 0xfe000000 0 0x80000>; 1349 /* placeholder */ 1350 }; 1351 1352 pciec1: pcie@ee800000 { 1353 reg = <0 0xee800000 0 0x80000>; 1354 /* placeholder */ 1355 }; 1356 1357 fcpf0: fcp@fe950000 { 1358 compatible = "renesas,fcpf"; 1359 reg = <0 0xfe950000 0 0x200>; 1360 clocks = <&cpg CPG_MOD 615>; 1361 power-domains = <&sysc R8A77965_PD_A3VP>; 1362 resets = <&cpg 615>; 1363 }; 1364 1365 vspb: vsp@fe960000 { 1366 compatible = "renesas,vsp2"; 1367 reg = <0 0xfe960000 0 0x8000>; 1368 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1369 clocks = <&cpg CPG_MOD 626>; 1370 power-domains = <&sysc R8A77965_PD_A3VP>; 1371 resets = <&cpg 626>; 1372 1373 renesas,fcp = <&fcpvb0>; 1374 }; 1375 1376 fcpvb0: fcp@fe96f000 { 1377 compatible = "renesas,fcpv"; 1378 reg = <0 0xfe96f000 0 0x200>; 1379 clocks = <&cpg CPG_MOD 607>; 1380 power-domains = <&sysc R8A77965_PD_A3VP>; 1381 resets = <&cpg 607>; 1382 }; 1383 1384 vspi0: vsp@fe9a0000 { 1385 compatible = "renesas,vsp2"; 1386 reg = <0 0xfe9a0000 0 0x8000>; 1387 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1388 clocks = <&cpg CPG_MOD 631>; 1389 power-domains = <&sysc R8A77965_PD_A3VP>; 1390 resets = <&cpg 631>; 1391 1392 renesas,fcp = <&fcpvi0>; 1393 }; 1394 1395 fcpvi0: fcp@fe9af000 { 1396 compatible = "renesas,fcpv"; 1397 reg = <0 0xfe9af000 0 0x200>; 1398 clocks = <&cpg CPG_MOD 611>; 1399 power-domains = <&sysc R8A77965_PD_A3VP>; 1400 resets = <&cpg 611>; 1401 }; 1402 1403 vspd0: vsp@fea20000 { 1404 compatible = "renesas,vsp2"; 1405 reg = <0 0xfea20000 0 0x8000>; 1406 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1407 clocks = <&cpg CPG_MOD 623>; 1408 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1409 resets = <&cpg 623>; 1410 1411 renesas,fcp = <&fcpvd0>; 1412 }; 1413 1414 fcpvd0: fcp@fea27000 { 1415 compatible = "renesas,fcpv"; 1416 reg = <0 0xfea27000 0 0x200>; 1417 clocks = <&cpg CPG_MOD 603>; 1418 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1419 resets = <&cpg 603>; 1420 }; 1421 1422 vspd1: vsp@fea28000 { 1423 compatible = "renesas,vsp2"; 1424 reg = <0 0xfea28000 0 0x8000>; 1425 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1426 clocks = <&cpg CPG_MOD 622>; 1427 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1428 resets = <&cpg 622>; 1429 1430 renesas,fcp = <&fcpvd1>; 1431 }; 1432 1433 fcpvd1: fcp@fea2f000 { 1434 compatible = "renesas,fcpv"; 1435 reg = <0 0xfea2f000 0 0x200>; 1436 clocks = <&cpg CPG_MOD 602>; 1437 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1438 resets = <&cpg 602>; 1439 }; 1440 1441 csi20: csi2@fea80000 { 1442 compatible = "renesas,r8a77965-csi2"; 1443 reg = <0 0xfea80000 0 0x10000>; 1444 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1445 clocks = <&cpg CPG_MOD 714>; 1446 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1447 resets = <&cpg 714>; 1448 status = "disabled"; 1449 1450 ports { 1451 #address-cells = <1>; 1452 #size-cells = <0>; 1453 1454 port@1 { 1455 #address-cells = <1>; 1456 #size-cells = <0>; 1457 1458 reg = <1>; 1459 1460 csi20vin0: endpoint@0 { 1461 reg = <0>; 1462 remote-endpoint = <&vin0csi20>; 1463 }; 1464 csi20vin1: endpoint@1 { 1465 reg = <1>; 1466 remote-endpoint = <&vin1csi20>; 1467 }; 1468 csi20vin2: endpoint@2 { 1469 reg = <2>; 1470 remote-endpoint = <&vin2csi20>; 1471 }; 1472 csi20vin3: endpoint@3 { 1473 reg = <3>; 1474 remote-endpoint = <&vin3csi20>; 1475 }; 1476 csi20vin4: endpoint@4 { 1477 reg = <4>; 1478 remote-endpoint = <&vin4csi20>; 1479 }; 1480 csi20vin5: endpoint@5 { 1481 reg = <5>; 1482 remote-endpoint = <&vin5csi20>; 1483 }; 1484 csi20vin6: endpoint@6 { 1485 reg = <6>; 1486 remote-endpoint = <&vin6csi20>; 1487 }; 1488 csi20vin7: endpoint@7 { 1489 reg = <7>; 1490 remote-endpoint = <&vin7csi20>; 1491 }; 1492 }; 1493 }; 1494 }; 1495 1496 csi40: csi2@feaa0000 { 1497 compatible = "renesas,r8a77965-csi2"; 1498 reg = <0 0xfeaa0000 0 0x10000>; 1499 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1500 clocks = <&cpg CPG_MOD 716>; 1501 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1502 resets = <&cpg 716>; 1503 status = "disabled"; 1504 1505 ports { 1506 #address-cells = <1>; 1507 #size-cells = <0>; 1508 1509 port@1 { 1510 #address-cells = <1>; 1511 #size-cells = <0>; 1512 1513 reg = <1>; 1514 1515 csi40vin0: endpoint@0 { 1516 reg = <0>; 1517 remote-endpoint = <&vin0csi40>; 1518 }; 1519 csi40vin1: endpoint@1 { 1520 reg = <1>; 1521 remote-endpoint = <&vin1csi40>; 1522 }; 1523 csi40vin2: endpoint@2 { 1524 reg = <2>; 1525 remote-endpoint = <&vin2csi40>; 1526 }; 1527 csi40vin3: endpoint@3 { 1528 reg = <3>; 1529 remote-endpoint = <&vin3csi40>; 1530 }; 1531 csi40vin4: endpoint@4 { 1532 reg = <4>; 1533 remote-endpoint = <&vin4csi40>; 1534 }; 1535 csi40vin5: endpoint@5 { 1536 reg = <5>; 1537 remote-endpoint = <&vin5csi40>; 1538 }; 1539 csi40vin6: endpoint@6 { 1540 reg = <6>; 1541 remote-endpoint = <&vin6csi40>; 1542 }; 1543 csi40vin7: endpoint@7 { 1544 reg = <7>; 1545 remote-endpoint = <&vin7csi40>; 1546 }; 1547 }; 1548 }; 1549 }; 1550 1551 hdmi0: hdmi@fead0000 { 1552 compatible = "renesas,r8a77965-hdmi", 1553 "renesas,rcar-gen3-hdmi"; 1554 reg = <0 0xfead0000 0 0x10000>; 1555 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 1556 clocks = <&cpg CPG_MOD 729>, 1557 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 1558 clock-names = "iahb", "isfr"; 1559 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1560 resets = <&cpg 729>; 1561 status = "disabled"; 1562 1563 ports { 1564 #address-cells = <1>; 1565 #size-cells = <0>; 1566 port@0 { 1567 reg = <0>; 1568 dw_hdmi0_in: endpoint { 1569 remote-endpoint = <&du_out_hdmi0>; 1570 }; 1571 }; 1572 port@1 { 1573 reg = <1>; 1574 }; 1575 }; 1576 }; 1577 1578 du: display@feb00000 { 1579 compatible = "renesas,du-r8a77965"; 1580 reg = <0 0xfeb00000 0 0x80000>; 1581 reg-names = "du"; 1582 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1583 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 1584 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 1585 clocks = <&cpg CPG_MOD 724>, 1586 <&cpg CPG_MOD 723>, 1587 <&cpg CPG_MOD 721>; 1588 clock-names = "du.0", "du.1", "du.3"; 1589 status = "disabled"; 1590 1591 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; 1592 1593 ports { 1594 #address-cells = <1>; 1595 #size-cells = <0>; 1596 1597 port@0 { 1598 reg = <0>; 1599 du_out_rgb: endpoint { 1600 }; 1601 }; 1602 port@1 { 1603 reg = <1>; 1604 du_out_hdmi0: endpoint { 1605 remote-endpoint = <&dw_hdmi0_in>; 1606 }; 1607 }; 1608 port@2 { 1609 reg = <2>; 1610 du_out_lvds0: endpoint { 1611 }; 1612 }; 1613 }; 1614 }; 1615 1616 prr: chipid@fff00044 { 1617 compatible = "renesas,prr"; 1618 reg = <0 0xfff00044 0 4>; 1619 }; 1620 }; 1621 1622 timer { 1623 compatible = "arm,armv8-timer"; 1624 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1625 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1626 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1627 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1628 }; 1629 1630 thermal-zones { 1631 sensor_thermal1: sensor-thermal1 { 1632 polling-delay-passive = <250>; 1633 polling-delay = <1000>; 1634 thermal-sensors = <&tsc 0>; 1635 1636 trips { 1637 sensor1_crit: sensor1-crit { 1638 temperature = <120000>; 1639 hysteresis = <1000>; 1640 type = "critical"; 1641 }; 1642 }; 1643 }; 1644 1645 sensor_thermal2: sensor-thermal2 { 1646 polling-delay-passive = <250>; 1647 polling-delay = <1000>; 1648 thermal-sensors = <&tsc 1>; 1649 1650 trips { 1651 sensor2_crit: sensor2-crit { 1652 temperature = <120000>; 1653 hysteresis = <1000>; 1654 type = "critical"; 1655 }; 1656 }; 1657 }; 1658 1659 sensor_thermal3: sensor-thermal3 { 1660 polling-delay-passive = <250>; 1661 polling-delay = <1000>; 1662 thermal-sensors = <&tsc 2>; 1663 1664 trips { 1665 sensor3_crit: sensor3-crit { 1666 temperature = <120000>; 1667 hysteresis = <1000>; 1668 type = "critical"; 1669 }; 1670 }; 1671 }; 1672 }; 1673 1674 /* External USB clocks - can be overridden by the board */ 1675 usb3s0_clk: usb3s0 { 1676 compatible = "fixed-clock"; 1677 #clock-cells = <0>; 1678 clock-frequency = <0>; 1679 }; 1680 1681 usb_extal_clk: usb_extal { 1682 compatible = "fixed-clock"; 1683 #clock-cells = <0>; 1684 clock-frequency = <0>; 1685 }; 1686}; 1687