1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a77965 SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I 10 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c7 = &i2c_dvfs; 24 }; 25 26 /* 27 * The external audio clocks are configured as 0 Hz fixed frequency 28 * clocks by default. 29 * Boards that provide audio clocks should override them. 30 */ 31 audio_clk_a: audio_clk_a { 32 compatible = "fixed-clock"; 33 #clock-cells = <0>; 34 clock-frequency = <0>; 35 }; 36 37 audio_clk_b: audio_clk_b { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <0>; 41 }; 42 43 audio_clk_c: audio_clk_c { 44 compatible = "fixed-clock"; 45 #clock-cells = <0>; 46 clock-frequency = <0>; 47 }; 48 49 /* External CAN clock - to be overridden by boards that provide it */ 50 can_clk: can { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 cpus { 57 #address-cells = <1>; 58 #size-cells = <0>; 59 60 a57_0: cpu@0 { 61 compatible = "arm,cortex-a57", "arm,armv8"; 62 reg = <0x0>; 63 device_type = "cpu"; 64 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 65 next-level-cache = <&L2_CA57>; 66 enable-method = "psci"; 67 }; 68 69 a57_1: cpu@1 { 70 compatible = "arm,cortex-a57","arm,armv8"; 71 reg = <0x1>; 72 device_type = "cpu"; 73 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 74 next-level-cache = <&L2_CA57>; 75 enable-method = "psci"; 76 }; 77 78 L2_CA57: cache-controller-0 { 79 compatible = "cache"; 80 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 81 cache-unified; 82 cache-level = <2>; 83 }; 84 }; 85 86 extal_clk: extal { 87 compatible = "fixed-clock"; 88 #clock-cells = <0>; 89 /* This value must be overridden by the board */ 90 clock-frequency = <0>; 91 }; 92 93 extalr_clk: extalr { 94 compatible = "fixed-clock"; 95 #clock-cells = <0>; 96 /* This value must be overridden by the board */ 97 clock-frequency = <0>; 98 }; 99 100 /* External PCIe clock - can be overridden by the board */ 101 pcie_bus_clk: pcie_bus { 102 compatible = "fixed-clock"; 103 #clock-cells = <0>; 104 clock-frequency = <0>; 105 }; 106 107 pmu_a57 { 108 compatible = "arm,cortex-a57-pmu"; 109 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 110 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 111 interrupt-affinity = <&a57_0>, 112 <&a57_1>; 113 }; 114 115 psci { 116 compatible = "arm,psci-1.0", "arm,psci-0.2"; 117 method = "smc"; 118 }; 119 120 /* External SCIF clock - to be overridden by boards that provide it */ 121 scif_clk: scif { 122 compatible = "fixed-clock"; 123 #clock-cells = <0>; 124 clock-frequency = <0>; 125 }; 126 127 soc { 128 compatible = "simple-bus"; 129 interrupt-parent = <&gic>; 130 #address-cells = <2>; 131 #size-cells = <2>; 132 ranges; 133 134 wdt0: watchdog@e6020000 { 135 reg = <0 0xe6020000 0 0x0c>; 136 /* placeholder */ 137 }; 138 139 gpio0: gpio@e6050000 { 140 compatible = "renesas,gpio-r8a77965", 141 "renesas,rcar-gen3-gpio"; 142 reg = <0 0xe6050000 0 0x50>; 143 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 144 #gpio-cells = <2>; 145 gpio-controller; 146 gpio-ranges = <&pfc 0 0 16>; 147 #interrupt-cells = <2>; 148 interrupt-controller; 149 clocks = <&cpg CPG_MOD 912>; 150 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 151 resets = <&cpg 912>; 152 }; 153 154 gpio1: gpio@e6051000 { 155 compatible = "renesas,gpio-r8a77965", 156 "renesas,rcar-gen3-gpio"; 157 reg = <0 0xe6051000 0 0x50>; 158 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 159 #gpio-cells = <2>; 160 gpio-controller; 161 gpio-ranges = <&pfc 0 32 29>; 162 #interrupt-cells = <2>; 163 interrupt-controller; 164 clocks = <&cpg CPG_MOD 911>; 165 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 166 resets = <&cpg 911>; 167 }; 168 169 gpio2: gpio@e6052000 { 170 compatible = "renesas,gpio-r8a77965", 171 "renesas,rcar-gen3-gpio"; 172 reg = <0 0xe6052000 0 0x50>; 173 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 174 #gpio-cells = <2>; 175 gpio-controller; 176 gpio-ranges = <&pfc 0 64 15>; 177 #interrupt-cells = <2>; 178 interrupt-controller; 179 clocks = <&cpg CPG_MOD 910>; 180 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 181 resets = <&cpg 910>; 182 }; 183 184 gpio3: gpio@e6053000 { 185 compatible = "renesas,gpio-r8a77965", 186 "renesas,rcar-gen3-gpio"; 187 reg = <0 0xe6053000 0 0x50>; 188 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 189 #gpio-cells = <2>; 190 gpio-controller; 191 gpio-ranges = <&pfc 0 96 16>; 192 #interrupt-cells = <2>; 193 interrupt-controller; 194 clocks = <&cpg CPG_MOD 909>; 195 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 196 resets = <&cpg 909>; 197 }; 198 199 gpio4: gpio@e6054000 { 200 compatible = "renesas,gpio-r8a77965", 201 "renesas,rcar-gen3-gpio"; 202 reg = <0 0xe6054000 0 0x50>; 203 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 204 #gpio-cells = <2>; 205 gpio-controller; 206 gpio-ranges = <&pfc 0 128 18>; 207 #interrupt-cells = <2>; 208 interrupt-controller; 209 clocks = <&cpg CPG_MOD 908>; 210 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 211 resets = <&cpg 908>; 212 }; 213 214 gpio5: gpio@e6055000 { 215 compatible = "renesas,gpio-r8a77965", 216 "renesas,rcar-gen3-gpio"; 217 reg = <0 0xe6055000 0 0x50>; 218 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 219 #gpio-cells = <2>; 220 gpio-controller; 221 gpio-ranges = <&pfc 0 160 26>; 222 #interrupt-cells = <2>; 223 interrupt-controller; 224 clocks = <&cpg CPG_MOD 907>; 225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 226 resets = <&cpg 907>; 227 }; 228 229 gpio6: gpio@e6055400 { 230 compatible = "renesas,gpio-r8a77965", 231 "renesas,rcar-gen3-gpio"; 232 reg = <0 0xe6055400 0 0x50>; 233 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 234 #gpio-cells = <2>; 235 gpio-controller; 236 gpio-ranges = <&pfc 0 192 32>; 237 #interrupt-cells = <2>; 238 interrupt-controller; 239 clocks = <&cpg CPG_MOD 906>; 240 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 241 resets = <&cpg 906>; 242 }; 243 244 gpio7: gpio@e6055800 { 245 compatible = "renesas,gpio-r8a77965", 246 "renesas,rcar-gen3-gpio"; 247 reg = <0 0xe6055800 0 0x50>; 248 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 249 #gpio-cells = <2>; 250 gpio-controller; 251 gpio-ranges = <&pfc 0 224 4>; 252 #interrupt-cells = <2>; 253 interrupt-controller; 254 clocks = <&cpg CPG_MOD 905>; 255 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 256 resets = <&cpg 905>; 257 }; 258 259 pfc: pin-controller@e6060000 { 260 compatible = "renesas,pfc-r8a77965"; 261 reg = <0 0xe6060000 0 0x50c>; 262 }; 263 264 cpg: clock-controller@e6150000 { 265 compatible = "renesas,r8a77965-cpg-mssr"; 266 reg = <0 0xe6150000 0 0x1000>; 267 clocks = <&extal_clk>, <&extalr_clk>; 268 clock-names = "extal", "extalr"; 269 #clock-cells = <2>; 270 #power-domain-cells = <0>; 271 #reset-cells = <1>; 272 }; 273 274 rst: reset-controller@e6160000 { 275 compatible = "renesas,r8a77965-rst"; 276 reg = <0 0xe6160000 0 0x0200>; 277 }; 278 279 sysc: system-controller@e6180000 { 280 compatible = "renesas,r8a77965-sysc"; 281 reg = <0 0xe6180000 0 0x0400>; 282 #power-domain-cells = <1>; 283 }; 284 285 intc_ex: interrupt-controller@e61c0000 { 286 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 287 #interrupt-cells = <2>; 288 interrupt-controller; 289 reg = <0 0xe61c0000 0 0x200>; 290 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 291 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 292 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 293 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 294 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 295 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 296 clocks = <&cpg CPG_MOD 407>; 297 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 298 resets = <&cpg 407>; 299 }; 300 301 i2c0: i2c@e6500000 { 302 reg = <0 0xe6500000 0 0x40>; 303 /* placeholder */ 304 }; 305 306 i2c1: i2c@e6508000 { 307 reg = <0 0xe6508000 0 0x40>; 308 /* placeholder */ 309 }; 310 311 i2c2: i2c@e6510000 { 312 #address-cells = <1>; 313 #size-cells = <0>; 314 315 reg = <0 0xe6510000 0 0x40>; 316 /* placeholder */ 317 }; 318 319 i2c3: i2c@e66d0000 { 320 reg = <0 0xe66d0000 0 0x40>; 321 /* placeholder */ 322 }; 323 324 i2c4: i2c@e66d8000 { 325 #address-cells = <1>; 326 #size-cells = <0>; 327 328 reg = <0 0xe66d8000 0 0x40>; 329 /* placeholder */ 330 }; 331 332 i2c5: i2c@e66e0000 { 333 reg = <0 0xe66e0000 0 0x40>; 334 /* placeholder */ 335 }; 336 337 i2c6: i2c@e66e8000 { 338 reg = <0 0xe66e8000 0 0x40>; 339 /* placeholder */ 340 }; 341 342 i2c_dvfs: i2c@e60b0000 { 343 #address-cells = <1>; 344 #size-cells = <0>; 345 compatible = "renesas,iic-r8a77965", 346 "renesas,rcar-gen3-iic", 347 "renesas,rmobile-iic"; 348 reg = <0 0xe60b0000 0 0x425>; 349 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 350 clocks = <&cpg CPG_MOD 926>; 351 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 352 resets = <&cpg 926>; 353 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 354 dma-names = "tx", "rx"; 355 status = "disabled"; 356 }; 357 358 hsusb: usb@e6590000 { 359 compatible = "renesas,usbhs-r8a7796", 360 "renesas,rcar-gen3-usbhs"; 361 reg = <0 0xe6590000 0 0x100>; 362 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 363 clocks = <&cpg CPG_MOD 704>; 364 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 365 <&usb_dmac1 0>, <&usb_dmac1 1>; 366 dma-names = "ch0", "ch1", "ch2", "ch3"; 367 renesas,buswait = <11>; 368 phys = <&usb2_phy0>; 369 phy-names = "usb"; 370 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 371 resets = <&cpg 704>; 372 status = "disabled"; 373 }; 374 375 usb_dmac0: dma-controller@e65a0000 { 376 compatible = "renesas,r8a77965-usb-dmac", 377 "renesas,usb-dmac"; 378 reg = <0 0xe65a0000 0 0x100>; 379 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 380 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 381 interrupt-names = "ch0", "ch1"; 382 clocks = <&cpg CPG_MOD 330>; 383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 384 resets = <&cpg 330>; 385 #dma-cells = <1>; 386 dma-channels = <2>; 387 }; 388 389 usb_dmac1: dma-controller@e65b0000 { 390 compatible = "renesas,r8a77965-usb-dmac", 391 "renesas,usb-dmac"; 392 reg = <0 0xe65b0000 0 0x100>; 393 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 394 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 395 interrupt-names = "ch0", "ch1"; 396 clocks = <&cpg CPG_MOD 331>; 397 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 398 resets = <&cpg 331>; 399 #dma-cells = <1>; 400 dma-channels = <2>; 401 }; 402 403 usb3_phy0: usb-phy@e65ee000 { 404 compatible = "renesas,r8a77965-usb3-phy", 405 "renesas,rcar-gen3-usb3-phy"; 406 reg = <0 0xe65ee000 0 0x90>; 407 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 408 <&usb_extal_clk>; 409 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 410 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 411 resets = <&cpg 328>; 412 #phy-cells = <0>; 413 status = "disabled"; 414 }; 415 416 dmac0: dma-controller@e6700000 { 417 compatible = "renesas,dmac-r8a77965", 418 "renesas,rcar-dmac"; 419 reg = <0 0xe6700000 0 0x10000>; 420 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 421 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 422 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 423 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 424 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 425 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 426 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 427 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 428 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 429 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 430 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 431 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 432 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 433 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 434 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 435 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 436 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 437 interrupt-names = "error", 438 "ch0", "ch1", "ch2", "ch3", 439 "ch4", "ch5", "ch6", "ch7", 440 "ch8", "ch9", "ch10", "ch11", 441 "ch12", "ch13", "ch14", "ch15"; 442 clocks = <&cpg CPG_MOD 219>; 443 clock-names = "fck"; 444 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 445 resets = <&cpg 219>; 446 #dma-cells = <1>; 447 dma-channels = <16>; 448 }; 449 450 dmac1: dma-controller@e7300000 { 451 compatible = "renesas,dmac-r8a77965", 452 "renesas,rcar-dmac"; 453 reg = <0 0xe7300000 0 0x10000>; 454 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 455 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 456 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 457 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 458 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 459 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 460 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 461 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 462 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 463 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 464 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 465 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 466 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 467 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 468 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 469 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 470 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 471 interrupt-names = "error", 472 "ch0", "ch1", "ch2", "ch3", 473 "ch4", "ch5", "ch6", "ch7", 474 "ch8", "ch9", "ch10", "ch11", 475 "ch12", "ch13", "ch14", "ch15"; 476 clocks = <&cpg CPG_MOD 218>; 477 clock-names = "fck"; 478 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 479 resets = <&cpg 218>; 480 #dma-cells = <1>; 481 dma-channels = <16>; 482 }; 483 484 dmac2: dma-controller@e7310000 { 485 compatible = "renesas,dmac-r8a77965", 486 "renesas,rcar-dmac"; 487 reg = <0 0xe7310000 0 0x10000>; 488 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 489 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 490 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 491 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 492 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 493 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 494 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 495 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 496 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 497 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 498 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 499 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 500 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 501 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 502 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 503 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 504 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 505 interrupt-names = "error", 506 "ch0", "ch1", "ch2", "ch3", 507 "ch4", "ch5", "ch6", "ch7", 508 "ch8", "ch9", "ch10", "ch11", 509 "ch12", "ch13", "ch14", "ch15"; 510 clocks = <&cpg CPG_MOD 217>; 511 clock-names = "fck"; 512 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 513 resets = <&cpg 217>; 514 #dma-cells = <1>; 515 dma-channels = <16>; 516 }; 517 518 avb: ethernet@e6800000 { 519 compatible = "renesas,etheravb-r8a77965", 520 "renesas,etheravb-rcar-gen3"; 521 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 522 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 523 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 524 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 529 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 530 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 531 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 532 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 533 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 534 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 535 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 536 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 537 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 538 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 539 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 540 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 541 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 542 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 543 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 544 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 545 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 546 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 547 interrupt-names = "ch0", "ch1", "ch2", "ch3", 548 "ch4", "ch5", "ch6", "ch7", 549 "ch8", "ch9", "ch10", "ch11", 550 "ch12", "ch13", "ch14", "ch15", 551 "ch16", "ch17", "ch18", "ch19", 552 "ch20", "ch21", "ch22", "ch23", 553 "ch24"; 554 clocks = <&cpg CPG_MOD 812>; 555 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 556 resets = <&cpg 812>; 557 phy-mode = "rgmii"; 558 #address-cells = <1>; 559 #size-cells = <0>; 560 status = "disabled"; 561 }; 562 563 pwm0: pwm@e6e30000 { 564 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 565 reg = <0 0xe6e30000 0 8>; 566 #pwm-cells = <2>; 567 clocks = <&cpg CPG_MOD 523>; 568 resets = <&cpg 523>; 569 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 570 status = "disabled"; 571 }; 572 573 pwm1: pwm@e6e31000 { 574 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 575 reg = <0 0xe6e31000 0 8>; 576 #pwm-cells = <2>; 577 clocks = <&cpg CPG_MOD 523>; 578 resets = <&cpg 523>; 579 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 580 status = "disabled"; 581 }; 582 583 pwm2: pwm@e6e32000 { 584 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 585 reg = <0 0xe6e32000 0 8>; 586 #pwm-cells = <2>; 587 clocks = <&cpg CPG_MOD 523>; 588 resets = <&cpg 523>; 589 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 590 status = "disabled"; 591 }; 592 593 pwm3: pwm@e6e33000 { 594 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 595 reg = <0 0xe6e33000 0 8>; 596 #pwm-cells = <2>; 597 clocks = <&cpg CPG_MOD 523>; 598 resets = <&cpg 523>; 599 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 600 status = "disabled"; 601 }; 602 603 pwm4: pwm@e6e34000 { 604 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 605 reg = <0 0xe6e34000 0 8>; 606 #pwm-cells = <2>; 607 clocks = <&cpg CPG_MOD 523>; 608 resets = <&cpg 523>; 609 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 610 status = "disabled"; 611 }; 612 613 pwm5: pwm@e6e35000 { 614 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 615 reg = <0 0xe6e35000 0 8>; 616 #pwm-cells = <2>; 617 clocks = <&cpg CPG_MOD 523>; 618 resets = <&cpg 523>; 619 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 620 status = "disabled"; 621 }; 622 623 pwm6: pwm@e6e36000 { 624 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 625 reg = <0 0xe6e36000 0 8>; 626 #pwm-cells = <2>; 627 clocks = <&cpg CPG_MOD 523>; 628 resets = <&cpg 523>; 629 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 630 status = "disabled"; 631 }; 632 633 scif0: serial@e6e60000 { 634 compatible = "renesas,scif-r8a77965", 635 "renesas,rcar-gen3-scif", "renesas,scif"; 636 reg = <0 0xe6e60000 0 64>; 637 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 638 clocks = <&cpg CPG_MOD 207>, 639 <&cpg CPG_CORE 20>, 640 <&scif_clk>; 641 clock-names = "fck", "brg_int", "scif_clk"; 642 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 643 <&dmac2 0x51>, <&dmac2 0x50>; 644 dma-names = "tx", "rx", "tx", "rx"; 645 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 646 resets = <&cpg 207>; 647 status = "disabled"; 648 }; 649 650 scif1: serial@e6e68000 { 651 compatible = "renesas,scif-r8a77965", 652 "renesas,rcar-gen3-scif", "renesas,scif"; 653 reg = <0 0xe6e68000 0 64>; 654 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 655 clocks = <&cpg CPG_MOD 206>, 656 <&cpg CPG_CORE 20>, 657 <&scif_clk>; 658 clock-names = "fck", "brg_int", "scif_clk"; 659 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 660 <&dmac2 0x53>, <&dmac2 0x52>; 661 dma-names = "tx", "rx", "tx", "rx"; 662 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 663 resets = <&cpg 206>; 664 status = "disabled"; 665 }; 666 667 scif2: serial@e6e88000 { 668 compatible = "renesas,scif-r8a77965", 669 "renesas,rcar-gen3-scif", "renesas,scif"; 670 reg = <0 0xe6e88000 0 64>; 671 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 672 clocks = <&cpg CPG_MOD 310>, 673 <&cpg CPG_CORE 20>, 674 <&scif_clk>; 675 clock-names = "fck", "brg_int", "scif_clk"; 676 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 677 resets = <&cpg 310>; 678 status = "disabled"; 679 }; 680 681 scif3: serial@e6c50000 { 682 compatible = "renesas,scif-r8a77965", 683 "renesas,rcar-gen3-scif", "renesas,scif"; 684 reg = <0 0xe6c50000 0 64>; 685 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 686 clocks = <&cpg CPG_MOD 204>, 687 <&cpg CPG_CORE 20>, 688 <&scif_clk>; 689 clock-names = "fck", "brg_int", "scif_clk"; 690 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 691 dma-names = "tx", "rx"; 692 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 693 resets = <&cpg 204>; 694 status = "disabled"; 695 }; 696 697 scif4: serial@e6c40000 { 698 compatible = "renesas,scif-r8a77965", 699 "renesas,rcar-gen3-scif", "renesas,scif"; 700 reg = <0 0xe6c40000 0 64>; 701 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 702 clocks = <&cpg CPG_MOD 203>, 703 <&cpg CPG_CORE 20>, 704 <&scif_clk>; 705 clock-names = "fck", "brg_int", "scif_clk"; 706 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 707 dma-names = "tx", "rx"; 708 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 709 resets = <&cpg 203>; 710 status = "disabled"; 711 }; 712 713 scif5: serial@e6f30000 { 714 compatible = "renesas,scif-r8a77965", 715 "renesas,rcar-gen3-scif", "renesas,scif"; 716 reg = <0 0xe6f30000 0 64>; 717 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 718 clocks = <&cpg CPG_MOD 202>, 719 <&cpg CPG_CORE 20>, 720 <&scif_clk>; 721 clock-names = "fck", "brg_int", "scif_clk"; 722 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 723 <&dmac2 0x5b>, <&dmac2 0x5a>; 724 dma-names = "tx", "rx", "tx", "rx"; 725 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 726 resets = <&cpg 202>; 727 status = "disabled"; 728 }; 729 730 msiof0: spi@e6e90000 { 731 compatible = "renesas,msiof-r8a77965", 732 "renesas,rcar-gen3-msiof"; 733 reg = <0 0xe6e90000 0 0x0064>; 734 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 735 clocks = <&cpg CPG_MOD 211>; 736 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 737 <&dmac2 0x41>, <&dmac2 0x40>; 738 dma-names = "tx", "rx", "tx", "rx"; 739 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 740 resets = <&cpg 211>; 741 #address-cells = <1>; 742 #size-cells = <0>; 743 status = "disabled"; 744 }; 745 746 msiof1: spi@e6ea0000 { 747 compatible = "renesas,msiof-r8a77965", 748 "renesas,rcar-gen3-msiof"; 749 reg = <0 0xe6ea0000 0 0x0064>; 750 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 751 clocks = <&cpg CPG_MOD 210>; 752 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 753 <&dmac2 0x43>, <&dmac2 0x42>; 754 dma-names = "tx", "rx", "tx", "rx"; 755 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 756 resets = <&cpg 210>; 757 #address-cells = <1>; 758 #size-cells = <0>; 759 status = "disabled"; 760 }; 761 762 msiof2: spi@e6c00000 { 763 compatible = "renesas,msiof-r8a77965", 764 "renesas,rcar-gen3-msiof"; 765 reg = <0 0xe6c00000 0 0x0064>; 766 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 767 clocks = <&cpg CPG_MOD 209>; 768 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 769 dma-names = "tx", "rx"; 770 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 771 resets = <&cpg 209>; 772 #address-cells = <1>; 773 #size-cells = <0>; 774 status = "disabled"; 775 }; 776 777 msiof3: spi@e6c10000 { 778 compatible = "renesas,msiof-r8a77965", 779 "renesas,rcar-gen3-msiof"; 780 reg = <0 0xe6c10000 0 0x0064>; 781 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 782 clocks = <&cpg CPG_MOD 208>; 783 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 784 dma-names = "tx", "rx"; 785 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 786 resets = <&cpg 208>; 787 #address-cells = <1>; 788 #size-cells = <0>; 789 status = "disabled"; 790 }; 791 792 vin0: video@e6ef0000 { 793 reg = <0 0xe6ef0000 0 0x1000>; 794 /* placeholder */ 795 }; 796 797 vin1: video@e6ef1000 { 798 reg = <0 0xe6ef1000 0 0x1000>; 799 /* placeholder */ 800 }; 801 802 vin2: video@e6ef2000 { 803 reg = <0 0xe6ef2000 0 0x1000>; 804 /* placeholder */ 805 }; 806 807 vin3: video@e6ef3000 { 808 reg = <0 0xe6ef3000 0 0x1000>; 809 /* placeholder */ 810 }; 811 812 vin4: video@e6ef4000 { 813 reg = <0 0xe6ef4000 0 0x1000>; 814 /* placeholder */ 815 }; 816 817 vin5: video@e6ef5000 { 818 reg = <0 0xe6ef5000 0 0x1000>; 819 /* placeholder */ 820 }; 821 822 vin6: video@e6ef6000 { 823 reg = <0 0xe6ef6000 0 0x1000>; 824 /* placeholder */ 825 }; 826 827 vin7: video@e6ef7000 { 828 reg = <0 0xe6ef7000 0 0x1000>; 829 /* placeholder */ 830 }; 831 832 rcar_sound: sound@ec500000 { 833 reg = <0 0xec500000 0 0x1000>, /* SCU */ 834 <0 0xec5a0000 0 0x100>, /* ADG */ 835 <0 0xec540000 0 0x1000>, /* SSIU */ 836 <0 0xec541000 0 0x280>, /* SSI */ 837 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 838 /* placeholder */ 839 840 rcar_sound,dvc { 841 dvc0: dvc-0 { 842 }; 843 dvc1: dvc-1 { 844 }; 845 }; 846 847 rcar_sound,src { 848 src0: src-0 { 849 }; 850 src1: src-1 { 851 }; 852 }; 853 854 rcar_sound,ssi { 855 ssi0: ssi-0 { 856 }; 857 ssi1: ssi-1 { 858 }; 859 }; 860 861 ports { 862 #address-cells = <1>; 863 #size-cells = <0>; 864 port@0 { 865 reg = <0>; 866 }; 867 }; 868 }; 869 870 xhci0: usb@ee000000 { 871 compatible = "renesas,xhci-r8a77965", 872 "renesas,rcar-gen3-xhci"; 873 reg = <0 0xee000000 0 0xc00>; 874 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 875 clocks = <&cpg CPG_MOD 328>; 876 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 877 resets = <&cpg 328>; 878 status = "disabled"; 879 }; 880 881 usb3_peri0: usb@ee020000 { 882 compatible = "renesas,r8a77965-usb3-peri", 883 "renesas,rcar-gen3-usb3-peri"; 884 reg = <0 0xee020000 0 0x400>; 885 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 886 clocks = <&cpg CPG_MOD 328>; 887 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 888 resets = <&cpg 328>; 889 status = "disabled"; 890 }; 891 892 ohci0: usb@ee080000 { 893 compatible = "generic-ohci"; 894 reg = <0 0xee080000 0 0x100>; 895 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 896 clocks = <&cpg CPG_MOD 703>; 897 phys = <&usb2_phy0>; 898 phy-names = "usb"; 899 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 900 resets = <&cpg 703>; 901 status = "disabled"; 902 }; 903 904 ohci1: usb@ee0a0000 { 905 compatible = "generic-ohci"; 906 reg = <0 0xee0a0000 0 0x100>; 907 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 908 clocks = <&cpg CPG_MOD 702>; 909 phys = <&usb2_phy1>; 910 phy-names = "usb"; 911 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 912 resets = <&cpg 702>; 913 status = "disabled"; 914 }; 915 916 ehci0: usb@ee080100 { 917 compatible = "generic-ehci"; 918 reg = <0 0xee080100 0 0x100>; 919 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 920 clocks = <&cpg CPG_MOD 703>; 921 phys = <&usb2_phy0>; 922 phy-names = "usb"; 923 companion = <&ohci0>; 924 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 925 resets = <&cpg 703>; 926 status = "disabled"; 927 }; 928 929 ehci1: usb@ee0a0100 { 930 compatible = "generic-ehci"; 931 reg = <0 0xee0a0100 0 0x100>; 932 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 933 clocks = <&cpg CPG_MOD 702>; 934 phys = <&usb2_phy1>; 935 phy-names = "usb"; 936 companion = <&ohci1>; 937 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 938 resets = <&cpg 702>; 939 status = "disabled"; 940 }; 941 942 usb2_phy0: usb-phy@ee080200 { 943 compatible = "renesas,usb2-phy-r8a77965", 944 "renesas,rcar-gen3-usb2-phy"; 945 reg = <0 0xee080200 0 0x700>; 946 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 947 clocks = <&cpg CPG_MOD 703>; 948 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 949 resets = <&cpg 703>; 950 #phy-cells = <0>; 951 status = "disabled"; 952 }; 953 954 usb2_phy1: usb-phy@ee0a0200 { 955 compatible = "renesas,usb2-phy-r8a77965", 956 "renesas,rcar-gen3-usb2-phy"; 957 reg = <0 0xee0a0200 0 0x700>; 958 clocks = <&cpg CPG_MOD 703>; 959 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 960 resets = <&cpg 703>; 961 #phy-cells = <0>; 962 status = "disabled"; 963 }; 964 965 sdhi0: sd@ee100000 { 966 reg = <0 0xee100000 0 0x2000>; 967 /* placeholder */ 968 }; 969 970 sdhi1: sd@ee120000 { 971 reg = <0 0xee120000 0 0x2000>; 972 /* placeholder */ 973 }; 974 975 sdhi2: sd@ee140000 { 976 reg = <0 0xee140000 0 0x2000>; 977 /* placeholder */ 978 }; 979 980 sdhi3: sd@ee160000 { 981 reg = <0 0xee160000 0 0x2000>; 982 /* placeholder */ 983 }; 984 985 gic: interrupt-controller@f1010000 { 986 compatible = "arm,gic-400"; 987 #interrupt-cells = <3>; 988 #address-cells = <0>; 989 interrupt-controller; 990 reg = <0x0 0xf1010000 0 0x1000>, 991 <0x0 0xf1020000 0 0x20000>, 992 <0x0 0xf1040000 0 0x20000>, 993 <0x0 0xf1060000 0 0x20000>; 994 interrupts = <GIC_PPI 9 995 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 996 clocks = <&cpg CPG_MOD 408>; 997 clock-names = "clk"; 998 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 999 resets = <&cpg 408>; 1000 }; 1001 1002 pciec0: pcie@fe000000 { 1003 reg = <0 0xfe000000 0 0x80000>; 1004 /* placeholder */ 1005 }; 1006 1007 pciec1: pcie@ee800000 { 1008 reg = <0 0xee800000 0 0x80000>; 1009 /* placeholder */ 1010 }; 1011 1012 fcpf0: fcp@fe950000 { 1013 compatible = "renesas,fcpf"; 1014 reg = <0 0xfe950000 0 0x200>; 1015 clocks = <&cpg CPG_MOD 615>; 1016 power-domains = <&sysc R8A77965_PD_A3VP>; 1017 resets = <&cpg 615>; 1018 }; 1019 1020 vspb: vsp@fe960000 { 1021 compatible = "renesas,vsp2"; 1022 reg = <0 0xfe960000 0 0x8000>; 1023 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1024 clocks = <&cpg CPG_MOD 626>; 1025 power-domains = <&sysc R8A77965_PD_A3VP>; 1026 resets = <&cpg 626>; 1027 1028 renesas,fcp = <&fcpvb0>; 1029 }; 1030 1031 fcpvb0: fcp@fe96f000 { 1032 compatible = "renesas,fcpv"; 1033 reg = <0 0xfe96f000 0 0x200>; 1034 clocks = <&cpg CPG_MOD 607>; 1035 power-domains = <&sysc R8A77965_PD_A3VP>; 1036 resets = <&cpg 607>; 1037 }; 1038 1039 vspi0: vsp@fe9a0000 { 1040 compatible = "renesas,vsp2"; 1041 reg = <0 0xfe9a0000 0 0x8000>; 1042 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1043 clocks = <&cpg CPG_MOD 631>; 1044 power-domains = <&sysc R8A77965_PD_A3VP>; 1045 resets = <&cpg 631>; 1046 1047 renesas,fcp = <&fcpvi0>; 1048 }; 1049 1050 fcpvi0: fcp@fe9af000 { 1051 compatible = "renesas,fcpv"; 1052 reg = <0 0xfe9af000 0 0x200>; 1053 clocks = <&cpg CPG_MOD 611>; 1054 power-domains = <&sysc R8A77965_PD_A3VP>; 1055 resets = <&cpg 611>; 1056 }; 1057 1058 vspd0: vsp@fea20000 { 1059 compatible = "renesas,vsp2"; 1060 reg = <0 0xfea20000 0 0x8000>; 1061 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1062 clocks = <&cpg CPG_MOD 623>; 1063 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1064 resets = <&cpg 623>; 1065 1066 renesas,fcp = <&fcpvd0>; 1067 }; 1068 1069 fcpvd0: fcp@fea27000 { 1070 compatible = "renesas,fcpv"; 1071 reg = <0 0xfea27000 0 0x200>; 1072 clocks = <&cpg CPG_MOD 603>; 1073 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1074 resets = <&cpg 603>; 1075 }; 1076 1077 vspd1: vsp@fea28000 { 1078 compatible = "renesas,vsp2"; 1079 reg = <0 0xfea28000 0 0x8000>; 1080 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1081 clocks = <&cpg CPG_MOD 622>; 1082 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1083 resets = <&cpg 622>; 1084 1085 renesas,fcp = <&fcpvd1>; 1086 }; 1087 1088 fcpvd1: fcp@fea2f000 { 1089 compatible = "renesas,fcpv"; 1090 reg = <0 0xfea2f000 0 0x200>; 1091 clocks = <&cpg CPG_MOD 602>; 1092 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1093 resets = <&cpg 602>; 1094 }; 1095 1096 csi20: csi2@fea80000 { 1097 reg = <0 0xfea80000 0 0x10000>; 1098 /* placeholder */ 1099 1100 ports { 1101 #address-cells = <1>; 1102 #size-cells = <0>; 1103 }; 1104 }; 1105 1106 csi40: csi2@feaa0000 { 1107 reg = <0 0xfeaa0000 0 0x10000>; 1108 /* placeholder */ 1109 1110 ports { 1111 #address-cells = <1>; 1112 #size-cells = <0>; 1113 }; 1114 }; 1115 1116 hdmi0: hdmi@fead0000 { 1117 compatible = "renesas,r8a77965-hdmi", 1118 "renesas,rcar-gen3-hdmi"; 1119 reg = <0 0xfead0000 0 0x10000>; 1120 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 1121 clocks = <&cpg CPG_MOD 729>, 1122 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 1123 clock-names = "iahb", "isfr"; 1124 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1125 resets = <&cpg 729>; 1126 status = "disabled"; 1127 1128 ports { 1129 #address-cells = <1>; 1130 #size-cells = <0>; 1131 port@0 { 1132 reg = <0>; 1133 dw_hdmi0_in: endpoint { 1134 remote-endpoint = <&du_out_hdmi0>; 1135 }; 1136 }; 1137 port@1 { 1138 reg = <1>; 1139 }; 1140 }; 1141 }; 1142 1143 du: display@feb00000 { 1144 compatible = "renesas,du-r8a77965"; 1145 reg = <0 0xfeb00000 0 0x80000>; 1146 reg-names = "du"; 1147 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1148 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 1149 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 1150 clocks = <&cpg CPG_MOD 724>, 1151 <&cpg CPG_MOD 723>, 1152 <&cpg CPG_MOD 721>; 1153 clock-names = "du.0", "du.1", "du.3"; 1154 status = "disabled"; 1155 1156 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; 1157 1158 ports { 1159 #address-cells = <1>; 1160 #size-cells = <0>; 1161 1162 port@0 { 1163 reg = <0>; 1164 du_out_rgb: endpoint { 1165 }; 1166 }; 1167 port@1 { 1168 reg = <1>; 1169 du_out_hdmi0: endpoint { 1170 remote-endpoint = <&dw_hdmi0_in>; 1171 }; 1172 }; 1173 port@2 { 1174 reg = <2>; 1175 du_out_lvds0: endpoint { 1176 }; 1177 }; 1178 }; 1179 }; 1180 1181 prr: chipid@fff00044 { 1182 compatible = "renesas,prr"; 1183 reg = <0 0xfff00044 0 4>; 1184 }; 1185 }; 1186 1187 timer { 1188 compatible = "arm,armv8-timer"; 1189 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1190 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1191 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1192 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1193 }; 1194 1195 /* External USB clocks - can be overridden by the board */ 1196 usb3s0_clk: usb3s0 { 1197 compatible = "fixed-clock"; 1198 #clock-cells = <0>; 1199 clock-frequency = <0>; 1200 }; 1201 1202 usb_extal_clk: usb_extal { 1203 compatible = "fixed-clock"; 1204 #clock-cells = <0>; 1205 clock-frequency = <0>; 1206 }; 1207}; 1208