1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I 10 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cluster0_opp: opp_table0 { 64 compatible = "operating-points-v2"; 65 opp-shared; 66 67 opp-500000000 { 68 opp-hz = /bits/ 64 <500000000>; 69 opp-microvolt = <830000>; 70 clock-latency-ns = <300000>; 71 }; 72 opp-1000000000 { 73 opp-hz = /bits/ 64 <1000000000>; 74 opp-microvolt = <830000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1500000000 { 78 opp-hz = /bits/ 64 <1500000000>; 79 opp-microvolt = <830000>; 80 clock-latency-ns = <300000>; 81 opp-suspend; 82 }; 83 opp-1600000000 { 84 opp-hz = /bits/ 64 <1600000000>; 85 opp-microvolt = <900000>; 86 clock-latency-ns = <300000>; 87 turbo-mode; 88 }; 89 opp-1700000000 { 90 opp-hz = /bits/ 64 <1700000000>; 91 opp-microvolt = <900000>; 92 clock-latency-ns = <300000>; 93 turbo-mode; 94 }; 95 opp-1800000000 { 96 opp-hz = /bits/ 64 <1800000000>; 97 opp-microvolt = <960000>; 98 clock-latency-ns = <300000>; 99 turbo-mode; 100 }; 101 }; 102 103 cpus { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 a57_0: cpu@0 { 108 compatible = "arm,cortex-a57", "arm,armv8"; 109 reg = <0x0>; 110 device_type = "cpu"; 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 112 next-level-cache = <&L2_CA57>; 113 enable-method = "psci"; 114 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 115 operating-points-v2 = <&cluster0_opp>; 116 }; 117 118 a57_1: cpu@1 { 119 compatible = "arm,cortex-a57", "arm,armv8"; 120 reg = <0x1>; 121 device_type = "cpu"; 122 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 123 next-level-cache = <&L2_CA57>; 124 enable-method = "psci"; 125 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 126 operating-points-v2 = <&cluster0_opp>; 127 }; 128 129 L2_CA57: cache-controller-0 { 130 compatible = "cache"; 131 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 132 cache-unified; 133 cache-level = <2>; 134 }; 135 }; 136 137 extal_clk: extal { 138 compatible = "fixed-clock"; 139 #clock-cells = <0>; 140 /* This value must be overridden by the board */ 141 clock-frequency = <0>; 142 }; 143 144 extalr_clk: extalr { 145 compatible = "fixed-clock"; 146 #clock-cells = <0>; 147 /* This value must be overridden by the board */ 148 clock-frequency = <0>; 149 }; 150 151 /* External PCIe clock - can be overridden by the board */ 152 pcie_bus_clk: pcie_bus { 153 compatible = "fixed-clock"; 154 #clock-cells = <0>; 155 clock-frequency = <0>; 156 }; 157 158 pmu_a57 { 159 compatible = "arm,cortex-a57-pmu"; 160 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 161 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 162 interrupt-affinity = <&a57_0>, 163 <&a57_1>; 164 }; 165 166 psci { 167 compatible = "arm,psci-1.0", "arm,psci-0.2"; 168 method = "smc"; 169 }; 170 171 /* External SCIF clock - to be overridden by boards that provide it */ 172 scif_clk: scif { 173 compatible = "fixed-clock"; 174 #clock-cells = <0>; 175 clock-frequency = <0>; 176 }; 177 178 soc { 179 compatible = "simple-bus"; 180 interrupt-parent = <&gic>; 181 #address-cells = <2>; 182 #size-cells = <2>; 183 ranges; 184 185 rwdt: watchdog@e6020000 { 186 compatible = "renesas,r8a77965-wdt", 187 "renesas,rcar-gen3-wdt"; 188 reg = <0 0xe6020000 0 0x0c>; 189 clocks = <&cpg CPG_MOD 402>; 190 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 191 resets = <&cpg 402>; 192 status = "disabled"; 193 }; 194 195 gpio0: gpio@e6050000 { 196 compatible = "renesas,gpio-r8a77965", 197 "renesas,rcar-gen3-gpio"; 198 reg = <0 0xe6050000 0 0x50>; 199 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 200 #gpio-cells = <2>; 201 gpio-controller; 202 gpio-ranges = <&pfc 0 0 16>; 203 #interrupt-cells = <2>; 204 interrupt-controller; 205 clocks = <&cpg CPG_MOD 912>; 206 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 207 resets = <&cpg 912>; 208 }; 209 210 gpio1: gpio@e6051000 { 211 compatible = "renesas,gpio-r8a77965", 212 "renesas,rcar-gen3-gpio"; 213 reg = <0 0xe6051000 0 0x50>; 214 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 215 #gpio-cells = <2>; 216 gpio-controller; 217 gpio-ranges = <&pfc 0 32 29>; 218 #interrupt-cells = <2>; 219 interrupt-controller; 220 clocks = <&cpg CPG_MOD 911>; 221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 222 resets = <&cpg 911>; 223 }; 224 225 gpio2: gpio@e6052000 { 226 compatible = "renesas,gpio-r8a77965", 227 "renesas,rcar-gen3-gpio"; 228 reg = <0 0xe6052000 0 0x50>; 229 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 230 #gpio-cells = <2>; 231 gpio-controller; 232 gpio-ranges = <&pfc 0 64 15>; 233 #interrupt-cells = <2>; 234 interrupt-controller; 235 clocks = <&cpg CPG_MOD 910>; 236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 237 resets = <&cpg 910>; 238 }; 239 240 gpio3: gpio@e6053000 { 241 compatible = "renesas,gpio-r8a77965", 242 "renesas,rcar-gen3-gpio"; 243 reg = <0 0xe6053000 0 0x50>; 244 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 245 #gpio-cells = <2>; 246 gpio-controller; 247 gpio-ranges = <&pfc 0 96 16>; 248 #interrupt-cells = <2>; 249 interrupt-controller; 250 clocks = <&cpg CPG_MOD 909>; 251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 252 resets = <&cpg 909>; 253 }; 254 255 gpio4: gpio@e6054000 { 256 compatible = "renesas,gpio-r8a77965", 257 "renesas,rcar-gen3-gpio"; 258 reg = <0 0xe6054000 0 0x50>; 259 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 260 #gpio-cells = <2>; 261 gpio-controller; 262 gpio-ranges = <&pfc 0 128 18>; 263 #interrupt-cells = <2>; 264 interrupt-controller; 265 clocks = <&cpg CPG_MOD 908>; 266 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 267 resets = <&cpg 908>; 268 }; 269 270 gpio5: gpio@e6055000 { 271 compatible = "renesas,gpio-r8a77965", 272 "renesas,rcar-gen3-gpio"; 273 reg = <0 0xe6055000 0 0x50>; 274 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 275 #gpio-cells = <2>; 276 gpio-controller; 277 gpio-ranges = <&pfc 0 160 26>; 278 #interrupt-cells = <2>; 279 interrupt-controller; 280 clocks = <&cpg CPG_MOD 907>; 281 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 282 resets = <&cpg 907>; 283 }; 284 285 gpio6: gpio@e6055400 { 286 compatible = "renesas,gpio-r8a77965", 287 "renesas,rcar-gen3-gpio"; 288 reg = <0 0xe6055400 0 0x50>; 289 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 290 #gpio-cells = <2>; 291 gpio-controller; 292 gpio-ranges = <&pfc 0 192 32>; 293 #interrupt-cells = <2>; 294 interrupt-controller; 295 clocks = <&cpg CPG_MOD 906>; 296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 297 resets = <&cpg 906>; 298 }; 299 300 gpio7: gpio@e6055800 { 301 compatible = "renesas,gpio-r8a77965", 302 "renesas,rcar-gen3-gpio"; 303 reg = <0 0xe6055800 0 0x50>; 304 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 305 #gpio-cells = <2>; 306 gpio-controller; 307 gpio-ranges = <&pfc 0 224 4>; 308 #interrupt-cells = <2>; 309 interrupt-controller; 310 clocks = <&cpg CPG_MOD 905>; 311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 312 resets = <&cpg 905>; 313 }; 314 315 pfc: pin-controller@e6060000 { 316 compatible = "renesas,pfc-r8a77965"; 317 reg = <0 0xe6060000 0 0x50c>; 318 }; 319 320 cpg: clock-controller@e6150000 { 321 compatible = "renesas,r8a77965-cpg-mssr"; 322 reg = <0 0xe6150000 0 0x1000>; 323 clocks = <&extal_clk>, <&extalr_clk>; 324 clock-names = "extal", "extalr"; 325 #clock-cells = <2>; 326 #power-domain-cells = <0>; 327 #reset-cells = <1>; 328 }; 329 330 rst: reset-controller@e6160000 { 331 compatible = "renesas,r8a77965-rst"; 332 reg = <0 0xe6160000 0 0x0200>; 333 }; 334 335 sysc: system-controller@e6180000 { 336 compatible = "renesas,r8a77965-sysc"; 337 reg = <0 0xe6180000 0 0x0400>; 338 #power-domain-cells = <1>; 339 }; 340 341 tsc: thermal@e6198000 { 342 compatible = "renesas,r8a77965-thermal"; 343 reg = <0 0xe6198000 0 0x100>, 344 <0 0xe61a0000 0 0x100>, 345 <0 0xe61a8000 0 0x100>; 346 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 349 clocks = <&cpg CPG_MOD 522>; 350 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 351 resets = <&cpg 522>; 352 #thermal-sensor-cells = <1>; 353 }; 354 355 intc_ex: interrupt-controller@e61c0000 { 356 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 357 #interrupt-cells = <2>; 358 interrupt-controller; 359 reg = <0 0xe61c0000 0 0x200>; 360 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 361 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 362 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 363 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 364 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 365 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 366 clocks = <&cpg CPG_MOD 407>; 367 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 368 resets = <&cpg 407>; 369 }; 370 371 i2c0: i2c@e6500000 { 372 #address-cells = <1>; 373 #size-cells = <0>; 374 compatible = "renesas,i2c-r8a77965", 375 "renesas,rcar-gen3-i2c"; 376 reg = <0 0xe6500000 0 0x40>; 377 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 378 clocks = <&cpg CPG_MOD 931>; 379 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 380 resets = <&cpg 931>; 381 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 382 <&dmac2 0x91>, <&dmac2 0x90>; 383 dma-names = "tx", "rx", "tx", "rx"; 384 i2c-scl-internal-delay-ns = <110>; 385 status = "disabled"; 386 }; 387 388 i2c1: i2c@e6508000 { 389 #address-cells = <1>; 390 #size-cells = <0>; 391 compatible = "renesas,i2c-r8a77965", 392 "renesas,rcar-gen3-i2c"; 393 reg = <0 0xe6508000 0 0x40>; 394 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 395 clocks = <&cpg CPG_MOD 930>; 396 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 397 resets = <&cpg 930>; 398 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 399 <&dmac2 0x93>, <&dmac2 0x92>; 400 dma-names = "tx", "rx", "tx", "rx"; 401 i2c-scl-internal-delay-ns = <6>; 402 status = "disabled"; 403 }; 404 405 i2c2: i2c@e6510000 { 406 #address-cells = <1>; 407 #size-cells = <0>; 408 compatible = "renesas,i2c-r8a77965", 409 "renesas,rcar-gen3-i2c"; 410 reg = <0 0xe6510000 0 0x40>; 411 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 412 clocks = <&cpg CPG_MOD 929>; 413 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 414 resets = <&cpg 929>; 415 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 416 <&dmac2 0x95>, <&dmac2 0x94>; 417 dma-names = "tx", "rx", "tx", "rx"; 418 i2c-scl-internal-delay-ns = <6>; 419 status = "disabled"; 420 }; 421 422 i2c3: i2c@e66d0000 { 423 #address-cells = <1>; 424 #size-cells = <0>; 425 compatible = "renesas,i2c-r8a77965", 426 "renesas,rcar-gen3-i2c"; 427 reg = <0 0xe66d0000 0 0x40>; 428 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 429 clocks = <&cpg CPG_MOD 928>; 430 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 431 resets = <&cpg 928>; 432 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 433 dma-names = "tx", "rx"; 434 i2c-scl-internal-delay-ns = <110>; 435 status = "disabled"; 436 }; 437 438 i2c4: i2c@e66d8000 { 439 #address-cells = <1>; 440 #size-cells = <0>; 441 compatible = "renesas,i2c-r8a77965", 442 "renesas,rcar-gen3-i2c"; 443 reg = <0 0xe66d8000 0 0x40>; 444 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 927>; 446 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 447 resets = <&cpg 927>; 448 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 449 dma-names = "tx", "rx"; 450 i2c-scl-internal-delay-ns = <110>; 451 status = "disabled"; 452 }; 453 454 i2c5: i2c@e66e0000 { 455 #address-cells = <1>; 456 #size-cells = <0>; 457 compatible = "renesas,i2c-r8a77965", 458 "renesas,rcar-gen3-i2c"; 459 reg = <0 0xe66e0000 0 0x40>; 460 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 461 clocks = <&cpg CPG_MOD 919>; 462 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 463 resets = <&cpg 919>; 464 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 465 dma-names = "tx", "rx"; 466 i2c-scl-internal-delay-ns = <110>; 467 status = "disabled"; 468 }; 469 470 i2c6: i2c@e66e8000 { 471 #address-cells = <1>; 472 #size-cells = <0>; 473 compatible = "renesas,i2c-r8a77965", 474 "renesas,rcar-gen3-i2c"; 475 reg = <0 0xe66e8000 0 0x40>; 476 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 477 clocks = <&cpg CPG_MOD 918>; 478 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 479 resets = <&cpg 918>; 480 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 481 dma-names = "tx", "rx"; 482 i2c-scl-internal-delay-ns = <6>; 483 status = "disabled"; 484 }; 485 486 i2c_dvfs: i2c@e60b0000 { 487 #address-cells = <1>; 488 #size-cells = <0>; 489 compatible = "renesas,iic-r8a77965", 490 "renesas,rcar-gen3-iic", 491 "renesas,rmobile-iic"; 492 reg = <0 0xe60b0000 0 0x425>; 493 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 494 clocks = <&cpg CPG_MOD 926>; 495 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 496 resets = <&cpg 926>; 497 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 498 dma-names = "tx", "rx"; 499 status = "disabled"; 500 }; 501 502 hscif0: serial@e6540000 { 503 compatible = "renesas,hscif-r8a77965", 504 "renesas,rcar-gen3-hscif", 505 "renesas,hscif"; 506 reg = <0 0xe6540000 0 0x60>; 507 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 508 clocks = <&cpg CPG_MOD 520>, 509 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 510 <&scif_clk>; 511 clock-names = "fck", "brg_int", "scif_clk"; 512 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 513 <&dmac2 0x31>, <&dmac2 0x30>; 514 dma-names = "tx", "rx", "tx", "rx"; 515 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 516 resets = <&cpg 520>; 517 status = "disabled"; 518 }; 519 520 hscif1: serial@e6550000 { 521 compatible = "renesas,hscif-r8a77965", 522 "renesas,rcar-gen3-hscif", 523 "renesas,hscif"; 524 reg = <0 0xe6550000 0 0x60>; 525 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 526 clocks = <&cpg CPG_MOD 519>, 527 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 528 <&scif_clk>; 529 clock-names = "fck", "brg_int", "scif_clk"; 530 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 531 <&dmac2 0x33>, <&dmac2 0x32>; 532 dma-names = "tx", "rx", "tx", "rx"; 533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 534 resets = <&cpg 519>; 535 status = "disabled"; 536 }; 537 538 hscif2: serial@e6560000 { 539 compatible = "renesas,hscif-r8a77965", 540 "renesas,rcar-gen3-hscif", 541 "renesas,hscif"; 542 reg = <0 0xe6560000 0 0x60>; 543 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 544 clocks = <&cpg CPG_MOD 518>, 545 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 546 <&scif_clk>; 547 clock-names = "fck", "brg_int", "scif_clk"; 548 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 549 <&dmac2 0x35>, <&dmac2 0x34>; 550 dma-names = "tx", "rx", "tx", "rx"; 551 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 552 resets = <&cpg 518>; 553 status = "disabled"; 554 }; 555 556 hscif3: serial@e66a0000 { 557 compatible = "renesas,hscif-r8a77965", 558 "renesas,rcar-gen3-hscif", 559 "renesas,hscif"; 560 reg = <0 0xe66a0000 0 0x60>; 561 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 562 clocks = <&cpg CPG_MOD 517>, 563 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 564 <&scif_clk>; 565 clock-names = "fck", "brg_int", "scif_clk"; 566 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 567 dma-names = "tx", "rx"; 568 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 569 resets = <&cpg 517>; 570 status = "disabled"; 571 }; 572 573 hscif4: serial@e66b0000 { 574 compatible = "renesas,hscif-r8a77965", 575 "renesas,rcar-gen3-hscif", 576 "renesas,hscif"; 577 reg = <0 0xe66b0000 0 0x60>; 578 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 579 clocks = <&cpg CPG_MOD 516>, 580 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 581 <&scif_clk>; 582 clock-names = "fck", "brg_int", "scif_clk"; 583 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 584 dma-names = "tx", "rx"; 585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 586 resets = <&cpg 516>; 587 status = "disabled"; 588 }; 589 590 hsusb: usb@e6590000 { 591 compatible = "renesas,usbhs-r8a77965", 592 "renesas,rcar-gen3-usbhs"; 593 reg = <0 0xe6590000 0 0x100>; 594 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 596 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 597 <&usb_dmac1 0>, <&usb_dmac1 1>; 598 dma-names = "ch0", "ch1", "ch2", "ch3"; 599 renesas,buswait = <11>; 600 phys = <&usb2_phy0>; 601 phy-names = "usb"; 602 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 603 resets = <&cpg 704>, <&cpg 703>; 604 status = "disabled"; 605 }; 606 607 usb_dmac0: dma-controller@e65a0000 { 608 compatible = "renesas,r8a77965-usb-dmac", 609 "renesas,usb-dmac"; 610 reg = <0 0xe65a0000 0 0x100>; 611 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 612 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 613 interrupt-names = "ch0", "ch1"; 614 clocks = <&cpg CPG_MOD 330>; 615 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 616 resets = <&cpg 330>; 617 #dma-cells = <1>; 618 dma-channels = <2>; 619 }; 620 621 usb_dmac1: dma-controller@e65b0000 { 622 compatible = "renesas,r8a77965-usb-dmac", 623 "renesas,usb-dmac"; 624 reg = <0 0xe65b0000 0 0x100>; 625 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 626 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 627 interrupt-names = "ch0", "ch1"; 628 clocks = <&cpg CPG_MOD 331>; 629 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 630 resets = <&cpg 331>; 631 #dma-cells = <1>; 632 dma-channels = <2>; 633 }; 634 635 usb3_phy0: usb-phy@e65ee000 { 636 compatible = "renesas,r8a77965-usb3-phy", 637 "renesas,rcar-gen3-usb3-phy"; 638 reg = <0 0xe65ee000 0 0x90>; 639 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 640 <&usb_extal_clk>; 641 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 642 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 643 resets = <&cpg 328>; 644 #phy-cells = <0>; 645 status = "disabled"; 646 }; 647 648 dmac0: dma-controller@e6700000 { 649 compatible = "renesas,dmac-r8a77965", 650 "renesas,rcar-dmac"; 651 reg = <0 0xe6700000 0 0x10000>; 652 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 653 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 654 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 655 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 656 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 657 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 658 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 659 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 660 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 661 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 662 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 663 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 664 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 665 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 666 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 667 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 668 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 669 interrupt-names = "error", 670 "ch0", "ch1", "ch2", "ch3", 671 "ch4", "ch5", "ch6", "ch7", 672 "ch8", "ch9", "ch10", "ch11", 673 "ch12", "ch13", "ch14", "ch15"; 674 clocks = <&cpg CPG_MOD 219>; 675 clock-names = "fck"; 676 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 677 resets = <&cpg 219>; 678 #dma-cells = <1>; 679 dma-channels = <16>; 680 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 681 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 682 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 683 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 684 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 685 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 686 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 687 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 688 }; 689 690 dmac1: dma-controller@e7300000 { 691 compatible = "renesas,dmac-r8a77965", 692 "renesas,rcar-dmac"; 693 reg = <0 0xe7300000 0 0x10000>; 694 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 695 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 696 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 697 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 698 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 699 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 700 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 701 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 702 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 703 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 704 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 705 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 706 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 707 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 708 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 709 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 710 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 711 interrupt-names = "error", 712 "ch0", "ch1", "ch2", "ch3", 713 "ch4", "ch5", "ch6", "ch7", 714 "ch8", "ch9", "ch10", "ch11", 715 "ch12", "ch13", "ch14", "ch15"; 716 clocks = <&cpg CPG_MOD 218>; 717 clock-names = "fck"; 718 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 719 resets = <&cpg 218>; 720 #dma-cells = <1>; 721 dma-channels = <16>; 722 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 723 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 724 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 725 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 726 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 727 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 728 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 729 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 730 }; 731 732 dmac2: dma-controller@e7310000 { 733 compatible = "renesas,dmac-r8a77965", 734 "renesas,rcar-dmac"; 735 reg = <0 0xe7310000 0 0x10000>; 736 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 737 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 738 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 739 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 740 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 741 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 742 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 743 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 744 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 745 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 746 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 747 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 748 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 749 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 750 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 751 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 752 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 753 interrupt-names = "error", 754 "ch0", "ch1", "ch2", "ch3", 755 "ch4", "ch5", "ch6", "ch7", 756 "ch8", "ch9", "ch10", "ch11", 757 "ch12", "ch13", "ch14", "ch15"; 758 clocks = <&cpg CPG_MOD 217>; 759 clock-names = "fck"; 760 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 761 resets = <&cpg 217>; 762 #dma-cells = <1>; 763 dma-channels = <16>; 764 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 765 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 766 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 767 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 768 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 769 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 770 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 771 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 772 }; 773 774 ipmmu_ds0: mmu@e6740000 { 775 compatible = "renesas,ipmmu-r8a77965"; 776 reg = <0 0xe6740000 0 0x1000>; 777 renesas,ipmmu-main = <&ipmmu_mm 0>; 778 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 779 #iommu-cells = <1>; 780 }; 781 782 ipmmu_ds1: mmu@e7740000 { 783 compatible = "renesas,ipmmu-r8a77965"; 784 reg = <0 0xe7740000 0 0x1000>; 785 renesas,ipmmu-main = <&ipmmu_mm 1>; 786 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 787 #iommu-cells = <1>; 788 }; 789 790 ipmmu_hc: mmu@e6570000 { 791 compatible = "renesas,ipmmu-r8a77965"; 792 reg = <0 0xe6570000 0 0x1000>; 793 renesas,ipmmu-main = <&ipmmu_mm 2>; 794 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 795 #iommu-cells = <1>; 796 }; 797 798 ipmmu_ir: mmu@ff8b0000 { 799 compatible = "renesas,ipmmu-r8a77965"; 800 reg = <0 0xff8b0000 0 0x1000>; 801 renesas,ipmmu-main = <&ipmmu_mm 3>; 802 power-domains = <&sysc R8A77965_PD_A3IR>; 803 #iommu-cells = <1>; 804 }; 805 806 ipmmu_mm: mmu@e67b0000 { 807 compatible = "renesas,ipmmu-r8a77965"; 808 reg = <0 0xe67b0000 0 0x1000>; 809 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 811 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 812 #iommu-cells = <1>; 813 }; 814 815 ipmmu_mp: mmu@ec670000 { 816 compatible = "renesas,ipmmu-r8a77965"; 817 reg = <0 0xec670000 0 0x1000>; 818 renesas,ipmmu-main = <&ipmmu_mm 4>; 819 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 820 #iommu-cells = <1>; 821 }; 822 823 ipmmu_pv0: mmu@fd800000 { 824 compatible = "renesas,ipmmu-r8a77965"; 825 reg = <0 0xfd800000 0 0x1000>; 826 renesas,ipmmu-main = <&ipmmu_mm 6>; 827 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 828 #iommu-cells = <1>; 829 }; 830 831 ipmmu_rt: mmu@ffc80000 { 832 compatible = "renesas,ipmmu-r8a77965"; 833 reg = <0 0xffc80000 0 0x1000>; 834 renesas,ipmmu-main = <&ipmmu_mm 10>; 835 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 836 #iommu-cells = <1>; 837 }; 838 839 ipmmu_vc0: mmu@fe6b0000 { 840 compatible = "renesas,ipmmu-r8a77965"; 841 reg = <0 0xfe6b0000 0 0x1000>; 842 renesas,ipmmu-main = <&ipmmu_mm 12>; 843 power-domains = <&sysc R8A77965_PD_A3VC>; 844 #iommu-cells = <1>; 845 }; 846 847 ipmmu_vi0: mmu@febd0000 { 848 compatible = "renesas,ipmmu-r8a77965"; 849 reg = <0 0xfebd0000 0 0x1000>; 850 renesas,ipmmu-main = <&ipmmu_mm 14>; 851 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 852 #iommu-cells = <1>; 853 }; 854 855 ipmmu_vp0: mmu@fe990000 { 856 compatible = "renesas,ipmmu-r8a77965"; 857 reg = <0 0xfe990000 0 0x1000>; 858 renesas,ipmmu-main = <&ipmmu_mm 16>; 859 power-domains = <&sysc R8A77965_PD_A3VP>; 860 #iommu-cells = <1>; 861 }; 862 863 avb: ethernet@e6800000 { 864 compatible = "renesas,etheravb-r8a77965", 865 "renesas,etheravb-rcar-gen3"; 866 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 867 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 892 interrupt-names = "ch0", "ch1", "ch2", "ch3", 893 "ch4", "ch5", "ch6", "ch7", 894 "ch8", "ch9", "ch10", "ch11", 895 "ch12", "ch13", "ch14", "ch15", 896 "ch16", "ch17", "ch18", "ch19", 897 "ch20", "ch21", "ch22", "ch23", 898 "ch24"; 899 clocks = <&cpg CPG_MOD 812>; 900 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 901 resets = <&cpg 812>; 902 phy-mode = "rgmii"; 903 #address-cells = <1>; 904 #size-cells = <0>; 905 status = "disabled"; 906 }; 907 908 can0: can@e6c30000 { 909 reg = <0 0xe6c30000 0 0x1000>; 910 /* placeholder */ 911 }; 912 913 can1: can@e6c38000 { 914 reg = <0 0xe6c38000 0 0x1000>; 915 /* placeholder */ 916 }; 917 918 pwm0: pwm@e6e30000 { 919 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 920 reg = <0 0xe6e30000 0 8>; 921 #pwm-cells = <2>; 922 clocks = <&cpg CPG_MOD 523>; 923 resets = <&cpg 523>; 924 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 925 status = "disabled"; 926 }; 927 928 pwm1: pwm@e6e31000 { 929 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 930 reg = <0 0xe6e31000 0 8>; 931 #pwm-cells = <2>; 932 clocks = <&cpg CPG_MOD 523>; 933 resets = <&cpg 523>; 934 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 935 status = "disabled"; 936 }; 937 938 pwm2: pwm@e6e32000 { 939 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 940 reg = <0 0xe6e32000 0 8>; 941 #pwm-cells = <2>; 942 clocks = <&cpg CPG_MOD 523>; 943 resets = <&cpg 523>; 944 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 945 status = "disabled"; 946 }; 947 948 pwm3: pwm@e6e33000 { 949 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 950 reg = <0 0xe6e33000 0 8>; 951 #pwm-cells = <2>; 952 clocks = <&cpg CPG_MOD 523>; 953 resets = <&cpg 523>; 954 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 955 status = "disabled"; 956 }; 957 958 pwm4: pwm@e6e34000 { 959 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 960 reg = <0 0xe6e34000 0 8>; 961 #pwm-cells = <2>; 962 clocks = <&cpg CPG_MOD 523>; 963 resets = <&cpg 523>; 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 965 status = "disabled"; 966 }; 967 968 pwm5: pwm@e6e35000 { 969 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 970 reg = <0 0xe6e35000 0 8>; 971 #pwm-cells = <2>; 972 clocks = <&cpg CPG_MOD 523>; 973 resets = <&cpg 523>; 974 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 975 status = "disabled"; 976 }; 977 978 pwm6: pwm@e6e36000 { 979 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 980 reg = <0 0xe6e36000 0 8>; 981 #pwm-cells = <2>; 982 clocks = <&cpg CPG_MOD 523>; 983 resets = <&cpg 523>; 984 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 985 status = "disabled"; 986 }; 987 988 scif0: serial@e6e60000 { 989 compatible = "renesas,scif-r8a77965", 990 "renesas,rcar-gen3-scif", "renesas,scif"; 991 reg = <0 0xe6e60000 0 64>; 992 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 993 clocks = <&cpg CPG_MOD 207>, 994 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 995 <&scif_clk>; 996 clock-names = "fck", "brg_int", "scif_clk"; 997 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 998 <&dmac2 0x51>, <&dmac2 0x50>; 999 dma-names = "tx", "rx", "tx", "rx"; 1000 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1001 resets = <&cpg 207>; 1002 status = "disabled"; 1003 }; 1004 1005 scif1: serial@e6e68000 { 1006 compatible = "renesas,scif-r8a77965", 1007 "renesas,rcar-gen3-scif", "renesas,scif"; 1008 reg = <0 0xe6e68000 0 64>; 1009 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1010 clocks = <&cpg CPG_MOD 206>, 1011 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1012 <&scif_clk>; 1013 clock-names = "fck", "brg_int", "scif_clk"; 1014 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1015 <&dmac2 0x53>, <&dmac2 0x52>; 1016 dma-names = "tx", "rx", "tx", "rx"; 1017 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1018 resets = <&cpg 206>; 1019 status = "disabled"; 1020 }; 1021 1022 scif2: serial@e6e88000 { 1023 compatible = "renesas,scif-r8a77965", 1024 "renesas,rcar-gen3-scif", "renesas,scif"; 1025 reg = <0 0xe6e88000 0 64>; 1026 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1027 clocks = <&cpg CPG_MOD 310>, 1028 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1029 <&scif_clk>; 1030 clock-names = "fck", "brg_int", "scif_clk"; 1031 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1032 resets = <&cpg 310>; 1033 status = "disabled"; 1034 }; 1035 1036 scif3: serial@e6c50000 { 1037 compatible = "renesas,scif-r8a77965", 1038 "renesas,rcar-gen3-scif", "renesas,scif"; 1039 reg = <0 0xe6c50000 0 64>; 1040 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1041 clocks = <&cpg CPG_MOD 204>, 1042 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1043 <&scif_clk>; 1044 clock-names = "fck", "brg_int", "scif_clk"; 1045 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1046 dma-names = "tx", "rx"; 1047 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1048 resets = <&cpg 204>; 1049 status = "disabled"; 1050 }; 1051 1052 scif4: serial@e6c40000 { 1053 compatible = "renesas,scif-r8a77965", 1054 "renesas,rcar-gen3-scif", "renesas,scif"; 1055 reg = <0 0xe6c40000 0 64>; 1056 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1057 clocks = <&cpg CPG_MOD 203>, 1058 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1059 <&scif_clk>; 1060 clock-names = "fck", "brg_int", "scif_clk"; 1061 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1062 dma-names = "tx", "rx"; 1063 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1064 resets = <&cpg 203>; 1065 status = "disabled"; 1066 }; 1067 1068 scif5: serial@e6f30000 { 1069 compatible = "renesas,scif-r8a77965", 1070 "renesas,rcar-gen3-scif", "renesas,scif"; 1071 reg = <0 0xe6f30000 0 64>; 1072 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1073 clocks = <&cpg CPG_MOD 202>, 1074 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1075 <&scif_clk>; 1076 clock-names = "fck", "brg_int", "scif_clk"; 1077 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1078 <&dmac2 0x5b>, <&dmac2 0x5a>; 1079 dma-names = "tx", "rx", "tx", "rx"; 1080 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1081 resets = <&cpg 202>; 1082 status = "disabled"; 1083 }; 1084 1085 msiof0: spi@e6e90000 { 1086 compatible = "renesas,msiof-r8a77965", 1087 "renesas,rcar-gen3-msiof"; 1088 reg = <0 0xe6e90000 0 0x0064>; 1089 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1090 clocks = <&cpg CPG_MOD 211>; 1091 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1092 <&dmac2 0x41>, <&dmac2 0x40>; 1093 dma-names = "tx", "rx", "tx", "rx"; 1094 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1095 resets = <&cpg 211>; 1096 #address-cells = <1>; 1097 #size-cells = <0>; 1098 status = "disabled"; 1099 }; 1100 1101 msiof1: spi@e6ea0000 { 1102 compatible = "renesas,msiof-r8a77965", 1103 "renesas,rcar-gen3-msiof"; 1104 reg = <0 0xe6ea0000 0 0x0064>; 1105 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1106 clocks = <&cpg CPG_MOD 210>; 1107 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1108 <&dmac2 0x43>, <&dmac2 0x42>; 1109 dma-names = "tx", "rx", "tx", "rx"; 1110 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1111 resets = <&cpg 210>; 1112 #address-cells = <1>; 1113 #size-cells = <0>; 1114 status = "disabled"; 1115 }; 1116 1117 msiof2: spi@e6c00000 { 1118 compatible = "renesas,msiof-r8a77965", 1119 "renesas,rcar-gen3-msiof"; 1120 reg = <0 0xe6c00000 0 0x0064>; 1121 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1122 clocks = <&cpg CPG_MOD 209>; 1123 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1124 dma-names = "tx", "rx"; 1125 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1126 resets = <&cpg 209>; 1127 #address-cells = <1>; 1128 #size-cells = <0>; 1129 status = "disabled"; 1130 }; 1131 1132 msiof3: spi@e6c10000 { 1133 compatible = "renesas,msiof-r8a77965", 1134 "renesas,rcar-gen3-msiof"; 1135 reg = <0 0xe6c10000 0 0x0064>; 1136 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1137 clocks = <&cpg CPG_MOD 208>; 1138 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1139 dma-names = "tx", "rx"; 1140 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1141 resets = <&cpg 208>; 1142 #address-cells = <1>; 1143 #size-cells = <0>; 1144 status = "disabled"; 1145 }; 1146 1147 vin0: video@e6ef0000 { 1148 compatible = "renesas,vin-r8a77965"; 1149 reg = <0 0xe6ef0000 0 0x1000>; 1150 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1151 clocks = <&cpg CPG_MOD 811>; 1152 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1153 resets = <&cpg 811>; 1154 renesas,id = <0>; 1155 status = "disabled"; 1156 1157 ports { 1158 #address-cells = <1>; 1159 #size-cells = <0>; 1160 1161 port@1 { 1162 #address-cells = <1>; 1163 #size-cells = <0>; 1164 1165 reg = <1>; 1166 1167 vin0csi20: endpoint@0 { 1168 reg = <0>; 1169 remote-endpoint = <&csi20vin0>; 1170 }; 1171 vin0csi40: endpoint@2 { 1172 reg = <2>; 1173 remote-endpoint = <&csi40vin0>; 1174 }; 1175 }; 1176 }; 1177 }; 1178 1179 vin1: video@e6ef1000 { 1180 compatible = "renesas,vin-r8a77965"; 1181 reg = <0 0xe6ef1000 0 0x1000>; 1182 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1183 clocks = <&cpg CPG_MOD 810>; 1184 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1185 resets = <&cpg 810>; 1186 renesas,id = <1>; 1187 status = "disabled"; 1188 1189 ports { 1190 #address-cells = <1>; 1191 #size-cells = <0>; 1192 1193 port@1 { 1194 #address-cells = <1>; 1195 #size-cells = <0>; 1196 1197 reg = <1>; 1198 1199 vin1csi20: endpoint@0 { 1200 reg = <0>; 1201 remote-endpoint = <&csi20vin1>; 1202 }; 1203 vin1csi40: endpoint@2 { 1204 reg = <2>; 1205 remote-endpoint = <&csi40vin1>; 1206 }; 1207 }; 1208 }; 1209 }; 1210 1211 vin2: video@e6ef2000 { 1212 compatible = "renesas,vin-r8a77965"; 1213 reg = <0 0xe6ef2000 0 0x1000>; 1214 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1215 clocks = <&cpg CPG_MOD 809>; 1216 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1217 resets = <&cpg 809>; 1218 renesas,id = <2>; 1219 status = "disabled"; 1220 1221 ports { 1222 #address-cells = <1>; 1223 #size-cells = <0>; 1224 1225 port@1 { 1226 #address-cells = <1>; 1227 #size-cells = <0>; 1228 1229 reg = <1>; 1230 1231 vin2csi20: endpoint@0 { 1232 reg = <0>; 1233 remote-endpoint = <&csi20vin2>; 1234 }; 1235 vin2csi40: endpoint@2 { 1236 reg = <2>; 1237 remote-endpoint = <&csi40vin2>; 1238 }; 1239 }; 1240 }; 1241 }; 1242 1243 vin3: video@e6ef3000 { 1244 compatible = "renesas,vin-r8a77965"; 1245 reg = <0 0xe6ef3000 0 0x1000>; 1246 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1247 clocks = <&cpg CPG_MOD 808>; 1248 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1249 resets = <&cpg 808>; 1250 renesas,id = <3>; 1251 status = "disabled"; 1252 1253 ports { 1254 #address-cells = <1>; 1255 #size-cells = <0>; 1256 1257 port@1 { 1258 #address-cells = <1>; 1259 #size-cells = <0>; 1260 1261 reg = <1>; 1262 1263 vin3csi20: endpoint@0 { 1264 reg = <0>; 1265 remote-endpoint = <&csi20vin3>; 1266 }; 1267 vin3csi40: endpoint@2 { 1268 reg = <2>; 1269 remote-endpoint = <&csi40vin3>; 1270 }; 1271 }; 1272 }; 1273 }; 1274 1275 vin4: video@e6ef4000 { 1276 compatible = "renesas,vin-r8a77965"; 1277 reg = <0 0xe6ef4000 0 0x1000>; 1278 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1279 clocks = <&cpg CPG_MOD 807>; 1280 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1281 resets = <&cpg 807>; 1282 renesas,id = <4>; 1283 status = "disabled"; 1284 1285 ports { 1286 #address-cells = <1>; 1287 #size-cells = <0>; 1288 1289 port@1 { 1290 #address-cells = <1>; 1291 #size-cells = <0>; 1292 1293 reg = <1>; 1294 1295 vin4csi20: endpoint@0 { 1296 reg = <0>; 1297 remote-endpoint = <&csi20vin4>; 1298 }; 1299 vin4csi40: endpoint@2 { 1300 reg = <2>; 1301 remote-endpoint = <&csi40vin4>; 1302 }; 1303 }; 1304 }; 1305 }; 1306 1307 vin5: video@e6ef5000 { 1308 compatible = "renesas,vin-r8a77965"; 1309 reg = <0 0xe6ef5000 0 0x1000>; 1310 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1311 clocks = <&cpg CPG_MOD 806>; 1312 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1313 resets = <&cpg 806>; 1314 renesas,id = <5>; 1315 status = "disabled"; 1316 1317 ports { 1318 #address-cells = <1>; 1319 #size-cells = <0>; 1320 1321 port@1 { 1322 #address-cells = <1>; 1323 #size-cells = <0>; 1324 1325 reg = <1>; 1326 1327 vin5csi20: endpoint@0 { 1328 reg = <0>; 1329 remote-endpoint = <&csi20vin5>; 1330 }; 1331 vin5csi40: endpoint@2 { 1332 reg = <2>; 1333 remote-endpoint = <&csi40vin5>; 1334 }; 1335 }; 1336 }; 1337 }; 1338 1339 vin6: video@e6ef6000 { 1340 compatible = "renesas,vin-r8a77965"; 1341 reg = <0 0xe6ef6000 0 0x1000>; 1342 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1343 clocks = <&cpg CPG_MOD 805>; 1344 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1345 resets = <&cpg 805>; 1346 renesas,id = <6>; 1347 status = "disabled"; 1348 1349 ports { 1350 #address-cells = <1>; 1351 #size-cells = <0>; 1352 1353 port@1 { 1354 #address-cells = <1>; 1355 #size-cells = <0>; 1356 1357 reg = <1>; 1358 1359 vin6csi20: endpoint@0 { 1360 reg = <0>; 1361 remote-endpoint = <&csi20vin6>; 1362 }; 1363 vin6csi40: endpoint@2 { 1364 reg = <2>; 1365 remote-endpoint = <&csi40vin6>; 1366 }; 1367 }; 1368 }; 1369 }; 1370 1371 vin7: video@e6ef7000 { 1372 compatible = "renesas,vin-r8a77965"; 1373 reg = <0 0xe6ef7000 0 0x1000>; 1374 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1375 clocks = <&cpg CPG_MOD 804>; 1376 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1377 resets = <&cpg 804>; 1378 renesas,id = <7>; 1379 status = "disabled"; 1380 1381 ports { 1382 #address-cells = <1>; 1383 #size-cells = <0>; 1384 1385 port@1 { 1386 #address-cells = <1>; 1387 #size-cells = <0>; 1388 1389 reg = <1>; 1390 1391 vin7csi20: endpoint@0 { 1392 reg = <0>; 1393 remote-endpoint = <&csi20vin7>; 1394 }; 1395 vin7csi40: endpoint@2 { 1396 reg = <2>; 1397 remote-endpoint = <&csi40vin7>; 1398 }; 1399 }; 1400 }; 1401 }; 1402 1403 rcar_sound: sound@ec500000 { 1404 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1405 <0 0xec5a0000 0 0x100>, /* ADG */ 1406 <0 0xec540000 0 0x1000>, /* SSIU */ 1407 <0 0xec541000 0 0x280>, /* SSI */ 1408 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1409 /* placeholder */ 1410 1411 rcar_sound,dvc { 1412 dvc0: dvc-0 { 1413 }; 1414 dvc1: dvc-1 { 1415 }; 1416 }; 1417 1418 rcar_sound,src { 1419 src0: src-0 { 1420 }; 1421 src1: src-1 { 1422 }; 1423 }; 1424 1425 rcar_sound,ssi { 1426 ssi0: ssi-0 { 1427 }; 1428 ssi1: ssi-1 { 1429 }; 1430 }; 1431 1432 ports { 1433 #address-cells = <1>; 1434 #size-cells = <0>; 1435 port@0 { 1436 reg = <0>; 1437 }; 1438 port@1 { 1439 reg = <1>; 1440 }; 1441 }; 1442 }; 1443 1444 xhci0: usb@ee000000 { 1445 compatible = "renesas,xhci-r8a77965", 1446 "renesas,rcar-gen3-xhci"; 1447 reg = <0 0xee000000 0 0xc00>; 1448 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1449 clocks = <&cpg CPG_MOD 328>; 1450 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1451 resets = <&cpg 328>; 1452 status = "disabled"; 1453 }; 1454 1455 usb3_peri0: usb@ee020000 { 1456 compatible = "renesas,r8a77965-usb3-peri", 1457 "renesas,rcar-gen3-usb3-peri"; 1458 reg = <0 0xee020000 0 0x400>; 1459 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1460 clocks = <&cpg CPG_MOD 328>; 1461 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1462 resets = <&cpg 328>; 1463 status = "disabled"; 1464 }; 1465 1466 ohci0: usb@ee080000 { 1467 compatible = "generic-ohci"; 1468 reg = <0 0xee080000 0 0x100>; 1469 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1470 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1471 phys = <&usb2_phy0>; 1472 phy-names = "usb"; 1473 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1474 resets = <&cpg 703>, <&cpg 704>; 1475 status = "disabled"; 1476 }; 1477 1478 ohci1: usb@ee0a0000 { 1479 compatible = "generic-ohci"; 1480 reg = <0 0xee0a0000 0 0x100>; 1481 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1482 clocks = <&cpg CPG_MOD 702>; 1483 phys = <&usb2_phy1>; 1484 phy-names = "usb"; 1485 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1486 resets = <&cpg 702>; 1487 status = "disabled"; 1488 }; 1489 1490 ehci0: usb@ee080100 { 1491 compatible = "generic-ehci"; 1492 reg = <0 0xee080100 0 0x100>; 1493 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1494 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1495 phys = <&usb2_phy0>; 1496 phy-names = "usb"; 1497 companion = <&ohci0>; 1498 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1499 resets = <&cpg 703>, <&cpg 704>; 1500 status = "disabled"; 1501 }; 1502 1503 ehci1: usb@ee0a0100 { 1504 compatible = "generic-ehci"; 1505 reg = <0 0xee0a0100 0 0x100>; 1506 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1507 clocks = <&cpg CPG_MOD 702>; 1508 phys = <&usb2_phy1>; 1509 phy-names = "usb"; 1510 companion = <&ohci1>; 1511 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1512 resets = <&cpg 702>; 1513 status = "disabled"; 1514 }; 1515 1516 usb2_phy0: usb-phy@ee080200 { 1517 compatible = "renesas,usb2-phy-r8a77965", 1518 "renesas,rcar-gen3-usb2-phy"; 1519 reg = <0 0xee080200 0 0x700>; 1520 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1521 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1522 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1523 resets = <&cpg 703>, <&cpg 704>; 1524 #phy-cells = <0>; 1525 status = "disabled"; 1526 }; 1527 1528 usb2_phy1: usb-phy@ee0a0200 { 1529 compatible = "renesas,usb2-phy-r8a77965", 1530 "renesas,rcar-gen3-usb2-phy"; 1531 reg = <0 0xee0a0200 0 0x700>; 1532 clocks = <&cpg CPG_MOD 702>; 1533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1534 resets = <&cpg 702>; 1535 #phy-cells = <0>; 1536 status = "disabled"; 1537 }; 1538 1539 sdhi0: sd@ee100000 { 1540 compatible = "renesas,sdhi-r8a77965", 1541 "renesas,rcar-gen3-sdhi"; 1542 reg = <0 0xee100000 0 0x2000>; 1543 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1544 clocks = <&cpg CPG_MOD 314>; 1545 max-frequency = <200000000>; 1546 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1547 resets = <&cpg 314>; 1548 status = "disabled"; 1549 }; 1550 1551 sdhi1: sd@ee120000 { 1552 compatible = "renesas,sdhi-r8a77965", 1553 "renesas,rcar-gen3-sdhi"; 1554 reg = <0 0xee120000 0 0x2000>; 1555 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1556 clocks = <&cpg CPG_MOD 313>; 1557 max-frequency = <200000000>; 1558 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1559 resets = <&cpg 313>; 1560 status = "disabled"; 1561 }; 1562 1563 sdhi2: sd@ee140000 { 1564 compatible = "renesas,sdhi-r8a77965", 1565 "renesas,rcar-gen3-sdhi"; 1566 reg = <0 0xee140000 0 0x2000>; 1567 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1568 clocks = <&cpg CPG_MOD 312>; 1569 max-frequency = <200000000>; 1570 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1571 resets = <&cpg 312>; 1572 status = "disabled"; 1573 }; 1574 1575 sdhi3: sd@ee160000 { 1576 compatible = "renesas,sdhi-r8a77965", 1577 "renesas,rcar-gen3-sdhi"; 1578 reg = <0 0xee160000 0 0x2000>; 1579 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1580 clocks = <&cpg CPG_MOD 311>; 1581 max-frequency = <200000000>; 1582 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1583 resets = <&cpg 311>; 1584 status = "disabled"; 1585 }; 1586 1587 sata: sata@ee300000 { 1588 compatible = "renesas,sata-r8a77965", 1589 "renesas,rcar-gen3-sata"; 1590 reg = <0 0xee300000 0 0x200000>; 1591 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1592 clocks = <&cpg CPG_MOD 815>; 1593 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1594 resets = <&cpg 815>; 1595 status = "disabled"; 1596 }; 1597 1598 gic: interrupt-controller@f1010000 { 1599 compatible = "arm,gic-400"; 1600 #interrupt-cells = <3>; 1601 #address-cells = <0>; 1602 interrupt-controller; 1603 reg = <0x0 0xf1010000 0 0x1000>, 1604 <0x0 0xf1020000 0 0x20000>, 1605 <0x0 0xf1040000 0 0x20000>, 1606 <0x0 0xf1060000 0 0x20000>; 1607 interrupts = <GIC_PPI 9 1608 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1609 clocks = <&cpg CPG_MOD 408>; 1610 clock-names = "clk"; 1611 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1612 resets = <&cpg 408>; 1613 }; 1614 1615 pciec0: pcie@fe000000 { 1616 compatible = "renesas,pcie-r8a77965", 1617 "renesas,pcie-rcar-gen3"; 1618 reg = <0 0xfe000000 0 0x80000>; 1619 #address-cells = <3>; 1620 #size-cells = <2>; 1621 bus-range = <0x00 0xff>; 1622 device_type = "pci"; 1623 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1624 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1625 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1626 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1627 /* Map all possible DDR as inbound ranges */ 1628 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1629 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1630 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1631 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1632 #interrupt-cells = <1>; 1633 interrupt-map-mask = <0 0 0 0>; 1634 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1635 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1636 clock-names = "pcie", "pcie_bus"; 1637 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1638 resets = <&cpg 319>; 1639 status = "disabled"; 1640 }; 1641 1642 pciec1: pcie@ee800000 { 1643 compatible = "renesas,pcie-r8a77965", 1644 "renesas,pcie-rcar-gen3"; 1645 reg = <0 0xee800000 0 0x80000>; 1646 #address-cells = <3>; 1647 #size-cells = <2>; 1648 bus-range = <0x00 0xff>; 1649 device_type = "pci"; 1650 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 1651 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 1652 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 1653 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 1654 /* Map all possible DDR as inbound ranges */ 1655 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1656 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 1657 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 1658 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 1659 #interrupt-cells = <1>; 1660 interrupt-map-mask = <0 0 0 0>; 1661 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1662 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 1663 clock-names = "pcie", "pcie_bus"; 1664 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1665 resets = <&cpg 318>; 1666 status = "disabled"; 1667 }; 1668 1669 fdp1@fe940000 { 1670 compatible = "renesas,fdp1"; 1671 reg = <0 0xfe940000 0 0x2400>; 1672 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1673 clocks = <&cpg CPG_MOD 119>; 1674 power-domains = <&sysc R8A77965_PD_A3VP>; 1675 resets = <&cpg 119>; 1676 renesas,fcp = <&fcpf0>; 1677 }; 1678 1679 fcpf0: fcp@fe950000 { 1680 compatible = "renesas,fcpf"; 1681 reg = <0 0xfe950000 0 0x200>; 1682 clocks = <&cpg CPG_MOD 615>; 1683 power-domains = <&sysc R8A77965_PD_A3VP>; 1684 resets = <&cpg 615>; 1685 }; 1686 1687 vspb: vsp@fe960000 { 1688 compatible = "renesas,vsp2"; 1689 reg = <0 0xfe960000 0 0x8000>; 1690 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1691 clocks = <&cpg CPG_MOD 626>; 1692 power-domains = <&sysc R8A77965_PD_A3VP>; 1693 resets = <&cpg 626>; 1694 1695 renesas,fcp = <&fcpvb0>; 1696 }; 1697 1698 fcpvb0: fcp@fe96f000 { 1699 compatible = "renesas,fcpv"; 1700 reg = <0 0xfe96f000 0 0x200>; 1701 clocks = <&cpg CPG_MOD 607>; 1702 power-domains = <&sysc R8A77965_PD_A3VP>; 1703 resets = <&cpg 607>; 1704 }; 1705 1706 vspi0: vsp@fe9a0000 { 1707 compatible = "renesas,vsp2"; 1708 reg = <0 0xfe9a0000 0 0x8000>; 1709 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1710 clocks = <&cpg CPG_MOD 631>; 1711 power-domains = <&sysc R8A77965_PD_A3VP>; 1712 resets = <&cpg 631>; 1713 1714 renesas,fcp = <&fcpvi0>; 1715 }; 1716 1717 fcpvi0: fcp@fe9af000 { 1718 compatible = "renesas,fcpv"; 1719 reg = <0 0xfe9af000 0 0x200>; 1720 clocks = <&cpg CPG_MOD 611>; 1721 power-domains = <&sysc R8A77965_PD_A3VP>; 1722 resets = <&cpg 611>; 1723 }; 1724 1725 vspd0: vsp@fea20000 { 1726 compatible = "renesas,vsp2"; 1727 reg = <0 0xfea20000 0 0x5000>; 1728 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1729 clocks = <&cpg CPG_MOD 623>; 1730 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1731 resets = <&cpg 623>; 1732 1733 renesas,fcp = <&fcpvd0>; 1734 }; 1735 1736 fcpvd0: fcp@fea27000 { 1737 compatible = "renesas,fcpv"; 1738 reg = <0 0xfea27000 0 0x200>; 1739 clocks = <&cpg CPG_MOD 603>; 1740 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1741 resets = <&cpg 603>; 1742 }; 1743 1744 vspd1: vsp@fea28000 { 1745 compatible = "renesas,vsp2"; 1746 reg = <0 0xfea28000 0 0x5000>; 1747 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1748 clocks = <&cpg CPG_MOD 622>; 1749 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1750 resets = <&cpg 622>; 1751 1752 renesas,fcp = <&fcpvd1>; 1753 }; 1754 1755 fcpvd1: fcp@fea2f000 { 1756 compatible = "renesas,fcpv"; 1757 reg = <0 0xfea2f000 0 0x200>; 1758 clocks = <&cpg CPG_MOD 602>; 1759 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1760 resets = <&cpg 602>; 1761 }; 1762 1763 csi20: csi2@fea80000 { 1764 compatible = "renesas,r8a77965-csi2"; 1765 reg = <0 0xfea80000 0 0x10000>; 1766 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1767 clocks = <&cpg CPG_MOD 714>; 1768 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1769 resets = <&cpg 714>; 1770 status = "disabled"; 1771 1772 ports { 1773 #address-cells = <1>; 1774 #size-cells = <0>; 1775 1776 port@1 { 1777 #address-cells = <1>; 1778 #size-cells = <0>; 1779 1780 reg = <1>; 1781 1782 csi20vin0: endpoint@0 { 1783 reg = <0>; 1784 remote-endpoint = <&vin0csi20>; 1785 }; 1786 csi20vin1: endpoint@1 { 1787 reg = <1>; 1788 remote-endpoint = <&vin1csi20>; 1789 }; 1790 csi20vin2: endpoint@2 { 1791 reg = <2>; 1792 remote-endpoint = <&vin2csi20>; 1793 }; 1794 csi20vin3: endpoint@3 { 1795 reg = <3>; 1796 remote-endpoint = <&vin3csi20>; 1797 }; 1798 csi20vin4: endpoint@4 { 1799 reg = <4>; 1800 remote-endpoint = <&vin4csi20>; 1801 }; 1802 csi20vin5: endpoint@5 { 1803 reg = <5>; 1804 remote-endpoint = <&vin5csi20>; 1805 }; 1806 csi20vin6: endpoint@6 { 1807 reg = <6>; 1808 remote-endpoint = <&vin6csi20>; 1809 }; 1810 csi20vin7: endpoint@7 { 1811 reg = <7>; 1812 remote-endpoint = <&vin7csi20>; 1813 }; 1814 }; 1815 }; 1816 }; 1817 1818 csi40: csi2@feaa0000 { 1819 compatible = "renesas,r8a77965-csi2"; 1820 reg = <0 0xfeaa0000 0 0x10000>; 1821 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1822 clocks = <&cpg CPG_MOD 716>; 1823 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1824 resets = <&cpg 716>; 1825 status = "disabled"; 1826 1827 ports { 1828 #address-cells = <1>; 1829 #size-cells = <0>; 1830 1831 port@1 { 1832 #address-cells = <1>; 1833 #size-cells = <0>; 1834 1835 reg = <1>; 1836 1837 csi40vin0: endpoint@0 { 1838 reg = <0>; 1839 remote-endpoint = <&vin0csi40>; 1840 }; 1841 csi40vin1: endpoint@1 { 1842 reg = <1>; 1843 remote-endpoint = <&vin1csi40>; 1844 }; 1845 csi40vin2: endpoint@2 { 1846 reg = <2>; 1847 remote-endpoint = <&vin2csi40>; 1848 }; 1849 csi40vin3: endpoint@3 { 1850 reg = <3>; 1851 remote-endpoint = <&vin3csi40>; 1852 }; 1853 csi40vin4: endpoint@4 { 1854 reg = <4>; 1855 remote-endpoint = <&vin4csi40>; 1856 }; 1857 csi40vin5: endpoint@5 { 1858 reg = <5>; 1859 remote-endpoint = <&vin5csi40>; 1860 }; 1861 csi40vin6: endpoint@6 { 1862 reg = <6>; 1863 remote-endpoint = <&vin6csi40>; 1864 }; 1865 csi40vin7: endpoint@7 { 1866 reg = <7>; 1867 remote-endpoint = <&vin7csi40>; 1868 }; 1869 }; 1870 }; 1871 }; 1872 1873 hdmi0: hdmi@fead0000 { 1874 compatible = "renesas,r8a77965-hdmi", 1875 "renesas,rcar-gen3-hdmi"; 1876 reg = <0 0xfead0000 0 0x10000>; 1877 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 1878 clocks = <&cpg CPG_MOD 729>, 1879 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 1880 clock-names = "iahb", "isfr"; 1881 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1882 resets = <&cpg 729>; 1883 status = "disabled"; 1884 1885 ports { 1886 #address-cells = <1>; 1887 #size-cells = <0>; 1888 port@0 { 1889 reg = <0>; 1890 dw_hdmi0_in: endpoint { 1891 remote-endpoint = <&du_out_hdmi0>; 1892 }; 1893 }; 1894 port@1 { 1895 reg = <1>; 1896 }; 1897 }; 1898 }; 1899 1900 du: display@feb00000 { 1901 compatible = "renesas,du-r8a77965"; 1902 reg = <0 0xfeb00000 0 0x80000>; 1903 reg-names = "du"; 1904 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1905 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 1906 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 1907 clocks = <&cpg CPG_MOD 724>, 1908 <&cpg CPG_MOD 723>, 1909 <&cpg CPG_MOD 721>; 1910 clock-names = "du.0", "du.1", "du.3"; 1911 status = "disabled"; 1912 1913 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; 1914 1915 ports { 1916 #address-cells = <1>; 1917 #size-cells = <0>; 1918 1919 port@0 { 1920 reg = <0>; 1921 du_out_rgb: endpoint { 1922 }; 1923 }; 1924 port@1 { 1925 reg = <1>; 1926 du_out_hdmi0: endpoint { 1927 remote-endpoint = <&dw_hdmi0_in>; 1928 }; 1929 }; 1930 port@2 { 1931 reg = <2>; 1932 du_out_lvds0: endpoint { 1933 }; 1934 }; 1935 }; 1936 }; 1937 1938 prr: chipid@fff00044 { 1939 compatible = "renesas,prr"; 1940 reg = <0 0xfff00044 0 4>; 1941 }; 1942 }; 1943 1944 thermal-zones { 1945 sensor_thermal1: sensor-thermal1 { 1946 polling-delay-passive = <250>; 1947 polling-delay = <1000>; 1948 thermal-sensors = <&tsc 0>; 1949 1950 trips { 1951 sensor1_crit: sensor1-crit { 1952 temperature = <120000>; 1953 hysteresis = <1000>; 1954 type = "critical"; 1955 }; 1956 }; 1957 }; 1958 1959 sensor_thermal2: sensor-thermal2 { 1960 polling-delay-passive = <250>; 1961 polling-delay = <1000>; 1962 thermal-sensors = <&tsc 1>; 1963 1964 trips { 1965 sensor2_crit: sensor2-crit { 1966 temperature = <120000>; 1967 hysteresis = <1000>; 1968 type = "critical"; 1969 }; 1970 }; 1971 }; 1972 1973 sensor_thermal3: sensor-thermal3 { 1974 polling-delay-passive = <250>; 1975 polling-delay = <1000>; 1976 thermal-sensors = <&tsc 2>; 1977 1978 trips { 1979 sensor3_crit: sensor3-crit { 1980 temperature = <120000>; 1981 hysteresis = <1000>; 1982 type = "critical"; 1983 }; 1984 }; 1985 }; 1986 }; 1987 1988 timer { 1989 compatible = "arm,armv8-timer"; 1990 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1991 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1992 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1993 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1994 }; 1995 1996 /* External USB clocks - can be overridden by the board */ 1997 usb3s0_clk: usb3s0 { 1998 compatible = "fixed-clock"; 1999 #clock-cells = <0>; 2000 clock-frequency = <0>; 2001 }; 2002 2003 usb_extal_clk: usb_extal { 2004 compatible = "fixed-clock"; 2005 #clock-cells = <0>; 2006 clock-frequency = <0>; 2007 }; 2008}; 2009