1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4 16 17#define SOC_HAS_SATA 18 19/ { 20 compatible = "renesas,r8a77965"; 21 #address-cells = <2>; 22 #size-cells = <2>; 23 24 aliases { 25 i2c0 = &i2c0; 26 i2c1 = &i2c1; 27 i2c2 = &i2c2; 28 i2c3 = &i2c3; 29 i2c4 = &i2c4; 30 i2c5 = &i2c5; 31 i2c6 = &i2c6; 32 i2c7 = &i2c_dvfs; 33 }; 34 35 /* 36 * The external audio clocks are configured as 0 Hz fixed frequency 37 * clocks by default. 38 * Boards that provide audio clocks should override them. 39 */ 40 audio_clk_a: audio_clk_a { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <0>; 44 }; 45 46 audio_clk_b: audio_clk_b { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 50 }; 51 52 audio_clk_c: audio_clk_c { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 /* External CAN clock - to be overridden by boards that provide it */ 59 can_clk: can { 60 compatible = "fixed-clock"; 61 #clock-cells = <0>; 62 clock-frequency = <0>; 63 }; 64 65 cluster0_opp: opp-table-0 { 66 compatible = "operating-points-v2"; 67 opp-shared; 68 69 opp-500000000 { 70 opp-hz = /bits/ 64 <500000000>; 71 opp-microvolt = <830000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1000000000 { 75 opp-hz = /bits/ 64 <1000000000>; 76 opp-microvolt = <830000>; 77 clock-latency-ns = <300000>; 78 }; 79 opp-1500000000 { 80 opp-hz = /bits/ 64 <1500000000>; 81 opp-microvolt = <830000>; 82 clock-latency-ns = <300000>; 83 opp-suspend; 84 }; 85 opp-1600000000 { 86 opp-hz = /bits/ 64 <1600000000>; 87 opp-microvolt = <900000>; 88 clock-latency-ns = <300000>; 89 turbo-mode; 90 }; 91 opp-1700000000 { 92 opp-hz = /bits/ 64 <1700000000>; 93 opp-microvolt = <900000>; 94 clock-latency-ns = <300000>; 95 turbo-mode; 96 }; 97 opp-1800000000 { 98 opp-hz = /bits/ 64 <1800000000>; 99 opp-microvolt = <960000>; 100 clock-latency-ns = <300000>; 101 turbo-mode; 102 }; 103 }; 104 105 cpus { 106 #address-cells = <1>; 107 #size-cells = <0>; 108 109 a57_0: cpu@0 { 110 compatible = "arm,cortex-a57"; 111 reg = <0x0>; 112 device_type = "cpu"; 113 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 114 next-level-cache = <&L2_CA57>; 115 enable-method = "psci"; 116 cpu-idle-states = <&CPU_SLEEP_0>; 117 #cooling-cells = <2>; 118 dynamic-power-coefficient = <854>; 119 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 120 operating-points-v2 = <&cluster0_opp>; 121 }; 122 123 a57_1: cpu@1 { 124 compatible = "arm,cortex-a57"; 125 reg = <0x1>; 126 device_type = "cpu"; 127 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 128 next-level-cache = <&L2_CA57>; 129 enable-method = "psci"; 130 cpu-idle-states = <&CPU_SLEEP_0>; 131 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 132 operating-points-v2 = <&cluster0_opp>; 133 }; 134 135 L2_CA57: cache-controller-0 { 136 compatible = "cache"; 137 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 138 cache-unified; 139 cache-level = <2>; 140 }; 141 142 idle-states { 143 entry-method = "psci"; 144 145 CPU_SLEEP_0: cpu-sleep-0 { 146 compatible = "arm,idle-state"; 147 arm,psci-suspend-param = <0x0010000>; 148 local-timer-stop; 149 entry-latency-us = <400>; 150 exit-latency-us = <500>; 151 min-residency-us = <4000>; 152 }; 153 }; 154 }; 155 156 extal_clk: extal { 157 compatible = "fixed-clock"; 158 #clock-cells = <0>; 159 /* This value must be overridden by the board */ 160 clock-frequency = <0>; 161 }; 162 163 extalr_clk: extalr { 164 compatible = "fixed-clock"; 165 #clock-cells = <0>; 166 /* This value must be overridden by the board */ 167 clock-frequency = <0>; 168 }; 169 170 /* External PCIe clock - can be overridden by the board */ 171 pcie_bus_clk: pcie_bus { 172 compatible = "fixed-clock"; 173 #clock-cells = <0>; 174 clock-frequency = <0>; 175 }; 176 177 pmu_a57 { 178 compatible = "arm,cortex-a57-pmu"; 179 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 180 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 181 interrupt-affinity = <&a57_0>, 182 <&a57_1>; 183 }; 184 185 psci { 186 compatible = "arm,psci-1.0", "arm,psci-0.2"; 187 method = "smc"; 188 }; 189 190 /* External SCIF clock - to be overridden by boards that provide it */ 191 scif_clk: scif { 192 compatible = "fixed-clock"; 193 #clock-cells = <0>; 194 clock-frequency = <0>; 195 }; 196 197 soc { 198 compatible = "simple-bus"; 199 interrupt-parent = <&gic>; 200 #address-cells = <2>; 201 #size-cells = <2>; 202 ranges; 203 204 rwdt: watchdog@e6020000 { 205 compatible = "renesas,r8a77965-wdt", 206 "renesas,rcar-gen3-wdt"; 207 reg = <0 0xe6020000 0 0x0c>; 208 clocks = <&cpg CPG_MOD 402>; 209 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 210 resets = <&cpg 402>; 211 status = "disabled"; 212 }; 213 214 gpio0: gpio@e6050000 { 215 compatible = "renesas,gpio-r8a77965", 216 "renesas,rcar-gen3-gpio"; 217 reg = <0 0xe6050000 0 0x50>; 218 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 219 #gpio-cells = <2>; 220 gpio-controller; 221 gpio-ranges = <&pfc 0 0 16>; 222 #interrupt-cells = <2>; 223 interrupt-controller; 224 clocks = <&cpg CPG_MOD 912>; 225 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 226 resets = <&cpg 912>; 227 }; 228 229 gpio1: gpio@e6051000 { 230 compatible = "renesas,gpio-r8a77965", 231 "renesas,rcar-gen3-gpio"; 232 reg = <0 0xe6051000 0 0x50>; 233 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 234 #gpio-cells = <2>; 235 gpio-controller; 236 gpio-ranges = <&pfc 0 32 29>; 237 #interrupt-cells = <2>; 238 interrupt-controller; 239 clocks = <&cpg CPG_MOD 911>; 240 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 241 resets = <&cpg 911>; 242 }; 243 244 gpio2: gpio@e6052000 { 245 compatible = "renesas,gpio-r8a77965", 246 "renesas,rcar-gen3-gpio"; 247 reg = <0 0xe6052000 0 0x50>; 248 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 249 #gpio-cells = <2>; 250 gpio-controller; 251 gpio-ranges = <&pfc 0 64 15>; 252 #interrupt-cells = <2>; 253 interrupt-controller; 254 clocks = <&cpg CPG_MOD 910>; 255 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 256 resets = <&cpg 910>; 257 }; 258 259 gpio3: gpio@e6053000 { 260 compatible = "renesas,gpio-r8a77965", 261 "renesas,rcar-gen3-gpio"; 262 reg = <0 0xe6053000 0 0x50>; 263 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 264 #gpio-cells = <2>; 265 gpio-controller; 266 gpio-ranges = <&pfc 0 96 16>; 267 #interrupt-cells = <2>; 268 interrupt-controller; 269 clocks = <&cpg CPG_MOD 909>; 270 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 271 resets = <&cpg 909>; 272 }; 273 274 gpio4: gpio@e6054000 { 275 compatible = "renesas,gpio-r8a77965", 276 "renesas,rcar-gen3-gpio"; 277 reg = <0 0xe6054000 0 0x50>; 278 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 279 #gpio-cells = <2>; 280 gpio-controller; 281 gpio-ranges = <&pfc 0 128 18>; 282 #interrupt-cells = <2>; 283 interrupt-controller; 284 clocks = <&cpg CPG_MOD 908>; 285 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 286 resets = <&cpg 908>; 287 }; 288 289 gpio5: gpio@e6055000 { 290 compatible = "renesas,gpio-r8a77965", 291 "renesas,rcar-gen3-gpio"; 292 reg = <0 0xe6055000 0 0x50>; 293 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 294 #gpio-cells = <2>; 295 gpio-controller; 296 gpio-ranges = <&pfc 0 160 26>; 297 #interrupt-cells = <2>; 298 interrupt-controller; 299 clocks = <&cpg CPG_MOD 907>; 300 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 301 resets = <&cpg 907>; 302 }; 303 304 gpio6: gpio@e6055400 { 305 compatible = "renesas,gpio-r8a77965", 306 "renesas,rcar-gen3-gpio"; 307 reg = <0 0xe6055400 0 0x50>; 308 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 309 #gpio-cells = <2>; 310 gpio-controller; 311 gpio-ranges = <&pfc 0 192 32>; 312 #interrupt-cells = <2>; 313 interrupt-controller; 314 clocks = <&cpg CPG_MOD 906>; 315 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 316 resets = <&cpg 906>; 317 }; 318 319 gpio7: gpio@e6055800 { 320 compatible = "renesas,gpio-r8a77965", 321 "renesas,rcar-gen3-gpio"; 322 reg = <0 0xe6055800 0 0x50>; 323 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 324 #gpio-cells = <2>; 325 gpio-controller; 326 gpio-ranges = <&pfc 0 224 4>; 327 #interrupt-cells = <2>; 328 interrupt-controller; 329 clocks = <&cpg CPG_MOD 905>; 330 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 331 resets = <&cpg 905>; 332 }; 333 334 pfc: pinctrl@e6060000 { 335 compatible = "renesas,pfc-r8a77965"; 336 reg = <0 0xe6060000 0 0x50c>; 337 }; 338 339 cmt0: timer@e60f0000 { 340 compatible = "renesas,r8a77965-cmt0", 341 "renesas,rcar-gen3-cmt0"; 342 reg = <0 0xe60f0000 0 0x1004>; 343 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 345 clocks = <&cpg CPG_MOD 303>; 346 clock-names = "fck"; 347 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 348 resets = <&cpg 303>; 349 status = "disabled"; 350 }; 351 352 cmt1: timer@e6130000 { 353 compatible = "renesas,r8a77965-cmt1", 354 "renesas,rcar-gen3-cmt1"; 355 reg = <0 0xe6130000 0 0x1004>; 356 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 357 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 364 clocks = <&cpg CPG_MOD 302>; 365 clock-names = "fck"; 366 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 367 resets = <&cpg 302>; 368 status = "disabled"; 369 }; 370 371 cmt2: timer@e6140000 { 372 compatible = "renesas,r8a77965-cmt1", 373 "renesas,rcar-gen3-cmt1"; 374 reg = <0 0xe6140000 0 0x1004>; 375 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 376 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 377 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 378 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 379 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 380 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 381 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 383 clocks = <&cpg CPG_MOD 301>; 384 clock-names = "fck"; 385 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 386 resets = <&cpg 301>; 387 status = "disabled"; 388 }; 389 390 cmt3: timer@e6148000 { 391 compatible = "renesas,r8a77965-cmt1", 392 "renesas,rcar-gen3-cmt1"; 393 reg = <0 0xe6148000 0 0x1004>; 394 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 395 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 402 clocks = <&cpg CPG_MOD 300>; 403 clock-names = "fck"; 404 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 405 resets = <&cpg 300>; 406 status = "disabled"; 407 }; 408 409 cpg: clock-controller@e6150000 { 410 compatible = "renesas,r8a77965-cpg-mssr"; 411 reg = <0 0xe6150000 0 0x1000>; 412 clocks = <&extal_clk>, <&extalr_clk>; 413 clock-names = "extal", "extalr"; 414 #clock-cells = <2>; 415 #power-domain-cells = <0>; 416 #reset-cells = <1>; 417 }; 418 419 rst: reset-controller@e6160000 { 420 compatible = "renesas,r8a77965-rst"; 421 reg = <0 0xe6160000 0 0x0200>; 422 }; 423 424 sysc: system-controller@e6180000 { 425 compatible = "renesas,r8a77965-sysc"; 426 reg = <0 0xe6180000 0 0x0400>; 427 #power-domain-cells = <1>; 428 }; 429 430 tsc: thermal@e6198000 { 431 compatible = "renesas,r8a77965-thermal"; 432 reg = <0 0xe6198000 0 0x100>, 433 <0 0xe61a0000 0 0x100>, 434 <0 0xe61a8000 0 0x100>; 435 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 436 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 437 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 438 clocks = <&cpg CPG_MOD 522>; 439 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 440 resets = <&cpg 522>; 441 #thermal-sensor-cells = <1>; 442 }; 443 444 intc_ex: interrupt-controller@e61c0000 { 445 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 446 #interrupt-cells = <2>; 447 interrupt-controller; 448 reg = <0 0xe61c0000 0 0x200>; 449 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 450 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 451 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 453 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 454 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 455 clocks = <&cpg CPG_MOD 407>; 456 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 457 resets = <&cpg 407>; 458 }; 459 460 tmu0: timer@e61e0000 { 461 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 462 reg = <0 0xe61e0000 0 0x30>; 463 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 464 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 465 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 466 clocks = <&cpg CPG_MOD 125>; 467 clock-names = "fck"; 468 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 469 resets = <&cpg 125>; 470 status = "disabled"; 471 }; 472 473 tmu1: timer@e6fc0000 { 474 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 475 reg = <0 0xe6fc0000 0 0x30>; 476 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 477 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 478 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 479 clocks = <&cpg CPG_MOD 124>; 480 clock-names = "fck"; 481 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 482 resets = <&cpg 124>; 483 status = "disabled"; 484 }; 485 486 tmu2: timer@e6fd0000 { 487 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 488 reg = <0 0xe6fd0000 0 0x30>; 489 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 490 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 492 clocks = <&cpg CPG_MOD 123>; 493 clock-names = "fck"; 494 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 495 resets = <&cpg 123>; 496 status = "disabled"; 497 }; 498 499 tmu3: timer@e6fe0000 { 500 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 501 reg = <0 0xe6fe0000 0 0x30>; 502 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 503 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 504 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 505 clocks = <&cpg CPG_MOD 122>; 506 clock-names = "fck"; 507 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 508 resets = <&cpg 122>; 509 status = "disabled"; 510 }; 511 512 tmu4: timer@ffc00000 { 513 compatible = "renesas,tmu-r8a77965", "renesas,tmu"; 514 reg = <0 0xffc00000 0 0x30>; 515 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 518 clocks = <&cpg CPG_MOD 121>; 519 clock-names = "fck"; 520 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 521 resets = <&cpg 121>; 522 status = "disabled"; 523 }; 524 525 i2c0: i2c@e6500000 { 526 #address-cells = <1>; 527 #size-cells = <0>; 528 compatible = "renesas,i2c-r8a77965", 529 "renesas,rcar-gen3-i2c"; 530 reg = <0 0xe6500000 0 0x40>; 531 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 532 clocks = <&cpg CPG_MOD 931>; 533 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 534 resets = <&cpg 931>; 535 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 536 <&dmac2 0x91>, <&dmac2 0x90>; 537 dma-names = "tx", "rx", "tx", "rx"; 538 i2c-scl-internal-delay-ns = <110>; 539 status = "disabled"; 540 }; 541 542 i2c1: i2c@e6508000 { 543 #address-cells = <1>; 544 #size-cells = <0>; 545 compatible = "renesas,i2c-r8a77965", 546 "renesas,rcar-gen3-i2c"; 547 reg = <0 0xe6508000 0 0x40>; 548 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 549 clocks = <&cpg CPG_MOD 930>; 550 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 551 resets = <&cpg 930>; 552 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 553 <&dmac2 0x93>, <&dmac2 0x92>; 554 dma-names = "tx", "rx", "tx", "rx"; 555 i2c-scl-internal-delay-ns = <6>; 556 status = "disabled"; 557 }; 558 559 i2c2: i2c@e6510000 { 560 #address-cells = <1>; 561 #size-cells = <0>; 562 compatible = "renesas,i2c-r8a77965", 563 "renesas,rcar-gen3-i2c"; 564 reg = <0 0xe6510000 0 0x40>; 565 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 566 clocks = <&cpg CPG_MOD 929>; 567 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 568 resets = <&cpg 929>; 569 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 570 <&dmac2 0x95>, <&dmac2 0x94>; 571 dma-names = "tx", "rx", "tx", "rx"; 572 i2c-scl-internal-delay-ns = <6>; 573 status = "disabled"; 574 }; 575 576 i2c3: i2c@e66d0000 { 577 #address-cells = <1>; 578 #size-cells = <0>; 579 compatible = "renesas,i2c-r8a77965", 580 "renesas,rcar-gen3-i2c"; 581 reg = <0 0xe66d0000 0 0x40>; 582 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 583 clocks = <&cpg CPG_MOD 928>; 584 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 585 resets = <&cpg 928>; 586 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 587 dma-names = "tx", "rx"; 588 i2c-scl-internal-delay-ns = <110>; 589 status = "disabled"; 590 }; 591 592 i2c4: i2c@e66d8000 { 593 #address-cells = <1>; 594 #size-cells = <0>; 595 compatible = "renesas,i2c-r8a77965", 596 "renesas,rcar-gen3-i2c"; 597 reg = <0 0xe66d8000 0 0x40>; 598 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 599 clocks = <&cpg CPG_MOD 927>; 600 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 601 resets = <&cpg 927>; 602 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 603 dma-names = "tx", "rx"; 604 i2c-scl-internal-delay-ns = <110>; 605 status = "disabled"; 606 }; 607 608 i2c5: i2c@e66e0000 { 609 #address-cells = <1>; 610 #size-cells = <0>; 611 compatible = "renesas,i2c-r8a77965", 612 "renesas,rcar-gen3-i2c"; 613 reg = <0 0xe66e0000 0 0x40>; 614 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 615 clocks = <&cpg CPG_MOD 919>; 616 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 617 resets = <&cpg 919>; 618 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 619 dma-names = "tx", "rx"; 620 i2c-scl-internal-delay-ns = <110>; 621 status = "disabled"; 622 }; 623 624 i2c6: i2c@e66e8000 { 625 #address-cells = <1>; 626 #size-cells = <0>; 627 compatible = "renesas,i2c-r8a77965", 628 "renesas,rcar-gen3-i2c"; 629 reg = <0 0xe66e8000 0 0x40>; 630 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 631 clocks = <&cpg CPG_MOD 918>; 632 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 633 resets = <&cpg 918>; 634 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 635 dma-names = "tx", "rx"; 636 i2c-scl-internal-delay-ns = <6>; 637 status = "disabled"; 638 }; 639 640 i2c_dvfs: i2c@e60b0000 { 641 #address-cells = <1>; 642 #size-cells = <0>; 643 compatible = "renesas,iic-r8a77965", 644 "renesas,rcar-gen3-iic", 645 "renesas,rmobile-iic"; 646 reg = <0 0xe60b0000 0 0x425>; 647 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 648 clocks = <&cpg CPG_MOD 926>; 649 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 650 resets = <&cpg 926>; 651 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 652 dma-names = "tx", "rx"; 653 status = "disabled"; 654 }; 655 656 hscif0: serial@e6540000 { 657 compatible = "renesas,hscif-r8a77965", 658 "renesas,rcar-gen3-hscif", 659 "renesas,hscif"; 660 reg = <0 0xe6540000 0 0x60>; 661 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 520>, 663 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 664 <&scif_clk>; 665 clock-names = "fck", "brg_int", "scif_clk"; 666 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 667 <&dmac2 0x31>, <&dmac2 0x30>; 668 dma-names = "tx", "rx", "tx", "rx"; 669 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 670 resets = <&cpg 520>; 671 status = "disabled"; 672 }; 673 674 hscif1: serial@e6550000 { 675 compatible = "renesas,hscif-r8a77965", 676 "renesas,rcar-gen3-hscif", 677 "renesas,hscif"; 678 reg = <0 0xe6550000 0 0x60>; 679 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 680 clocks = <&cpg CPG_MOD 519>, 681 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 682 <&scif_clk>; 683 clock-names = "fck", "brg_int", "scif_clk"; 684 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 685 <&dmac2 0x33>, <&dmac2 0x32>; 686 dma-names = "tx", "rx", "tx", "rx"; 687 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 688 resets = <&cpg 519>; 689 status = "disabled"; 690 }; 691 692 hscif2: serial@e6560000 { 693 compatible = "renesas,hscif-r8a77965", 694 "renesas,rcar-gen3-hscif", 695 "renesas,hscif"; 696 reg = <0 0xe6560000 0 0x60>; 697 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 698 clocks = <&cpg CPG_MOD 518>, 699 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 700 <&scif_clk>; 701 clock-names = "fck", "brg_int", "scif_clk"; 702 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 703 <&dmac2 0x35>, <&dmac2 0x34>; 704 dma-names = "tx", "rx", "tx", "rx"; 705 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 706 resets = <&cpg 518>; 707 status = "disabled"; 708 }; 709 710 hscif3: serial@e66a0000 { 711 compatible = "renesas,hscif-r8a77965", 712 "renesas,rcar-gen3-hscif", 713 "renesas,hscif"; 714 reg = <0 0xe66a0000 0 0x60>; 715 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 716 clocks = <&cpg CPG_MOD 517>, 717 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 718 <&scif_clk>; 719 clock-names = "fck", "brg_int", "scif_clk"; 720 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 721 dma-names = "tx", "rx"; 722 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 723 resets = <&cpg 517>; 724 status = "disabled"; 725 }; 726 727 hscif4: serial@e66b0000 { 728 compatible = "renesas,hscif-r8a77965", 729 "renesas,rcar-gen3-hscif", 730 "renesas,hscif"; 731 reg = <0 0xe66b0000 0 0x60>; 732 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 733 clocks = <&cpg CPG_MOD 516>, 734 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 735 <&scif_clk>; 736 clock-names = "fck", "brg_int", "scif_clk"; 737 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 738 dma-names = "tx", "rx"; 739 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 740 resets = <&cpg 516>; 741 status = "disabled"; 742 }; 743 744 hsusb: usb@e6590000 { 745 compatible = "renesas,usbhs-r8a77965", 746 "renesas,rcar-gen3-usbhs"; 747 reg = <0 0xe6590000 0 0x200>; 748 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 749 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 750 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 751 <&usb_dmac1 0>, <&usb_dmac1 1>; 752 dma-names = "ch0", "ch1", "ch2", "ch3"; 753 renesas,buswait = <11>; 754 phys = <&usb2_phy0 3>; 755 phy-names = "usb"; 756 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 757 resets = <&cpg 704>, <&cpg 703>; 758 status = "disabled"; 759 }; 760 761 usb_dmac0: dma-controller@e65a0000 { 762 compatible = "renesas,r8a77965-usb-dmac", 763 "renesas,usb-dmac"; 764 reg = <0 0xe65a0000 0 0x100>; 765 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 767 interrupt-names = "ch0", "ch1"; 768 clocks = <&cpg CPG_MOD 330>; 769 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 770 resets = <&cpg 330>; 771 #dma-cells = <1>; 772 dma-channels = <2>; 773 }; 774 775 usb_dmac1: dma-controller@e65b0000 { 776 compatible = "renesas,r8a77965-usb-dmac", 777 "renesas,usb-dmac"; 778 reg = <0 0xe65b0000 0 0x100>; 779 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 781 interrupt-names = "ch0", "ch1"; 782 clocks = <&cpg CPG_MOD 331>; 783 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 784 resets = <&cpg 331>; 785 #dma-cells = <1>; 786 dma-channels = <2>; 787 }; 788 789 usb3_phy0: usb-phy@e65ee000 { 790 compatible = "renesas,r8a77965-usb3-phy", 791 "renesas,rcar-gen3-usb3-phy"; 792 reg = <0 0xe65ee000 0 0x90>; 793 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 794 <&usb_extal_clk>; 795 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 796 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 797 resets = <&cpg 328>; 798 #phy-cells = <0>; 799 status = "disabled"; 800 }; 801 802 arm_cc630p: crypto@e6601000 { 803 compatible = "arm,cryptocell-630p-ree"; 804 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 805 reg = <0x0 0xe6601000 0 0x1000>; 806 clocks = <&cpg CPG_MOD 229>; 807 resets = <&cpg 229>; 808 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 809 }; 810 811 dmac0: dma-controller@e6700000 { 812 compatible = "renesas,dmac-r8a77965", 813 "renesas,rcar-dmac"; 814 reg = <0 0xe6700000 0 0x10000>; 815 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 832 interrupt-names = "error", 833 "ch0", "ch1", "ch2", "ch3", 834 "ch4", "ch5", "ch6", "ch7", 835 "ch8", "ch9", "ch10", "ch11", 836 "ch12", "ch13", "ch14", "ch15"; 837 clocks = <&cpg CPG_MOD 219>; 838 clock-names = "fck"; 839 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 840 resets = <&cpg 219>; 841 #dma-cells = <1>; 842 dma-channels = <16>; 843 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 844 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 845 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 846 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 847 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 848 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 849 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 850 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 851 }; 852 853 dmac1: dma-controller@e7300000 { 854 compatible = "renesas,dmac-r8a77965", 855 "renesas,rcar-dmac"; 856 reg = <0 0xe7300000 0 0x10000>; 857 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 874 interrupt-names = "error", 875 "ch0", "ch1", "ch2", "ch3", 876 "ch4", "ch5", "ch6", "ch7", 877 "ch8", "ch9", "ch10", "ch11", 878 "ch12", "ch13", "ch14", "ch15"; 879 clocks = <&cpg CPG_MOD 218>; 880 clock-names = "fck"; 881 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 882 resets = <&cpg 218>; 883 #dma-cells = <1>; 884 dma-channels = <16>; 885 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 886 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 887 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 888 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 889 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 890 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 891 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 892 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 893 }; 894 895 dmac2: dma-controller@e7310000 { 896 compatible = "renesas,dmac-r8a77965", 897 "renesas,rcar-dmac"; 898 reg = <0 0xe7310000 0 0x10000>; 899 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 900 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 904 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 906 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 907 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 908 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 909 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 910 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 911 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 914 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 915 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 916 interrupt-names = "error", 917 "ch0", "ch1", "ch2", "ch3", 918 "ch4", "ch5", "ch6", "ch7", 919 "ch8", "ch9", "ch10", "ch11", 920 "ch12", "ch13", "ch14", "ch15"; 921 clocks = <&cpg CPG_MOD 217>; 922 clock-names = "fck"; 923 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 924 resets = <&cpg 217>; 925 #dma-cells = <1>; 926 dma-channels = <16>; 927 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 928 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 929 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 930 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 931 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 932 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 933 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 934 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 935 }; 936 937 ipmmu_ds0: iommu@e6740000 { 938 compatible = "renesas,ipmmu-r8a77965"; 939 reg = <0 0xe6740000 0 0x1000>; 940 renesas,ipmmu-main = <&ipmmu_mm 0>; 941 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 942 #iommu-cells = <1>; 943 }; 944 945 ipmmu_ds1: iommu@e7740000 { 946 compatible = "renesas,ipmmu-r8a77965"; 947 reg = <0 0xe7740000 0 0x1000>; 948 renesas,ipmmu-main = <&ipmmu_mm 1>; 949 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 950 #iommu-cells = <1>; 951 }; 952 953 ipmmu_hc: iommu@e6570000 { 954 compatible = "renesas,ipmmu-r8a77965"; 955 reg = <0 0xe6570000 0 0x1000>; 956 renesas,ipmmu-main = <&ipmmu_mm 2>; 957 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 958 #iommu-cells = <1>; 959 }; 960 961 ipmmu_mm: iommu@e67b0000 { 962 compatible = "renesas,ipmmu-r8a77965"; 963 reg = <0 0xe67b0000 0 0x1000>; 964 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 966 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 967 #iommu-cells = <1>; 968 }; 969 970 ipmmu_mp: iommu@ec670000 { 971 compatible = "renesas,ipmmu-r8a77965"; 972 reg = <0 0xec670000 0 0x1000>; 973 renesas,ipmmu-main = <&ipmmu_mm 4>; 974 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 975 #iommu-cells = <1>; 976 }; 977 978 ipmmu_pv0: iommu@fd800000 { 979 compatible = "renesas,ipmmu-r8a77965"; 980 reg = <0 0xfd800000 0 0x1000>; 981 renesas,ipmmu-main = <&ipmmu_mm 6>; 982 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 983 #iommu-cells = <1>; 984 }; 985 986 ipmmu_rt: iommu@ffc80000 { 987 compatible = "renesas,ipmmu-r8a77965"; 988 reg = <0 0xffc80000 0 0x1000>; 989 renesas,ipmmu-main = <&ipmmu_mm 10>; 990 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 991 #iommu-cells = <1>; 992 }; 993 994 ipmmu_vc0: iommu@fe6b0000 { 995 compatible = "renesas,ipmmu-r8a77965"; 996 reg = <0 0xfe6b0000 0 0x1000>; 997 renesas,ipmmu-main = <&ipmmu_mm 12>; 998 power-domains = <&sysc R8A77965_PD_A3VC>; 999 #iommu-cells = <1>; 1000 }; 1001 1002 ipmmu_vi0: iommu@febd0000 { 1003 compatible = "renesas,ipmmu-r8a77965"; 1004 reg = <0 0xfebd0000 0 0x1000>; 1005 renesas,ipmmu-main = <&ipmmu_mm 14>; 1006 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1007 #iommu-cells = <1>; 1008 }; 1009 1010 ipmmu_vp0: iommu@fe990000 { 1011 compatible = "renesas,ipmmu-r8a77965"; 1012 reg = <0 0xfe990000 0 0x1000>; 1013 renesas,ipmmu-main = <&ipmmu_mm 16>; 1014 power-domains = <&sysc R8A77965_PD_A3VP>; 1015 #iommu-cells = <1>; 1016 }; 1017 1018 avb: ethernet@e6800000 { 1019 compatible = "renesas,etheravb-r8a77965", 1020 "renesas,etheravb-rcar-gen3"; 1021 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1022 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1045 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1046 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1047 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1048 "ch4", "ch5", "ch6", "ch7", 1049 "ch8", "ch9", "ch10", "ch11", 1050 "ch12", "ch13", "ch14", "ch15", 1051 "ch16", "ch17", "ch18", "ch19", 1052 "ch20", "ch21", "ch22", "ch23", 1053 "ch24"; 1054 clocks = <&cpg CPG_MOD 812>; 1055 clock-names = "fck"; 1056 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1057 resets = <&cpg 812>; 1058 phy-mode = "rgmii"; 1059 rx-internal-delay-ps = <0>; 1060 tx-internal-delay-ps = <0>; 1061 iommus = <&ipmmu_ds0 16>; 1062 #address-cells = <1>; 1063 #size-cells = <0>; 1064 status = "disabled"; 1065 }; 1066 1067 can0: can@e6c30000 { 1068 compatible = "renesas,can-r8a77965", 1069 "renesas,rcar-gen3-can"; 1070 reg = <0 0xe6c30000 0 0x1000>; 1071 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1072 clocks = <&cpg CPG_MOD 916>, 1073 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1074 <&can_clk>; 1075 clock-names = "clkp1", "clkp2", "can_clk"; 1076 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1077 assigned-clock-rates = <40000000>; 1078 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1079 resets = <&cpg 916>; 1080 status = "disabled"; 1081 }; 1082 1083 can1: can@e6c38000 { 1084 compatible = "renesas,can-r8a77965", 1085 "renesas,rcar-gen3-can"; 1086 reg = <0 0xe6c38000 0 0x1000>; 1087 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1088 clocks = <&cpg CPG_MOD 915>, 1089 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1090 <&can_clk>; 1091 clock-names = "clkp1", "clkp2", "can_clk"; 1092 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1093 assigned-clock-rates = <40000000>; 1094 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1095 resets = <&cpg 915>; 1096 status = "disabled"; 1097 }; 1098 1099 canfd: can@e66c0000 { 1100 compatible = "renesas,r8a77965-canfd", 1101 "renesas,rcar-gen3-canfd"; 1102 reg = <0 0xe66c0000 0 0x8000>; 1103 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1104 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1105 clocks = <&cpg CPG_MOD 914>, 1106 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1107 <&can_clk>; 1108 clock-names = "fck", "canfd", "can_clk"; 1109 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1110 assigned-clock-rates = <40000000>; 1111 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1112 resets = <&cpg 914>; 1113 status = "disabled"; 1114 1115 channel0 { 1116 status = "disabled"; 1117 }; 1118 1119 channel1 { 1120 status = "disabled"; 1121 }; 1122 }; 1123 1124 pwm0: pwm@e6e30000 { 1125 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1126 reg = <0 0xe6e30000 0 8>; 1127 #pwm-cells = <2>; 1128 clocks = <&cpg CPG_MOD 523>; 1129 resets = <&cpg 523>; 1130 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1131 status = "disabled"; 1132 }; 1133 1134 pwm1: pwm@e6e31000 { 1135 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1136 reg = <0 0xe6e31000 0 8>; 1137 #pwm-cells = <2>; 1138 clocks = <&cpg CPG_MOD 523>; 1139 resets = <&cpg 523>; 1140 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1141 status = "disabled"; 1142 }; 1143 1144 pwm2: pwm@e6e32000 { 1145 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1146 reg = <0 0xe6e32000 0 8>; 1147 #pwm-cells = <2>; 1148 clocks = <&cpg CPG_MOD 523>; 1149 resets = <&cpg 523>; 1150 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1151 status = "disabled"; 1152 }; 1153 1154 pwm3: pwm@e6e33000 { 1155 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1156 reg = <0 0xe6e33000 0 8>; 1157 #pwm-cells = <2>; 1158 clocks = <&cpg CPG_MOD 523>; 1159 resets = <&cpg 523>; 1160 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1161 status = "disabled"; 1162 }; 1163 1164 pwm4: pwm@e6e34000 { 1165 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1166 reg = <0 0xe6e34000 0 8>; 1167 #pwm-cells = <2>; 1168 clocks = <&cpg CPG_MOD 523>; 1169 resets = <&cpg 523>; 1170 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1171 status = "disabled"; 1172 }; 1173 1174 pwm5: pwm@e6e35000 { 1175 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1176 reg = <0 0xe6e35000 0 8>; 1177 #pwm-cells = <2>; 1178 clocks = <&cpg CPG_MOD 523>; 1179 resets = <&cpg 523>; 1180 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1181 status = "disabled"; 1182 }; 1183 1184 pwm6: pwm@e6e36000 { 1185 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1186 reg = <0 0xe6e36000 0 8>; 1187 #pwm-cells = <2>; 1188 clocks = <&cpg CPG_MOD 523>; 1189 resets = <&cpg 523>; 1190 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1191 status = "disabled"; 1192 }; 1193 1194 scif0: serial@e6e60000 { 1195 compatible = "renesas,scif-r8a77965", 1196 "renesas,rcar-gen3-scif", "renesas,scif"; 1197 reg = <0 0xe6e60000 0 64>; 1198 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1199 clocks = <&cpg CPG_MOD 207>, 1200 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1201 <&scif_clk>; 1202 clock-names = "fck", "brg_int", "scif_clk"; 1203 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1204 <&dmac2 0x51>, <&dmac2 0x50>; 1205 dma-names = "tx", "rx", "tx", "rx"; 1206 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1207 resets = <&cpg 207>; 1208 status = "disabled"; 1209 }; 1210 1211 scif1: serial@e6e68000 { 1212 compatible = "renesas,scif-r8a77965", 1213 "renesas,rcar-gen3-scif", "renesas,scif"; 1214 reg = <0 0xe6e68000 0 64>; 1215 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1216 clocks = <&cpg CPG_MOD 206>, 1217 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1218 <&scif_clk>; 1219 clock-names = "fck", "brg_int", "scif_clk"; 1220 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1221 <&dmac2 0x53>, <&dmac2 0x52>; 1222 dma-names = "tx", "rx", "tx", "rx"; 1223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1224 resets = <&cpg 206>; 1225 status = "disabled"; 1226 }; 1227 1228 scif2: serial@e6e88000 { 1229 compatible = "renesas,scif-r8a77965", 1230 "renesas,rcar-gen3-scif", "renesas,scif"; 1231 reg = <0 0xe6e88000 0 64>; 1232 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1233 clocks = <&cpg CPG_MOD 310>, 1234 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1235 <&scif_clk>; 1236 clock-names = "fck", "brg_int", "scif_clk"; 1237 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1238 <&dmac2 0x13>, <&dmac2 0x12>; 1239 dma-names = "tx", "rx", "tx", "rx"; 1240 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1241 resets = <&cpg 310>; 1242 status = "disabled"; 1243 }; 1244 1245 scif3: serial@e6c50000 { 1246 compatible = "renesas,scif-r8a77965", 1247 "renesas,rcar-gen3-scif", "renesas,scif"; 1248 reg = <0 0xe6c50000 0 64>; 1249 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1250 clocks = <&cpg CPG_MOD 204>, 1251 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1252 <&scif_clk>; 1253 clock-names = "fck", "brg_int", "scif_clk"; 1254 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1255 dma-names = "tx", "rx"; 1256 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1257 resets = <&cpg 204>; 1258 status = "disabled"; 1259 }; 1260 1261 scif4: serial@e6c40000 { 1262 compatible = "renesas,scif-r8a77965", 1263 "renesas,rcar-gen3-scif", "renesas,scif"; 1264 reg = <0 0xe6c40000 0 64>; 1265 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1266 clocks = <&cpg CPG_MOD 203>, 1267 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1268 <&scif_clk>; 1269 clock-names = "fck", "brg_int", "scif_clk"; 1270 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1271 dma-names = "tx", "rx"; 1272 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1273 resets = <&cpg 203>; 1274 status = "disabled"; 1275 }; 1276 1277 scif5: serial@e6f30000 { 1278 compatible = "renesas,scif-r8a77965", 1279 "renesas,rcar-gen3-scif", "renesas,scif"; 1280 reg = <0 0xe6f30000 0 64>; 1281 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1282 clocks = <&cpg CPG_MOD 202>, 1283 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1284 <&scif_clk>; 1285 clock-names = "fck", "brg_int", "scif_clk"; 1286 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1287 <&dmac2 0x5b>, <&dmac2 0x5a>; 1288 dma-names = "tx", "rx", "tx", "rx"; 1289 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1290 resets = <&cpg 202>; 1291 status = "disabled"; 1292 }; 1293 1294 tpu: pwm@e6e80000 { 1295 compatible = "renesas,tpu-r8a77965", "renesas,tpu"; 1296 reg = <0 0xe6e80000 0 0x148>; 1297 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1298 clocks = <&cpg CPG_MOD 304>; 1299 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1300 resets = <&cpg 304>; 1301 #pwm-cells = <3>; 1302 status = "disabled"; 1303 }; 1304 1305 msiof0: spi@e6e90000 { 1306 compatible = "renesas,msiof-r8a77965", 1307 "renesas,rcar-gen3-msiof"; 1308 reg = <0 0xe6e90000 0 0x0064>; 1309 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1310 clocks = <&cpg CPG_MOD 211>; 1311 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1312 <&dmac2 0x41>, <&dmac2 0x40>; 1313 dma-names = "tx", "rx", "tx", "rx"; 1314 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1315 resets = <&cpg 211>; 1316 #address-cells = <1>; 1317 #size-cells = <0>; 1318 status = "disabled"; 1319 }; 1320 1321 msiof1: spi@e6ea0000 { 1322 compatible = "renesas,msiof-r8a77965", 1323 "renesas,rcar-gen3-msiof"; 1324 reg = <0 0xe6ea0000 0 0x0064>; 1325 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1326 clocks = <&cpg CPG_MOD 210>; 1327 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1328 <&dmac2 0x43>, <&dmac2 0x42>; 1329 dma-names = "tx", "rx", "tx", "rx"; 1330 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1331 resets = <&cpg 210>; 1332 #address-cells = <1>; 1333 #size-cells = <0>; 1334 status = "disabled"; 1335 }; 1336 1337 msiof2: spi@e6c00000 { 1338 compatible = "renesas,msiof-r8a77965", 1339 "renesas,rcar-gen3-msiof"; 1340 reg = <0 0xe6c00000 0 0x0064>; 1341 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1342 clocks = <&cpg CPG_MOD 209>; 1343 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1344 dma-names = "tx", "rx"; 1345 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1346 resets = <&cpg 209>; 1347 #address-cells = <1>; 1348 #size-cells = <0>; 1349 status = "disabled"; 1350 }; 1351 1352 msiof3: spi@e6c10000 { 1353 compatible = "renesas,msiof-r8a77965", 1354 "renesas,rcar-gen3-msiof"; 1355 reg = <0 0xe6c10000 0 0x0064>; 1356 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1357 clocks = <&cpg CPG_MOD 208>; 1358 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1359 dma-names = "tx", "rx"; 1360 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1361 resets = <&cpg 208>; 1362 #address-cells = <1>; 1363 #size-cells = <0>; 1364 status = "disabled"; 1365 }; 1366 1367 vin0: video@e6ef0000 { 1368 compatible = "renesas,vin-r8a77965"; 1369 reg = <0 0xe6ef0000 0 0x1000>; 1370 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1371 clocks = <&cpg CPG_MOD 811>; 1372 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1373 resets = <&cpg 811>; 1374 renesas,id = <0>; 1375 status = "disabled"; 1376 1377 ports { 1378 #address-cells = <1>; 1379 #size-cells = <0>; 1380 1381 port@1 { 1382 #address-cells = <1>; 1383 #size-cells = <0>; 1384 1385 reg = <1>; 1386 1387 vin0csi20: endpoint@0 { 1388 reg = <0>; 1389 remote-endpoint = <&csi20vin0>; 1390 }; 1391 vin0csi40: endpoint@2 { 1392 reg = <2>; 1393 remote-endpoint = <&csi40vin0>; 1394 }; 1395 }; 1396 }; 1397 }; 1398 1399 vin1: video@e6ef1000 { 1400 compatible = "renesas,vin-r8a77965"; 1401 reg = <0 0xe6ef1000 0 0x1000>; 1402 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1403 clocks = <&cpg CPG_MOD 810>; 1404 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1405 resets = <&cpg 810>; 1406 renesas,id = <1>; 1407 status = "disabled"; 1408 1409 ports { 1410 #address-cells = <1>; 1411 #size-cells = <0>; 1412 1413 port@1 { 1414 #address-cells = <1>; 1415 #size-cells = <0>; 1416 1417 reg = <1>; 1418 1419 vin1csi20: endpoint@0 { 1420 reg = <0>; 1421 remote-endpoint = <&csi20vin1>; 1422 }; 1423 vin1csi40: endpoint@2 { 1424 reg = <2>; 1425 remote-endpoint = <&csi40vin1>; 1426 }; 1427 }; 1428 }; 1429 }; 1430 1431 vin2: video@e6ef2000 { 1432 compatible = "renesas,vin-r8a77965"; 1433 reg = <0 0xe6ef2000 0 0x1000>; 1434 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1435 clocks = <&cpg CPG_MOD 809>; 1436 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1437 resets = <&cpg 809>; 1438 renesas,id = <2>; 1439 status = "disabled"; 1440 1441 ports { 1442 #address-cells = <1>; 1443 #size-cells = <0>; 1444 1445 port@1 { 1446 #address-cells = <1>; 1447 #size-cells = <0>; 1448 1449 reg = <1>; 1450 1451 vin2csi20: endpoint@0 { 1452 reg = <0>; 1453 remote-endpoint = <&csi20vin2>; 1454 }; 1455 vin2csi40: endpoint@2 { 1456 reg = <2>; 1457 remote-endpoint = <&csi40vin2>; 1458 }; 1459 }; 1460 }; 1461 }; 1462 1463 vin3: video@e6ef3000 { 1464 compatible = "renesas,vin-r8a77965"; 1465 reg = <0 0xe6ef3000 0 0x1000>; 1466 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1467 clocks = <&cpg CPG_MOD 808>; 1468 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1469 resets = <&cpg 808>; 1470 renesas,id = <3>; 1471 status = "disabled"; 1472 1473 ports { 1474 #address-cells = <1>; 1475 #size-cells = <0>; 1476 1477 port@1 { 1478 #address-cells = <1>; 1479 #size-cells = <0>; 1480 1481 reg = <1>; 1482 1483 vin3csi20: endpoint@0 { 1484 reg = <0>; 1485 remote-endpoint = <&csi20vin3>; 1486 }; 1487 vin3csi40: endpoint@2 { 1488 reg = <2>; 1489 remote-endpoint = <&csi40vin3>; 1490 }; 1491 }; 1492 }; 1493 }; 1494 1495 vin4: video@e6ef4000 { 1496 compatible = "renesas,vin-r8a77965"; 1497 reg = <0 0xe6ef4000 0 0x1000>; 1498 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1499 clocks = <&cpg CPG_MOD 807>; 1500 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1501 resets = <&cpg 807>; 1502 renesas,id = <4>; 1503 status = "disabled"; 1504 1505 ports { 1506 #address-cells = <1>; 1507 #size-cells = <0>; 1508 1509 port@1 { 1510 #address-cells = <1>; 1511 #size-cells = <0>; 1512 1513 reg = <1>; 1514 1515 vin4csi20: endpoint@0 { 1516 reg = <0>; 1517 remote-endpoint = <&csi20vin4>; 1518 }; 1519 vin4csi40: endpoint@2 { 1520 reg = <2>; 1521 remote-endpoint = <&csi40vin4>; 1522 }; 1523 }; 1524 }; 1525 }; 1526 1527 vin5: video@e6ef5000 { 1528 compatible = "renesas,vin-r8a77965"; 1529 reg = <0 0xe6ef5000 0 0x1000>; 1530 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1531 clocks = <&cpg CPG_MOD 806>; 1532 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1533 resets = <&cpg 806>; 1534 renesas,id = <5>; 1535 status = "disabled"; 1536 1537 ports { 1538 #address-cells = <1>; 1539 #size-cells = <0>; 1540 1541 port@1 { 1542 #address-cells = <1>; 1543 #size-cells = <0>; 1544 1545 reg = <1>; 1546 1547 vin5csi20: endpoint@0 { 1548 reg = <0>; 1549 remote-endpoint = <&csi20vin5>; 1550 }; 1551 vin5csi40: endpoint@2 { 1552 reg = <2>; 1553 remote-endpoint = <&csi40vin5>; 1554 }; 1555 }; 1556 }; 1557 }; 1558 1559 vin6: video@e6ef6000 { 1560 compatible = "renesas,vin-r8a77965"; 1561 reg = <0 0xe6ef6000 0 0x1000>; 1562 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1563 clocks = <&cpg CPG_MOD 805>; 1564 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1565 resets = <&cpg 805>; 1566 renesas,id = <6>; 1567 status = "disabled"; 1568 1569 ports { 1570 #address-cells = <1>; 1571 #size-cells = <0>; 1572 1573 port@1 { 1574 #address-cells = <1>; 1575 #size-cells = <0>; 1576 1577 reg = <1>; 1578 1579 vin6csi20: endpoint@0 { 1580 reg = <0>; 1581 remote-endpoint = <&csi20vin6>; 1582 }; 1583 vin6csi40: endpoint@2 { 1584 reg = <2>; 1585 remote-endpoint = <&csi40vin6>; 1586 }; 1587 }; 1588 }; 1589 }; 1590 1591 vin7: video@e6ef7000 { 1592 compatible = "renesas,vin-r8a77965"; 1593 reg = <0 0xe6ef7000 0 0x1000>; 1594 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1595 clocks = <&cpg CPG_MOD 804>; 1596 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1597 resets = <&cpg 804>; 1598 renesas,id = <7>; 1599 status = "disabled"; 1600 1601 ports { 1602 #address-cells = <1>; 1603 #size-cells = <0>; 1604 1605 port@1 { 1606 #address-cells = <1>; 1607 #size-cells = <0>; 1608 1609 reg = <1>; 1610 1611 vin7csi20: endpoint@0 { 1612 reg = <0>; 1613 remote-endpoint = <&csi20vin7>; 1614 }; 1615 vin7csi40: endpoint@2 { 1616 reg = <2>; 1617 remote-endpoint = <&csi40vin7>; 1618 }; 1619 }; 1620 }; 1621 }; 1622 1623 drif00: rif@e6f40000 { 1624 compatible = "renesas,r8a77965-drif", 1625 "renesas,rcar-gen3-drif"; 1626 reg = <0 0xe6f40000 0 0x84>; 1627 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1628 clocks = <&cpg CPG_MOD 515>; 1629 clock-names = "fck"; 1630 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1631 dma-names = "rx", "rx"; 1632 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1633 resets = <&cpg 515>; 1634 renesas,bonding = <&drif01>; 1635 status = "disabled"; 1636 }; 1637 1638 drif01: rif@e6f50000 { 1639 compatible = "renesas,r8a77965-drif", 1640 "renesas,rcar-gen3-drif"; 1641 reg = <0 0xe6f50000 0 0x84>; 1642 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1643 clocks = <&cpg CPG_MOD 514>; 1644 clock-names = "fck"; 1645 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1646 dma-names = "rx", "rx"; 1647 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1648 resets = <&cpg 514>; 1649 renesas,bonding = <&drif00>; 1650 status = "disabled"; 1651 }; 1652 1653 drif10: rif@e6f60000 { 1654 compatible = "renesas,r8a77965-drif", 1655 "renesas,rcar-gen3-drif"; 1656 reg = <0 0xe6f60000 0 0x84>; 1657 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1658 clocks = <&cpg CPG_MOD 513>; 1659 clock-names = "fck"; 1660 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1661 dma-names = "rx", "rx"; 1662 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1663 resets = <&cpg 513>; 1664 renesas,bonding = <&drif11>; 1665 status = "disabled"; 1666 }; 1667 1668 drif11: rif@e6f70000 { 1669 compatible = "renesas,r8a77965-drif", 1670 "renesas,rcar-gen3-drif"; 1671 reg = <0 0xe6f70000 0 0x84>; 1672 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1673 clocks = <&cpg CPG_MOD 512>; 1674 clock-names = "fck"; 1675 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1676 dma-names = "rx", "rx"; 1677 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1678 resets = <&cpg 512>; 1679 renesas,bonding = <&drif10>; 1680 status = "disabled"; 1681 }; 1682 1683 drif20: rif@e6f80000 { 1684 compatible = "renesas,r8a77965-drif", 1685 "renesas,rcar-gen3-drif"; 1686 reg = <0 0xe6f80000 0 0x84>; 1687 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1688 clocks = <&cpg CPG_MOD 511>; 1689 clock-names = "fck"; 1690 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1691 dma-names = "rx", "rx"; 1692 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1693 resets = <&cpg 511>; 1694 renesas,bonding = <&drif21>; 1695 status = "disabled"; 1696 }; 1697 1698 drif21: rif@e6f90000 { 1699 compatible = "renesas,r8a77965-drif", 1700 "renesas,rcar-gen3-drif"; 1701 reg = <0 0xe6f90000 0 0x84>; 1702 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1703 clocks = <&cpg CPG_MOD 510>; 1704 clock-names = "fck"; 1705 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1706 dma-names = "rx", "rx"; 1707 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1708 resets = <&cpg 510>; 1709 renesas,bonding = <&drif20>; 1710 status = "disabled"; 1711 }; 1712 1713 drif30: rif@e6fa0000 { 1714 compatible = "renesas,r8a77965-drif", 1715 "renesas,rcar-gen3-drif"; 1716 reg = <0 0xe6fa0000 0 0x84>; 1717 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1718 clocks = <&cpg CPG_MOD 509>; 1719 clock-names = "fck"; 1720 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1721 dma-names = "rx", "rx"; 1722 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1723 resets = <&cpg 509>; 1724 renesas,bonding = <&drif31>; 1725 status = "disabled"; 1726 }; 1727 1728 drif31: rif@e6fb0000 { 1729 compatible = "renesas,r8a77965-drif", 1730 "renesas,rcar-gen3-drif"; 1731 reg = <0 0xe6fb0000 0 0x84>; 1732 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1733 clocks = <&cpg CPG_MOD 508>; 1734 clock-names = "fck"; 1735 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1736 dma-names = "rx", "rx"; 1737 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1738 resets = <&cpg 508>; 1739 renesas,bonding = <&drif30>; 1740 status = "disabled"; 1741 }; 1742 1743 rcar_sound: sound@ec500000 { 1744 /* 1745 * #sound-dai-cells is required 1746 * 1747 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1748 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1749 */ 1750 /* 1751 * #clock-cells is required for audio_clkout0/1/2/3 1752 * 1753 * clkout : #clock-cells = <0>; <&rcar_sound>; 1754 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1755 */ 1756 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1757 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1758 <0 0xec5a0000 0 0x100>, /* ADG */ 1759 <0 0xec540000 0 0x1000>, /* SSIU */ 1760 <0 0xec541000 0 0x280>, /* SSI */ 1761 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1762 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1763 1764 clocks = <&cpg CPG_MOD 1005>, 1765 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1766 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1767 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1768 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1769 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1770 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1771 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1772 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1773 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1774 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1775 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1776 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1777 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1778 <&audio_clk_a>, <&audio_clk_b>, 1779 <&audio_clk_c>, 1780 <&cpg CPG_CORE R8A77965_CLK_S0D4>; 1781 clock-names = "ssi-all", 1782 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1783 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1784 "ssi.1", "ssi.0", 1785 "src.9", "src.8", "src.7", "src.6", 1786 "src.5", "src.4", "src.3", "src.2", 1787 "src.1", "src.0", 1788 "mix.1", "mix.0", 1789 "ctu.1", "ctu.0", 1790 "dvc.0", "dvc.1", 1791 "clk_a", "clk_b", "clk_c", "clk_i"; 1792 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1793 resets = <&cpg 1005>, 1794 <&cpg 1006>, <&cpg 1007>, 1795 <&cpg 1008>, <&cpg 1009>, 1796 <&cpg 1010>, <&cpg 1011>, 1797 <&cpg 1012>, <&cpg 1013>, 1798 <&cpg 1014>, <&cpg 1015>; 1799 reset-names = "ssi-all", 1800 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1801 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1802 "ssi.1", "ssi.0"; 1803 status = "disabled"; 1804 1805 rcar_sound,dvc { 1806 dvc0: dvc-0 { 1807 dmas = <&audma1 0xbc>; 1808 dma-names = "tx"; 1809 }; 1810 dvc1: dvc-1 { 1811 dmas = <&audma1 0xbe>; 1812 dma-names = "tx"; 1813 }; 1814 }; 1815 1816 rcar_sound,mix { 1817 mix0: mix-0 { }; 1818 mix1: mix-1 { }; 1819 }; 1820 1821 rcar_sound,ctu { 1822 ctu00: ctu-0 { }; 1823 ctu01: ctu-1 { }; 1824 ctu02: ctu-2 { }; 1825 ctu03: ctu-3 { }; 1826 ctu10: ctu-4 { }; 1827 ctu11: ctu-5 { }; 1828 ctu12: ctu-6 { }; 1829 ctu13: ctu-7 { }; 1830 }; 1831 1832 rcar_sound,src { 1833 src0: src-0 { 1834 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1835 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1836 dma-names = "rx", "tx"; 1837 }; 1838 src1: src-1 { 1839 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1840 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1841 dma-names = "rx", "tx"; 1842 }; 1843 src2: src-2 { 1844 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1845 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1846 dma-names = "rx", "tx"; 1847 }; 1848 src3: src-3 { 1849 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1850 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1851 dma-names = "rx", "tx"; 1852 }; 1853 src4: src-4 { 1854 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1855 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1856 dma-names = "rx", "tx"; 1857 }; 1858 src5: src-5 { 1859 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1860 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1861 dma-names = "rx", "tx"; 1862 }; 1863 src6: src-6 { 1864 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1865 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1866 dma-names = "rx", "tx"; 1867 }; 1868 src7: src-7 { 1869 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1870 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1871 dma-names = "rx", "tx"; 1872 }; 1873 src8: src-8 { 1874 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1875 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1876 dma-names = "rx", "tx"; 1877 }; 1878 src9: src-9 { 1879 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1880 dmas = <&audma0 0x97>, <&audma1 0xba>; 1881 dma-names = "rx", "tx"; 1882 }; 1883 }; 1884 1885 rcar_sound,ssiu { 1886 ssiu00: ssiu-0 { 1887 dmas = <&audma0 0x15>, <&audma1 0x16>; 1888 dma-names = "rx", "tx"; 1889 }; 1890 ssiu01: ssiu-1 { 1891 dmas = <&audma0 0x35>, <&audma1 0x36>; 1892 dma-names = "rx", "tx"; 1893 }; 1894 ssiu02: ssiu-2 { 1895 dmas = <&audma0 0x37>, <&audma1 0x38>; 1896 dma-names = "rx", "tx"; 1897 }; 1898 ssiu03: ssiu-3 { 1899 dmas = <&audma0 0x47>, <&audma1 0x48>; 1900 dma-names = "rx", "tx"; 1901 }; 1902 ssiu04: ssiu-4 { 1903 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1904 dma-names = "rx", "tx"; 1905 }; 1906 ssiu05: ssiu-5 { 1907 dmas = <&audma0 0x43>, <&audma1 0x44>; 1908 dma-names = "rx", "tx"; 1909 }; 1910 ssiu06: ssiu-6 { 1911 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1912 dma-names = "rx", "tx"; 1913 }; 1914 ssiu07: ssiu-7 { 1915 dmas = <&audma0 0x53>, <&audma1 0x54>; 1916 dma-names = "rx", "tx"; 1917 }; 1918 ssiu10: ssiu-8 { 1919 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1920 dma-names = "rx", "tx"; 1921 }; 1922 ssiu11: ssiu-9 { 1923 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1924 dma-names = "rx", "tx"; 1925 }; 1926 ssiu12: ssiu-10 { 1927 dmas = <&audma0 0x57>, <&audma1 0x58>; 1928 dma-names = "rx", "tx"; 1929 }; 1930 ssiu13: ssiu-11 { 1931 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1932 dma-names = "rx", "tx"; 1933 }; 1934 ssiu14: ssiu-12 { 1935 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1936 dma-names = "rx", "tx"; 1937 }; 1938 ssiu15: ssiu-13 { 1939 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1940 dma-names = "rx", "tx"; 1941 }; 1942 ssiu16: ssiu-14 { 1943 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1944 dma-names = "rx", "tx"; 1945 }; 1946 ssiu17: ssiu-15 { 1947 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1948 dma-names = "rx", "tx"; 1949 }; 1950 ssiu20: ssiu-16 { 1951 dmas = <&audma0 0x63>, <&audma1 0x64>; 1952 dma-names = "rx", "tx"; 1953 }; 1954 ssiu21: ssiu-17 { 1955 dmas = <&audma0 0x67>, <&audma1 0x68>; 1956 dma-names = "rx", "tx"; 1957 }; 1958 ssiu22: ssiu-18 { 1959 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1960 dma-names = "rx", "tx"; 1961 }; 1962 ssiu23: ssiu-19 { 1963 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1964 dma-names = "rx", "tx"; 1965 }; 1966 ssiu24: ssiu-20 { 1967 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1968 dma-names = "rx", "tx"; 1969 }; 1970 ssiu25: ssiu-21 { 1971 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1972 dma-names = "rx", "tx"; 1973 }; 1974 ssiu26: ssiu-22 { 1975 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1976 dma-names = "rx", "tx"; 1977 }; 1978 ssiu27: ssiu-23 { 1979 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1980 dma-names = "rx", "tx"; 1981 }; 1982 ssiu30: ssiu-24 { 1983 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1984 dma-names = "rx", "tx"; 1985 }; 1986 ssiu31: ssiu-25 { 1987 dmas = <&audma0 0x21>, <&audma1 0x22>; 1988 dma-names = "rx", "tx"; 1989 }; 1990 ssiu32: ssiu-26 { 1991 dmas = <&audma0 0x23>, <&audma1 0x24>; 1992 dma-names = "rx", "tx"; 1993 }; 1994 ssiu33: ssiu-27 { 1995 dmas = <&audma0 0x25>, <&audma1 0x26>; 1996 dma-names = "rx", "tx"; 1997 }; 1998 ssiu34: ssiu-28 { 1999 dmas = <&audma0 0x27>, <&audma1 0x28>; 2000 dma-names = "rx", "tx"; 2001 }; 2002 ssiu35: ssiu-29 { 2003 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2004 dma-names = "rx", "tx"; 2005 }; 2006 ssiu36: ssiu-30 { 2007 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2008 dma-names = "rx", "tx"; 2009 }; 2010 ssiu37: ssiu-31 { 2011 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2012 dma-names = "rx", "tx"; 2013 }; 2014 ssiu40: ssiu-32 { 2015 dmas = <&audma0 0x71>, <&audma1 0x72>; 2016 dma-names = "rx", "tx"; 2017 }; 2018 ssiu41: ssiu-33 { 2019 dmas = <&audma0 0x17>, <&audma1 0x18>; 2020 dma-names = "rx", "tx"; 2021 }; 2022 ssiu42: ssiu-34 { 2023 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2024 dma-names = "rx", "tx"; 2025 }; 2026 ssiu43: ssiu-35 { 2027 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2028 dma-names = "rx", "tx"; 2029 }; 2030 ssiu44: ssiu-36 { 2031 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2032 dma-names = "rx", "tx"; 2033 }; 2034 ssiu45: ssiu-37 { 2035 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2036 dma-names = "rx", "tx"; 2037 }; 2038 ssiu46: ssiu-38 { 2039 dmas = <&audma0 0x31>, <&audma1 0x32>; 2040 dma-names = "rx", "tx"; 2041 }; 2042 ssiu47: ssiu-39 { 2043 dmas = <&audma0 0x33>, <&audma1 0x34>; 2044 dma-names = "rx", "tx"; 2045 }; 2046 ssiu50: ssiu-40 { 2047 dmas = <&audma0 0x73>, <&audma1 0x74>; 2048 dma-names = "rx", "tx"; 2049 }; 2050 ssiu60: ssiu-41 { 2051 dmas = <&audma0 0x75>, <&audma1 0x76>; 2052 dma-names = "rx", "tx"; 2053 }; 2054 ssiu70: ssiu-42 { 2055 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2056 dma-names = "rx", "tx"; 2057 }; 2058 ssiu80: ssiu-43 { 2059 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2060 dma-names = "rx", "tx"; 2061 }; 2062 ssiu90: ssiu-44 { 2063 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2064 dma-names = "rx", "tx"; 2065 }; 2066 ssiu91: ssiu-45 { 2067 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2068 dma-names = "rx", "tx"; 2069 }; 2070 ssiu92: ssiu-46 { 2071 dmas = <&audma0 0x81>, <&audma1 0x82>; 2072 dma-names = "rx", "tx"; 2073 }; 2074 ssiu93: ssiu-47 { 2075 dmas = <&audma0 0x83>, <&audma1 0x84>; 2076 dma-names = "rx", "tx"; 2077 }; 2078 ssiu94: ssiu-48 { 2079 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2080 dma-names = "rx", "tx"; 2081 }; 2082 ssiu95: ssiu-49 { 2083 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2084 dma-names = "rx", "tx"; 2085 }; 2086 ssiu96: ssiu-50 { 2087 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2088 dma-names = "rx", "tx"; 2089 }; 2090 ssiu97: ssiu-51 { 2091 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2092 dma-names = "rx", "tx"; 2093 }; 2094 }; 2095 2096 rcar_sound,ssi { 2097 ssi0: ssi-0 { 2098 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2099 dmas = <&audma0 0x01>, <&audma1 0x02>; 2100 dma-names = "rx", "tx"; 2101 }; 2102 ssi1: ssi-1 { 2103 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2104 dmas = <&audma0 0x03>, <&audma1 0x04>; 2105 dma-names = "rx", "tx"; 2106 }; 2107 ssi2: ssi-2 { 2108 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2109 dmas = <&audma0 0x05>, <&audma1 0x06>; 2110 dma-names = "rx", "tx"; 2111 }; 2112 ssi3: ssi-3 { 2113 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2114 dmas = <&audma0 0x07>, <&audma1 0x08>; 2115 dma-names = "rx", "tx"; 2116 }; 2117 ssi4: ssi-4 { 2118 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2119 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2120 dma-names = "rx", "tx"; 2121 }; 2122 ssi5: ssi-5 { 2123 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2124 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2125 dma-names = "rx", "tx"; 2126 }; 2127 ssi6: ssi-6 { 2128 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2129 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2130 dma-names = "rx", "tx"; 2131 }; 2132 ssi7: ssi-7 { 2133 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2134 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2135 dma-names = "rx", "tx"; 2136 }; 2137 ssi8: ssi-8 { 2138 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2139 dmas = <&audma0 0x11>, <&audma1 0x12>; 2140 dma-names = "rx", "tx"; 2141 }; 2142 ssi9: ssi-9 { 2143 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2144 dmas = <&audma0 0x13>, <&audma1 0x14>; 2145 dma-names = "rx", "tx"; 2146 }; 2147 }; 2148 }; 2149 2150 mlp: mlp@ec520000 { 2151 compatible = "renesas,r8a77965-mlp", 2152 "renesas,rcar-gen3-mlp"; 2153 reg = <0 0xec520000 0 0x800>; 2154 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2155 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2156 clocks = <&cpg CPG_MOD 802>; 2157 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2158 resets = <&cpg 802>; 2159 status = "disabled"; 2160 }; 2161 2162 audma0: dma-controller@ec700000 { 2163 compatible = "renesas,dmac-r8a77965", 2164 "renesas,rcar-dmac"; 2165 reg = <0 0xec700000 0 0x10000>; 2166 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2167 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2168 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2169 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2170 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2171 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2172 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2173 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2174 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2175 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2176 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2177 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2178 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2179 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2180 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2181 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2182 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2183 interrupt-names = "error", 2184 "ch0", "ch1", "ch2", "ch3", 2185 "ch4", "ch5", "ch6", "ch7", 2186 "ch8", "ch9", "ch10", "ch11", 2187 "ch12", "ch13", "ch14", "ch15"; 2188 clocks = <&cpg CPG_MOD 502>; 2189 clock-names = "fck"; 2190 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2191 resets = <&cpg 502>; 2192 #dma-cells = <1>; 2193 dma-channels = <16>; 2194 }; 2195 2196 audma1: dma-controller@ec720000 { 2197 compatible = "renesas,dmac-r8a77965", 2198 "renesas,rcar-dmac"; 2199 reg = <0 0xec720000 0 0x10000>; 2200 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2201 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2202 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2203 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2204 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2205 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2206 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2207 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2208 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2209 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2210 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2211 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2212 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2213 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2214 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2215 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2216 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2217 interrupt-names = "error", 2218 "ch0", "ch1", "ch2", "ch3", 2219 "ch4", "ch5", "ch6", "ch7", 2220 "ch8", "ch9", "ch10", "ch11", 2221 "ch12", "ch13", "ch14", "ch15"; 2222 clocks = <&cpg CPG_MOD 501>; 2223 clock-names = "fck"; 2224 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2225 resets = <&cpg 501>; 2226 #dma-cells = <1>; 2227 dma-channels = <16>; 2228 }; 2229 2230 xhci0: usb@ee000000 { 2231 compatible = "renesas,xhci-r8a77965", 2232 "renesas,rcar-gen3-xhci"; 2233 reg = <0 0xee000000 0 0xc00>; 2234 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2235 clocks = <&cpg CPG_MOD 328>; 2236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2237 resets = <&cpg 328>; 2238 status = "disabled"; 2239 }; 2240 2241 usb3_peri0: usb@ee020000 { 2242 compatible = "renesas,r8a77965-usb3-peri", 2243 "renesas,rcar-gen3-usb3-peri"; 2244 reg = <0 0xee020000 0 0x400>; 2245 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2246 clocks = <&cpg CPG_MOD 328>; 2247 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2248 resets = <&cpg 328>; 2249 status = "disabled"; 2250 }; 2251 2252 ohci0: usb@ee080000 { 2253 compatible = "generic-ohci"; 2254 reg = <0 0xee080000 0 0x100>; 2255 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2256 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2257 phys = <&usb2_phy0 1>; 2258 phy-names = "usb"; 2259 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2260 resets = <&cpg 703>, <&cpg 704>; 2261 status = "disabled"; 2262 }; 2263 2264 ohci1: usb@ee0a0000 { 2265 compatible = "generic-ohci"; 2266 reg = <0 0xee0a0000 0 0x100>; 2267 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2268 clocks = <&cpg CPG_MOD 702>; 2269 phys = <&usb2_phy1 1>; 2270 phy-names = "usb"; 2271 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2272 resets = <&cpg 702>; 2273 status = "disabled"; 2274 }; 2275 2276 ehci0: usb@ee080100 { 2277 compatible = "generic-ehci"; 2278 reg = <0 0xee080100 0 0x100>; 2279 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2280 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2281 phys = <&usb2_phy0 2>; 2282 phy-names = "usb"; 2283 companion = <&ohci0>; 2284 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2285 resets = <&cpg 703>, <&cpg 704>; 2286 status = "disabled"; 2287 }; 2288 2289 ehci1: usb@ee0a0100 { 2290 compatible = "generic-ehci"; 2291 reg = <0 0xee0a0100 0 0x100>; 2292 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2293 clocks = <&cpg CPG_MOD 702>; 2294 phys = <&usb2_phy1 2>; 2295 phy-names = "usb"; 2296 companion = <&ohci1>; 2297 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2298 resets = <&cpg 702>; 2299 status = "disabled"; 2300 }; 2301 2302 usb2_phy0: usb-phy@ee080200 { 2303 compatible = "renesas,usb2-phy-r8a77965", 2304 "renesas,rcar-gen3-usb2-phy"; 2305 reg = <0 0xee080200 0 0x700>; 2306 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2307 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2308 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2309 resets = <&cpg 703>, <&cpg 704>; 2310 #phy-cells = <1>; 2311 status = "disabled"; 2312 }; 2313 2314 usb2_phy1: usb-phy@ee0a0200 { 2315 compatible = "renesas,usb2-phy-r8a77965", 2316 "renesas,rcar-gen3-usb2-phy"; 2317 reg = <0 0xee0a0200 0 0x700>; 2318 clocks = <&cpg CPG_MOD 702>; 2319 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2320 resets = <&cpg 702>; 2321 #phy-cells = <1>; 2322 status = "disabled"; 2323 }; 2324 2325 sdhi0: mmc@ee100000 { 2326 compatible = "renesas,sdhi-r8a77965", 2327 "renesas,rcar-gen3-sdhi"; 2328 reg = <0 0xee100000 0 0x2000>; 2329 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2330 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>; 2331 clock-names = "core", "clkh"; 2332 max-frequency = <200000000>; 2333 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2334 resets = <&cpg 314>; 2335 iommus = <&ipmmu_ds1 32>; 2336 status = "disabled"; 2337 }; 2338 2339 sdhi1: mmc@ee120000 { 2340 compatible = "renesas,sdhi-r8a77965", 2341 "renesas,rcar-gen3-sdhi"; 2342 reg = <0 0xee120000 0 0x2000>; 2343 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2344 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>; 2345 clock-names = "core", "clkh"; 2346 max-frequency = <200000000>; 2347 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2348 resets = <&cpg 313>; 2349 iommus = <&ipmmu_ds1 33>; 2350 status = "disabled"; 2351 }; 2352 2353 sdhi2: mmc@ee140000 { 2354 compatible = "renesas,sdhi-r8a77965", 2355 "renesas,rcar-gen3-sdhi"; 2356 reg = <0 0xee140000 0 0x2000>; 2357 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2358 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>; 2359 clock-names = "core", "clkh"; 2360 max-frequency = <200000000>; 2361 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2362 resets = <&cpg 312>; 2363 iommus = <&ipmmu_ds1 34>; 2364 status = "disabled"; 2365 }; 2366 2367 sdhi3: mmc@ee160000 { 2368 compatible = "renesas,sdhi-r8a77965", 2369 "renesas,rcar-gen3-sdhi"; 2370 reg = <0 0xee160000 0 0x2000>; 2371 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2372 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>; 2373 clock-names = "core", "clkh"; 2374 max-frequency = <200000000>; 2375 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2376 resets = <&cpg 311>; 2377 iommus = <&ipmmu_ds1 35>; 2378 status = "disabled"; 2379 }; 2380 2381 sata: sata@ee300000 { 2382 compatible = "renesas,sata-r8a77965", 2383 "renesas,rcar-gen3-sata"; 2384 reg = <0 0xee300000 0 0x200000>; 2385 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2386 clocks = <&cpg CPG_MOD 815>; 2387 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2388 resets = <&cpg 815>; 2389 status = "disabled"; 2390 }; 2391 2392 gic: interrupt-controller@f1010000 { 2393 compatible = "arm,gic-400"; 2394 #interrupt-cells = <3>; 2395 #address-cells = <0>; 2396 interrupt-controller; 2397 reg = <0x0 0xf1010000 0 0x1000>, 2398 <0x0 0xf1020000 0 0x20000>, 2399 <0x0 0xf1040000 0 0x20000>, 2400 <0x0 0xf1060000 0 0x20000>; 2401 interrupts = <GIC_PPI 9 2402 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2403 clocks = <&cpg CPG_MOD 408>; 2404 clock-names = "clk"; 2405 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2406 resets = <&cpg 408>; 2407 }; 2408 2409 pciec0: pcie@fe000000 { 2410 compatible = "renesas,pcie-r8a77965", 2411 "renesas,pcie-rcar-gen3"; 2412 reg = <0 0xfe000000 0 0x80000>; 2413 #address-cells = <3>; 2414 #size-cells = <2>; 2415 bus-range = <0x00 0xff>; 2416 device_type = "pci"; 2417 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2418 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2419 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2420 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2421 /* Map all possible DDR as inbound ranges */ 2422 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2423 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2424 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2425 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2426 #interrupt-cells = <1>; 2427 interrupt-map-mask = <0 0 0 0>; 2428 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2429 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2430 clock-names = "pcie", "pcie_bus"; 2431 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2432 resets = <&cpg 319>; 2433 status = "disabled"; 2434 }; 2435 2436 pciec1: pcie@ee800000 { 2437 compatible = "renesas,pcie-r8a77965", 2438 "renesas,pcie-rcar-gen3"; 2439 reg = <0 0xee800000 0 0x80000>; 2440 #address-cells = <3>; 2441 #size-cells = <2>; 2442 bus-range = <0x00 0xff>; 2443 device_type = "pci"; 2444 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2445 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2446 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2447 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2448 /* Map all possible DDR as inbound ranges */ 2449 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2450 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2451 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2452 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2453 #interrupt-cells = <1>; 2454 interrupt-map-mask = <0 0 0 0>; 2455 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2456 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2457 clock-names = "pcie", "pcie_bus"; 2458 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2459 resets = <&cpg 318>; 2460 status = "disabled"; 2461 }; 2462 2463 fdp1@fe940000 { 2464 compatible = "renesas,fdp1"; 2465 reg = <0 0xfe940000 0 0x2400>; 2466 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2467 clocks = <&cpg CPG_MOD 119>; 2468 power-domains = <&sysc R8A77965_PD_A3VP>; 2469 resets = <&cpg 119>; 2470 renesas,fcp = <&fcpf0>; 2471 }; 2472 2473 fcpf0: fcp@fe950000 { 2474 compatible = "renesas,fcpf"; 2475 reg = <0 0xfe950000 0 0x200>; 2476 clocks = <&cpg CPG_MOD 615>; 2477 power-domains = <&sysc R8A77965_PD_A3VP>; 2478 resets = <&cpg 615>; 2479 }; 2480 2481 vspb: vsp@fe960000 { 2482 compatible = "renesas,vsp2"; 2483 reg = <0 0xfe960000 0 0x8000>; 2484 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2485 clocks = <&cpg CPG_MOD 626>; 2486 power-domains = <&sysc R8A77965_PD_A3VP>; 2487 resets = <&cpg 626>; 2488 2489 renesas,fcp = <&fcpvb0>; 2490 }; 2491 2492 vspi0: vsp@fe9a0000 { 2493 compatible = "renesas,vsp2"; 2494 reg = <0 0xfe9a0000 0 0x8000>; 2495 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2496 clocks = <&cpg CPG_MOD 631>; 2497 power-domains = <&sysc R8A77965_PD_A3VP>; 2498 resets = <&cpg 631>; 2499 2500 renesas,fcp = <&fcpvi0>; 2501 }; 2502 2503 vspd0: vsp@fea20000 { 2504 compatible = "renesas,vsp2"; 2505 reg = <0 0xfea20000 0 0x5000>; 2506 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2507 clocks = <&cpg CPG_MOD 623>; 2508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2509 resets = <&cpg 623>; 2510 2511 renesas,fcp = <&fcpvd0>; 2512 }; 2513 2514 vspd1: vsp@fea28000 { 2515 compatible = "renesas,vsp2"; 2516 reg = <0 0xfea28000 0 0x5000>; 2517 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2518 clocks = <&cpg CPG_MOD 622>; 2519 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2520 resets = <&cpg 622>; 2521 2522 renesas,fcp = <&fcpvd1>; 2523 }; 2524 2525 fcpvb0: fcp@fe96f000 { 2526 compatible = "renesas,fcpv"; 2527 reg = <0 0xfe96f000 0 0x200>; 2528 clocks = <&cpg CPG_MOD 607>; 2529 power-domains = <&sysc R8A77965_PD_A3VP>; 2530 resets = <&cpg 607>; 2531 }; 2532 2533 fcpvd0: fcp@fea27000 { 2534 compatible = "renesas,fcpv"; 2535 reg = <0 0xfea27000 0 0x200>; 2536 clocks = <&cpg CPG_MOD 603>; 2537 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2538 resets = <&cpg 603>; 2539 }; 2540 2541 fcpvd1: fcp@fea2f000 { 2542 compatible = "renesas,fcpv"; 2543 reg = <0 0xfea2f000 0 0x200>; 2544 clocks = <&cpg CPG_MOD 602>; 2545 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2546 resets = <&cpg 602>; 2547 }; 2548 2549 fcpvi0: fcp@fe9af000 { 2550 compatible = "renesas,fcpv"; 2551 reg = <0 0xfe9af000 0 0x200>; 2552 clocks = <&cpg CPG_MOD 611>; 2553 power-domains = <&sysc R8A77965_PD_A3VP>; 2554 resets = <&cpg 611>; 2555 }; 2556 2557 cmm0: cmm@fea40000 { 2558 compatible = "renesas,r8a77965-cmm", 2559 "renesas,rcar-gen3-cmm"; 2560 reg = <0 0xfea40000 0 0x1000>; 2561 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2562 clocks = <&cpg CPG_MOD 711>; 2563 resets = <&cpg 711>; 2564 }; 2565 2566 cmm1: cmm@fea50000 { 2567 compatible = "renesas,r8a77965-cmm", 2568 "renesas,rcar-gen3-cmm"; 2569 reg = <0 0xfea50000 0 0x1000>; 2570 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2571 clocks = <&cpg CPG_MOD 710>; 2572 resets = <&cpg 710>; 2573 }; 2574 2575 cmm3: cmm@fea70000 { 2576 compatible = "renesas,r8a77965-cmm", 2577 "renesas,rcar-gen3-cmm"; 2578 reg = <0 0xfea70000 0 0x1000>; 2579 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2580 clocks = <&cpg CPG_MOD 708>; 2581 resets = <&cpg 708>; 2582 }; 2583 2584 csi20: csi2@fea80000 { 2585 compatible = "renesas,r8a77965-csi2"; 2586 reg = <0 0xfea80000 0 0x10000>; 2587 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2588 clocks = <&cpg CPG_MOD 714>; 2589 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2590 resets = <&cpg 714>; 2591 status = "disabled"; 2592 2593 ports { 2594 #address-cells = <1>; 2595 #size-cells = <0>; 2596 2597 port@0 { 2598 reg = <0>; 2599 }; 2600 2601 port@1 { 2602 #address-cells = <1>; 2603 #size-cells = <0>; 2604 2605 reg = <1>; 2606 2607 csi20vin0: endpoint@0 { 2608 reg = <0>; 2609 remote-endpoint = <&vin0csi20>; 2610 }; 2611 csi20vin1: endpoint@1 { 2612 reg = <1>; 2613 remote-endpoint = <&vin1csi20>; 2614 }; 2615 csi20vin2: endpoint@2 { 2616 reg = <2>; 2617 remote-endpoint = <&vin2csi20>; 2618 }; 2619 csi20vin3: endpoint@3 { 2620 reg = <3>; 2621 remote-endpoint = <&vin3csi20>; 2622 }; 2623 csi20vin4: endpoint@4 { 2624 reg = <4>; 2625 remote-endpoint = <&vin4csi20>; 2626 }; 2627 csi20vin5: endpoint@5 { 2628 reg = <5>; 2629 remote-endpoint = <&vin5csi20>; 2630 }; 2631 csi20vin6: endpoint@6 { 2632 reg = <6>; 2633 remote-endpoint = <&vin6csi20>; 2634 }; 2635 csi20vin7: endpoint@7 { 2636 reg = <7>; 2637 remote-endpoint = <&vin7csi20>; 2638 }; 2639 }; 2640 }; 2641 }; 2642 2643 csi40: csi2@feaa0000 { 2644 compatible = "renesas,r8a77965-csi2"; 2645 reg = <0 0xfeaa0000 0 0x10000>; 2646 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2647 clocks = <&cpg CPG_MOD 716>; 2648 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2649 resets = <&cpg 716>; 2650 status = "disabled"; 2651 2652 ports { 2653 #address-cells = <1>; 2654 #size-cells = <0>; 2655 2656 port@0 { 2657 reg = <0>; 2658 }; 2659 2660 port@1 { 2661 #address-cells = <1>; 2662 #size-cells = <0>; 2663 2664 reg = <1>; 2665 2666 csi40vin0: endpoint@0 { 2667 reg = <0>; 2668 remote-endpoint = <&vin0csi40>; 2669 }; 2670 csi40vin1: endpoint@1 { 2671 reg = <1>; 2672 remote-endpoint = <&vin1csi40>; 2673 }; 2674 csi40vin2: endpoint@2 { 2675 reg = <2>; 2676 remote-endpoint = <&vin2csi40>; 2677 }; 2678 csi40vin3: endpoint@3 { 2679 reg = <3>; 2680 remote-endpoint = <&vin3csi40>; 2681 }; 2682 csi40vin4: endpoint@4 { 2683 reg = <4>; 2684 remote-endpoint = <&vin4csi40>; 2685 }; 2686 csi40vin5: endpoint@5 { 2687 reg = <5>; 2688 remote-endpoint = <&vin5csi40>; 2689 }; 2690 csi40vin6: endpoint@6 { 2691 reg = <6>; 2692 remote-endpoint = <&vin6csi40>; 2693 }; 2694 csi40vin7: endpoint@7 { 2695 reg = <7>; 2696 remote-endpoint = <&vin7csi40>; 2697 }; 2698 }; 2699 }; 2700 }; 2701 2702 hdmi0: hdmi@fead0000 { 2703 compatible = "renesas,r8a77965-hdmi", 2704 "renesas,rcar-gen3-hdmi"; 2705 reg = <0 0xfead0000 0 0x10000>; 2706 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2707 clocks = <&cpg CPG_MOD 729>, 2708 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2709 clock-names = "iahb", "isfr"; 2710 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2711 resets = <&cpg 729>; 2712 status = "disabled"; 2713 2714 ports { 2715 #address-cells = <1>; 2716 #size-cells = <0>; 2717 port@0 { 2718 reg = <0>; 2719 dw_hdmi0_in: endpoint { 2720 remote-endpoint = <&du_out_hdmi0>; 2721 }; 2722 }; 2723 port@1 { 2724 reg = <1>; 2725 }; 2726 }; 2727 }; 2728 2729 du: display@feb00000 { 2730 compatible = "renesas,du-r8a77965"; 2731 reg = <0 0xfeb00000 0 0x80000>; 2732 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2733 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2734 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2735 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2736 <&cpg CPG_MOD 721>; 2737 clock-names = "du.0", "du.1", "du.3"; 2738 resets = <&cpg 724>, <&cpg 722>; 2739 reset-names = "du.0", "du.3"; 2740 2741 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; 2742 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2743 2744 status = "disabled"; 2745 2746 ports { 2747 #address-cells = <1>; 2748 #size-cells = <0>; 2749 2750 port@0 { 2751 reg = <0>; 2752 du_out_rgb: endpoint { 2753 }; 2754 }; 2755 port@1 { 2756 reg = <1>; 2757 du_out_hdmi0: endpoint { 2758 remote-endpoint = <&dw_hdmi0_in>; 2759 }; 2760 }; 2761 port@2 { 2762 reg = <2>; 2763 du_out_lvds0: endpoint { 2764 remote-endpoint = <&lvds0_in>; 2765 }; 2766 }; 2767 }; 2768 }; 2769 2770 lvds0: lvds@feb90000 { 2771 compatible = "renesas,r8a77965-lvds"; 2772 reg = <0 0xfeb90000 0 0x14>; 2773 clocks = <&cpg CPG_MOD 727>; 2774 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2775 resets = <&cpg 727>; 2776 status = "disabled"; 2777 2778 ports { 2779 #address-cells = <1>; 2780 #size-cells = <0>; 2781 2782 port@0 { 2783 reg = <0>; 2784 lvds0_in: endpoint { 2785 remote-endpoint = <&du_out_lvds0>; 2786 }; 2787 }; 2788 port@1 { 2789 reg = <1>; 2790 lvds0_out: endpoint { 2791 }; 2792 }; 2793 }; 2794 }; 2795 2796 prr: chipid@fff00044 { 2797 compatible = "renesas,prr"; 2798 reg = <0 0xfff00044 0 4>; 2799 }; 2800 }; 2801 2802 thermal-zones { 2803 sensor1_thermal: sensor1-thermal { 2804 polling-delay-passive = <250>; 2805 polling-delay = <1000>; 2806 thermal-sensors = <&tsc 0>; 2807 sustainable-power = <2439>; 2808 2809 trips { 2810 sensor1_crit: sensor1-crit { 2811 temperature = <120000>; 2812 hysteresis = <1000>; 2813 type = "critical"; 2814 }; 2815 }; 2816 }; 2817 2818 sensor2_thermal: sensor2-thermal { 2819 polling-delay-passive = <250>; 2820 polling-delay = <1000>; 2821 thermal-sensors = <&tsc 1>; 2822 sustainable-power = <2439>; 2823 2824 trips { 2825 sensor2_crit: sensor2-crit { 2826 temperature = <120000>; 2827 hysteresis = <1000>; 2828 type = "critical"; 2829 }; 2830 }; 2831 }; 2832 2833 sensor3_thermal: sensor3-thermal { 2834 polling-delay-passive = <250>; 2835 polling-delay = <1000>; 2836 thermal-sensors = <&tsc 2>; 2837 sustainable-power = <2439>; 2838 2839 trips { 2840 target: trip-point1 { 2841 /* miliCelsius */ 2842 temperature = <100000>; 2843 hysteresis = <1000>; 2844 type = "passive"; 2845 }; 2846 2847 sensor3_crit: sensor3-crit { 2848 temperature = <120000>; 2849 hysteresis = <1000>; 2850 type = "critical"; 2851 }; 2852 }; 2853 2854 cooling-maps { 2855 map0 { 2856 trip = <&target>; 2857 cooling-device = <&a57_0 2 4>; 2858 contribution = <1024>; 2859 }; 2860 }; 2861 }; 2862 }; 2863 2864 timer { 2865 compatible = "arm,armv8-timer"; 2866 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2867 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2868 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2869 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2870 }; 2871 2872 /* External USB clocks - can be overridden by the board */ 2873 usb3s0_clk: usb3s0 { 2874 compatible = "fixed-clock"; 2875 #clock-cells = <0>; 2876 clock-frequency = <0>; 2877 }; 2878 2879 usb_extal_clk: usb_extal { 2880 compatible = "fixed-clock"; 2881 #clock-cells = <0>; 2882 clock-frequency = <0>; 2883 }; 2884}; 2885