1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a77965 SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I 10 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cpus { 64 #address-cells = <1>; 65 #size-cells = <0>; 66 67 a57_0: cpu@0 { 68 compatible = "arm,cortex-a57", "arm,armv8"; 69 reg = <0x0>; 70 device_type = "cpu"; 71 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 72 next-level-cache = <&L2_CA57>; 73 enable-method = "psci"; 74 }; 75 76 a57_1: cpu@1 { 77 compatible = "arm,cortex-a57", "arm,armv8"; 78 reg = <0x1>; 79 device_type = "cpu"; 80 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 81 next-level-cache = <&L2_CA57>; 82 enable-method = "psci"; 83 }; 84 85 L2_CA57: cache-controller-0 { 86 compatible = "cache"; 87 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 88 cache-unified; 89 cache-level = <2>; 90 }; 91 }; 92 93 extal_clk: extal { 94 compatible = "fixed-clock"; 95 #clock-cells = <0>; 96 /* This value must be overridden by the board */ 97 clock-frequency = <0>; 98 }; 99 100 extalr_clk: extalr { 101 compatible = "fixed-clock"; 102 #clock-cells = <0>; 103 /* This value must be overridden by the board */ 104 clock-frequency = <0>; 105 }; 106 107 /* External PCIe clock - can be overridden by the board */ 108 pcie_bus_clk: pcie_bus { 109 compatible = "fixed-clock"; 110 #clock-cells = <0>; 111 clock-frequency = <0>; 112 }; 113 114 pmu_a57 { 115 compatible = "arm,cortex-a57-pmu"; 116 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 117 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 118 interrupt-affinity = <&a57_0>, 119 <&a57_1>; 120 }; 121 122 psci { 123 compatible = "arm,psci-1.0", "arm,psci-0.2"; 124 method = "smc"; 125 }; 126 127 /* External SCIF clock - to be overridden by boards that provide it */ 128 scif_clk: scif { 129 compatible = "fixed-clock"; 130 #clock-cells = <0>; 131 clock-frequency = <0>; 132 }; 133 134 soc { 135 compatible = "simple-bus"; 136 interrupt-parent = <&gic>; 137 #address-cells = <2>; 138 #size-cells = <2>; 139 ranges; 140 141 wdt0: watchdog@e6020000 { 142 compatible = "renesas,r8a77965-wdt", 143 "renesas,rcar-gen3-wdt"; 144 reg = <0 0xe6020000 0 0x0c>; 145 clocks = <&cpg CPG_MOD 402>; 146 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 147 resets = <&cpg 402>; 148 status = "disabled"; 149 }; 150 151 gpio0: gpio@e6050000 { 152 compatible = "renesas,gpio-r8a77965", 153 "renesas,rcar-gen3-gpio"; 154 reg = <0 0xe6050000 0 0x50>; 155 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 156 #gpio-cells = <2>; 157 gpio-controller; 158 gpio-ranges = <&pfc 0 0 16>; 159 #interrupt-cells = <2>; 160 interrupt-controller; 161 clocks = <&cpg CPG_MOD 912>; 162 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 163 resets = <&cpg 912>; 164 }; 165 166 gpio1: gpio@e6051000 { 167 compatible = "renesas,gpio-r8a77965", 168 "renesas,rcar-gen3-gpio"; 169 reg = <0 0xe6051000 0 0x50>; 170 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 171 #gpio-cells = <2>; 172 gpio-controller; 173 gpio-ranges = <&pfc 0 32 29>; 174 #interrupt-cells = <2>; 175 interrupt-controller; 176 clocks = <&cpg CPG_MOD 911>; 177 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 178 resets = <&cpg 911>; 179 }; 180 181 gpio2: gpio@e6052000 { 182 compatible = "renesas,gpio-r8a77965", 183 "renesas,rcar-gen3-gpio"; 184 reg = <0 0xe6052000 0 0x50>; 185 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 186 #gpio-cells = <2>; 187 gpio-controller; 188 gpio-ranges = <&pfc 0 64 15>; 189 #interrupt-cells = <2>; 190 interrupt-controller; 191 clocks = <&cpg CPG_MOD 910>; 192 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 193 resets = <&cpg 910>; 194 }; 195 196 gpio3: gpio@e6053000 { 197 compatible = "renesas,gpio-r8a77965", 198 "renesas,rcar-gen3-gpio"; 199 reg = <0 0xe6053000 0 0x50>; 200 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 201 #gpio-cells = <2>; 202 gpio-controller; 203 gpio-ranges = <&pfc 0 96 16>; 204 #interrupt-cells = <2>; 205 interrupt-controller; 206 clocks = <&cpg CPG_MOD 909>; 207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 208 resets = <&cpg 909>; 209 }; 210 211 gpio4: gpio@e6054000 { 212 compatible = "renesas,gpio-r8a77965", 213 "renesas,rcar-gen3-gpio"; 214 reg = <0 0xe6054000 0 0x50>; 215 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 216 #gpio-cells = <2>; 217 gpio-controller; 218 gpio-ranges = <&pfc 0 128 18>; 219 #interrupt-cells = <2>; 220 interrupt-controller; 221 clocks = <&cpg CPG_MOD 908>; 222 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 223 resets = <&cpg 908>; 224 }; 225 226 gpio5: gpio@e6055000 { 227 compatible = "renesas,gpio-r8a77965", 228 "renesas,rcar-gen3-gpio"; 229 reg = <0 0xe6055000 0 0x50>; 230 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 231 #gpio-cells = <2>; 232 gpio-controller; 233 gpio-ranges = <&pfc 0 160 26>; 234 #interrupt-cells = <2>; 235 interrupt-controller; 236 clocks = <&cpg CPG_MOD 907>; 237 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 238 resets = <&cpg 907>; 239 }; 240 241 gpio6: gpio@e6055400 { 242 compatible = "renesas,gpio-r8a77965", 243 "renesas,rcar-gen3-gpio"; 244 reg = <0 0xe6055400 0 0x50>; 245 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 246 #gpio-cells = <2>; 247 gpio-controller; 248 gpio-ranges = <&pfc 0 192 32>; 249 #interrupt-cells = <2>; 250 interrupt-controller; 251 clocks = <&cpg CPG_MOD 906>; 252 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 253 resets = <&cpg 906>; 254 }; 255 256 gpio7: gpio@e6055800 { 257 compatible = "renesas,gpio-r8a77965", 258 "renesas,rcar-gen3-gpio"; 259 reg = <0 0xe6055800 0 0x50>; 260 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 261 #gpio-cells = <2>; 262 gpio-controller; 263 gpio-ranges = <&pfc 0 224 4>; 264 #interrupt-cells = <2>; 265 interrupt-controller; 266 clocks = <&cpg CPG_MOD 905>; 267 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 268 resets = <&cpg 905>; 269 }; 270 271 pfc: pin-controller@e6060000 { 272 compatible = "renesas,pfc-r8a77965"; 273 reg = <0 0xe6060000 0 0x50c>; 274 }; 275 276 cpg: clock-controller@e6150000 { 277 compatible = "renesas,r8a77965-cpg-mssr"; 278 reg = <0 0xe6150000 0 0x1000>; 279 clocks = <&extal_clk>, <&extalr_clk>; 280 clock-names = "extal", "extalr"; 281 #clock-cells = <2>; 282 #power-domain-cells = <0>; 283 #reset-cells = <1>; 284 }; 285 286 rst: reset-controller@e6160000 { 287 compatible = "renesas,r8a77965-rst"; 288 reg = <0 0xe6160000 0 0x0200>; 289 }; 290 291 sysc: system-controller@e6180000 { 292 compatible = "renesas,r8a77965-sysc"; 293 reg = <0 0xe6180000 0 0x0400>; 294 #power-domain-cells = <1>; 295 }; 296 297 tsc: thermal@e6198000 { 298 compatible = "renesas,r8a77965-thermal"; 299 reg = <0 0xe6198000 0 0x100>, 300 <0 0xe61a0000 0 0x100>, 301 <0 0xe61a8000 0 0x100>; 302 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 303 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 304 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 305 clocks = <&cpg CPG_MOD 522>; 306 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 307 resets = <&cpg 522>; 308 #thermal-sensor-cells = <1>; 309 status = "okay"; 310 }; 311 312 intc_ex: interrupt-controller@e61c0000 { 313 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 314 #interrupt-cells = <2>; 315 interrupt-controller; 316 reg = <0 0xe61c0000 0 0x200>; 317 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 318 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 319 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 320 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 321 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 322 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 323 clocks = <&cpg CPG_MOD 407>; 324 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 325 resets = <&cpg 407>; 326 }; 327 328 i2c0: i2c@e6500000 { 329 #address-cells = <1>; 330 #size-cells = <0>; 331 compatible = "renesas,i2c-r8a77965", 332 "renesas,rcar-gen3-i2c"; 333 reg = <0 0xe6500000 0 0x40>; 334 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 335 clocks = <&cpg CPG_MOD 931>; 336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 337 resets = <&cpg 931>; 338 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 339 <&dmac2 0x91>, <&dmac2 0x90>; 340 dma-names = "tx", "rx", "tx", "rx"; 341 i2c-scl-internal-delay-ns = <110>; 342 status = "disabled"; 343 }; 344 345 i2c1: i2c@e6508000 { 346 #address-cells = <1>; 347 #size-cells = <0>; 348 compatible = "renesas,i2c-r8a77965", 349 "renesas,rcar-gen3-i2c"; 350 reg = <0 0xe6508000 0 0x40>; 351 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 930>; 353 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 354 resets = <&cpg 930>; 355 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 356 <&dmac2 0x93>, <&dmac2 0x92>; 357 dma-names = "tx", "rx", "tx", "rx"; 358 i2c-scl-internal-delay-ns = <6>; 359 status = "disabled"; 360 }; 361 362 i2c2: i2c@e6510000 { 363 #address-cells = <1>; 364 #size-cells = <0>; 365 compatible = "renesas,i2c-r8a77965", 366 "renesas,rcar-gen3-i2c"; 367 reg = <0 0xe6510000 0 0x40>; 368 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 369 clocks = <&cpg CPG_MOD 929>; 370 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 371 resets = <&cpg 929>; 372 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 373 <&dmac2 0x95>, <&dmac2 0x94>; 374 dma-names = "tx", "rx", "tx", "rx"; 375 i2c-scl-internal-delay-ns = <6>; 376 status = "disabled"; 377 }; 378 379 i2c3: i2c@e66d0000 { 380 #address-cells = <1>; 381 #size-cells = <0>; 382 compatible = "renesas,i2c-r8a77965", 383 "renesas,rcar-gen3-i2c"; 384 reg = <0 0xe66d0000 0 0x40>; 385 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 386 clocks = <&cpg CPG_MOD 928>; 387 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 388 resets = <&cpg 928>; 389 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 390 dma-names = "tx", "rx"; 391 i2c-scl-internal-delay-ns = <110>; 392 status = "disabled"; 393 }; 394 395 i2c4: i2c@e66d8000 { 396 #address-cells = <1>; 397 #size-cells = <0>; 398 compatible = "renesas,i2c-r8a77965", 399 "renesas,rcar-gen3-i2c"; 400 reg = <0 0xe66d8000 0 0x40>; 401 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 402 clocks = <&cpg CPG_MOD 927>; 403 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 404 resets = <&cpg 927>; 405 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 406 dma-names = "tx", "rx"; 407 i2c-scl-internal-delay-ns = <110>; 408 status = "disabled"; 409 }; 410 411 i2c5: i2c@e66e0000 { 412 #address-cells = <1>; 413 #size-cells = <0>; 414 compatible = "renesas,i2c-r8a77965", 415 "renesas,rcar-gen3-i2c"; 416 reg = <0 0xe66e0000 0 0x40>; 417 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 418 clocks = <&cpg CPG_MOD 919>; 419 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 420 resets = <&cpg 919>; 421 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 422 dma-names = "tx", "rx"; 423 i2c-scl-internal-delay-ns = <110>; 424 status = "disabled"; 425 }; 426 427 i2c6: i2c@e66e8000 { 428 #address-cells = <1>; 429 #size-cells = <0>; 430 compatible = "renesas,i2c-r8a77965", 431 "renesas,rcar-gen3-i2c"; 432 reg = <0 0xe66e8000 0 0x40>; 433 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 434 clocks = <&cpg CPG_MOD 918>; 435 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 436 resets = <&cpg 918>; 437 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 438 dma-names = "tx", "rx"; 439 i2c-scl-internal-delay-ns = <6>; 440 status = "disabled"; 441 }; 442 443 i2c_dvfs: i2c@e60b0000 { 444 #address-cells = <1>; 445 #size-cells = <0>; 446 compatible = "renesas,iic-r8a77965", 447 "renesas,rcar-gen3-iic", 448 "renesas,rmobile-iic"; 449 reg = <0 0xe60b0000 0 0x425>; 450 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 451 clocks = <&cpg CPG_MOD 926>; 452 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 453 resets = <&cpg 926>; 454 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 455 dma-names = "tx", "rx"; 456 status = "disabled"; 457 }; 458 459 hscif0: serial@e6540000 { 460 compatible = "renesas,hscif-r8a77965", 461 "renesas,rcar-gen3-hscif", 462 "renesas,hscif"; 463 reg = <0 0xe6540000 0 0x60>; 464 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 465 clocks = <&cpg CPG_MOD 520>, 466 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 467 <&scif_clk>; 468 clock-names = "fck", "brg_int", "scif_clk"; 469 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 470 <&dmac2 0x31>, <&dmac2 0x30>; 471 dma-names = "tx", "rx", "tx", "rx"; 472 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 473 resets = <&cpg 520>; 474 status = "disabled"; 475 }; 476 477 hscif1: serial@e6550000 { 478 compatible = "renesas,hscif-r8a77965", 479 "renesas,rcar-gen3-hscif", 480 "renesas,hscif"; 481 reg = <0 0xe6550000 0 0x60>; 482 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 483 clocks = <&cpg CPG_MOD 519>, 484 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 485 <&scif_clk>; 486 clock-names = "fck", "brg_int", "scif_clk"; 487 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 488 <&dmac2 0x33>, <&dmac2 0x32>; 489 dma-names = "tx", "rx", "tx", "rx"; 490 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 491 resets = <&cpg 519>; 492 status = "disabled"; 493 }; 494 495 hscif2: serial@e6560000 { 496 compatible = "renesas,hscif-r8a77965", 497 "renesas,rcar-gen3-hscif", 498 "renesas,hscif"; 499 reg = <0 0xe6560000 0 0x60>; 500 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 518>, 502 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 503 <&scif_clk>; 504 clock-names = "fck", "brg_int", "scif_clk"; 505 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 506 <&dmac2 0x35>, <&dmac2 0x34>; 507 dma-names = "tx", "rx", "tx", "rx"; 508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 509 resets = <&cpg 518>; 510 status = "disabled"; 511 }; 512 513 hscif3: serial@e66a0000 { 514 compatible = "renesas,hscif-r8a77965", 515 "renesas,rcar-gen3-hscif", 516 "renesas,hscif"; 517 reg = <0 0xe66a0000 0 0x60>; 518 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 519 clocks = <&cpg CPG_MOD 517>, 520 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 521 <&scif_clk>; 522 clock-names = "fck", "brg_int", "scif_clk"; 523 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 524 dma-names = "tx", "rx"; 525 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 526 resets = <&cpg 517>; 527 status = "disabled"; 528 }; 529 530 hscif4: serial@e66b0000 { 531 compatible = "renesas,hscif-r8a77965", 532 "renesas,rcar-gen3-hscif", 533 "renesas,hscif"; 534 reg = <0 0xe66b0000 0 0x60>; 535 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 536 clocks = <&cpg CPG_MOD 516>, 537 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 538 <&scif_clk>; 539 clock-names = "fck", "brg_int", "scif_clk"; 540 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 541 dma-names = "tx", "rx"; 542 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 543 resets = <&cpg 516>; 544 status = "disabled"; 545 }; 546 547 hsusb: usb@e6590000 { 548 compatible = "renesas,usbhs-r8a7796", 549 "renesas,rcar-gen3-usbhs"; 550 reg = <0 0xe6590000 0 0x100>; 551 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 552 clocks = <&cpg CPG_MOD 704>; 553 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 554 <&usb_dmac1 0>, <&usb_dmac1 1>; 555 dma-names = "ch0", "ch1", "ch2", "ch3"; 556 renesas,buswait = <11>; 557 phys = <&usb2_phy0>; 558 phy-names = "usb"; 559 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 560 resets = <&cpg 704>; 561 status = "disabled"; 562 }; 563 564 usb_dmac0: dma-controller@e65a0000 { 565 compatible = "renesas,r8a77965-usb-dmac", 566 "renesas,usb-dmac"; 567 reg = <0 0xe65a0000 0 0x100>; 568 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 569 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 570 interrupt-names = "ch0", "ch1"; 571 clocks = <&cpg CPG_MOD 330>; 572 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 573 resets = <&cpg 330>; 574 #dma-cells = <1>; 575 dma-channels = <2>; 576 }; 577 578 usb_dmac1: dma-controller@e65b0000 { 579 compatible = "renesas,r8a77965-usb-dmac", 580 "renesas,usb-dmac"; 581 reg = <0 0xe65b0000 0 0x100>; 582 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 583 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 584 interrupt-names = "ch0", "ch1"; 585 clocks = <&cpg CPG_MOD 331>; 586 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 587 resets = <&cpg 331>; 588 #dma-cells = <1>; 589 dma-channels = <2>; 590 }; 591 592 usb3_phy0: usb-phy@e65ee000 { 593 compatible = "renesas,r8a77965-usb3-phy", 594 "renesas,rcar-gen3-usb3-phy"; 595 reg = <0 0xe65ee000 0 0x90>; 596 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 597 <&usb_extal_clk>; 598 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 599 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 600 resets = <&cpg 328>; 601 #phy-cells = <0>; 602 status = "disabled"; 603 }; 604 605 dmac0: dma-controller@e6700000 { 606 compatible = "renesas,dmac-r8a77965", 607 "renesas,rcar-dmac"; 608 reg = <0 0xe6700000 0 0x10000>; 609 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 610 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 611 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 612 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 613 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 614 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 615 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 616 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 617 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 618 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 619 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 620 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 621 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 622 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 623 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 624 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 625 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 626 interrupt-names = "error", 627 "ch0", "ch1", "ch2", "ch3", 628 "ch4", "ch5", "ch6", "ch7", 629 "ch8", "ch9", "ch10", "ch11", 630 "ch12", "ch13", "ch14", "ch15"; 631 clocks = <&cpg CPG_MOD 219>; 632 clock-names = "fck"; 633 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 634 resets = <&cpg 219>; 635 #dma-cells = <1>; 636 dma-channels = <16>; 637 }; 638 639 dmac1: dma-controller@e7300000 { 640 compatible = "renesas,dmac-r8a77965", 641 "renesas,rcar-dmac"; 642 reg = <0 0xe7300000 0 0x10000>; 643 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 644 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 645 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 646 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 647 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 648 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 649 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 650 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 651 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 652 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 653 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 654 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 655 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 656 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 657 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 658 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 659 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 660 interrupt-names = "error", 661 "ch0", "ch1", "ch2", "ch3", 662 "ch4", "ch5", "ch6", "ch7", 663 "ch8", "ch9", "ch10", "ch11", 664 "ch12", "ch13", "ch14", "ch15"; 665 clocks = <&cpg CPG_MOD 218>; 666 clock-names = "fck"; 667 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 668 resets = <&cpg 218>; 669 #dma-cells = <1>; 670 dma-channels = <16>; 671 }; 672 673 dmac2: dma-controller@e7310000 { 674 compatible = "renesas,dmac-r8a77965", 675 "renesas,rcar-dmac"; 676 reg = <0 0xe7310000 0 0x10000>; 677 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 678 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 679 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 680 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 681 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 682 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 683 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 684 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 685 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 686 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 687 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 688 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 689 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 690 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 691 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 692 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 693 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 694 interrupt-names = "error", 695 "ch0", "ch1", "ch2", "ch3", 696 "ch4", "ch5", "ch6", "ch7", 697 "ch8", "ch9", "ch10", "ch11", 698 "ch12", "ch13", "ch14", "ch15"; 699 clocks = <&cpg CPG_MOD 217>; 700 clock-names = "fck"; 701 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 702 resets = <&cpg 217>; 703 #dma-cells = <1>; 704 dma-channels = <16>; 705 }; 706 707 avb: ethernet@e6800000 { 708 compatible = "renesas,etheravb-r8a77965", 709 "renesas,etheravb-rcar-gen3"; 710 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 711 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 712 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 713 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 714 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 715 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 716 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 717 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 718 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 719 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 720 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 721 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 722 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 723 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 724 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 725 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 726 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 727 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 728 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 729 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 731 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 732 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 733 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 734 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 735 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 736 interrupt-names = "ch0", "ch1", "ch2", "ch3", 737 "ch4", "ch5", "ch6", "ch7", 738 "ch8", "ch9", "ch10", "ch11", 739 "ch12", "ch13", "ch14", "ch15", 740 "ch16", "ch17", "ch18", "ch19", 741 "ch20", "ch21", "ch22", "ch23", 742 "ch24"; 743 clocks = <&cpg CPG_MOD 812>; 744 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 745 resets = <&cpg 812>; 746 phy-mode = "rgmii"; 747 #address-cells = <1>; 748 #size-cells = <0>; 749 status = "disabled"; 750 }; 751 752 pwm0: pwm@e6e30000 { 753 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 754 reg = <0 0xe6e30000 0 8>; 755 #pwm-cells = <2>; 756 clocks = <&cpg CPG_MOD 523>; 757 resets = <&cpg 523>; 758 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 759 status = "disabled"; 760 }; 761 762 pwm1: pwm@e6e31000 { 763 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 764 reg = <0 0xe6e31000 0 8>; 765 #pwm-cells = <2>; 766 clocks = <&cpg CPG_MOD 523>; 767 resets = <&cpg 523>; 768 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 769 status = "disabled"; 770 }; 771 772 pwm2: pwm@e6e32000 { 773 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 774 reg = <0 0xe6e32000 0 8>; 775 #pwm-cells = <2>; 776 clocks = <&cpg CPG_MOD 523>; 777 resets = <&cpg 523>; 778 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 779 status = "disabled"; 780 }; 781 782 pwm3: pwm@e6e33000 { 783 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 784 reg = <0 0xe6e33000 0 8>; 785 #pwm-cells = <2>; 786 clocks = <&cpg CPG_MOD 523>; 787 resets = <&cpg 523>; 788 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 789 status = "disabled"; 790 }; 791 792 pwm4: pwm@e6e34000 { 793 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 794 reg = <0 0xe6e34000 0 8>; 795 #pwm-cells = <2>; 796 clocks = <&cpg CPG_MOD 523>; 797 resets = <&cpg 523>; 798 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 799 status = "disabled"; 800 }; 801 802 pwm5: pwm@e6e35000 { 803 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 804 reg = <0 0xe6e35000 0 8>; 805 #pwm-cells = <2>; 806 clocks = <&cpg CPG_MOD 523>; 807 resets = <&cpg 523>; 808 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 809 status = "disabled"; 810 }; 811 812 pwm6: pwm@e6e36000 { 813 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 814 reg = <0 0xe6e36000 0 8>; 815 #pwm-cells = <2>; 816 clocks = <&cpg CPG_MOD 523>; 817 resets = <&cpg 523>; 818 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 819 status = "disabled"; 820 }; 821 822 scif0: serial@e6e60000 { 823 compatible = "renesas,scif-r8a77965", 824 "renesas,rcar-gen3-scif", "renesas,scif"; 825 reg = <0 0xe6e60000 0 64>; 826 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 827 clocks = <&cpg CPG_MOD 207>, 828 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 829 <&scif_clk>; 830 clock-names = "fck", "brg_int", "scif_clk"; 831 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 832 <&dmac2 0x51>, <&dmac2 0x50>; 833 dma-names = "tx", "rx", "tx", "rx"; 834 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 835 resets = <&cpg 207>; 836 status = "disabled"; 837 }; 838 839 scif1: serial@e6e68000 { 840 compatible = "renesas,scif-r8a77965", 841 "renesas,rcar-gen3-scif", "renesas,scif"; 842 reg = <0 0xe6e68000 0 64>; 843 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 844 clocks = <&cpg CPG_MOD 206>, 845 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 846 <&scif_clk>; 847 clock-names = "fck", "brg_int", "scif_clk"; 848 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 849 <&dmac2 0x53>, <&dmac2 0x52>; 850 dma-names = "tx", "rx", "tx", "rx"; 851 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 852 resets = <&cpg 206>; 853 status = "disabled"; 854 }; 855 856 scif2: serial@e6e88000 { 857 compatible = "renesas,scif-r8a77965", 858 "renesas,rcar-gen3-scif", "renesas,scif"; 859 reg = <0 0xe6e88000 0 64>; 860 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 861 clocks = <&cpg CPG_MOD 310>, 862 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 863 <&scif_clk>; 864 clock-names = "fck", "brg_int", "scif_clk"; 865 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 866 resets = <&cpg 310>; 867 status = "disabled"; 868 }; 869 870 scif3: serial@e6c50000 { 871 compatible = "renesas,scif-r8a77965", 872 "renesas,rcar-gen3-scif", "renesas,scif"; 873 reg = <0 0xe6c50000 0 64>; 874 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 875 clocks = <&cpg CPG_MOD 204>, 876 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 877 <&scif_clk>; 878 clock-names = "fck", "brg_int", "scif_clk"; 879 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 880 dma-names = "tx", "rx"; 881 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 882 resets = <&cpg 204>; 883 status = "disabled"; 884 }; 885 886 scif4: serial@e6c40000 { 887 compatible = "renesas,scif-r8a77965", 888 "renesas,rcar-gen3-scif", "renesas,scif"; 889 reg = <0 0xe6c40000 0 64>; 890 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 891 clocks = <&cpg CPG_MOD 203>, 892 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 893 <&scif_clk>; 894 clock-names = "fck", "brg_int", "scif_clk"; 895 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 896 dma-names = "tx", "rx"; 897 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 898 resets = <&cpg 203>; 899 status = "disabled"; 900 }; 901 902 scif5: serial@e6f30000 { 903 compatible = "renesas,scif-r8a77965", 904 "renesas,rcar-gen3-scif", "renesas,scif"; 905 reg = <0 0xe6f30000 0 64>; 906 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 907 clocks = <&cpg CPG_MOD 202>, 908 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 909 <&scif_clk>; 910 clock-names = "fck", "brg_int", "scif_clk"; 911 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 912 <&dmac2 0x5b>, <&dmac2 0x5a>; 913 dma-names = "tx", "rx", "tx", "rx"; 914 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 915 resets = <&cpg 202>; 916 status = "disabled"; 917 }; 918 919 msiof0: spi@e6e90000 { 920 compatible = "renesas,msiof-r8a77965", 921 "renesas,rcar-gen3-msiof"; 922 reg = <0 0xe6e90000 0 0x0064>; 923 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 924 clocks = <&cpg CPG_MOD 211>; 925 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 926 <&dmac2 0x41>, <&dmac2 0x40>; 927 dma-names = "tx", "rx", "tx", "rx"; 928 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 929 resets = <&cpg 211>; 930 #address-cells = <1>; 931 #size-cells = <0>; 932 status = "disabled"; 933 }; 934 935 msiof1: spi@e6ea0000 { 936 compatible = "renesas,msiof-r8a77965", 937 "renesas,rcar-gen3-msiof"; 938 reg = <0 0xe6ea0000 0 0x0064>; 939 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 940 clocks = <&cpg CPG_MOD 210>; 941 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 942 <&dmac2 0x43>, <&dmac2 0x42>; 943 dma-names = "tx", "rx", "tx", "rx"; 944 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 945 resets = <&cpg 210>; 946 #address-cells = <1>; 947 #size-cells = <0>; 948 status = "disabled"; 949 }; 950 951 msiof2: spi@e6c00000 { 952 compatible = "renesas,msiof-r8a77965", 953 "renesas,rcar-gen3-msiof"; 954 reg = <0 0xe6c00000 0 0x0064>; 955 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 956 clocks = <&cpg CPG_MOD 209>; 957 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 958 dma-names = "tx", "rx"; 959 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 960 resets = <&cpg 209>; 961 #address-cells = <1>; 962 #size-cells = <0>; 963 status = "disabled"; 964 }; 965 966 msiof3: spi@e6c10000 { 967 compatible = "renesas,msiof-r8a77965", 968 "renesas,rcar-gen3-msiof"; 969 reg = <0 0xe6c10000 0 0x0064>; 970 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 971 clocks = <&cpg CPG_MOD 208>; 972 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 973 dma-names = "tx", "rx"; 974 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 975 resets = <&cpg 208>; 976 #address-cells = <1>; 977 #size-cells = <0>; 978 status = "disabled"; 979 }; 980 981 vin0: video@e6ef0000 { 982 compatible = "renesas,vin-r8a77965"; 983 reg = <0 0xe6ef0000 0 0x1000>; 984 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 985 clocks = <&cpg CPG_MOD 811>; 986 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 987 resets = <&cpg 811>; 988 renesas,id = <0>; 989 status = "disabled"; 990 991 ports { 992 #address-cells = <1>; 993 #size-cells = <0>; 994 995 port@1 { 996 #address-cells = <1>; 997 #size-cells = <0>; 998 999 reg = <1>; 1000 1001 vin0csi20: endpoint@0 { 1002 reg = <0>; 1003 remote-endpoint= <&csi20vin0>; 1004 }; 1005 vin0csi40: endpoint@2 { 1006 reg = <2>; 1007 remote-endpoint= <&csi40vin0>; 1008 }; 1009 }; 1010 }; 1011 }; 1012 1013 vin1: video@e6ef1000 { 1014 compatible = "renesas,vin-r8a77965"; 1015 reg = <0 0xe6ef1000 0 0x1000>; 1016 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1017 clocks = <&cpg CPG_MOD 810>; 1018 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1019 resets = <&cpg 810>; 1020 renesas,id = <1>; 1021 status = "disabled"; 1022 1023 ports { 1024 #address-cells = <1>; 1025 #size-cells = <0>; 1026 1027 port@1 { 1028 #address-cells = <1>; 1029 #size-cells = <0>; 1030 1031 reg = <1>; 1032 1033 vin1csi20: endpoint@0 { 1034 reg = <0>; 1035 remote-endpoint= <&csi20vin1>; 1036 }; 1037 vin1csi40: endpoint@2 { 1038 reg = <2>; 1039 remote-endpoint= <&csi40vin1>; 1040 }; 1041 }; 1042 }; 1043 }; 1044 1045 vin2: video@e6ef2000 { 1046 compatible = "renesas,vin-r8a77965"; 1047 reg = <0 0xe6ef2000 0 0x1000>; 1048 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1049 clocks = <&cpg CPG_MOD 809>; 1050 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1051 resets = <&cpg 809>; 1052 renesas,id = <2>; 1053 status = "disabled"; 1054 1055 ports { 1056 #address-cells = <1>; 1057 #size-cells = <0>; 1058 1059 port@1 { 1060 #address-cells = <1>; 1061 #size-cells = <0>; 1062 1063 reg = <1>; 1064 1065 vin2csi20: endpoint@0 { 1066 reg = <0>; 1067 remote-endpoint= <&csi20vin2>; 1068 }; 1069 vin2csi40: endpoint@2 { 1070 reg = <2>; 1071 remote-endpoint= <&csi40vin2>; 1072 }; 1073 }; 1074 }; 1075 }; 1076 1077 vin3: video@e6ef3000 { 1078 compatible = "renesas,vin-r8a77965"; 1079 reg = <0 0xe6ef3000 0 0x1000>; 1080 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1081 clocks = <&cpg CPG_MOD 808>; 1082 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1083 resets = <&cpg 808>; 1084 renesas,id = <3>; 1085 status = "disabled"; 1086 1087 ports { 1088 #address-cells = <1>; 1089 #size-cells = <0>; 1090 1091 port@1 { 1092 #address-cells = <1>; 1093 #size-cells = <0>; 1094 1095 reg = <1>; 1096 1097 vin3csi20: endpoint@0 { 1098 reg = <0>; 1099 remote-endpoint= <&csi20vin3>; 1100 }; 1101 vin3csi40: endpoint@2 { 1102 reg = <2>; 1103 remote-endpoint= <&csi40vin3>; 1104 }; 1105 }; 1106 }; 1107 }; 1108 1109 vin4: video@e6ef4000 { 1110 compatible = "renesas,vin-r8a77965"; 1111 reg = <0 0xe6ef4000 0 0x1000>; 1112 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1113 clocks = <&cpg CPG_MOD 807>; 1114 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1115 resets = <&cpg 807>; 1116 renesas,id = <4>; 1117 status = "disabled"; 1118 1119 ports { 1120 #address-cells = <1>; 1121 #size-cells = <0>; 1122 1123 port@1 { 1124 #address-cells = <1>; 1125 #size-cells = <0>; 1126 1127 reg = <1>; 1128 1129 vin4csi20: endpoint@0 { 1130 reg = <0>; 1131 remote-endpoint= <&csi20vin4>; 1132 }; 1133 vin4csi40: endpoint@2 { 1134 reg = <2>; 1135 remote-endpoint= <&csi40vin4>; 1136 }; 1137 }; 1138 }; 1139 }; 1140 1141 vin5: video@e6ef5000 { 1142 compatible = "renesas,vin-r8a77965"; 1143 reg = <0 0xe6ef5000 0 0x1000>; 1144 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1145 clocks = <&cpg CPG_MOD 806>; 1146 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1147 resets = <&cpg 806>; 1148 renesas,id = <5>; 1149 status = "disabled"; 1150 1151 ports { 1152 #address-cells = <1>; 1153 #size-cells = <0>; 1154 1155 port@1 { 1156 #address-cells = <1>; 1157 #size-cells = <0>; 1158 1159 reg = <1>; 1160 1161 vin5csi20: endpoint@0 { 1162 reg = <0>; 1163 remote-endpoint= <&csi20vin5>; 1164 }; 1165 vin5csi40: endpoint@2 { 1166 reg = <2>; 1167 remote-endpoint= <&csi40vin5>; 1168 }; 1169 }; 1170 }; 1171 }; 1172 1173 vin6: video@e6ef6000 { 1174 compatible = "renesas,vin-r8a77965"; 1175 reg = <0 0xe6ef6000 0 0x1000>; 1176 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1177 clocks = <&cpg CPG_MOD 805>; 1178 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1179 resets = <&cpg 805>; 1180 renesas,id = <6>; 1181 status = "disabled"; 1182 1183 ports { 1184 #address-cells = <1>; 1185 #size-cells = <0>; 1186 1187 port@1 { 1188 #address-cells = <1>; 1189 #size-cells = <0>; 1190 1191 reg = <1>; 1192 1193 vin6csi20: endpoint@0 { 1194 reg = <0>; 1195 remote-endpoint= <&csi20vin6>; 1196 }; 1197 vin6csi40: endpoint@2 { 1198 reg = <2>; 1199 remote-endpoint= <&csi40vin6>; 1200 }; 1201 }; 1202 }; 1203 }; 1204 1205 vin7: video@e6ef7000 { 1206 compatible = "renesas,vin-r8a77965"; 1207 reg = <0 0xe6ef7000 0 0x1000>; 1208 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1209 clocks = <&cpg CPG_MOD 804>; 1210 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1211 resets = <&cpg 804>; 1212 renesas,id = <7>; 1213 status = "disabled"; 1214 1215 ports { 1216 #address-cells = <1>; 1217 #size-cells = <0>; 1218 1219 port@1 { 1220 #address-cells = <1>; 1221 #size-cells = <0>; 1222 1223 reg = <1>; 1224 1225 vin7csi20: endpoint@0 { 1226 reg = <0>; 1227 remote-endpoint= <&csi20vin7>; 1228 }; 1229 vin7csi40: endpoint@2 { 1230 reg = <2>; 1231 remote-endpoint= <&csi40vin7>; 1232 }; 1233 }; 1234 }; 1235 }; 1236 1237 rcar_sound: sound@ec500000 { 1238 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1239 <0 0xec5a0000 0 0x100>, /* ADG */ 1240 <0 0xec540000 0 0x1000>, /* SSIU */ 1241 <0 0xec541000 0 0x280>, /* SSI */ 1242 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1243 /* placeholder */ 1244 1245 rcar_sound,dvc { 1246 dvc0: dvc-0 { 1247 }; 1248 dvc1: dvc-1 { 1249 }; 1250 }; 1251 1252 rcar_sound,src { 1253 src0: src-0 { 1254 }; 1255 src1: src-1 { 1256 }; 1257 }; 1258 1259 rcar_sound,ssi { 1260 ssi0: ssi-0 { 1261 }; 1262 ssi1: ssi-1 { 1263 }; 1264 }; 1265 1266 ports { 1267 #address-cells = <1>; 1268 #size-cells = <0>; 1269 port@0 { 1270 reg = <0>; 1271 }; 1272 }; 1273 }; 1274 1275 xhci0: usb@ee000000 { 1276 compatible = "renesas,xhci-r8a77965", 1277 "renesas,rcar-gen3-xhci"; 1278 reg = <0 0xee000000 0 0xc00>; 1279 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1280 clocks = <&cpg CPG_MOD 328>; 1281 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1282 resets = <&cpg 328>; 1283 status = "disabled"; 1284 }; 1285 1286 usb3_peri0: usb@ee020000 { 1287 compatible = "renesas,r8a77965-usb3-peri", 1288 "renesas,rcar-gen3-usb3-peri"; 1289 reg = <0 0xee020000 0 0x400>; 1290 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1291 clocks = <&cpg CPG_MOD 328>; 1292 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1293 resets = <&cpg 328>; 1294 status = "disabled"; 1295 }; 1296 1297 ohci0: usb@ee080000 { 1298 compatible = "generic-ohci"; 1299 reg = <0 0xee080000 0 0x100>; 1300 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1301 clocks = <&cpg CPG_MOD 703>; 1302 phys = <&usb2_phy0>; 1303 phy-names = "usb"; 1304 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1305 resets = <&cpg 703>; 1306 status = "disabled"; 1307 }; 1308 1309 ohci1: usb@ee0a0000 { 1310 compatible = "generic-ohci"; 1311 reg = <0 0xee0a0000 0 0x100>; 1312 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1313 clocks = <&cpg CPG_MOD 702>; 1314 phys = <&usb2_phy1>; 1315 phy-names = "usb"; 1316 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1317 resets = <&cpg 702>; 1318 status = "disabled"; 1319 }; 1320 1321 ehci0: usb@ee080100 { 1322 compatible = "generic-ehci"; 1323 reg = <0 0xee080100 0 0x100>; 1324 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1325 clocks = <&cpg CPG_MOD 703>; 1326 phys = <&usb2_phy0>; 1327 phy-names = "usb"; 1328 companion = <&ohci0>; 1329 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1330 resets = <&cpg 703>; 1331 status = "disabled"; 1332 }; 1333 1334 ehci1: usb@ee0a0100 { 1335 compatible = "generic-ehci"; 1336 reg = <0 0xee0a0100 0 0x100>; 1337 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1338 clocks = <&cpg CPG_MOD 702>; 1339 phys = <&usb2_phy1>; 1340 phy-names = "usb"; 1341 companion = <&ohci1>; 1342 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1343 resets = <&cpg 702>; 1344 status = "disabled"; 1345 }; 1346 1347 usb2_phy0: usb-phy@ee080200 { 1348 compatible = "renesas,usb2-phy-r8a77965", 1349 "renesas,rcar-gen3-usb2-phy"; 1350 reg = <0 0xee080200 0 0x700>; 1351 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1352 clocks = <&cpg CPG_MOD 703>; 1353 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1354 resets = <&cpg 703>; 1355 #phy-cells = <0>; 1356 status = "disabled"; 1357 }; 1358 1359 usb2_phy1: usb-phy@ee0a0200 { 1360 compatible = "renesas,usb2-phy-r8a77965", 1361 "renesas,rcar-gen3-usb2-phy"; 1362 reg = <0 0xee0a0200 0 0x700>; 1363 clocks = <&cpg CPG_MOD 703>; 1364 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1365 resets = <&cpg 703>; 1366 #phy-cells = <0>; 1367 status = "disabled"; 1368 }; 1369 1370 sdhi0: sd@ee100000 { 1371 compatible = "renesas,sdhi-r8a77965", 1372 "renesas,rcar-gen3-sdhi"; 1373 reg = <0 0xee100000 0 0x2000>; 1374 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1375 clocks = <&cpg CPG_MOD 314>; 1376 max-frequency = <200000000>; 1377 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1378 resets = <&cpg 314>; 1379 status = "disabled"; 1380 }; 1381 1382 sdhi1: sd@ee120000 { 1383 compatible = "renesas,sdhi-r8a77965", 1384 "renesas,rcar-gen3-sdhi"; 1385 reg = <0 0xee120000 0 0x2000>; 1386 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1387 clocks = <&cpg CPG_MOD 313>; 1388 max-frequency = <200000000>; 1389 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1390 resets = <&cpg 313>; 1391 status = "disabled"; 1392 }; 1393 1394 sdhi2: sd@ee140000 { 1395 compatible = "renesas,sdhi-r8a77965", 1396 "renesas,rcar-gen3-sdhi"; 1397 reg = <0 0xee140000 0 0x2000>; 1398 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1399 clocks = <&cpg CPG_MOD 312>; 1400 max-frequency = <200000000>; 1401 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1402 resets = <&cpg 312>; 1403 status = "disabled"; 1404 }; 1405 1406 sdhi3: sd@ee160000 { 1407 compatible = "renesas,sdhi-r8a77965", 1408 "renesas,rcar-gen3-sdhi"; 1409 reg = <0 0xee160000 0 0x2000>; 1410 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1411 clocks = <&cpg CPG_MOD 311>; 1412 max-frequency = <200000000>; 1413 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1414 resets = <&cpg 311>; 1415 status = "disabled"; 1416 }; 1417 1418 gic: interrupt-controller@f1010000 { 1419 compatible = "arm,gic-400"; 1420 #interrupt-cells = <3>; 1421 #address-cells = <0>; 1422 interrupt-controller; 1423 reg = <0x0 0xf1010000 0 0x1000>, 1424 <0x0 0xf1020000 0 0x20000>, 1425 <0x0 0xf1040000 0 0x20000>, 1426 <0x0 0xf1060000 0 0x20000>; 1427 interrupts = <GIC_PPI 9 1428 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1429 clocks = <&cpg CPG_MOD 408>; 1430 clock-names = "clk"; 1431 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1432 resets = <&cpg 408>; 1433 }; 1434 1435 pciec0: pcie@fe000000 { 1436 compatible = "renesas,pcie-r8a77965", 1437 "renesas,pcie-rcar-gen3"; 1438 reg = <0 0xfe000000 0 0x80000>; 1439 #address-cells = <3>; 1440 #size-cells = <2>; 1441 bus-range = <0x00 0xff>; 1442 device_type = "pci"; 1443 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1444 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1445 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1446 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1447 /* Map all possible DDR as inbound ranges */ 1448 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1449 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1450 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1451 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1452 #interrupt-cells = <1>; 1453 interrupt-map-mask = <0 0 0 0>; 1454 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1455 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1456 clock-names = "pcie", "pcie_bus"; 1457 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1458 resets = <&cpg 319>; 1459 status = "disabled"; 1460 }; 1461 1462 pciec1: pcie@ee800000 { 1463 compatible = "renesas,pcie-r8a77965", 1464 "renesas,pcie-rcar-gen3"; 1465 reg = <0 0xee800000 0 0x80000>; 1466 #address-cells = <3>; 1467 #size-cells = <2>; 1468 bus-range = <0x00 0xff>; 1469 device_type = "pci"; 1470 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 1471 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 1472 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 1473 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 1474 /* Map all possible DDR as inbound ranges */ 1475 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1476 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 1477 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 1478 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 1479 #interrupt-cells = <1>; 1480 interrupt-map-mask = <0 0 0 0>; 1481 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1482 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 1483 clock-names = "pcie", "pcie_bus"; 1484 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1485 resets = <&cpg 318>; 1486 status = "disabled"; 1487 }; 1488 1489 fcpf0: fcp@fe950000 { 1490 compatible = "renesas,fcpf"; 1491 reg = <0 0xfe950000 0 0x200>; 1492 clocks = <&cpg CPG_MOD 615>; 1493 power-domains = <&sysc R8A77965_PD_A3VP>; 1494 resets = <&cpg 615>; 1495 }; 1496 1497 vspb: vsp@fe960000 { 1498 compatible = "renesas,vsp2"; 1499 reg = <0 0xfe960000 0 0x8000>; 1500 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1501 clocks = <&cpg CPG_MOD 626>; 1502 power-domains = <&sysc R8A77965_PD_A3VP>; 1503 resets = <&cpg 626>; 1504 1505 renesas,fcp = <&fcpvb0>; 1506 }; 1507 1508 fcpvb0: fcp@fe96f000 { 1509 compatible = "renesas,fcpv"; 1510 reg = <0 0xfe96f000 0 0x200>; 1511 clocks = <&cpg CPG_MOD 607>; 1512 power-domains = <&sysc R8A77965_PD_A3VP>; 1513 resets = <&cpg 607>; 1514 }; 1515 1516 vspi0: vsp@fe9a0000 { 1517 compatible = "renesas,vsp2"; 1518 reg = <0 0xfe9a0000 0 0x8000>; 1519 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1520 clocks = <&cpg CPG_MOD 631>; 1521 power-domains = <&sysc R8A77965_PD_A3VP>; 1522 resets = <&cpg 631>; 1523 1524 renesas,fcp = <&fcpvi0>; 1525 }; 1526 1527 fcpvi0: fcp@fe9af000 { 1528 compatible = "renesas,fcpv"; 1529 reg = <0 0xfe9af000 0 0x200>; 1530 clocks = <&cpg CPG_MOD 611>; 1531 power-domains = <&sysc R8A77965_PD_A3VP>; 1532 resets = <&cpg 611>; 1533 }; 1534 1535 vspd0: vsp@fea20000 { 1536 compatible = "renesas,vsp2"; 1537 reg = <0 0xfea20000 0 0x5000>; 1538 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1539 clocks = <&cpg CPG_MOD 623>; 1540 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1541 resets = <&cpg 623>; 1542 1543 renesas,fcp = <&fcpvd0>; 1544 }; 1545 1546 fcpvd0: fcp@fea27000 { 1547 compatible = "renesas,fcpv"; 1548 reg = <0 0xfea27000 0 0x200>; 1549 clocks = <&cpg CPG_MOD 603>; 1550 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1551 resets = <&cpg 603>; 1552 }; 1553 1554 vspd1: vsp@fea28000 { 1555 compatible = "renesas,vsp2"; 1556 reg = <0 0xfea28000 0 0x5000>; 1557 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1558 clocks = <&cpg CPG_MOD 622>; 1559 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1560 resets = <&cpg 622>; 1561 1562 renesas,fcp = <&fcpvd1>; 1563 }; 1564 1565 fcpvd1: fcp@fea2f000 { 1566 compatible = "renesas,fcpv"; 1567 reg = <0 0xfea2f000 0 0x200>; 1568 clocks = <&cpg CPG_MOD 602>; 1569 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1570 resets = <&cpg 602>; 1571 }; 1572 1573 csi20: csi2@fea80000 { 1574 compatible = "renesas,r8a77965-csi2"; 1575 reg = <0 0xfea80000 0 0x10000>; 1576 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1577 clocks = <&cpg CPG_MOD 714>; 1578 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1579 resets = <&cpg 714>; 1580 status = "disabled"; 1581 1582 ports { 1583 #address-cells = <1>; 1584 #size-cells = <0>; 1585 1586 port@1 { 1587 #address-cells = <1>; 1588 #size-cells = <0>; 1589 1590 reg = <1>; 1591 1592 csi20vin0: endpoint@0 { 1593 reg = <0>; 1594 remote-endpoint = <&vin0csi20>; 1595 }; 1596 csi20vin1: endpoint@1 { 1597 reg = <1>; 1598 remote-endpoint = <&vin1csi20>; 1599 }; 1600 csi20vin2: endpoint@2 { 1601 reg = <2>; 1602 remote-endpoint = <&vin2csi20>; 1603 }; 1604 csi20vin3: endpoint@3 { 1605 reg = <3>; 1606 remote-endpoint = <&vin3csi20>; 1607 }; 1608 csi20vin4: endpoint@4 { 1609 reg = <4>; 1610 remote-endpoint = <&vin4csi20>; 1611 }; 1612 csi20vin5: endpoint@5 { 1613 reg = <5>; 1614 remote-endpoint = <&vin5csi20>; 1615 }; 1616 csi20vin6: endpoint@6 { 1617 reg = <6>; 1618 remote-endpoint = <&vin6csi20>; 1619 }; 1620 csi20vin7: endpoint@7 { 1621 reg = <7>; 1622 remote-endpoint = <&vin7csi20>; 1623 }; 1624 }; 1625 }; 1626 }; 1627 1628 csi40: csi2@feaa0000 { 1629 compatible = "renesas,r8a77965-csi2"; 1630 reg = <0 0xfeaa0000 0 0x10000>; 1631 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1632 clocks = <&cpg CPG_MOD 716>; 1633 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1634 resets = <&cpg 716>; 1635 status = "disabled"; 1636 1637 ports { 1638 #address-cells = <1>; 1639 #size-cells = <0>; 1640 1641 port@1 { 1642 #address-cells = <1>; 1643 #size-cells = <0>; 1644 1645 reg = <1>; 1646 1647 csi40vin0: endpoint@0 { 1648 reg = <0>; 1649 remote-endpoint = <&vin0csi40>; 1650 }; 1651 csi40vin1: endpoint@1 { 1652 reg = <1>; 1653 remote-endpoint = <&vin1csi40>; 1654 }; 1655 csi40vin2: endpoint@2 { 1656 reg = <2>; 1657 remote-endpoint = <&vin2csi40>; 1658 }; 1659 csi40vin3: endpoint@3 { 1660 reg = <3>; 1661 remote-endpoint = <&vin3csi40>; 1662 }; 1663 csi40vin4: endpoint@4 { 1664 reg = <4>; 1665 remote-endpoint = <&vin4csi40>; 1666 }; 1667 csi40vin5: endpoint@5 { 1668 reg = <5>; 1669 remote-endpoint = <&vin5csi40>; 1670 }; 1671 csi40vin6: endpoint@6 { 1672 reg = <6>; 1673 remote-endpoint = <&vin6csi40>; 1674 }; 1675 csi40vin7: endpoint@7 { 1676 reg = <7>; 1677 remote-endpoint = <&vin7csi40>; 1678 }; 1679 }; 1680 }; 1681 }; 1682 1683 hdmi0: hdmi@fead0000 { 1684 compatible = "renesas,r8a77965-hdmi", 1685 "renesas,rcar-gen3-hdmi"; 1686 reg = <0 0xfead0000 0 0x10000>; 1687 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 1688 clocks = <&cpg CPG_MOD 729>, 1689 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 1690 clock-names = "iahb", "isfr"; 1691 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1692 resets = <&cpg 729>; 1693 status = "disabled"; 1694 1695 ports { 1696 #address-cells = <1>; 1697 #size-cells = <0>; 1698 port@0 { 1699 reg = <0>; 1700 dw_hdmi0_in: endpoint { 1701 remote-endpoint = <&du_out_hdmi0>; 1702 }; 1703 }; 1704 port@1 { 1705 reg = <1>; 1706 }; 1707 }; 1708 }; 1709 1710 du: display@feb00000 { 1711 compatible = "renesas,du-r8a77965"; 1712 reg = <0 0xfeb00000 0 0x80000>; 1713 reg-names = "du"; 1714 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1715 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 1716 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 1717 clocks = <&cpg CPG_MOD 724>, 1718 <&cpg CPG_MOD 723>, 1719 <&cpg CPG_MOD 721>; 1720 clock-names = "du.0", "du.1", "du.3"; 1721 status = "disabled"; 1722 1723 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; 1724 1725 ports { 1726 #address-cells = <1>; 1727 #size-cells = <0>; 1728 1729 port@0 { 1730 reg = <0>; 1731 du_out_rgb: endpoint { 1732 }; 1733 }; 1734 port@1 { 1735 reg = <1>; 1736 du_out_hdmi0: endpoint { 1737 remote-endpoint = <&dw_hdmi0_in>; 1738 }; 1739 }; 1740 port@2 { 1741 reg = <2>; 1742 du_out_lvds0: endpoint { 1743 }; 1744 }; 1745 }; 1746 }; 1747 1748 prr: chipid@fff00044 { 1749 compatible = "renesas,prr"; 1750 reg = <0 0xfff00044 0 4>; 1751 }; 1752 }; 1753 1754 timer { 1755 compatible = "arm,armv8-timer"; 1756 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1757 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1758 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1759 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1760 }; 1761 1762 thermal-zones { 1763 sensor_thermal1: sensor-thermal1 { 1764 polling-delay-passive = <250>; 1765 polling-delay = <1000>; 1766 thermal-sensors = <&tsc 0>; 1767 1768 trips { 1769 sensor1_crit: sensor1-crit { 1770 temperature = <120000>; 1771 hysteresis = <1000>; 1772 type = "critical"; 1773 }; 1774 }; 1775 }; 1776 1777 sensor_thermal2: sensor-thermal2 { 1778 polling-delay-passive = <250>; 1779 polling-delay = <1000>; 1780 thermal-sensors = <&tsc 1>; 1781 1782 trips { 1783 sensor2_crit: sensor2-crit { 1784 temperature = <120000>; 1785 hysteresis = <1000>; 1786 type = "critical"; 1787 }; 1788 }; 1789 }; 1790 1791 sensor_thermal3: sensor-thermal3 { 1792 polling-delay-passive = <250>; 1793 polling-delay = <1000>; 1794 thermal-sensors = <&tsc 2>; 1795 1796 trips { 1797 sensor3_crit: sensor3-crit { 1798 temperature = <120000>; 1799 hysteresis = <1000>; 1800 type = "critical"; 1801 }; 1802 }; 1803 }; 1804 }; 1805 1806 /* External USB clocks - can be overridden by the board */ 1807 usb3s0_clk: usb3s0 { 1808 compatible = "fixed-clock"; 1809 #clock-cells = <0>; 1810 clock-frequency = <0>; 1811 }; 1812 1813 usb_extal_clk: usb_extal { 1814 compatible = "fixed-clock"; 1815 #clock-cells = <0>; 1816 clock-frequency = <0>; 1817 }; 1818}; 1819