1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7796-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a7796"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c_dvfs; 28 }; 29 30 /* 31 * The external audio clocks are configured as 0 Hz fixed frequency 32 * clocks by default. 33 * Boards that provide audio clocks should override them. 34 */ 35 audio_clk_a: audio_clk_a { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 audio_clk_b: audio_clk_b { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 audio_clk_c: audio_clk_c { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 51 }; 52 53 /* External CAN clock - to be overridden by boards that provide it */ 54 can_clk: can { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 cluster0_opp: opp-table-0 { 61 compatible = "operating-points-v2"; 62 opp-shared; 63 64 opp-500000000 { 65 opp-hz = /bits/ 64 <500000000>; 66 opp-microvolt = <830000>; 67 clock-latency-ns = <300000>; 68 }; 69 opp-1000000000 { 70 opp-hz = /bits/ 64 <1000000000>; 71 opp-microvolt = <830000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1500000000 { 75 opp-hz = /bits/ 64 <1500000000>; 76 opp-microvolt = <830000>; 77 clock-latency-ns = <300000>; 78 opp-suspend; 79 }; 80 opp-1600000000 { 81 opp-hz = /bits/ 64 <1600000000>; 82 opp-microvolt = <900000>; 83 clock-latency-ns = <300000>; 84 turbo-mode; 85 }; 86 opp-1700000000 { 87 opp-hz = /bits/ 64 <1700000000>; 88 opp-microvolt = <900000>; 89 clock-latency-ns = <300000>; 90 turbo-mode; 91 }; 92 opp-1800000000 { 93 opp-hz = /bits/ 64 <1800000000>; 94 opp-microvolt = <960000>; 95 clock-latency-ns = <300000>; 96 turbo-mode; 97 }; 98 }; 99 100 cluster1_opp: opp-table-1 { 101 compatible = "operating-points-v2"; 102 opp-shared; 103 104 opp-800000000 { 105 opp-hz = /bits/ 64 <800000000>; 106 opp-microvolt = <820000>; 107 clock-latency-ns = <300000>; 108 }; 109 opp-1000000000 { 110 opp-hz = /bits/ 64 <1000000000>; 111 opp-microvolt = <820000>; 112 clock-latency-ns = <300000>; 113 }; 114 opp-1200000000 { 115 opp-hz = /bits/ 64 <1200000000>; 116 opp-microvolt = <820000>; 117 clock-latency-ns = <300000>; 118 }; 119 opp-1300000000 { 120 opp-hz = /bits/ 64 <1300000000>; 121 opp-microvolt = <820000>; 122 clock-latency-ns = <300000>; 123 turbo-mode; 124 }; 125 }; 126 127 cpus { 128 #address-cells = <1>; 129 #size-cells = <0>; 130 131 cpu-map { 132 cluster0 { 133 core0 { 134 cpu = <&a57_0>; 135 }; 136 core1 { 137 cpu = <&a57_1>; 138 }; 139 }; 140 141 cluster1 { 142 core0 { 143 cpu = <&a53_0>; 144 }; 145 core1 { 146 cpu = <&a53_1>; 147 }; 148 core2 { 149 cpu = <&a53_2>; 150 }; 151 core3 { 152 cpu = <&a53_3>; 153 }; 154 }; 155 }; 156 157 a57_0: cpu@0 { 158 compatible = "arm,cortex-a57"; 159 reg = <0x0>; 160 device_type = "cpu"; 161 power-domains = <&sysc R8A7796_PD_CA57_CPU0>; 162 next-level-cache = <&L2_CA57>; 163 enable-method = "psci"; 164 cpu-idle-states = <&CPU_SLEEP_0>; 165 dynamic-power-coefficient = <854>; 166 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 167 operating-points-v2 = <&cluster0_opp>; 168 capacity-dmips-mhz = <1024>; 169 #cooling-cells = <2>; 170 }; 171 172 a57_1: cpu@1 { 173 compatible = "arm,cortex-a57"; 174 reg = <0x1>; 175 device_type = "cpu"; 176 power-domains = <&sysc R8A7796_PD_CA57_CPU1>; 177 next-level-cache = <&L2_CA57>; 178 enable-method = "psci"; 179 cpu-idle-states = <&CPU_SLEEP_0>; 180 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 181 operating-points-v2 = <&cluster0_opp>; 182 capacity-dmips-mhz = <1024>; 183 #cooling-cells = <2>; 184 }; 185 186 a53_0: cpu@100 { 187 compatible = "arm,cortex-a53"; 188 reg = <0x100>; 189 device_type = "cpu"; 190 power-domains = <&sysc R8A7796_PD_CA53_CPU0>; 191 next-level-cache = <&L2_CA53>; 192 enable-method = "psci"; 193 cpu-idle-states = <&CPU_SLEEP_1>; 194 #cooling-cells = <2>; 195 dynamic-power-coefficient = <277>; 196 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 197 operating-points-v2 = <&cluster1_opp>; 198 capacity-dmips-mhz = <535>; 199 }; 200 201 a53_1: cpu@101 { 202 compatible = "arm,cortex-a53"; 203 reg = <0x101>; 204 device_type = "cpu"; 205 power-domains = <&sysc R8A7796_PD_CA53_CPU1>; 206 next-level-cache = <&L2_CA53>; 207 enable-method = "psci"; 208 cpu-idle-states = <&CPU_SLEEP_1>; 209 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 210 operating-points-v2 = <&cluster1_opp>; 211 capacity-dmips-mhz = <535>; 212 }; 213 214 a53_2: cpu@102 { 215 compatible = "arm,cortex-a53"; 216 reg = <0x102>; 217 device_type = "cpu"; 218 power-domains = <&sysc R8A7796_PD_CA53_CPU2>; 219 next-level-cache = <&L2_CA53>; 220 enable-method = "psci"; 221 cpu-idle-states = <&CPU_SLEEP_1>; 222 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 223 operating-points-v2 = <&cluster1_opp>; 224 capacity-dmips-mhz = <535>; 225 }; 226 227 a53_3: cpu@103 { 228 compatible = "arm,cortex-a53"; 229 reg = <0x103>; 230 device_type = "cpu"; 231 power-domains = <&sysc R8A7796_PD_CA53_CPU3>; 232 next-level-cache = <&L2_CA53>; 233 enable-method = "psci"; 234 cpu-idle-states = <&CPU_SLEEP_1>; 235 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 236 operating-points-v2 = <&cluster1_opp>; 237 capacity-dmips-mhz = <535>; 238 }; 239 240 L2_CA57: cache-controller-0 { 241 compatible = "cache"; 242 power-domains = <&sysc R8A7796_PD_CA57_SCU>; 243 cache-unified; 244 cache-level = <2>; 245 }; 246 247 L2_CA53: cache-controller-1 { 248 compatible = "cache"; 249 power-domains = <&sysc R8A7796_PD_CA53_SCU>; 250 cache-unified; 251 cache-level = <2>; 252 }; 253 254 idle-states { 255 entry-method = "psci"; 256 257 CPU_SLEEP_0: cpu-sleep-0 { 258 compatible = "arm,idle-state"; 259 arm,psci-suspend-param = <0x0010000>; 260 local-timer-stop; 261 entry-latency-us = <400>; 262 exit-latency-us = <500>; 263 min-residency-us = <4000>; 264 }; 265 266 CPU_SLEEP_1: cpu-sleep-1 { 267 compatible = "arm,idle-state"; 268 arm,psci-suspend-param = <0x0010000>; 269 local-timer-stop; 270 entry-latency-us = <700>; 271 exit-latency-us = <700>; 272 min-residency-us = <5000>; 273 }; 274 }; 275 }; 276 277 extal_clk: extal { 278 compatible = "fixed-clock"; 279 #clock-cells = <0>; 280 /* This value must be overridden by the board */ 281 clock-frequency = <0>; 282 }; 283 284 extalr_clk: extalr { 285 compatible = "fixed-clock"; 286 #clock-cells = <0>; 287 /* This value must be overridden by the board */ 288 clock-frequency = <0>; 289 }; 290 291 /* External PCIe clock - can be overridden by the board */ 292 pcie_bus_clk: pcie_bus { 293 compatible = "fixed-clock"; 294 #clock-cells = <0>; 295 clock-frequency = <0>; 296 }; 297 298 pmu_a53 { 299 compatible = "arm,cortex-a53-pmu"; 300 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 301 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 302 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 303 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 304 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 305 }; 306 307 pmu_a57 { 308 compatible = "arm,cortex-a57-pmu"; 309 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 310 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 311 interrupt-affinity = <&a57_0>, <&a57_1>; 312 }; 313 314 psci { 315 compatible = "arm,psci-1.0", "arm,psci-0.2"; 316 method = "smc"; 317 }; 318 319 /* External SCIF clock - to be overridden by boards that provide it */ 320 scif_clk: scif { 321 compatible = "fixed-clock"; 322 #clock-cells = <0>; 323 clock-frequency = <0>; 324 }; 325 326 soc { 327 compatible = "simple-bus"; 328 interrupt-parent = <&gic>; 329 #address-cells = <2>; 330 #size-cells = <2>; 331 ranges; 332 333 rwdt: watchdog@e6020000 { 334 compatible = "renesas,r8a7796-wdt", 335 "renesas,rcar-gen3-wdt"; 336 reg = <0 0xe6020000 0 0x0c>; 337 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 338 clocks = <&cpg CPG_MOD 402>; 339 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 340 resets = <&cpg 402>; 341 status = "disabled"; 342 }; 343 344 gpio0: gpio@e6050000 { 345 compatible = "renesas,gpio-r8a7796", 346 "renesas,rcar-gen3-gpio"; 347 reg = <0 0xe6050000 0 0x50>; 348 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 349 #gpio-cells = <2>; 350 gpio-controller; 351 gpio-ranges = <&pfc 0 0 16>; 352 #interrupt-cells = <2>; 353 interrupt-controller; 354 clocks = <&cpg CPG_MOD 912>; 355 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 356 resets = <&cpg 912>; 357 }; 358 359 gpio1: gpio@e6051000 { 360 compatible = "renesas,gpio-r8a7796", 361 "renesas,rcar-gen3-gpio"; 362 reg = <0 0xe6051000 0 0x50>; 363 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 364 #gpio-cells = <2>; 365 gpio-controller; 366 gpio-ranges = <&pfc 0 32 29>; 367 #interrupt-cells = <2>; 368 interrupt-controller; 369 clocks = <&cpg CPG_MOD 911>; 370 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 371 resets = <&cpg 911>; 372 }; 373 374 gpio2: gpio@e6052000 { 375 compatible = "renesas,gpio-r8a7796", 376 "renesas,rcar-gen3-gpio"; 377 reg = <0 0xe6052000 0 0x50>; 378 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 379 #gpio-cells = <2>; 380 gpio-controller; 381 gpio-ranges = <&pfc 0 64 15>; 382 #interrupt-cells = <2>; 383 interrupt-controller; 384 clocks = <&cpg CPG_MOD 910>; 385 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 386 resets = <&cpg 910>; 387 }; 388 389 gpio3: gpio@e6053000 { 390 compatible = "renesas,gpio-r8a7796", 391 "renesas,rcar-gen3-gpio"; 392 reg = <0 0xe6053000 0 0x50>; 393 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 394 #gpio-cells = <2>; 395 gpio-controller; 396 gpio-ranges = <&pfc 0 96 16>; 397 #interrupt-cells = <2>; 398 interrupt-controller; 399 clocks = <&cpg CPG_MOD 909>; 400 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 401 resets = <&cpg 909>; 402 }; 403 404 gpio4: gpio@e6054000 { 405 compatible = "renesas,gpio-r8a7796", 406 "renesas,rcar-gen3-gpio"; 407 reg = <0 0xe6054000 0 0x50>; 408 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 409 #gpio-cells = <2>; 410 gpio-controller; 411 gpio-ranges = <&pfc 0 128 18>; 412 #interrupt-cells = <2>; 413 interrupt-controller; 414 clocks = <&cpg CPG_MOD 908>; 415 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 416 resets = <&cpg 908>; 417 }; 418 419 gpio5: gpio@e6055000 { 420 compatible = "renesas,gpio-r8a7796", 421 "renesas,rcar-gen3-gpio"; 422 reg = <0 0xe6055000 0 0x50>; 423 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 424 #gpio-cells = <2>; 425 gpio-controller; 426 gpio-ranges = <&pfc 0 160 26>; 427 #interrupt-cells = <2>; 428 interrupt-controller; 429 clocks = <&cpg CPG_MOD 907>; 430 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 431 resets = <&cpg 907>; 432 }; 433 434 gpio6: gpio@e6055400 { 435 compatible = "renesas,gpio-r8a7796", 436 "renesas,rcar-gen3-gpio"; 437 reg = <0 0xe6055400 0 0x50>; 438 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 439 #gpio-cells = <2>; 440 gpio-controller; 441 gpio-ranges = <&pfc 0 192 32>; 442 #interrupt-cells = <2>; 443 interrupt-controller; 444 clocks = <&cpg CPG_MOD 906>; 445 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 446 resets = <&cpg 906>; 447 }; 448 449 gpio7: gpio@e6055800 { 450 compatible = "renesas,gpio-r8a7796", 451 "renesas,rcar-gen3-gpio"; 452 reg = <0 0xe6055800 0 0x50>; 453 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 454 #gpio-cells = <2>; 455 gpio-controller; 456 gpio-ranges = <&pfc 0 224 4>; 457 #interrupt-cells = <2>; 458 interrupt-controller; 459 clocks = <&cpg CPG_MOD 905>; 460 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 461 resets = <&cpg 905>; 462 }; 463 464 pfc: pinctrl@e6060000 { 465 compatible = "renesas,pfc-r8a7796"; 466 reg = <0 0xe6060000 0 0x50c>; 467 }; 468 469 cmt0: timer@e60f0000 { 470 compatible = "renesas,r8a7796-cmt0", 471 "renesas,rcar-gen3-cmt0"; 472 reg = <0 0xe60f0000 0 0x1004>; 473 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 474 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 475 clocks = <&cpg CPG_MOD 303>; 476 clock-names = "fck"; 477 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 478 resets = <&cpg 303>; 479 status = "disabled"; 480 }; 481 482 cmt1: timer@e6130000 { 483 compatible = "renesas,r8a7796-cmt1", 484 "renesas,rcar-gen3-cmt1"; 485 reg = <0 0xe6130000 0 0x1004>; 486 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 487 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 489 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 490 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 492 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 493 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 494 clocks = <&cpg CPG_MOD 302>; 495 clock-names = "fck"; 496 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 497 resets = <&cpg 302>; 498 status = "disabled"; 499 }; 500 501 cmt2: timer@e6140000 { 502 compatible = "renesas,r8a7796-cmt1", 503 "renesas,rcar-gen3-cmt1"; 504 reg = <0 0xe6140000 0 0x1004>; 505 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 506 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 507 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 508 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 510 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 511 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 513 clocks = <&cpg CPG_MOD 301>; 514 clock-names = "fck"; 515 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 516 resets = <&cpg 301>; 517 status = "disabled"; 518 }; 519 520 cmt3: timer@e6148000 { 521 compatible = "renesas,r8a7796-cmt1", 522 "renesas,rcar-gen3-cmt1"; 523 reg = <0 0xe6148000 0 0x1004>; 524 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 529 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 530 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 531 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 532 clocks = <&cpg CPG_MOD 300>; 533 clock-names = "fck"; 534 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 535 resets = <&cpg 300>; 536 status = "disabled"; 537 }; 538 539 cpg: clock-controller@e6150000 { 540 compatible = "renesas,r8a7796-cpg-mssr"; 541 reg = <0 0xe6150000 0 0x1000>; 542 clocks = <&extal_clk>, <&extalr_clk>; 543 clock-names = "extal", "extalr"; 544 #clock-cells = <2>; 545 #power-domain-cells = <0>; 546 #reset-cells = <1>; 547 }; 548 549 rst: reset-controller@e6160000 { 550 compatible = "renesas,r8a7796-rst"; 551 reg = <0 0xe6160000 0 0x0200>; 552 }; 553 554 sysc: system-controller@e6180000 { 555 compatible = "renesas,r8a7796-sysc"; 556 reg = <0 0xe6180000 0 0x0400>; 557 #power-domain-cells = <1>; 558 }; 559 560 tsc: thermal@e6198000 { 561 compatible = "renesas,r8a7796-thermal"; 562 reg = <0 0xe6198000 0 0x100>, 563 <0 0xe61a0000 0 0x100>, 564 <0 0xe61a8000 0 0x100>; 565 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 566 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 567 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 568 clocks = <&cpg CPG_MOD 522>; 569 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 570 resets = <&cpg 522>; 571 #thermal-sensor-cells = <1>; 572 }; 573 574 intc_ex: interrupt-controller@e61c0000 { 575 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; 576 #interrupt-cells = <2>; 577 interrupt-controller; 578 reg = <0 0xe61c0000 0 0x200>; 579 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 580 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 581 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 583 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 584 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 585 clocks = <&cpg CPG_MOD 407>; 586 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 587 resets = <&cpg 407>; 588 }; 589 590 tmu0: timer@e61e0000 { 591 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 592 reg = <0 0xe61e0000 0 0x30>; 593 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 594 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 595 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 596 clocks = <&cpg CPG_MOD 125>; 597 clock-names = "fck"; 598 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 599 resets = <&cpg 125>; 600 status = "disabled"; 601 }; 602 603 tmu1: timer@e6fc0000 { 604 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 605 reg = <0 0xe6fc0000 0 0x30>; 606 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 607 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 608 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 609 clocks = <&cpg CPG_MOD 124>; 610 clock-names = "fck"; 611 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 612 resets = <&cpg 124>; 613 status = "disabled"; 614 }; 615 616 tmu2: timer@e6fd0000 { 617 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 618 reg = <0 0xe6fd0000 0 0x30>; 619 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 620 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 621 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 622 clocks = <&cpg CPG_MOD 123>; 623 clock-names = "fck"; 624 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 625 resets = <&cpg 123>; 626 status = "disabled"; 627 }; 628 629 tmu3: timer@e6fe0000 { 630 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 631 reg = <0 0xe6fe0000 0 0x30>; 632 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 633 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 634 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 635 clocks = <&cpg CPG_MOD 122>; 636 clock-names = "fck"; 637 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 638 resets = <&cpg 122>; 639 status = "disabled"; 640 }; 641 642 tmu4: timer@ffc00000 { 643 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 644 reg = <0 0xffc00000 0 0x30>; 645 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 648 clocks = <&cpg CPG_MOD 121>; 649 clock-names = "fck"; 650 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 651 resets = <&cpg 121>; 652 status = "disabled"; 653 }; 654 655 i2c0: i2c@e6500000 { 656 #address-cells = <1>; 657 #size-cells = <0>; 658 compatible = "renesas,i2c-r8a7796", 659 "renesas,rcar-gen3-i2c"; 660 reg = <0 0xe6500000 0 0x40>; 661 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 931>; 663 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 664 resets = <&cpg 931>; 665 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 666 <&dmac2 0x91>, <&dmac2 0x90>; 667 dma-names = "tx", "rx", "tx", "rx"; 668 i2c-scl-internal-delay-ns = <110>; 669 status = "disabled"; 670 }; 671 672 i2c1: i2c@e6508000 { 673 #address-cells = <1>; 674 #size-cells = <0>; 675 compatible = "renesas,i2c-r8a7796", 676 "renesas,rcar-gen3-i2c"; 677 reg = <0 0xe6508000 0 0x40>; 678 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 679 clocks = <&cpg CPG_MOD 930>; 680 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 681 resets = <&cpg 930>; 682 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 683 <&dmac2 0x93>, <&dmac2 0x92>; 684 dma-names = "tx", "rx", "tx", "rx"; 685 i2c-scl-internal-delay-ns = <6>; 686 status = "disabled"; 687 }; 688 689 i2c2: i2c@e6510000 { 690 #address-cells = <1>; 691 #size-cells = <0>; 692 compatible = "renesas,i2c-r8a7796", 693 "renesas,rcar-gen3-i2c"; 694 reg = <0 0xe6510000 0 0x40>; 695 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 696 clocks = <&cpg CPG_MOD 929>; 697 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 698 resets = <&cpg 929>; 699 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 700 <&dmac2 0x95>, <&dmac2 0x94>; 701 dma-names = "tx", "rx", "tx", "rx"; 702 i2c-scl-internal-delay-ns = <6>; 703 status = "disabled"; 704 }; 705 706 i2c3: i2c@e66d0000 { 707 #address-cells = <1>; 708 #size-cells = <0>; 709 compatible = "renesas,i2c-r8a7796", 710 "renesas,rcar-gen3-i2c"; 711 reg = <0 0xe66d0000 0 0x40>; 712 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 713 clocks = <&cpg CPG_MOD 928>; 714 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 715 resets = <&cpg 928>; 716 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 717 dma-names = "tx", "rx"; 718 i2c-scl-internal-delay-ns = <110>; 719 status = "disabled"; 720 }; 721 722 i2c4: i2c@e66d8000 { 723 #address-cells = <1>; 724 #size-cells = <0>; 725 compatible = "renesas,i2c-r8a7796", 726 "renesas,rcar-gen3-i2c"; 727 reg = <0 0xe66d8000 0 0x40>; 728 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 729 clocks = <&cpg CPG_MOD 927>; 730 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 731 resets = <&cpg 927>; 732 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 733 dma-names = "tx", "rx"; 734 i2c-scl-internal-delay-ns = <110>; 735 status = "disabled"; 736 }; 737 738 i2c5: i2c@e66e0000 { 739 #address-cells = <1>; 740 #size-cells = <0>; 741 compatible = "renesas,i2c-r8a7796", 742 "renesas,rcar-gen3-i2c"; 743 reg = <0 0xe66e0000 0 0x40>; 744 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 745 clocks = <&cpg CPG_MOD 919>; 746 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 747 resets = <&cpg 919>; 748 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 749 dma-names = "tx", "rx"; 750 i2c-scl-internal-delay-ns = <110>; 751 status = "disabled"; 752 }; 753 754 i2c6: i2c@e66e8000 { 755 #address-cells = <1>; 756 #size-cells = <0>; 757 compatible = "renesas,i2c-r8a7796", 758 "renesas,rcar-gen3-i2c"; 759 reg = <0 0xe66e8000 0 0x40>; 760 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 761 clocks = <&cpg CPG_MOD 918>; 762 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 763 resets = <&cpg 918>; 764 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 765 dma-names = "tx", "rx"; 766 i2c-scl-internal-delay-ns = <6>; 767 status = "disabled"; 768 }; 769 770 i2c_dvfs: i2c@e60b0000 { 771 #address-cells = <1>; 772 #size-cells = <0>; 773 compatible = "renesas,iic-r8a7796", 774 "renesas,rcar-gen3-iic", 775 "renesas,rmobile-iic"; 776 reg = <0 0xe60b0000 0 0x425>; 777 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 778 clocks = <&cpg CPG_MOD 926>; 779 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 780 resets = <&cpg 926>; 781 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 782 dma-names = "tx", "rx"; 783 status = "disabled"; 784 }; 785 786 hscif0: serial@e6540000 { 787 compatible = "renesas,hscif-r8a7796", 788 "renesas,rcar-gen3-hscif", 789 "renesas,hscif"; 790 reg = <0 0xe6540000 0 0x60>; 791 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 792 clocks = <&cpg CPG_MOD 520>, 793 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 794 <&scif_clk>; 795 clock-names = "fck", "brg_int", "scif_clk"; 796 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 797 <&dmac2 0x31>, <&dmac2 0x30>; 798 dma-names = "tx", "rx", "tx", "rx"; 799 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 800 resets = <&cpg 520>; 801 status = "disabled"; 802 }; 803 804 hscif1: serial@e6550000 { 805 compatible = "renesas,hscif-r8a7796", 806 "renesas,rcar-gen3-hscif", 807 "renesas,hscif"; 808 reg = <0 0xe6550000 0 0x60>; 809 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 810 clocks = <&cpg CPG_MOD 519>, 811 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 812 <&scif_clk>; 813 clock-names = "fck", "brg_int", "scif_clk"; 814 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 815 <&dmac2 0x33>, <&dmac2 0x32>; 816 dma-names = "tx", "rx", "tx", "rx"; 817 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 818 resets = <&cpg 519>; 819 status = "disabled"; 820 }; 821 822 hscif2: serial@e6560000 { 823 compatible = "renesas,hscif-r8a7796", 824 "renesas,rcar-gen3-hscif", 825 "renesas,hscif"; 826 reg = <0 0xe6560000 0 0x60>; 827 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 828 clocks = <&cpg CPG_MOD 518>, 829 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 830 <&scif_clk>; 831 clock-names = "fck", "brg_int", "scif_clk"; 832 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 833 <&dmac2 0x35>, <&dmac2 0x34>; 834 dma-names = "tx", "rx", "tx", "rx"; 835 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 836 resets = <&cpg 518>; 837 status = "disabled"; 838 }; 839 840 hscif3: serial@e66a0000 { 841 compatible = "renesas,hscif-r8a7796", 842 "renesas,rcar-gen3-hscif", 843 "renesas,hscif"; 844 reg = <0 0xe66a0000 0 0x60>; 845 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 846 clocks = <&cpg CPG_MOD 517>, 847 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 848 <&scif_clk>; 849 clock-names = "fck", "brg_int", "scif_clk"; 850 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 851 dma-names = "tx", "rx"; 852 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 853 resets = <&cpg 517>; 854 status = "disabled"; 855 }; 856 857 hscif4: serial@e66b0000 { 858 compatible = "renesas,hscif-r8a7796", 859 "renesas,rcar-gen3-hscif", 860 "renesas,hscif"; 861 reg = <0 0xe66b0000 0 0x60>; 862 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 863 clocks = <&cpg CPG_MOD 516>, 864 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 865 <&scif_clk>; 866 clock-names = "fck", "brg_int", "scif_clk"; 867 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 868 dma-names = "tx", "rx"; 869 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 870 resets = <&cpg 516>; 871 status = "disabled"; 872 }; 873 874 hsusb: usb@e6590000 { 875 compatible = "renesas,usbhs-r8a7796", 876 "renesas,rcar-gen3-usbhs"; 877 reg = <0 0xe6590000 0 0x200>; 878 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 879 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 880 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 881 <&usb_dmac1 0>, <&usb_dmac1 1>; 882 dma-names = "ch0", "ch1", "ch2", "ch3"; 883 renesas,buswait = <11>; 884 phys = <&usb2_phy0 3>; 885 phy-names = "usb"; 886 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 887 resets = <&cpg 704>, <&cpg 703>; 888 status = "disabled"; 889 }; 890 891 usb_dmac0: dma-controller@e65a0000 { 892 compatible = "renesas,r8a7796-usb-dmac", 893 "renesas,usb-dmac"; 894 reg = <0 0xe65a0000 0 0x100>; 895 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 896 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 897 interrupt-names = "ch0", "ch1"; 898 clocks = <&cpg CPG_MOD 330>; 899 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 900 resets = <&cpg 330>; 901 #dma-cells = <1>; 902 dma-channels = <2>; 903 }; 904 905 usb_dmac1: dma-controller@e65b0000 { 906 compatible = "renesas,r8a7796-usb-dmac", 907 "renesas,usb-dmac"; 908 reg = <0 0xe65b0000 0 0x100>; 909 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 910 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 911 interrupt-names = "ch0", "ch1"; 912 clocks = <&cpg CPG_MOD 331>; 913 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 914 resets = <&cpg 331>; 915 #dma-cells = <1>; 916 dma-channels = <2>; 917 }; 918 919 usb3_phy0: usb-phy@e65ee000 { 920 compatible = "renesas,r8a7796-usb3-phy", 921 "renesas,rcar-gen3-usb3-phy"; 922 reg = <0 0xe65ee000 0 0x90>; 923 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 924 <&usb_extal_clk>; 925 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 926 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 927 resets = <&cpg 328>; 928 #phy-cells = <0>; 929 status = "disabled"; 930 }; 931 932 arm_cc630p: crypto@e6601000 { 933 compatible = "arm,cryptocell-630p-ree"; 934 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 935 reg = <0x0 0xe6601000 0 0x1000>; 936 clocks = <&cpg CPG_MOD 229>; 937 resets = <&cpg 229>; 938 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 939 }; 940 941 dmac0: dma-controller@e6700000 { 942 compatible = "renesas,dmac-r8a7796", 943 "renesas,rcar-dmac"; 944 reg = <0 0xe6700000 0 0x10000>; 945 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 947 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 949 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 950 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 951 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 952 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 953 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 954 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 956 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 962 interrupt-names = "error", 963 "ch0", "ch1", "ch2", "ch3", 964 "ch4", "ch5", "ch6", "ch7", 965 "ch8", "ch9", "ch10", "ch11", 966 "ch12", "ch13", "ch14", "ch15"; 967 clocks = <&cpg CPG_MOD 219>; 968 clock-names = "fck"; 969 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 970 resets = <&cpg 219>; 971 #dma-cells = <1>; 972 dma-channels = <16>; 973 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 974 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 975 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 976 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 977 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 978 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 979 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 980 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 981 }; 982 983 dmac1: dma-controller@e7300000 { 984 compatible = "renesas,dmac-r8a7796", 985 "renesas,rcar-dmac"; 986 reg = <0 0xe7300000 0 0x10000>; 987 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1003 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 1004 interrupt-names = "error", 1005 "ch0", "ch1", "ch2", "ch3", 1006 "ch4", "ch5", "ch6", "ch7", 1007 "ch8", "ch9", "ch10", "ch11", 1008 "ch12", "ch13", "ch14", "ch15"; 1009 clocks = <&cpg CPG_MOD 218>; 1010 clock-names = "fck"; 1011 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1012 resets = <&cpg 218>; 1013 #dma-cells = <1>; 1014 dma-channels = <16>; 1015 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 1016 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 1017 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 1018 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 1019 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 1020 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 1021 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 1022 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 1023 }; 1024 1025 dmac2: dma-controller@e7310000 { 1026 compatible = "renesas,dmac-r8a7796", 1027 "renesas,rcar-dmac"; 1028 reg = <0 0xe7310000 0 0x10000>; 1029 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1045 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1046 interrupt-names = "error", 1047 "ch0", "ch1", "ch2", "ch3", 1048 "ch4", "ch5", "ch6", "ch7", 1049 "ch8", "ch9", "ch10", "ch11", 1050 "ch12", "ch13", "ch14", "ch15"; 1051 clocks = <&cpg CPG_MOD 217>; 1052 clock-names = "fck"; 1053 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1054 resets = <&cpg 217>; 1055 #dma-cells = <1>; 1056 dma-channels = <16>; 1057 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 1058 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 1059 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 1060 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 1061 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 1062 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 1063 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 1064 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 1065 }; 1066 1067 ipmmu_ds0: iommu@e6740000 { 1068 compatible = "renesas,ipmmu-r8a7796"; 1069 reg = <0 0xe6740000 0 0x1000>; 1070 renesas,ipmmu-main = <&ipmmu_mm 0>; 1071 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1072 #iommu-cells = <1>; 1073 }; 1074 1075 ipmmu_ds1: iommu@e7740000 { 1076 compatible = "renesas,ipmmu-r8a7796"; 1077 reg = <0 0xe7740000 0 0x1000>; 1078 renesas,ipmmu-main = <&ipmmu_mm 1>; 1079 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1080 #iommu-cells = <1>; 1081 }; 1082 1083 ipmmu_hc: iommu@e6570000 { 1084 compatible = "renesas,ipmmu-r8a7796"; 1085 reg = <0 0xe6570000 0 0x1000>; 1086 renesas,ipmmu-main = <&ipmmu_mm 2>; 1087 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1088 #iommu-cells = <1>; 1089 }; 1090 1091 ipmmu_ir: iommu@ff8b0000 { 1092 compatible = "renesas,ipmmu-r8a7796"; 1093 reg = <0 0xff8b0000 0 0x1000>; 1094 renesas,ipmmu-main = <&ipmmu_mm 3>; 1095 power-domains = <&sysc R8A7796_PD_A3IR>; 1096 #iommu-cells = <1>; 1097 }; 1098 1099 ipmmu_mm: iommu@e67b0000 { 1100 compatible = "renesas,ipmmu-r8a7796"; 1101 reg = <0 0xe67b0000 0 0x1000>; 1102 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1103 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1104 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1105 #iommu-cells = <1>; 1106 }; 1107 1108 ipmmu_mp: iommu@ec670000 { 1109 compatible = "renesas,ipmmu-r8a7796"; 1110 reg = <0 0xec670000 0 0x1000>; 1111 renesas,ipmmu-main = <&ipmmu_mm 4>; 1112 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1113 #iommu-cells = <1>; 1114 }; 1115 1116 ipmmu_pv0: iommu@fd800000 { 1117 compatible = "renesas,ipmmu-r8a7796"; 1118 reg = <0 0xfd800000 0 0x1000>; 1119 renesas,ipmmu-main = <&ipmmu_mm 5>; 1120 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1121 #iommu-cells = <1>; 1122 }; 1123 1124 ipmmu_pv1: iommu@fd950000 { 1125 compatible = "renesas,ipmmu-r8a7796"; 1126 reg = <0 0xfd950000 0 0x1000>; 1127 renesas,ipmmu-main = <&ipmmu_mm 6>; 1128 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1129 #iommu-cells = <1>; 1130 }; 1131 1132 ipmmu_rt: iommu@ffc80000 { 1133 compatible = "renesas,ipmmu-r8a7796"; 1134 reg = <0 0xffc80000 0 0x1000>; 1135 renesas,ipmmu-main = <&ipmmu_mm 7>; 1136 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1137 #iommu-cells = <1>; 1138 }; 1139 1140 ipmmu_vc0: iommu@fe6b0000 { 1141 compatible = "renesas,ipmmu-r8a7796"; 1142 reg = <0 0xfe6b0000 0 0x1000>; 1143 renesas,ipmmu-main = <&ipmmu_mm 8>; 1144 power-domains = <&sysc R8A7796_PD_A3VC>; 1145 #iommu-cells = <1>; 1146 }; 1147 1148 ipmmu_vi0: iommu@febd0000 { 1149 compatible = "renesas,ipmmu-r8a7796"; 1150 reg = <0 0xfebd0000 0 0x1000>; 1151 renesas,ipmmu-main = <&ipmmu_mm 9>; 1152 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1153 #iommu-cells = <1>; 1154 }; 1155 1156 avb: ethernet@e6800000 { 1157 compatible = "renesas,etheravb-r8a7796", 1158 "renesas,etheravb-rcar-gen3"; 1159 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1160 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1161 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1162 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1163 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1164 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1165 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1166 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1167 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1168 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1169 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1170 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1171 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1172 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1173 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1174 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1175 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1176 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1177 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1178 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1179 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1180 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1181 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1182 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1183 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1184 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1185 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1186 "ch4", "ch5", "ch6", "ch7", 1187 "ch8", "ch9", "ch10", "ch11", 1188 "ch12", "ch13", "ch14", "ch15", 1189 "ch16", "ch17", "ch18", "ch19", 1190 "ch20", "ch21", "ch22", "ch23", 1191 "ch24"; 1192 clocks = <&cpg CPG_MOD 812>; 1193 clock-names = "fck"; 1194 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1195 resets = <&cpg 812>; 1196 phy-mode = "rgmii"; 1197 rx-internal-delay-ps = <0>; 1198 tx-internal-delay-ps = <0>; 1199 iommus = <&ipmmu_ds0 16>; 1200 #address-cells = <1>; 1201 #size-cells = <0>; 1202 status = "disabled"; 1203 }; 1204 1205 can0: can@e6c30000 { 1206 compatible = "renesas,can-r8a7796", 1207 "renesas,rcar-gen3-can"; 1208 reg = <0 0xe6c30000 0 0x1000>; 1209 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1210 clocks = <&cpg CPG_MOD 916>, 1211 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1212 <&can_clk>; 1213 clock-names = "clkp1", "clkp2", "can_clk"; 1214 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1215 assigned-clock-rates = <40000000>; 1216 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1217 resets = <&cpg 916>; 1218 status = "disabled"; 1219 }; 1220 1221 can1: can@e6c38000 { 1222 compatible = "renesas,can-r8a7796", 1223 "renesas,rcar-gen3-can"; 1224 reg = <0 0xe6c38000 0 0x1000>; 1225 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1226 clocks = <&cpg CPG_MOD 915>, 1227 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1228 <&can_clk>; 1229 clock-names = "clkp1", "clkp2", "can_clk"; 1230 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1231 assigned-clock-rates = <40000000>; 1232 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1233 resets = <&cpg 915>; 1234 status = "disabled"; 1235 }; 1236 1237 canfd: can@e66c0000 { 1238 compatible = "renesas,r8a7796-canfd", 1239 "renesas,rcar-gen3-canfd"; 1240 reg = <0 0xe66c0000 0 0x8000>; 1241 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1242 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1243 clocks = <&cpg CPG_MOD 914>, 1244 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1245 <&can_clk>; 1246 clock-names = "fck", "canfd", "can_clk"; 1247 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1248 assigned-clock-rates = <40000000>; 1249 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1250 resets = <&cpg 914>; 1251 status = "disabled"; 1252 1253 channel0 { 1254 status = "disabled"; 1255 }; 1256 1257 channel1 { 1258 status = "disabled"; 1259 }; 1260 }; 1261 1262 pwm0: pwm@e6e30000 { 1263 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1264 reg = <0 0xe6e30000 0 8>; 1265 #pwm-cells = <2>; 1266 clocks = <&cpg CPG_MOD 523>; 1267 resets = <&cpg 523>; 1268 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1269 status = "disabled"; 1270 }; 1271 1272 pwm1: pwm@e6e31000 { 1273 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1274 reg = <0 0xe6e31000 0 8>; 1275 #pwm-cells = <2>; 1276 clocks = <&cpg CPG_MOD 523>; 1277 resets = <&cpg 523>; 1278 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1279 status = "disabled"; 1280 }; 1281 1282 pwm2: pwm@e6e32000 { 1283 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1284 reg = <0 0xe6e32000 0 8>; 1285 #pwm-cells = <2>; 1286 clocks = <&cpg CPG_MOD 523>; 1287 resets = <&cpg 523>; 1288 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1289 status = "disabled"; 1290 }; 1291 1292 pwm3: pwm@e6e33000 { 1293 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1294 reg = <0 0xe6e33000 0 8>; 1295 #pwm-cells = <2>; 1296 clocks = <&cpg CPG_MOD 523>; 1297 resets = <&cpg 523>; 1298 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1299 status = "disabled"; 1300 }; 1301 1302 pwm4: pwm@e6e34000 { 1303 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1304 reg = <0 0xe6e34000 0 8>; 1305 #pwm-cells = <2>; 1306 clocks = <&cpg CPG_MOD 523>; 1307 resets = <&cpg 523>; 1308 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1309 status = "disabled"; 1310 }; 1311 1312 pwm5: pwm@e6e35000 { 1313 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1314 reg = <0 0xe6e35000 0 8>; 1315 #pwm-cells = <2>; 1316 clocks = <&cpg CPG_MOD 523>; 1317 resets = <&cpg 523>; 1318 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1319 status = "disabled"; 1320 }; 1321 1322 pwm6: pwm@e6e36000 { 1323 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1324 reg = <0 0xe6e36000 0 8>; 1325 #pwm-cells = <2>; 1326 clocks = <&cpg CPG_MOD 523>; 1327 resets = <&cpg 523>; 1328 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1329 status = "disabled"; 1330 }; 1331 1332 scif0: serial@e6e60000 { 1333 compatible = "renesas,scif-r8a7796", 1334 "renesas,rcar-gen3-scif", "renesas,scif"; 1335 reg = <0 0xe6e60000 0 64>; 1336 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1337 clocks = <&cpg CPG_MOD 207>, 1338 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1339 <&scif_clk>; 1340 clock-names = "fck", "brg_int", "scif_clk"; 1341 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1342 <&dmac2 0x51>, <&dmac2 0x50>; 1343 dma-names = "tx", "rx", "tx", "rx"; 1344 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1345 resets = <&cpg 207>; 1346 status = "disabled"; 1347 }; 1348 1349 scif1: serial@e6e68000 { 1350 compatible = "renesas,scif-r8a7796", 1351 "renesas,rcar-gen3-scif", "renesas,scif"; 1352 reg = <0 0xe6e68000 0 64>; 1353 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1354 clocks = <&cpg CPG_MOD 206>, 1355 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1356 <&scif_clk>; 1357 clock-names = "fck", "brg_int", "scif_clk"; 1358 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1359 <&dmac2 0x53>, <&dmac2 0x52>; 1360 dma-names = "tx", "rx", "tx", "rx"; 1361 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1362 resets = <&cpg 206>; 1363 status = "disabled"; 1364 }; 1365 1366 scif2: serial@e6e88000 { 1367 compatible = "renesas,scif-r8a7796", 1368 "renesas,rcar-gen3-scif", "renesas,scif"; 1369 reg = <0 0xe6e88000 0 64>; 1370 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1371 clocks = <&cpg CPG_MOD 310>, 1372 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1373 <&scif_clk>; 1374 clock-names = "fck", "brg_int", "scif_clk"; 1375 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1376 <&dmac2 0x13>, <&dmac2 0x12>; 1377 dma-names = "tx", "rx", "tx", "rx"; 1378 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1379 resets = <&cpg 310>; 1380 status = "disabled"; 1381 }; 1382 1383 scif3: serial@e6c50000 { 1384 compatible = "renesas,scif-r8a7796", 1385 "renesas,rcar-gen3-scif", "renesas,scif"; 1386 reg = <0 0xe6c50000 0 64>; 1387 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1388 clocks = <&cpg CPG_MOD 204>, 1389 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1390 <&scif_clk>; 1391 clock-names = "fck", "brg_int", "scif_clk"; 1392 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1393 dma-names = "tx", "rx"; 1394 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1395 resets = <&cpg 204>; 1396 status = "disabled"; 1397 }; 1398 1399 scif4: serial@e6c40000 { 1400 compatible = "renesas,scif-r8a7796", 1401 "renesas,rcar-gen3-scif", "renesas,scif"; 1402 reg = <0 0xe6c40000 0 64>; 1403 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1404 clocks = <&cpg CPG_MOD 203>, 1405 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1406 <&scif_clk>; 1407 clock-names = "fck", "brg_int", "scif_clk"; 1408 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1409 dma-names = "tx", "rx"; 1410 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1411 resets = <&cpg 203>; 1412 status = "disabled"; 1413 }; 1414 1415 scif5: serial@e6f30000 { 1416 compatible = "renesas,scif-r8a7796", 1417 "renesas,rcar-gen3-scif", "renesas,scif"; 1418 reg = <0 0xe6f30000 0 64>; 1419 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1420 clocks = <&cpg CPG_MOD 202>, 1421 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1422 <&scif_clk>; 1423 clock-names = "fck", "brg_int", "scif_clk"; 1424 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1425 <&dmac2 0x5b>, <&dmac2 0x5a>; 1426 dma-names = "tx", "rx", "tx", "rx"; 1427 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1428 resets = <&cpg 202>; 1429 status = "disabled"; 1430 }; 1431 1432 tpu: pwm@e6e80000 { 1433 compatible = "renesas,tpu-r8a7796", "renesas,tpu"; 1434 reg = <0 0xe6e80000 0 0x148>; 1435 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1436 clocks = <&cpg CPG_MOD 304>; 1437 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1438 resets = <&cpg 304>; 1439 #pwm-cells = <3>; 1440 status = "disabled"; 1441 }; 1442 1443 msiof0: spi@e6e90000 { 1444 compatible = "renesas,msiof-r8a7796", 1445 "renesas,rcar-gen3-msiof"; 1446 reg = <0 0xe6e90000 0 0x0064>; 1447 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1448 clocks = <&cpg CPG_MOD 211>; 1449 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1450 <&dmac2 0x41>, <&dmac2 0x40>; 1451 dma-names = "tx", "rx", "tx", "rx"; 1452 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1453 resets = <&cpg 211>; 1454 #address-cells = <1>; 1455 #size-cells = <0>; 1456 status = "disabled"; 1457 }; 1458 1459 msiof1: spi@e6ea0000 { 1460 compatible = "renesas,msiof-r8a7796", 1461 "renesas,rcar-gen3-msiof"; 1462 reg = <0 0xe6ea0000 0 0x0064>; 1463 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1464 clocks = <&cpg CPG_MOD 210>; 1465 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1466 <&dmac2 0x43>, <&dmac2 0x42>; 1467 dma-names = "tx", "rx", "tx", "rx"; 1468 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1469 resets = <&cpg 210>; 1470 #address-cells = <1>; 1471 #size-cells = <0>; 1472 status = "disabled"; 1473 }; 1474 1475 msiof2: spi@e6c00000 { 1476 compatible = "renesas,msiof-r8a7796", 1477 "renesas,rcar-gen3-msiof"; 1478 reg = <0 0xe6c00000 0 0x0064>; 1479 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1480 clocks = <&cpg CPG_MOD 209>; 1481 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1482 dma-names = "tx", "rx"; 1483 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1484 resets = <&cpg 209>; 1485 #address-cells = <1>; 1486 #size-cells = <0>; 1487 status = "disabled"; 1488 }; 1489 1490 msiof3: spi@e6c10000 { 1491 compatible = "renesas,msiof-r8a7796", 1492 "renesas,rcar-gen3-msiof"; 1493 reg = <0 0xe6c10000 0 0x0064>; 1494 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1495 clocks = <&cpg CPG_MOD 208>; 1496 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1497 dma-names = "tx", "rx"; 1498 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1499 resets = <&cpg 208>; 1500 #address-cells = <1>; 1501 #size-cells = <0>; 1502 status = "disabled"; 1503 }; 1504 1505 vin0: video@e6ef0000 { 1506 compatible = "renesas,vin-r8a7796"; 1507 reg = <0 0xe6ef0000 0 0x1000>; 1508 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1509 clocks = <&cpg CPG_MOD 811>; 1510 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1511 resets = <&cpg 811>; 1512 renesas,id = <0>; 1513 status = "disabled"; 1514 1515 ports { 1516 #address-cells = <1>; 1517 #size-cells = <0>; 1518 1519 port@1 { 1520 #address-cells = <1>; 1521 #size-cells = <0>; 1522 1523 reg = <1>; 1524 1525 vin0csi20: endpoint@0 { 1526 reg = <0>; 1527 remote-endpoint = <&csi20vin0>; 1528 }; 1529 vin0csi40: endpoint@2 { 1530 reg = <2>; 1531 remote-endpoint = <&csi40vin0>; 1532 }; 1533 }; 1534 }; 1535 }; 1536 1537 vin1: video@e6ef1000 { 1538 compatible = "renesas,vin-r8a7796"; 1539 reg = <0 0xe6ef1000 0 0x1000>; 1540 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1541 clocks = <&cpg CPG_MOD 810>; 1542 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1543 resets = <&cpg 810>; 1544 renesas,id = <1>; 1545 status = "disabled"; 1546 1547 ports { 1548 #address-cells = <1>; 1549 #size-cells = <0>; 1550 1551 port@1 { 1552 #address-cells = <1>; 1553 #size-cells = <0>; 1554 1555 reg = <1>; 1556 1557 vin1csi20: endpoint@0 { 1558 reg = <0>; 1559 remote-endpoint = <&csi20vin1>; 1560 }; 1561 vin1csi40: endpoint@2 { 1562 reg = <2>; 1563 remote-endpoint = <&csi40vin1>; 1564 }; 1565 }; 1566 }; 1567 }; 1568 1569 vin2: video@e6ef2000 { 1570 compatible = "renesas,vin-r8a7796"; 1571 reg = <0 0xe6ef2000 0 0x1000>; 1572 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1573 clocks = <&cpg CPG_MOD 809>; 1574 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1575 resets = <&cpg 809>; 1576 renesas,id = <2>; 1577 status = "disabled"; 1578 1579 ports { 1580 #address-cells = <1>; 1581 #size-cells = <0>; 1582 1583 port@1 { 1584 #address-cells = <1>; 1585 #size-cells = <0>; 1586 1587 reg = <1>; 1588 1589 vin2csi20: endpoint@0 { 1590 reg = <0>; 1591 remote-endpoint = <&csi20vin2>; 1592 }; 1593 vin2csi40: endpoint@2 { 1594 reg = <2>; 1595 remote-endpoint = <&csi40vin2>; 1596 }; 1597 }; 1598 }; 1599 }; 1600 1601 vin3: video@e6ef3000 { 1602 compatible = "renesas,vin-r8a7796"; 1603 reg = <0 0xe6ef3000 0 0x1000>; 1604 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1605 clocks = <&cpg CPG_MOD 808>; 1606 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1607 resets = <&cpg 808>; 1608 renesas,id = <3>; 1609 status = "disabled"; 1610 1611 ports { 1612 #address-cells = <1>; 1613 #size-cells = <0>; 1614 1615 port@1 { 1616 #address-cells = <1>; 1617 #size-cells = <0>; 1618 1619 reg = <1>; 1620 1621 vin3csi20: endpoint@0 { 1622 reg = <0>; 1623 remote-endpoint = <&csi20vin3>; 1624 }; 1625 vin3csi40: endpoint@2 { 1626 reg = <2>; 1627 remote-endpoint = <&csi40vin3>; 1628 }; 1629 }; 1630 }; 1631 }; 1632 1633 vin4: video@e6ef4000 { 1634 compatible = "renesas,vin-r8a7796"; 1635 reg = <0 0xe6ef4000 0 0x1000>; 1636 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1637 clocks = <&cpg CPG_MOD 807>; 1638 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1639 resets = <&cpg 807>; 1640 renesas,id = <4>; 1641 status = "disabled"; 1642 1643 ports { 1644 #address-cells = <1>; 1645 #size-cells = <0>; 1646 1647 port@1 { 1648 #address-cells = <1>; 1649 #size-cells = <0>; 1650 1651 reg = <1>; 1652 1653 vin4csi20: endpoint@0 { 1654 reg = <0>; 1655 remote-endpoint = <&csi20vin4>; 1656 }; 1657 vin4csi40: endpoint@2 { 1658 reg = <2>; 1659 remote-endpoint = <&csi40vin4>; 1660 }; 1661 }; 1662 }; 1663 }; 1664 1665 vin5: video@e6ef5000 { 1666 compatible = "renesas,vin-r8a7796"; 1667 reg = <0 0xe6ef5000 0 0x1000>; 1668 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1669 clocks = <&cpg CPG_MOD 806>; 1670 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1671 resets = <&cpg 806>; 1672 renesas,id = <5>; 1673 status = "disabled"; 1674 1675 ports { 1676 #address-cells = <1>; 1677 #size-cells = <0>; 1678 1679 port@1 { 1680 #address-cells = <1>; 1681 #size-cells = <0>; 1682 1683 reg = <1>; 1684 1685 vin5csi20: endpoint@0 { 1686 reg = <0>; 1687 remote-endpoint = <&csi20vin5>; 1688 }; 1689 vin5csi40: endpoint@2 { 1690 reg = <2>; 1691 remote-endpoint = <&csi40vin5>; 1692 }; 1693 }; 1694 }; 1695 }; 1696 1697 vin6: video@e6ef6000 { 1698 compatible = "renesas,vin-r8a7796"; 1699 reg = <0 0xe6ef6000 0 0x1000>; 1700 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1701 clocks = <&cpg CPG_MOD 805>; 1702 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1703 resets = <&cpg 805>; 1704 renesas,id = <6>; 1705 status = "disabled"; 1706 1707 ports { 1708 #address-cells = <1>; 1709 #size-cells = <0>; 1710 1711 port@1 { 1712 #address-cells = <1>; 1713 #size-cells = <0>; 1714 1715 reg = <1>; 1716 1717 vin6csi20: endpoint@0 { 1718 reg = <0>; 1719 remote-endpoint = <&csi20vin6>; 1720 }; 1721 vin6csi40: endpoint@2 { 1722 reg = <2>; 1723 remote-endpoint = <&csi40vin6>; 1724 }; 1725 }; 1726 }; 1727 }; 1728 1729 vin7: video@e6ef7000 { 1730 compatible = "renesas,vin-r8a7796"; 1731 reg = <0 0xe6ef7000 0 0x1000>; 1732 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1733 clocks = <&cpg CPG_MOD 804>; 1734 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1735 resets = <&cpg 804>; 1736 renesas,id = <7>; 1737 status = "disabled"; 1738 1739 ports { 1740 #address-cells = <1>; 1741 #size-cells = <0>; 1742 1743 port@1 { 1744 #address-cells = <1>; 1745 #size-cells = <0>; 1746 1747 reg = <1>; 1748 1749 vin7csi20: endpoint@0 { 1750 reg = <0>; 1751 remote-endpoint = <&csi20vin7>; 1752 }; 1753 vin7csi40: endpoint@2 { 1754 reg = <2>; 1755 remote-endpoint = <&csi40vin7>; 1756 }; 1757 }; 1758 }; 1759 }; 1760 1761 drif00: rif@e6f40000 { 1762 compatible = "renesas,r8a7796-drif", 1763 "renesas,rcar-gen3-drif"; 1764 reg = <0 0xe6f40000 0 0x64>; 1765 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1766 clocks = <&cpg CPG_MOD 515>; 1767 clock-names = "fck"; 1768 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1769 dma-names = "rx", "rx"; 1770 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1771 resets = <&cpg 515>; 1772 renesas,bonding = <&drif01>; 1773 status = "disabled"; 1774 }; 1775 1776 drif01: rif@e6f50000 { 1777 compatible = "renesas,r8a7796-drif", 1778 "renesas,rcar-gen3-drif"; 1779 reg = <0 0xe6f50000 0 0x64>; 1780 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1781 clocks = <&cpg CPG_MOD 514>; 1782 clock-names = "fck"; 1783 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1784 dma-names = "rx", "rx"; 1785 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1786 resets = <&cpg 514>; 1787 renesas,bonding = <&drif00>; 1788 status = "disabled"; 1789 }; 1790 1791 drif10: rif@e6f60000 { 1792 compatible = "renesas,r8a7796-drif", 1793 "renesas,rcar-gen3-drif"; 1794 reg = <0 0xe6f60000 0 0x64>; 1795 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1796 clocks = <&cpg CPG_MOD 513>; 1797 clock-names = "fck"; 1798 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1799 dma-names = "rx", "rx"; 1800 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1801 resets = <&cpg 513>; 1802 renesas,bonding = <&drif11>; 1803 status = "disabled"; 1804 }; 1805 1806 drif11: rif@e6f70000 { 1807 compatible = "renesas,r8a7796-drif", 1808 "renesas,rcar-gen3-drif"; 1809 reg = <0 0xe6f70000 0 0x64>; 1810 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1811 clocks = <&cpg CPG_MOD 512>; 1812 clock-names = "fck"; 1813 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1814 dma-names = "rx", "rx"; 1815 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1816 resets = <&cpg 512>; 1817 renesas,bonding = <&drif10>; 1818 status = "disabled"; 1819 }; 1820 1821 drif20: rif@e6f80000 { 1822 compatible = "renesas,r8a7796-drif", 1823 "renesas,rcar-gen3-drif"; 1824 reg = <0 0xe6f80000 0 0x64>; 1825 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1826 clocks = <&cpg CPG_MOD 511>; 1827 clock-names = "fck"; 1828 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1829 dma-names = "rx", "rx"; 1830 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1831 resets = <&cpg 511>; 1832 renesas,bonding = <&drif21>; 1833 status = "disabled"; 1834 }; 1835 1836 drif21: rif@e6f90000 { 1837 compatible = "renesas,r8a7796-drif", 1838 "renesas,rcar-gen3-drif"; 1839 reg = <0 0xe6f90000 0 0x64>; 1840 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1841 clocks = <&cpg CPG_MOD 510>; 1842 clock-names = "fck"; 1843 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1844 dma-names = "rx", "rx"; 1845 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1846 resets = <&cpg 510>; 1847 renesas,bonding = <&drif20>; 1848 status = "disabled"; 1849 }; 1850 1851 drif30: rif@e6fa0000 { 1852 compatible = "renesas,r8a7796-drif", 1853 "renesas,rcar-gen3-drif"; 1854 reg = <0 0xe6fa0000 0 0x64>; 1855 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1856 clocks = <&cpg CPG_MOD 509>; 1857 clock-names = "fck"; 1858 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1859 dma-names = "rx", "rx"; 1860 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1861 resets = <&cpg 509>; 1862 renesas,bonding = <&drif31>; 1863 status = "disabled"; 1864 }; 1865 1866 drif31: rif@e6fb0000 { 1867 compatible = "renesas,r8a7796-drif", 1868 "renesas,rcar-gen3-drif"; 1869 reg = <0 0xe6fb0000 0 0x64>; 1870 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1871 clocks = <&cpg CPG_MOD 508>; 1872 clock-names = "fck"; 1873 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1874 dma-names = "rx", "rx"; 1875 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1876 resets = <&cpg 508>; 1877 renesas,bonding = <&drif30>; 1878 status = "disabled"; 1879 }; 1880 1881 rcar_sound: sound@ec500000 { 1882 /* 1883 * #sound-dai-cells is required 1884 * 1885 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1886 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1887 */ 1888 /* 1889 * #clock-cells is required for audio_clkout0/1/2/3 1890 * 1891 * clkout : #clock-cells = <0>; <&rcar_sound>; 1892 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1893 */ 1894 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; 1895 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1896 <0 0xec5a0000 0 0x100>, /* ADG */ 1897 <0 0xec540000 0 0x1000>, /* SSIU */ 1898 <0 0xec541000 0 0x280>, /* SSI */ 1899 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1900 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1901 1902 clocks = <&cpg CPG_MOD 1005>, 1903 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1904 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1905 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1906 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1907 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1908 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1909 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1910 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1911 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1912 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1913 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1914 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1915 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1916 <&audio_clk_a>, <&audio_clk_b>, 1917 <&audio_clk_c>, 1918 <&cpg CPG_CORE R8A7796_CLK_S0D4>; 1919 clock-names = "ssi-all", 1920 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1921 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1922 "ssi.1", "ssi.0", 1923 "src.9", "src.8", "src.7", "src.6", 1924 "src.5", "src.4", "src.3", "src.2", 1925 "src.1", "src.0", 1926 "mix.1", "mix.0", 1927 "ctu.1", "ctu.0", 1928 "dvc.0", "dvc.1", 1929 "clk_a", "clk_b", "clk_c", "clk_i"; 1930 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1931 resets = <&cpg 1005>, 1932 <&cpg 1006>, <&cpg 1007>, 1933 <&cpg 1008>, <&cpg 1009>, 1934 <&cpg 1010>, <&cpg 1011>, 1935 <&cpg 1012>, <&cpg 1013>, 1936 <&cpg 1014>, <&cpg 1015>; 1937 reset-names = "ssi-all", 1938 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1939 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1940 "ssi.1", "ssi.0"; 1941 status = "disabled"; 1942 1943 rcar_sound,ctu { 1944 ctu00: ctu-0 { }; 1945 ctu01: ctu-1 { }; 1946 ctu02: ctu-2 { }; 1947 ctu03: ctu-3 { }; 1948 ctu10: ctu-4 { }; 1949 ctu11: ctu-5 { }; 1950 ctu12: ctu-6 { }; 1951 ctu13: ctu-7 { }; 1952 }; 1953 1954 rcar_sound,dvc { 1955 dvc0: dvc-0 { 1956 dmas = <&audma1 0xbc>; 1957 dma-names = "tx"; 1958 }; 1959 dvc1: dvc-1 { 1960 dmas = <&audma1 0xbe>; 1961 dma-names = "tx"; 1962 }; 1963 }; 1964 1965 rcar_sound,mix { 1966 mix0: mix-0 { }; 1967 mix1: mix-1 { }; 1968 }; 1969 1970 rcar_sound,src { 1971 src0: src-0 { 1972 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1973 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1974 dma-names = "rx", "tx"; 1975 }; 1976 src1: src-1 { 1977 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1978 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1979 dma-names = "rx", "tx"; 1980 }; 1981 src2: src-2 { 1982 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1983 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1984 dma-names = "rx", "tx"; 1985 }; 1986 src3: src-3 { 1987 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1988 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1989 dma-names = "rx", "tx"; 1990 }; 1991 src4: src-4 { 1992 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1993 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1994 dma-names = "rx", "tx"; 1995 }; 1996 src5: src-5 { 1997 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1998 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1999 dma-names = "rx", "tx"; 2000 }; 2001 src6: src-6 { 2002 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 2003 dmas = <&audma0 0x91>, <&audma1 0xb4>; 2004 dma-names = "rx", "tx"; 2005 }; 2006 src7: src-7 { 2007 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 2008 dmas = <&audma0 0x93>, <&audma1 0xb6>; 2009 dma-names = "rx", "tx"; 2010 }; 2011 src8: src-8 { 2012 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 2013 dmas = <&audma0 0x95>, <&audma1 0xb8>; 2014 dma-names = "rx", "tx"; 2015 }; 2016 src9: src-9 { 2017 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 2018 dmas = <&audma0 0x97>, <&audma1 0xba>; 2019 dma-names = "rx", "tx"; 2020 }; 2021 }; 2022 2023 rcar_sound,ssi { 2024 ssi0: ssi-0 { 2025 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2026 dmas = <&audma0 0x01>, <&audma1 0x02>; 2027 dma-names = "rx", "tx"; 2028 }; 2029 ssi1: ssi-1 { 2030 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2031 dmas = <&audma0 0x03>, <&audma1 0x04>; 2032 dma-names = "rx", "tx"; 2033 }; 2034 ssi2: ssi-2 { 2035 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2036 dmas = <&audma0 0x05>, <&audma1 0x06>; 2037 dma-names = "rx", "tx"; 2038 }; 2039 ssi3: ssi-3 { 2040 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2041 dmas = <&audma0 0x07>, <&audma1 0x08>; 2042 dma-names = "rx", "tx"; 2043 }; 2044 ssi4: ssi-4 { 2045 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2046 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2047 dma-names = "rx", "tx"; 2048 }; 2049 ssi5: ssi-5 { 2050 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2051 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2052 dma-names = "rx", "tx"; 2053 }; 2054 ssi6: ssi-6 { 2055 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2056 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2057 dma-names = "rx", "tx"; 2058 }; 2059 ssi7: ssi-7 { 2060 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2061 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2062 dma-names = "rx", "tx"; 2063 }; 2064 ssi8: ssi-8 { 2065 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2066 dmas = <&audma0 0x11>, <&audma1 0x12>; 2067 dma-names = "rx", "tx"; 2068 }; 2069 ssi9: ssi-9 { 2070 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2071 dmas = <&audma0 0x13>, <&audma1 0x14>; 2072 dma-names = "rx", "tx"; 2073 }; 2074 }; 2075 2076 rcar_sound,ssiu { 2077 ssiu00: ssiu-0 { 2078 dmas = <&audma0 0x15>, <&audma1 0x16>; 2079 dma-names = "rx", "tx"; 2080 }; 2081 ssiu01: ssiu-1 { 2082 dmas = <&audma0 0x35>, <&audma1 0x36>; 2083 dma-names = "rx", "tx"; 2084 }; 2085 ssiu02: ssiu-2 { 2086 dmas = <&audma0 0x37>, <&audma1 0x38>; 2087 dma-names = "rx", "tx"; 2088 }; 2089 ssiu03: ssiu-3 { 2090 dmas = <&audma0 0x47>, <&audma1 0x48>; 2091 dma-names = "rx", "tx"; 2092 }; 2093 ssiu04: ssiu-4 { 2094 dmas = <&audma0 0x3F>, <&audma1 0x40>; 2095 dma-names = "rx", "tx"; 2096 }; 2097 ssiu05: ssiu-5 { 2098 dmas = <&audma0 0x43>, <&audma1 0x44>; 2099 dma-names = "rx", "tx"; 2100 }; 2101 ssiu06: ssiu-6 { 2102 dmas = <&audma0 0x4F>, <&audma1 0x50>; 2103 dma-names = "rx", "tx"; 2104 }; 2105 ssiu07: ssiu-7 { 2106 dmas = <&audma0 0x53>, <&audma1 0x54>; 2107 dma-names = "rx", "tx"; 2108 }; 2109 ssiu10: ssiu-8 { 2110 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2111 dma-names = "rx", "tx"; 2112 }; 2113 ssiu11: ssiu-9 { 2114 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2115 dma-names = "rx", "tx"; 2116 }; 2117 ssiu12: ssiu-10 { 2118 dmas = <&audma0 0x57>, <&audma1 0x58>; 2119 dma-names = "rx", "tx"; 2120 }; 2121 ssiu13: ssiu-11 { 2122 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2123 dma-names = "rx", "tx"; 2124 }; 2125 ssiu14: ssiu-12 { 2126 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2127 dma-names = "rx", "tx"; 2128 }; 2129 ssiu15: ssiu-13 { 2130 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2131 dma-names = "rx", "tx"; 2132 }; 2133 ssiu16: ssiu-14 { 2134 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2135 dma-names = "rx", "tx"; 2136 }; 2137 ssiu17: ssiu-15 { 2138 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2139 dma-names = "rx", "tx"; 2140 }; 2141 ssiu20: ssiu-16 { 2142 dmas = <&audma0 0x63>, <&audma1 0x64>; 2143 dma-names = "rx", "tx"; 2144 }; 2145 ssiu21: ssiu-17 { 2146 dmas = <&audma0 0x67>, <&audma1 0x68>; 2147 dma-names = "rx", "tx"; 2148 }; 2149 ssiu22: ssiu-18 { 2150 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2151 dma-names = "rx", "tx"; 2152 }; 2153 ssiu23: ssiu-19 { 2154 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2155 dma-names = "rx", "tx"; 2156 }; 2157 ssiu24: ssiu-20 { 2158 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2159 dma-names = "rx", "tx"; 2160 }; 2161 ssiu25: ssiu-21 { 2162 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2163 dma-names = "rx", "tx"; 2164 }; 2165 ssiu26: ssiu-22 { 2166 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2167 dma-names = "rx", "tx"; 2168 }; 2169 ssiu27: ssiu-23 { 2170 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2171 dma-names = "rx", "tx"; 2172 }; 2173 ssiu30: ssiu-24 { 2174 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2175 dma-names = "rx", "tx"; 2176 }; 2177 ssiu31: ssiu-25 { 2178 dmas = <&audma0 0x21>, <&audma1 0x22>; 2179 dma-names = "rx", "tx"; 2180 }; 2181 ssiu32: ssiu-26 { 2182 dmas = <&audma0 0x23>, <&audma1 0x24>; 2183 dma-names = "rx", "tx"; 2184 }; 2185 ssiu33: ssiu-27 { 2186 dmas = <&audma0 0x25>, <&audma1 0x26>; 2187 dma-names = "rx", "tx"; 2188 }; 2189 ssiu34: ssiu-28 { 2190 dmas = <&audma0 0x27>, <&audma1 0x28>; 2191 dma-names = "rx", "tx"; 2192 }; 2193 ssiu35: ssiu-29 { 2194 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2195 dma-names = "rx", "tx"; 2196 }; 2197 ssiu36: ssiu-30 { 2198 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2199 dma-names = "rx", "tx"; 2200 }; 2201 ssiu37: ssiu-31 { 2202 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2203 dma-names = "rx", "tx"; 2204 }; 2205 ssiu40: ssiu-32 { 2206 dmas = <&audma0 0x71>, <&audma1 0x72>; 2207 dma-names = "rx", "tx"; 2208 }; 2209 ssiu41: ssiu-33 { 2210 dmas = <&audma0 0x17>, <&audma1 0x18>; 2211 dma-names = "rx", "tx"; 2212 }; 2213 ssiu42: ssiu-34 { 2214 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2215 dma-names = "rx", "tx"; 2216 }; 2217 ssiu43: ssiu-35 { 2218 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2219 dma-names = "rx", "tx"; 2220 }; 2221 ssiu44: ssiu-36 { 2222 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2223 dma-names = "rx", "tx"; 2224 }; 2225 ssiu45: ssiu-37 { 2226 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2227 dma-names = "rx", "tx"; 2228 }; 2229 ssiu46: ssiu-38 { 2230 dmas = <&audma0 0x31>, <&audma1 0x32>; 2231 dma-names = "rx", "tx"; 2232 }; 2233 ssiu47: ssiu-39 { 2234 dmas = <&audma0 0x33>, <&audma1 0x34>; 2235 dma-names = "rx", "tx"; 2236 }; 2237 ssiu50: ssiu-40 { 2238 dmas = <&audma0 0x73>, <&audma1 0x74>; 2239 dma-names = "rx", "tx"; 2240 }; 2241 ssiu60: ssiu-41 { 2242 dmas = <&audma0 0x75>, <&audma1 0x76>; 2243 dma-names = "rx", "tx"; 2244 }; 2245 ssiu70: ssiu-42 { 2246 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2247 dma-names = "rx", "tx"; 2248 }; 2249 ssiu80: ssiu-43 { 2250 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2251 dma-names = "rx", "tx"; 2252 }; 2253 ssiu90: ssiu-44 { 2254 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2255 dma-names = "rx", "tx"; 2256 }; 2257 ssiu91: ssiu-45 { 2258 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2259 dma-names = "rx", "tx"; 2260 }; 2261 ssiu92: ssiu-46 { 2262 dmas = <&audma0 0x81>, <&audma1 0x82>; 2263 dma-names = "rx", "tx"; 2264 }; 2265 ssiu93: ssiu-47 { 2266 dmas = <&audma0 0x83>, <&audma1 0x84>; 2267 dma-names = "rx", "tx"; 2268 }; 2269 ssiu94: ssiu-48 { 2270 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2271 dma-names = "rx", "tx"; 2272 }; 2273 ssiu95: ssiu-49 { 2274 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2275 dma-names = "rx", "tx"; 2276 }; 2277 ssiu96: ssiu-50 { 2278 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2279 dma-names = "rx", "tx"; 2280 }; 2281 ssiu97: ssiu-51 { 2282 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2283 dma-names = "rx", "tx"; 2284 }; 2285 }; 2286 }; 2287 2288 mlp: mlp@ec520000 { 2289 compatible = "renesas,r8a7796-mlp", 2290 "renesas,rcar-gen3-mlp"; 2291 reg = <0 0xec520000 0 0x800>; 2292 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2293 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2294 clocks = <&cpg CPG_MOD 802>; 2295 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2296 resets = <&cpg 802>; 2297 status = "disabled"; 2298 }; 2299 2300 audma0: dma-controller@ec700000 { 2301 compatible = "renesas,dmac-r8a7796", 2302 "renesas,rcar-dmac"; 2303 reg = <0 0xec700000 0 0x10000>; 2304 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2305 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2306 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2307 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2308 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2309 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2310 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2311 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2312 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2313 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2314 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2315 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2316 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2317 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2318 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2319 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2320 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2321 interrupt-names = "error", 2322 "ch0", "ch1", "ch2", "ch3", 2323 "ch4", "ch5", "ch6", "ch7", 2324 "ch8", "ch9", "ch10", "ch11", 2325 "ch12", "ch13", "ch14", "ch15"; 2326 clocks = <&cpg CPG_MOD 502>; 2327 clock-names = "fck"; 2328 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2329 resets = <&cpg 502>; 2330 #dma-cells = <1>; 2331 dma-channels = <16>; 2332 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2333 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2334 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2335 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2336 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2337 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2338 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2339 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2340 }; 2341 2342 audma1: dma-controller@ec720000 { 2343 compatible = "renesas,dmac-r8a7796", 2344 "renesas,rcar-dmac"; 2345 reg = <0 0xec720000 0 0x10000>; 2346 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2347 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2348 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2349 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2350 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2351 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2352 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2353 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2354 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2355 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2356 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2357 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2358 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2359 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2360 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2361 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2362 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2363 interrupt-names = "error", 2364 "ch0", "ch1", "ch2", "ch3", 2365 "ch4", "ch5", "ch6", "ch7", 2366 "ch8", "ch9", "ch10", "ch11", 2367 "ch12", "ch13", "ch14", "ch15"; 2368 clocks = <&cpg CPG_MOD 501>; 2369 clock-names = "fck"; 2370 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2371 resets = <&cpg 501>; 2372 #dma-cells = <1>; 2373 dma-channels = <16>; 2374 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2375 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2376 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2377 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2378 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2379 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2380 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2381 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2382 }; 2383 2384 xhci0: usb@ee000000 { 2385 compatible = "renesas,xhci-r8a7796", 2386 "renesas,rcar-gen3-xhci"; 2387 reg = <0 0xee000000 0 0xc00>; 2388 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2389 clocks = <&cpg CPG_MOD 328>; 2390 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2391 resets = <&cpg 328>; 2392 status = "disabled"; 2393 }; 2394 2395 usb3_peri0: usb@ee020000 { 2396 compatible = "renesas,r8a7796-usb3-peri", 2397 "renesas,rcar-gen3-usb3-peri"; 2398 reg = <0 0xee020000 0 0x400>; 2399 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2400 clocks = <&cpg CPG_MOD 328>; 2401 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2402 resets = <&cpg 328>; 2403 status = "disabled"; 2404 }; 2405 2406 ohci0: usb@ee080000 { 2407 compatible = "generic-ohci"; 2408 reg = <0 0xee080000 0 0x100>; 2409 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2410 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2411 phys = <&usb2_phy0 1>; 2412 phy-names = "usb"; 2413 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2414 resets = <&cpg 703>, <&cpg 704>; 2415 status = "disabled"; 2416 }; 2417 2418 ohci1: usb@ee0a0000 { 2419 compatible = "generic-ohci"; 2420 reg = <0 0xee0a0000 0 0x100>; 2421 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2422 clocks = <&cpg CPG_MOD 702>; 2423 phys = <&usb2_phy1 1>; 2424 phy-names = "usb"; 2425 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2426 resets = <&cpg 702>; 2427 status = "disabled"; 2428 }; 2429 2430 ehci0: usb@ee080100 { 2431 compatible = "generic-ehci"; 2432 reg = <0 0xee080100 0 0x100>; 2433 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2434 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2435 phys = <&usb2_phy0 2>; 2436 phy-names = "usb"; 2437 companion = <&ohci0>; 2438 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2439 resets = <&cpg 703>, <&cpg 704>; 2440 status = "disabled"; 2441 }; 2442 2443 ehci1: usb@ee0a0100 { 2444 compatible = "generic-ehci"; 2445 reg = <0 0xee0a0100 0 0x100>; 2446 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2447 clocks = <&cpg CPG_MOD 702>; 2448 phys = <&usb2_phy1 2>; 2449 phy-names = "usb"; 2450 companion = <&ohci1>; 2451 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2452 resets = <&cpg 702>; 2453 status = "disabled"; 2454 }; 2455 2456 usb2_phy0: usb-phy@ee080200 { 2457 compatible = "renesas,usb2-phy-r8a7796", 2458 "renesas,rcar-gen3-usb2-phy"; 2459 reg = <0 0xee080200 0 0x700>; 2460 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2461 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2462 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2463 resets = <&cpg 703>, <&cpg 704>; 2464 #phy-cells = <1>; 2465 status = "disabled"; 2466 }; 2467 2468 usb2_phy1: usb-phy@ee0a0200 { 2469 compatible = "renesas,usb2-phy-r8a7796", 2470 "renesas,rcar-gen3-usb2-phy"; 2471 reg = <0 0xee0a0200 0 0x700>; 2472 clocks = <&cpg CPG_MOD 702>; 2473 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2474 resets = <&cpg 702>; 2475 #phy-cells = <1>; 2476 status = "disabled"; 2477 }; 2478 2479 sdhi0: mmc@ee100000 { 2480 compatible = "renesas,sdhi-r8a7796", 2481 "renesas,rcar-gen3-sdhi"; 2482 reg = <0 0xee100000 0 0x2000>; 2483 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2484 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7796_CLK_SD0H>; 2485 clock-names = "core", "clkh"; 2486 max-frequency = <200000000>; 2487 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2488 resets = <&cpg 314>; 2489 iommus = <&ipmmu_ds1 32>; 2490 status = "disabled"; 2491 }; 2492 2493 sdhi1: mmc@ee120000 { 2494 compatible = "renesas,sdhi-r8a7796", 2495 "renesas,rcar-gen3-sdhi"; 2496 reg = <0 0xee120000 0 0x2000>; 2497 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2498 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7796_CLK_SD1H>; 2499 clock-names = "core", "clkh"; 2500 max-frequency = <200000000>; 2501 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2502 resets = <&cpg 313>; 2503 iommus = <&ipmmu_ds1 33>; 2504 status = "disabled"; 2505 }; 2506 2507 sdhi2: mmc@ee140000 { 2508 compatible = "renesas,sdhi-r8a7796", 2509 "renesas,rcar-gen3-sdhi"; 2510 reg = <0 0xee140000 0 0x2000>; 2511 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2512 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7796_CLK_SD2H>; 2513 clock-names = "core", "clkh"; 2514 max-frequency = <200000000>; 2515 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2516 resets = <&cpg 312>; 2517 iommus = <&ipmmu_ds1 34>; 2518 status = "disabled"; 2519 }; 2520 2521 sdhi3: mmc@ee160000 { 2522 compatible = "renesas,sdhi-r8a7796", 2523 "renesas,rcar-gen3-sdhi"; 2524 reg = <0 0xee160000 0 0x2000>; 2525 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2526 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7796_CLK_SD3H>; 2527 clock-names = "core", "clkh"; 2528 max-frequency = <200000000>; 2529 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2530 resets = <&cpg 311>; 2531 iommus = <&ipmmu_ds1 35>; 2532 status = "disabled"; 2533 }; 2534 2535 rpc: spi@ee200000 { 2536 compatible = "renesas,r8a7796-rpc-if", 2537 "renesas,rcar-gen3-rpc-if"; 2538 reg = <0 0xee200000 0 0x200>, 2539 <0 0x08000000 0 0x04000000>, 2540 <0 0xee208000 0 0x100>; 2541 reg-names = "regs", "dirmap", "wbuf"; 2542 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2543 clocks = <&cpg CPG_MOD 917>; 2544 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2545 resets = <&cpg 917>; 2546 #address-cells = <1>; 2547 #size-cells = <0>; 2548 status = "disabled"; 2549 }; 2550 2551 gic: interrupt-controller@f1010000 { 2552 compatible = "arm,gic-400"; 2553 #interrupt-cells = <3>; 2554 #address-cells = <0>; 2555 interrupt-controller; 2556 reg = <0x0 0xf1010000 0 0x1000>, 2557 <0x0 0xf1020000 0 0x20000>, 2558 <0x0 0xf1040000 0 0x20000>, 2559 <0x0 0xf1060000 0 0x20000>; 2560 interrupts = <GIC_PPI 9 2561 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2562 clocks = <&cpg CPG_MOD 408>; 2563 clock-names = "clk"; 2564 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2565 resets = <&cpg 408>; 2566 }; 2567 2568 pciec0: pcie@fe000000 { 2569 compatible = "renesas,pcie-r8a7796", 2570 "renesas,pcie-rcar-gen3"; 2571 reg = <0 0xfe000000 0 0x80000>; 2572 #address-cells = <3>; 2573 #size-cells = <2>; 2574 bus-range = <0x00 0xff>; 2575 device_type = "pci"; 2576 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2577 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2578 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2579 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2580 /* Map all possible DDR as inbound ranges */ 2581 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2582 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2583 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2584 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2585 #interrupt-cells = <1>; 2586 interrupt-map-mask = <0 0 0 0>; 2587 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2588 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2589 clock-names = "pcie", "pcie_bus"; 2590 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2591 resets = <&cpg 319>; 2592 status = "disabled"; 2593 }; 2594 2595 pciec1: pcie@ee800000 { 2596 compatible = "renesas,pcie-r8a7796", 2597 "renesas,pcie-rcar-gen3"; 2598 reg = <0 0xee800000 0 0x80000>; 2599 #address-cells = <3>; 2600 #size-cells = <2>; 2601 bus-range = <0x00 0xff>; 2602 device_type = "pci"; 2603 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2604 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2605 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2606 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2607 /* Map all possible DDR as inbound ranges */ 2608 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2609 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2610 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2611 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2612 #interrupt-cells = <1>; 2613 interrupt-map-mask = <0 0 0 0>; 2614 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2615 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2616 clock-names = "pcie", "pcie_bus"; 2617 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2618 resets = <&cpg 318>; 2619 status = "disabled"; 2620 }; 2621 2622 imr-lx4@fe860000 { 2623 compatible = "renesas,r8a7796-imr-lx4", 2624 "renesas,imr-lx4"; 2625 reg = <0 0xfe860000 0 0x2000>; 2626 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2627 clocks = <&cpg CPG_MOD 823>; 2628 power-domains = <&sysc R8A7796_PD_A3VC>; 2629 resets = <&cpg 823>; 2630 }; 2631 2632 imr-lx4@fe870000 { 2633 compatible = "renesas,r8a7796-imr-lx4", 2634 "renesas,imr-lx4"; 2635 reg = <0 0xfe870000 0 0x2000>; 2636 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2637 clocks = <&cpg CPG_MOD 822>; 2638 power-domains = <&sysc R8A7796_PD_A3VC>; 2639 resets = <&cpg 822>; 2640 }; 2641 2642 fdp1@fe940000 { 2643 compatible = "renesas,fdp1"; 2644 reg = <0 0xfe940000 0 0x2400>; 2645 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2646 clocks = <&cpg CPG_MOD 119>; 2647 power-domains = <&sysc R8A7796_PD_A3VC>; 2648 resets = <&cpg 119>; 2649 renesas,fcp = <&fcpf0>; 2650 }; 2651 2652 fcpf0: fcp@fe950000 { 2653 compatible = "renesas,fcpf"; 2654 reg = <0 0xfe950000 0 0x200>; 2655 clocks = <&cpg CPG_MOD 615>; 2656 power-domains = <&sysc R8A7796_PD_A3VC>; 2657 resets = <&cpg 615>; 2658 }; 2659 2660 fcpvb0: fcp@fe96f000 { 2661 compatible = "renesas,fcpv"; 2662 reg = <0 0xfe96f000 0 0x200>; 2663 clocks = <&cpg CPG_MOD 607>; 2664 power-domains = <&sysc R8A7796_PD_A3VC>; 2665 resets = <&cpg 607>; 2666 }; 2667 2668 fcpvi0: fcp@fe9af000 { 2669 compatible = "renesas,fcpv"; 2670 reg = <0 0xfe9af000 0 0x200>; 2671 clocks = <&cpg CPG_MOD 611>; 2672 power-domains = <&sysc R8A7796_PD_A3VC>; 2673 resets = <&cpg 611>; 2674 iommus = <&ipmmu_vc0 19>; 2675 }; 2676 2677 fcpvd0: fcp@fea27000 { 2678 compatible = "renesas,fcpv"; 2679 reg = <0 0xfea27000 0 0x200>; 2680 clocks = <&cpg CPG_MOD 603>; 2681 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2682 resets = <&cpg 603>; 2683 iommus = <&ipmmu_vi0 8>; 2684 }; 2685 2686 fcpvd1: fcp@fea2f000 { 2687 compatible = "renesas,fcpv"; 2688 reg = <0 0xfea2f000 0 0x200>; 2689 clocks = <&cpg CPG_MOD 602>; 2690 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2691 resets = <&cpg 602>; 2692 iommus = <&ipmmu_vi0 9>; 2693 }; 2694 2695 fcpvd2: fcp@fea37000 { 2696 compatible = "renesas,fcpv"; 2697 reg = <0 0xfea37000 0 0x200>; 2698 clocks = <&cpg CPG_MOD 601>; 2699 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2700 resets = <&cpg 601>; 2701 iommus = <&ipmmu_vi0 10>; 2702 }; 2703 2704 vspb: vsp@fe960000 { 2705 compatible = "renesas,vsp2"; 2706 reg = <0 0xfe960000 0 0x8000>; 2707 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2708 clocks = <&cpg CPG_MOD 626>; 2709 power-domains = <&sysc R8A7796_PD_A3VC>; 2710 resets = <&cpg 626>; 2711 2712 renesas,fcp = <&fcpvb0>; 2713 }; 2714 2715 vspd0: vsp@fea20000 { 2716 compatible = "renesas,vsp2"; 2717 reg = <0 0xfea20000 0 0x5000>; 2718 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2719 clocks = <&cpg CPG_MOD 623>; 2720 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2721 resets = <&cpg 623>; 2722 2723 renesas,fcp = <&fcpvd0>; 2724 }; 2725 2726 vspd1: vsp@fea28000 { 2727 compatible = "renesas,vsp2"; 2728 reg = <0 0xfea28000 0 0x5000>; 2729 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2730 clocks = <&cpg CPG_MOD 622>; 2731 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2732 resets = <&cpg 622>; 2733 2734 renesas,fcp = <&fcpvd1>; 2735 }; 2736 2737 vspd2: vsp@fea30000 { 2738 compatible = "renesas,vsp2"; 2739 reg = <0 0xfea30000 0 0x5000>; 2740 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2741 clocks = <&cpg CPG_MOD 621>; 2742 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2743 resets = <&cpg 621>; 2744 2745 renesas,fcp = <&fcpvd2>; 2746 }; 2747 2748 vspi0: vsp@fe9a0000 { 2749 compatible = "renesas,vsp2"; 2750 reg = <0 0xfe9a0000 0 0x8000>; 2751 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2752 clocks = <&cpg CPG_MOD 631>; 2753 power-domains = <&sysc R8A7796_PD_A3VC>; 2754 resets = <&cpg 631>; 2755 2756 renesas,fcp = <&fcpvi0>; 2757 }; 2758 2759 cmm0: cmm@fea40000 { 2760 compatible = "renesas,r8a7796-cmm", 2761 "renesas,rcar-gen3-cmm"; 2762 reg = <0 0xfea40000 0 0x1000>; 2763 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2764 clocks = <&cpg CPG_MOD 711>; 2765 resets = <&cpg 711>; 2766 }; 2767 2768 cmm1: cmm@fea50000 { 2769 compatible = "renesas,r8a7796-cmm", 2770 "renesas,rcar-gen3-cmm"; 2771 reg = <0 0xfea50000 0 0x1000>; 2772 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2773 clocks = <&cpg CPG_MOD 710>; 2774 resets = <&cpg 710>; 2775 }; 2776 2777 cmm2: cmm@fea60000 { 2778 compatible = "renesas,r8a7796-cmm", 2779 "renesas,rcar-gen3-cmm"; 2780 reg = <0 0xfea60000 0 0x1000>; 2781 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2782 clocks = <&cpg CPG_MOD 709>; 2783 resets = <&cpg 709>; 2784 }; 2785 2786 csi20: csi2@fea80000 { 2787 compatible = "renesas,r8a7796-csi2"; 2788 reg = <0 0xfea80000 0 0x10000>; 2789 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2790 clocks = <&cpg CPG_MOD 714>; 2791 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2792 resets = <&cpg 714>; 2793 status = "disabled"; 2794 2795 ports { 2796 #address-cells = <1>; 2797 #size-cells = <0>; 2798 2799 port@0 { 2800 reg = <0>; 2801 }; 2802 2803 port@1 { 2804 #address-cells = <1>; 2805 #size-cells = <0>; 2806 2807 reg = <1>; 2808 2809 csi20vin0: endpoint@0 { 2810 reg = <0>; 2811 remote-endpoint = <&vin0csi20>; 2812 }; 2813 csi20vin1: endpoint@1 { 2814 reg = <1>; 2815 remote-endpoint = <&vin1csi20>; 2816 }; 2817 csi20vin2: endpoint@2 { 2818 reg = <2>; 2819 remote-endpoint = <&vin2csi20>; 2820 }; 2821 csi20vin3: endpoint@3 { 2822 reg = <3>; 2823 remote-endpoint = <&vin3csi20>; 2824 }; 2825 csi20vin4: endpoint@4 { 2826 reg = <4>; 2827 remote-endpoint = <&vin4csi20>; 2828 }; 2829 csi20vin5: endpoint@5 { 2830 reg = <5>; 2831 remote-endpoint = <&vin5csi20>; 2832 }; 2833 csi20vin6: endpoint@6 { 2834 reg = <6>; 2835 remote-endpoint = <&vin6csi20>; 2836 }; 2837 csi20vin7: endpoint@7 { 2838 reg = <7>; 2839 remote-endpoint = <&vin7csi20>; 2840 }; 2841 }; 2842 }; 2843 }; 2844 2845 csi40: csi2@feaa0000 { 2846 compatible = "renesas,r8a7796-csi2"; 2847 reg = <0 0xfeaa0000 0 0x10000>; 2848 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2849 clocks = <&cpg CPG_MOD 716>; 2850 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2851 resets = <&cpg 716>; 2852 status = "disabled"; 2853 2854 ports { 2855 #address-cells = <1>; 2856 #size-cells = <0>; 2857 2858 port@0 { 2859 reg = <0>; 2860 }; 2861 2862 port@1 { 2863 #address-cells = <1>; 2864 #size-cells = <0>; 2865 2866 reg = <1>; 2867 2868 csi40vin0: endpoint@0 { 2869 reg = <0>; 2870 remote-endpoint = <&vin0csi40>; 2871 }; 2872 csi40vin1: endpoint@1 { 2873 reg = <1>; 2874 remote-endpoint = <&vin1csi40>; 2875 }; 2876 csi40vin2: endpoint@2 { 2877 reg = <2>; 2878 remote-endpoint = <&vin2csi40>; 2879 }; 2880 csi40vin3: endpoint@3 { 2881 reg = <3>; 2882 remote-endpoint = <&vin3csi40>; 2883 }; 2884 csi40vin4: endpoint@4 { 2885 reg = <4>; 2886 remote-endpoint = <&vin4csi40>; 2887 }; 2888 csi40vin5: endpoint@5 { 2889 reg = <5>; 2890 remote-endpoint = <&vin5csi40>; 2891 }; 2892 csi40vin6: endpoint@6 { 2893 reg = <6>; 2894 remote-endpoint = <&vin6csi40>; 2895 }; 2896 csi40vin7: endpoint@7 { 2897 reg = <7>; 2898 remote-endpoint = <&vin7csi40>; 2899 }; 2900 }; 2901 2902 }; 2903 }; 2904 2905 hdmi0: hdmi@fead0000 { 2906 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; 2907 reg = <0 0xfead0000 0 0x10000>; 2908 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2909 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; 2910 clock-names = "iahb", "isfr"; 2911 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2912 resets = <&cpg 729>; 2913 status = "disabled"; 2914 2915 ports { 2916 #address-cells = <1>; 2917 #size-cells = <0>; 2918 port@0 { 2919 reg = <0>; 2920 dw_hdmi0_in: endpoint { 2921 remote-endpoint = <&du_out_hdmi0>; 2922 }; 2923 }; 2924 port@1 { 2925 reg = <1>; 2926 }; 2927 port@2 { 2928 /* HDMI sound */ 2929 reg = <2>; 2930 }; 2931 }; 2932 }; 2933 2934 du: display@feb00000 { 2935 compatible = "renesas,du-r8a7796"; 2936 reg = <0 0xfeb00000 0 0x70000>; 2937 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2938 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2939 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2940 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2941 <&cpg CPG_MOD 722>; 2942 clock-names = "du.0", "du.1", "du.2"; 2943 resets = <&cpg 724>, <&cpg 722>; 2944 reset-names = "du.0", "du.2"; 2945 2946 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>; 2947 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; 2948 2949 status = "disabled"; 2950 2951 ports { 2952 #address-cells = <1>; 2953 #size-cells = <0>; 2954 2955 port@0 { 2956 reg = <0>; 2957 du_out_rgb: endpoint { 2958 }; 2959 }; 2960 port@1 { 2961 reg = <1>; 2962 du_out_hdmi0: endpoint { 2963 remote-endpoint = <&dw_hdmi0_in>; 2964 }; 2965 }; 2966 port@2 { 2967 reg = <2>; 2968 du_out_lvds0: endpoint { 2969 remote-endpoint = <&lvds0_in>; 2970 }; 2971 }; 2972 }; 2973 }; 2974 2975 lvds0: lvds@feb90000 { 2976 compatible = "renesas,r8a7796-lvds"; 2977 reg = <0 0xfeb90000 0 0x14>; 2978 clocks = <&cpg CPG_MOD 727>; 2979 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2980 resets = <&cpg 727>; 2981 status = "disabled"; 2982 2983 ports { 2984 #address-cells = <1>; 2985 #size-cells = <0>; 2986 2987 port@0 { 2988 reg = <0>; 2989 lvds0_in: endpoint { 2990 remote-endpoint = <&du_out_lvds0>; 2991 }; 2992 }; 2993 port@1 { 2994 reg = <1>; 2995 lvds0_out: endpoint { 2996 }; 2997 }; 2998 }; 2999 }; 3000 3001 prr: chipid@fff00044 { 3002 compatible = "renesas,prr"; 3003 reg = <0 0xfff00044 0 4>; 3004 }; 3005 }; 3006 3007 thermal-zones { 3008 sensor1_thermal: sensor1-thermal { 3009 polling-delay-passive = <250>; 3010 polling-delay = <1000>; 3011 thermal-sensors = <&tsc 0>; 3012 sustainable-power = <3874>; 3013 3014 trips { 3015 sensor1_crit: sensor1-crit { 3016 temperature = <120000>; 3017 hysteresis = <1000>; 3018 type = "critical"; 3019 }; 3020 }; 3021 }; 3022 3023 sensor2_thermal: sensor2-thermal { 3024 polling-delay-passive = <250>; 3025 polling-delay = <1000>; 3026 thermal-sensors = <&tsc 1>; 3027 sustainable-power = <3874>; 3028 3029 trips { 3030 sensor2_crit: sensor2-crit { 3031 temperature = <120000>; 3032 hysteresis = <1000>; 3033 type = "critical"; 3034 }; 3035 }; 3036 }; 3037 3038 sensor3_thermal: sensor3-thermal { 3039 polling-delay-passive = <250>; 3040 polling-delay = <1000>; 3041 thermal-sensors = <&tsc 2>; 3042 sustainable-power = <3874>; 3043 3044 cooling-maps { 3045 map0 { 3046 trip = <&target>; 3047 cooling-device = <&a57_0 2 4>; 3048 contribution = <1024>; 3049 }; 3050 map1 { 3051 trip = <&target>; 3052 cooling-device = <&a53_0 0 2>; 3053 contribution = <1024>; 3054 }; 3055 }; 3056 trips { 3057 target: trip-point1 { 3058 temperature = <100000>; 3059 hysteresis = <1000>; 3060 type = "passive"; 3061 }; 3062 3063 sensor3_crit: sensor3-crit { 3064 temperature = <120000>; 3065 hysteresis = <1000>; 3066 type = "critical"; 3067 }; 3068 }; 3069 }; 3070 }; 3071 3072 timer { 3073 compatible = "arm,armv8-timer"; 3074 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 3075 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 3076 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 3077 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 3078 }; 3079 3080 /* External USB clocks - can be overridden by the board */ 3081 usb3s0_clk: usb3s0 { 3082 compatible = "fixed-clock"; 3083 #clock-cells = <0>; 3084 clock-frequency = <0>; 3085 }; 3086 3087 usb_extal_clk: usb_extal { 3088 compatible = "fixed-clock"; 3089 #clock-cells = <0>; 3090 clock-frequency = <0>; 3091 }; 3092}; 3093