xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/r8a77951-ulcb.dts (revision cfd7bf66b2a3f399ecdf67bbdf03d3c3c9078fad)
1919d31abSGeert Uytterhoeven// SPDX-License-Identifier: GPL-2.0
2919d31abSGeert Uytterhoeven/*
3*cfd7bf66SGeert Uytterhoeven * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board with R-Car H3 ES2.0+
4919d31abSGeert Uytterhoeven *
5919d31abSGeert Uytterhoeven * Copyright (C) 2016 Renesas Electronics Corp.
6919d31abSGeert Uytterhoeven * Copyright (C) 2016 Cogent Embedded, Inc.
7919d31abSGeert Uytterhoeven */
8919d31abSGeert Uytterhoeven
9919d31abSGeert Uytterhoeven/dts-v1/;
10919d31abSGeert Uytterhoeven#include "r8a77951.dtsi"
11919d31abSGeert Uytterhoeven#include "ulcb.dtsi"
12919d31abSGeert Uytterhoeven
13919d31abSGeert Uytterhoeven/ {
14919d31abSGeert Uytterhoeven	model = "Renesas H3ULCB board based on r8a77951";
15919d31abSGeert Uytterhoeven	compatible = "renesas,h3ulcb", "renesas,r8a7795";
16919d31abSGeert Uytterhoeven
17919d31abSGeert Uytterhoeven	memory@48000000 {
18919d31abSGeert Uytterhoeven		device_type = "memory";
19919d31abSGeert Uytterhoeven		/* first 128MB is reserved for secure area. */
20919d31abSGeert Uytterhoeven		reg = <0x0 0x48000000 0x0 0x38000000>;
21919d31abSGeert Uytterhoeven	};
22919d31abSGeert Uytterhoeven
23919d31abSGeert Uytterhoeven	memory@500000000 {
24919d31abSGeert Uytterhoeven		device_type = "memory";
25919d31abSGeert Uytterhoeven		reg = <0x5 0x00000000 0x0 0x40000000>;
26919d31abSGeert Uytterhoeven	};
27919d31abSGeert Uytterhoeven
28919d31abSGeert Uytterhoeven	memory@600000000 {
29919d31abSGeert Uytterhoeven		device_type = "memory";
30919d31abSGeert Uytterhoeven		reg = <0x6 0x00000000 0x0 0x40000000>;
31919d31abSGeert Uytterhoeven	};
32919d31abSGeert Uytterhoeven
33919d31abSGeert Uytterhoeven	memory@700000000 {
34919d31abSGeert Uytterhoeven		device_type = "memory";
35919d31abSGeert Uytterhoeven		reg = <0x7 0x00000000 0x0 0x40000000>;
36919d31abSGeert Uytterhoeven	};
37919d31abSGeert Uytterhoeven};
38919d31abSGeert Uytterhoeven
39919d31abSGeert Uytterhoeven&du {
40919d31abSGeert Uytterhoeven	clocks = <&cpg CPG_MOD 724>,
41919d31abSGeert Uytterhoeven		 <&cpg CPG_MOD 723>,
42919d31abSGeert Uytterhoeven		 <&cpg CPG_MOD 722>,
43919d31abSGeert Uytterhoeven		 <&cpg CPG_MOD 721>,
44919d31abSGeert Uytterhoeven		 <&versaclock5 1>,
45919d31abSGeert Uytterhoeven		 <&versaclock5 3>,
46919d31abSGeert Uytterhoeven		 <&versaclock5 4>,
47919d31abSGeert Uytterhoeven		 <&versaclock5 2>;
48919d31abSGeert Uytterhoeven	clock-names = "du.0", "du.1", "du.2", "du.3",
49919d31abSGeert Uytterhoeven		      "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
50919d31abSGeert Uytterhoeven};
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