1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874) 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 8/dts-v1/; 9#include "r8a774c0.dtsi" 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/display/tda998x.h> 12 13/ { 14 model = "Silicon Linux RZ/G2E 96board platform (CAT874)"; 15 compatible = "si-linux,cat874", "renesas,r8a774c0"; 16 17 aliases { 18 serial0 = &scif2; 19 }; 20 21 chosen { 22 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; 23 stdout-path = "serial0:115200n8"; 24 }; 25 26 hdmi-out { 27 compatible = "hdmi-connector"; 28 type = "a"; 29 30 port { 31 hdmi_con_out: endpoint { 32 remote-endpoint = <&tda19988_out>; 33 }; 34 }; 35 }; 36 37 leds { 38 compatible = "gpio-leds"; 39 40 led0 { 41 gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; 42 label = "LED0"; 43 }; 44 45 led1 { 46 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 47 label = "LED1"; 48 }; 49 50 led2 { 51 gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; 52 label = "LED2"; 53 }; 54 55 led3 { 56 gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; 57 label = "LED3"; 58 }; 59 }; 60 61 memory@48000000 { 62 device_type = "memory"; 63 /* first 128MB is reserved for secure area. */ 64 reg = <0x0 0x48000000 0x0 0x78000000>; 65 }; 66 67 sound: sound { 68 compatible = "simple-audio-card"; 69 70 simple-audio-card,name = "CAT874 HDMI sound"; 71 simple-audio-card,format = "i2s"; 72 simple-audio-card,bitclock-master = <&sndcpu>; 73 simple-audio-card,frame-master = <&sndcpu>; 74 75 sndcpu: simple-audio-card,cpu { 76 sound-dai = <&rcar_sound>; 77 }; 78 79 sndcodec: simple-audio-card,codec { 80 sound-dai = <&tda19988>; 81 }; 82 }; 83 84 vcc_sdhi0: regulator-vcc-sdhi0 { 85 compatible = "regulator-fixed"; 86 87 regulator-name = "SDHI0 Vcc"; 88 regulator-min-microvolt = <3300000>; 89 regulator-max-microvolt = <3300000>; 90 regulator-always-on; 91 regulator-boot-on; 92 }; 93 94 vccq_sdhi0: regulator-vccq-sdhi0 { 95 compatible = "regulator-gpio"; 96 97 regulator-name = "SDHI0 VccQ"; 98 regulator-min-microvolt = <1800000>; 99 regulator-max-microvolt = <3300000>; 100 101 gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; 102 gpios-states = <1>; 103 states = <3300000 1 104 1800000 0>; 105 }; 106 107 wlan_en_reg: fixedregulator { 108 compatible = "regulator-fixed"; 109 regulator-name = "wlan-en-regulator"; 110 regulator-min-microvolt = <1800000>; 111 regulator-max-microvolt = <1800000>; 112 startup-delay-us = <70000>; 113 114 gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>; 115 enable-active-high; 116 }; 117 118 x13_clk: x13 { 119 compatible = "fixed-clock"; 120 #clock-cells = <0>; 121 clock-frequency = <74250000>; 122 }; 123}; 124 125&audio_clk_a { 126 clock-frequency = <22579200>; 127}; 128 129&du { 130 pinctrl-0 = <&du_pins>; 131 pinctrl-names = "default"; 132 status = "okay"; 133 134 clocks = <&cpg CPG_MOD 724>, 135 <&cpg CPG_MOD 723>, 136 <&x13_clk>; 137 clock-names = "du.0", "du.1", "dclkin.0"; 138 139 ports { 140 port@0 { 141 endpoint { 142 remote-endpoint = <&tda19988_in>; 143 }; 144 }; 145 }; 146}; 147 148&ehci0 { 149 dr_mode = "host"; 150 status = "okay"; 151}; 152 153&extal_clk { 154 clock-frequency = <48000000>; 155}; 156 157&i2c0 { 158 status = "okay"; 159 clock-frequency = <100000>; 160 161 tda19988: tda19988@70 { 162 compatible = "nxp,tda998x"; 163 reg = <0x70>; 164 interrupt-parent = <&gpio1>; 165 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 166 167 video-ports = <0x234501>; 168 169 #sound-dai-cells = <0>; 170 audio-ports = <TDA998x_I2S 0x03>; 171 clocks = <&rcar_sound 1>; 172 173 ports { 174 #address-cells = <1>; 175 #size-cells = <0>; 176 177 port@0 { 178 reg = <0>; 179 tda19988_in: endpoint { 180 remote-endpoint = <&du_out_rgb>; 181 }; 182 }; 183 184 port@1 { 185 reg = <1>; 186 tda19988_out: endpoint { 187 remote-endpoint = <&hdmi_con_out>; 188 }; 189 }; 190 }; 191 }; 192}; 193 194&i2c1 { 195 pinctrl-0 = <&i2c1_pins>; 196 pinctrl-names = "default"; 197 198 status = "okay"; 199 clock-frequency = <400000>; 200 201 rtc@32 { 202 compatible = "epson,rx8571"; 203 reg = <0x32>; 204 }; 205}; 206 207&lvds0 { 208 status = "okay"; 209 210 clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>; 211 clock-names = "fck", "dclkin.0", "extal"; 212}; 213 214&ohci0 { 215 dr_mode = "host"; 216 status = "okay"; 217}; 218 219&pcie_bus_clk { 220 clock-frequency = <100000000>; 221}; 222 223&pciec0 { 224 /* Map all possible DDR as inbound ranges */ 225 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 226}; 227 228&pfc { 229 du_pins: du { 230 groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp", 231 "du_clk_in_0"; 232 function = "du"; 233 }; 234 235 i2c1_pins: i2c1 { 236 groups = "i2c1_b"; 237 function = "i2c1"; 238 }; 239 240 scif2_pins: scif2 { 241 groups = "scif2_data_a"; 242 function = "scif2"; 243 }; 244 245 sdhi0_pins: sd0 { 246 groups = "sdhi0_data4", "sdhi0_ctrl"; 247 function = "sdhi0"; 248 power-source = <3300>; 249 }; 250 251 sdhi0_pins_uhs: sd0_uhs { 252 groups = "sdhi0_data4", "sdhi0_ctrl"; 253 function = "sdhi0"; 254 power-source = <1800>; 255 }; 256 257 sdhi3_pins: sd3 { 258 groups = "sdhi3_data4", "sdhi3_ctrl"; 259 function = "sdhi3"; 260 power-source = <1800>; 261 }; 262 263 sound_pins: sound { 264 groups = "ssi01239_ctrl", "ssi0_data"; 265 function = "ssi"; 266 }; 267 268 sound_clk_pins: sound_clk { 269 groups = "audio_clkout1_a"; 270 function = "audio_clk"; 271 }; 272}; 273 274&rcar_sound { 275 pinctrl-0 = <&sound_pins &sound_clk_pins>; 276 pinctrl-names = "default"; 277 278 /* Single DAI */ 279 #sound-dai-cells = <0>; 280 281 /* audio_clkout0/1/2/3 */ 282 #clock-cells = <1>; 283 clock-frequency = <11289600>; 284 285 status = "okay"; 286 287 rcar_sound,dai { 288 dai0 { 289 playback = <&ssi0 &src0 &dvc0>; 290 }; 291 }; 292}; 293 294&rwdt { 295 timeout-sec = <60>; 296 status = "okay"; 297}; 298 299&scif2 { 300 pinctrl-0 = <&scif2_pins>; 301 pinctrl-names = "default"; 302 303 status = "okay"; 304}; 305 306&sdhi0 { 307 pinctrl-0 = <&sdhi0_pins>; 308 pinctrl-1 = <&sdhi0_pins_uhs>; 309 pinctrl-names = "default", "state_uhs"; 310 311 vmmc-supply = <&vcc_sdhi0>; 312 vqmmc-supply = <&vccq_sdhi0>; 313 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 314 bus-width = <4>; 315 sd-uhs-sdr50; 316 sd-uhs-sdr104; 317 status = "okay"; 318}; 319 320&sdhi3 { 321 status = "okay"; 322 pinctrl-0 = <&sdhi3_pins>; 323 pinctrl-names = "default"; 324 325 vmmc-supply = <&wlan_en_reg>; 326 bus-width = <4>; 327 non-removable; 328 cap-power-off-card; 329 keep-power-in-suspend; 330 331 #address-cells = <1>; 332 #size-cells = <0>; 333 wlcore: wlcore@2 { 334 compatible = "ti,wl1837"; 335 reg = <2>; 336 interrupt-parent = <&gpio1>; 337 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 338 }; 339}; 340 341&usb2_phy0 { 342 renesas,no-otg-pins; 343 status = "okay"; 344}; 345