1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874) 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 8/dts-v1/; 9#include "r8a774c0.dtsi" 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 model = "Silicon Linux RZ/G2E 96board platform (CAT874)"; 14 compatible = "si-linux,cat874", "renesas,r8a774c0"; 15 16 aliases { 17 serial0 = &scif2; 18 }; 19 20 chosen { 21 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; 22 stdout-path = "serial0:115200n8"; 23 }; 24 25 memory@48000000 { 26 device_type = "memory"; 27 /* first 128MB is reserved for secure area. */ 28 reg = <0x0 0x48000000 0x0 0x78000000>; 29 }; 30 31 vcc_sdhi0: regulator-vcc-sdhi0 { 32 compatible = "regulator-fixed"; 33 34 regulator-name = "SDHI0 Vcc"; 35 regulator-min-microvolt = <3300000>; 36 regulator-max-microvolt = <3300000>; 37 regulator-always-on; 38 regulator-boot-on; 39 }; 40 41 vccq_sdhi0: regulator-vccq-sdhi0 { 42 compatible = "regulator-gpio"; 43 44 regulator-name = "SDHI0 VccQ"; 45 regulator-min-microvolt = <1800000>; 46 regulator-max-microvolt = <3300000>; 47 48 gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; 49 gpios-states = <1>; 50 states = <3300000 1 51 1800000 0>; 52 }; 53}; 54 55&extal_clk { 56 clock-frequency = <48000000>; 57}; 58 59&pcie_bus_clk { 60 clock-frequency = <100000000>; 61}; 62 63&pciec0 { 64 /* Map all possible DDR as inbound ranges */ 65 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 66}; 67 68&pfc { 69 scif2_pins: scif2 { 70 groups = "scif2_data_a"; 71 function = "scif2"; 72 }; 73 74 sdhi0_pins: sd0 { 75 groups = "sdhi0_data4", "sdhi0_ctrl"; 76 function = "sdhi0"; 77 power-source = <3300>; 78 }; 79 80 sdhi0_pins_uhs: sd0_uhs { 81 groups = "sdhi0_data4", "sdhi0_ctrl"; 82 function = "sdhi0"; 83 power-source = <1800>; 84 }; 85}; 86 87&scif2 { 88 pinctrl-0 = <&scif2_pins>; 89 pinctrl-names = "default"; 90 91 status = "okay"; 92}; 93 94&sdhi0 { 95 pinctrl-0 = <&sdhi0_pins>; 96 pinctrl-1 = <&sdhi0_pins_uhs>; 97 pinctrl-names = "default", "state_uhs"; 98 99 vmmc-supply = <&vcc_sdhi0>; 100 vqmmc-supply = <&vccq_sdhi0>; 101 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 102 bus-width = <4>; 103 sd-uhs-sdr50; 104 sd-uhs-sdr104; 105 status = "okay"; 106}; 107