1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874) 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 8/dts-v1/; 9#include "r8a774c0.dtsi" 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/display/tda998x.h> 12 13/ { 14 model = "Silicon Linux RZ/G2E 96board platform (CAT874)"; 15 compatible = "si-linux,cat874", "renesas,r8a774c0"; 16 17 aliases { 18 serial0 = &scif2; 19 serial1 = &hscif2; 20 }; 21 22 chosen { 23 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 24 stdout-path = "serial0:115200n8"; 25 }; 26 27 hdmi-out { 28 compatible = "hdmi-connector"; 29 type = "a"; 30 31 port { 32 hdmi_con_out: endpoint { 33 remote-endpoint = <&tda19988_out>; 34 }; 35 }; 36 }; 37 38 leds { 39 compatible = "gpio-leds"; 40 41 led0 { 42 gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; 43 label = "LED0"; 44 }; 45 46 led1 { 47 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 48 label = "LED1"; 49 }; 50 51 led2 { 52 gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; 53 label = "LED2"; 54 }; 55 56 led3 { 57 gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; 58 label = "LED3"; 59 }; 60 }; 61 62 memory@48000000 { 63 device_type = "memory"; 64 /* first 128MB is reserved for secure area. */ 65 reg = <0x0 0x48000000 0x0 0x78000000>; 66 }; 67 68 reg_12p0v: regulator-12p0v { 69 compatible = "regulator-fixed"; 70 regulator-name = "D12.0V"; 71 regulator-min-microvolt = <12000000>; 72 regulator-max-microvolt = <12000000>; 73 regulator-boot-on; 74 regulator-always-on; 75 }; 76 77 sound: sound { 78 compatible = "simple-audio-card"; 79 80 simple-audio-card,name = "CAT874 HDMI sound"; 81 simple-audio-card,format = "i2s"; 82 simple-audio-card,bitclock-master = <&sndcpu>; 83 simple-audio-card,frame-master = <&sndcpu>; 84 85 sndcodec: simple-audio-card,codec { 86 sound-dai = <&tda19988>; 87 }; 88 89 sndcpu: simple-audio-card,cpu { 90 sound-dai = <&rcar_sound>; 91 }; 92 }; 93 94 vcc_sdhi0: regulator-vcc-sdhi0 { 95 compatible = "regulator-fixed"; 96 97 regulator-name = "SDHI0 Vcc"; 98 regulator-min-microvolt = <3300000>; 99 regulator-max-microvolt = <3300000>; 100 regulator-always-on; 101 regulator-boot-on; 102 }; 103 104 vccq_sdhi0: regulator-vccq-sdhi0 { 105 compatible = "regulator-gpio"; 106 107 regulator-name = "SDHI0 VccQ"; 108 regulator-min-microvolt = <1800000>; 109 regulator-max-microvolt = <3300000>; 110 111 gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; 112 gpios-states = <1>; 113 states = <3300000 1>, <1800000 0>; 114 }; 115 116 wlan_en_reg: fixedregulator { 117 compatible = "regulator-fixed"; 118 regulator-name = "wlan-en-regulator"; 119 regulator-min-microvolt = <1800000>; 120 regulator-max-microvolt = <1800000>; 121 startup-delay-us = <70000>; 122 123 gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>; 124 enable-active-high; 125 }; 126 127 x13_clk: x13 { 128 compatible = "fixed-clock"; 129 #clock-cells = <0>; 130 clock-frequency = <74250000>; 131 }; 132 133 connector { 134 compatible = "usb-c-connector"; 135 label = "USB-C"; 136 data-role = "dual"; 137 138 ports { 139 #address-cells = <1>; 140 #size-cells = <0>; 141 port@0 { 142 reg = <0>; 143 hs_ep: endpoint { 144 remote-endpoint = <&usb3_hs_ep>; 145 }; 146 }; 147 port@1 { 148 reg = <1>; 149 ss_ep: endpoint { 150 remote-endpoint = <&hd3ss3220_in_ep>; 151 }; 152 }; 153 }; 154 }; 155}; 156 157&audio_clk_a { 158 clock-frequency = <22579200>; 159}; 160 161&du { 162 pinctrl-0 = <&du_pins>; 163 pinctrl-names = "default"; 164 status = "okay"; 165 166 clocks = <&cpg CPG_MOD 724>, 167 <&cpg CPG_MOD 723>, 168 <&x13_clk>; 169 clock-names = "du.0", "du.1", "dclkin.0"; 170 171 ports { 172 port@0 { 173 endpoint { 174 remote-endpoint = <&tda19988_in>; 175 }; 176 }; 177 }; 178}; 179 180&ehci0 { 181 dr_mode = "host"; 182 status = "okay"; 183}; 184 185&extal_clk { 186 clock-frequency = <48000000>; 187}; 188 189&hscif2 { 190 pinctrl-0 = <&hscif2_pins>; 191 pinctrl-names = "default"; 192 193 uart-has-rtscts; 194 status = "okay"; 195 196 bluetooth { 197 compatible = "ti,wl1837-st"; 198 enable-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; 199 }; 200}; 201 202&i2c0 { 203 status = "okay"; 204 clock-frequency = <100000>; 205 206 hd3ss3220@47 { 207 compatible = "ti,hd3ss3220"; 208 reg = <0x47>; 209 interrupt-parent = <&gpio6>; 210 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 211 212 ports { 213 #address-cells = <1>; 214 #size-cells = <0>; 215 port@0 { 216 reg = <0>; 217 hd3ss3220_in_ep: endpoint { 218 remote-endpoint = <&ss_ep>; 219 }; 220 }; 221 port@1 { 222 reg = <1>; 223 hd3ss3220_out_ep: endpoint { 224 remote-endpoint = <&usb3_role_switch>; 225 }; 226 }; 227 }; 228 }; 229 230 tda19988: tda19988@70 { 231 compatible = "nxp,tda998x"; 232 reg = <0x70>; 233 interrupt-parent = <&gpio1>; 234 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 235 236 video-ports = <0x234501>; 237 238 #sound-dai-cells = <0>; 239 audio-ports = <TDA998x_I2S 0x03>; 240 clocks = <&rcar_sound 1>; 241 242 ports { 243 #address-cells = <1>; 244 #size-cells = <0>; 245 246 port@0 { 247 reg = <0>; 248 tda19988_in: endpoint { 249 remote-endpoint = <&du_out_rgb>; 250 }; 251 }; 252 253 port@1 { 254 reg = <1>; 255 tda19988_out: endpoint { 256 remote-endpoint = <&hdmi_con_out>; 257 }; 258 }; 259 }; 260 }; 261}; 262 263&i2c1 { 264 pinctrl-0 = <&i2c1_pins>; 265 pinctrl-names = "default"; 266 267 status = "okay"; 268 clock-frequency = <400000>; 269 270 rtc@32 { 271 compatible = "epson,rx8571"; 272 reg = <0x32>; 273 }; 274}; 275 276&lvds0 { 277 status = "okay"; 278 279 clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>; 280 clock-names = "fck", "dclkin.0", "extal"; 281}; 282 283&ohci0 { 284 dr_mode = "host"; 285 status = "okay"; 286}; 287 288&pcie_bus_clk { 289 clock-frequency = <100000000>; 290}; 291 292&pciec0 { 293 /* Map all possible DDR as inbound ranges */ 294 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 295}; 296 297&pfc { 298 du_pins: du { 299 groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp", 300 "du_clk_in_0"; 301 function = "du"; 302 }; 303 304 hscif2_pins: hscif2 { 305 groups = "hscif2_data_a", "hscif2_ctrl_a"; 306 function = "hscif2"; 307 }; 308 309 i2c1_pins: i2c1 { 310 groups = "i2c1_b"; 311 function = "i2c1"; 312 }; 313 314 scif2_pins: scif2 { 315 groups = "scif2_data_a"; 316 function = "scif2"; 317 }; 318 319 sdhi0_pins: sd0 { 320 groups = "sdhi0_data4", "sdhi0_ctrl"; 321 function = "sdhi0"; 322 power-source = <3300>; 323 }; 324 325 sdhi0_pins_uhs: sd0_uhs { 326 groups = "sdhi0_data4", "sdhi0_ctrl"; 327 function = "sdhi0"; 328 power-source = <1800>; 329 }; 330 331 sdhi3_pins: sd3 { 332 groups = "sdhi3_data4", "sdhi3_ctrl"; 333 function = "sdhi3"; 334 power-source = <1800>; 335 }; 336 337 sound_clk_pins: sound_clk { 338 groups = "audio_clkout1_a"; 339 function = "audio_clk"; 340 }; 341 342 sound_pins: sound { 343 groups = "ssi01239_ctrl", "ssi0_data"; 344 function = "ssi"; 345 }; 346 347 usb30_pins: usb30 { 348 groups = "usb30", "usb30_id"; 349 function = "usb30"; 350 }; 351}; 352 353&rcar_sound { 354 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>; 355 pinctrl-names = "default"; 356 357 /* Single DAI */ 358 #sound-dai-cells = <0>; 359 360 /* audio_clkout0/1/2/3 */ 361 #clock-cells = <1>; 362 clock-frequency = <11289600>; 363 364 status = "okay"; 365 366 rcar_sound,dai { 367 dai0 { 368 playback = <&ssi0>, <&src0>, <&dvc0>; 369 }; 370 }; 371}; 372 373&rwdt { 374 timeout-sec = <60>; 375 status = "okay"; 376}; 377 378&scif2 { 379 pinctrl-0 = <&scif2_pins>; 380 pinctrl-names = "default"; 381 382 status = "okay"; 383}; 384 385&sdhi0 { 386 pinctrl-0 = <&sdhi0_pins>; 387 pinctrl-1 = <&sdhi0_pins_uhs>; 388 pinctrl-names = "default", "state_uhs"; 389 390 vmmc-supply = <&vcc_sdhi0>; 391 vqmmc-supply = <&vccq_sdhi0>; 392 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 393 bus-width = <4>; 394 sd-uhs-sdr50; 395 sd-uhs-sdr104; 396 status = "okay"; 397}; 398 399&sdhi3 { 400 status = "okay"; 401 pinctrl-0 = <&sdhi3_pins>; 402 pinctrl-names = "default"; 403 404 vmmc-supply = <&wlan_en_reg>; 405 bus-width = <4>; 406 non-removable; 407 cap-power-off-card; 408 keep-power-in-suspend; 409 410 #address-cells = <1>; 411 #size-cells = <0>; 412 wlcore: wlcore@2 { 413 compatible = "ti,wl1837"; 414 reg = <2>; 415 interrupt-parent = <&gpio1>; 416 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 417 }; 418}; 419 420&usb2_phy0 { 421 renesas,no-otg-pins; 422 status = "okay"; 423}; 424 425&usb3_peri0 { 426 companion = <&xhci0>; 427 status = "okay"; 428 usb-role-switch; 429 430 ports { 431 #address-cells = <1>; 432 #size-cells = <0>; 433 port@0 { 434 reg = <0>; 435 usb3_hs_ep: endpoint { 436 remote-endpoint = <&hs_ep>; 437 }; 438 }; 439 port@1 { 440 reg = <1>; 441 usb3_role_switch: endpoint { 442 remote-endpoint = <&hd3ss3220_out_ep>; 443 }; 444 }; 445 }; 446}; 447 448&xhci0 { 449 pinctrl-0 = <&usb30_pins>; 450 pinctrl-names = "default"; 451 452 status = "okay"; 453}; 454