xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/r8a774c0-cat874.dts (revision dc0b439471323521a20314934080f51e8589fd19)
1d828266bSBiju Das// SPDX-License-Identifier: GPL-2.0
2d828266bSBiju Das/*
3d828266bSBiju Das * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
4d828266bSBiju Das *
5d828266bSBiju Das * Copyright (C) 2019 Renesas Electronics Corp.
6d828266bSBiju Das */
7d828266bSBiju Das
8d828266bSBiju Das/dts-v1/;
9d828266bSBiju Das#include "r8a774c0.dtsi"
10a102b93eSBiju Das#include <dt-bindings/gpio/gpio.h>
11d828266bSBiju Das
12d828266bSBiju Das/ {
13d828266bSBiju Das	model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
14d828266bSBiju Das	compatible = "si-linux,cat874", "renesas,r8a774c0";
15d828266bSBiju Das
16d828266bSBiju Das	aliases {
17d828266bSBiju Das		serial0 = &scif2;
18d828266bSBiju Das	};
19d828266bSBiju Das
20d828266bSBiju Das	chosen {
21d828266bSBiju Das		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
22d828266bSBiju Das		stdout-path = "serial0:115200n8";
23d828266bSBiju Das	};
24d828266bSBiju Das
25*dc0b4394SFabrizio Castro	leds {
26*dc0b4394SFabrizio Castro		compatible = "gpio-leds";
27*dc0b4394SFabrizio Castro
28*dc0b4394SFabrizio Castro		led0 {
29*dc0b4394SFabrizio Castro			gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
30*dc0b4394SFabrizio Castro			label = "LED0";
31*dc0b4394SFabrizio Castro		};
32*dc0b4394SFabrizio Castro
33*dc0b4394SFabrizio Castro		led1 {
34*dc0b4394SFabrizio Castro			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
35*dc0b4394SFabrizio Castro			label = "LED1";
36*dc0b4394SFabrizio Castro		};
37*dc0b4394SFabrizio Castro
38*dc0b4394SFabrizio Castro		led2 {
39*dc0b4394SFabrizio Castro			gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
40*dc0b4394SFabrizio Castro			label = "LED2";
41*dc0b4394SFabrizio Castro		};
42*dc0b4394SFabrizio Castro
43*dc0b4394SFabrizio Castro		led3 {
44*dc0b4394SFabrizio Castro			gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;
45*dc0b4394SFabrizio Castro			label = "LED3";
46*dc0b4394SFabrizio Castro		};
47*dc0b4394SFabrizio Castro	};
48*dc0b4394SFabrizio Castro
49d828266bSBiju Das	memory@48000000 {
50d828266bSBiju Das		device_type = "memory";
51d828266bSBiju Das		/* first 128MB is reserved for secure area. */
52d828266bSBiju Das		reg = <0x0 0x48000000 0x0 0x78000000>;
53d828266bSBiju Das	};
54a102b93eSBiju Das
55a102b93eSBiju Das	vcc_sdhi0: regulator-vcc-sdhi0 {
56a102b93eSBiju Das		compatible = "regulator-fixed";
57a102b93eSBiju Das
58a102b93eSBiju Das		regulator-name = "SDHI0 Vcc";
59a102b93eSBiju Das		regulator-min-microvolt = <3300000>;
60a102b93eSBiju Das		regulator-max-microvolt = <3300000>;
61a102b93eSBiju Das		regulator-always-on;
62a102b93eSBiju Das		regulator-boot-on;
63a102b93eSBiju Das	};
64a102b93eSBiju Das
65a102b93eSBiju Das	vccq_sdhi0: regulator-vccq-sdhi0 {
66a102b93eSBiju Das		compatible = "regulator-gpio";
67a102b93eSBiju Das
68a102b93eSBiju Das		regulator-name = "SDHI0 VccQ";
69a102b93eSBiju Das		regulator-min-microvolt = <1800000>;
70a102b93eSBiju Das		regulator-max-microvolt = <3300000>;
71a102b93eSBiju Das
72a102b93eSBiju Das		gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
73a102b93eSBiju Das		gpios-states = <1>;
74a102b93eSBiju Das		states = <3300000 1
75a102b93eSBiju Das			  1800000 0>;
76a102b93eSBiju Das	};
77d828266bSBiju Das};
78d828266bSBiju Das
79d828266bSBiju Das&extal_clk {
80d828266bSBiju Das	clock-frequency = <48000000>;
81d828266bSBiju Das};
82d828266bSBiju Das
8307e72397SBiju Das&i2c1 {
8407e72397SBiju Das	pinctrl-0 = <&i2c1_pins>;
8507e72397SBiju Das	pinctrl-names = "default";
8607e72397SBiju Das
8707e72397SBiju Das	status = "okay";
8807e72397SBiju Das	clock-frequency = <400000>;
8907e72397SBiju Das
9007e72397SBiju Das	rtc@32 {
9107e72397SBiju Das		compatible = "epson,rx8571";
9207e72397SBiju Das		reg = <0x32>;
9307e72397SBiju Das	};
9407e72397SBiju Das};
9507e72397SBiju Das
96aaf6c75cSBiju Das&pcie_bus_clk {
97aaf6c75cSBiju Das	clock-frequency = <100000000>;
98aaf6c75cSBiju Das};
99aaf6c75cSBiju Das
100aaf6c75cSBiju Das&pciec0 {
101aaf6c75cSBiju Das	/* Map all possible DDR as inbound ranges */
102aaf6c75cSBiju Das	dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
103aaf6c75cSBiju Das};
104aaf6c75cSBiju Das
1054cf1f6ceSBiju Das&pfc {
10607e72397SBiju Das	i2c1_pins: i2c1 {
10707e72397SBiju Das		groups = "i2c1_b";
10807e72397SBiju Das		function = "i2c1";
10907e72397SBiju Das	};
11007e72397SBiju Das
1114cf1f6ceSBiju Das	scif2_pins: scif2 {
1124cf1f6ceSBiju Das		groups = "scif2_data_a";
1134cf1f6ceSBiju Das		function = "scif2";
1144cf1f6ceSBiju Das	};
115a102b93eSBiju Das
116a102b93eSBiju Das	sdhi0_pins: sd0 {
117a102b93eSBiju Das		groups = "sdhi0_data4", "sdhi0_ctrl";
118a102b93eSBiju Das		function = "sdhi0";
119a102b93eSBiju Das		power-source = <3300>;
120a102b93eSBiju Das	};
121a102b93eSBiju Das
122a102b93eSBiju Das	sdhi0_pins_uhs: sd0_uhs {
123a102b93eSBiju Das		groups = "sdhi0_data4", "sdhi0_ctrl";
124a102b93eSBiju Das		function = "sdhi0";
125a102b93eSBiju Das		power-source = <1800>;
126a102b93eSBiju Das	};
1274cf1f6ceSBiju Das};
1284cf1f6ceSBiju Das
129d828266bSBiju Das&scif2 {
1304cf1f6ceSBiju Das	pinctrl-0 = <&scif2_pins>;
1314cf1f6ceSBiju Das	pinctrl-names = "default";
1324cf1f6ceSBiju Das
133d828266bSBiju Das	status = "okay";
134d828266bSBiju Das};
135a102b93eSBiju Das
136a102b93eSBiju Das&sdhi0 {
137a102b93eSBiju Das	pinctrl-0 = <&sdhi0_pins>;
138a102b93eSBiju Das	pinctrl-1 = <&sdhi0_pins_uhs>;
139a102b93eSBiju Das	pinctrl-names = "default", "state_uhs";
140a102b93eSBiju Das
141a102b93eSBiju Das	vmmc-supply = <&vcc_sdhi0>;
142a102b93eSBiju Das	vqmmc-supply = <&vccq_sdhi0>;
143a102b93eSBiju Das	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
144a102b93eSBiju Das	bus-width = <4>;
145a102b93eSBiju Das	sd-uhs-sdr50;
146a102b93eSBiju Das	sd-uhs-sdr104;
147a102b93eSBiju Das	status = "okay";
148a102b93eSBiju Das};
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