1*d828266bSBiju Das// SPDX-License-Identifier: GPL-2.0 2*d828266bSBiju Das/* 3*d828266bSBiju Das * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874) 4*d828266bSBiju Das * 5*d828266bSBiju Das * Copyright (C) 2019 Renesas Electronics Corp. 6*d828266bSBiju Das */ 7*d828266bSBiju Das 8*d828266bSBiju Das/dts-v1/; 9*d828266bSBiju Das#include "r8a774c0.dtsi" 10*d828266bSBiju Das 11*d828266bSBiju Das/ { 12*d828266bSBiju Das model = "Silicon Linux RZ/G2E 96board platform (CAT874)"; 13*d828266bSBiju Das compatible = "si-linux,cat874", "renesas,r8a774c0"; 14*d828266bSBiju Das 15*d828266bSBiju Das aliases { 16*d828266bSBiju Das serial0 = &scif2; 17*d828266bSBiju Das }; 18*d828266bSBiju Das 19*d828266bSBiju Das chosen { 20*d828266bSBiju Das bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; 21*d828266bSBiju Das stdout-path = "serial0:115200n8"; 22*d828266bSBiju Das }; 23*d828266bSBiju Das 24*d828266bSBiju Das memory@48000000 { 25*d828266bSBiju Das device_type = "memory"; 26*d828266bSBiju Das /* first 128MB is reserved for secure area. */ 27*d828266bSBiju Das reg = <0x0 0x48000000 0x0 0x78000000>; 28*d828266bSBiju Das }; 29*d828266bSBiju Das}; 30*d828266bSBiju Das 31*d828266bSBiju Das&extal_clk { 32*d828266bSBiju Das clock-frequency = <48000000>; 33*d828266bSBiju Das}; 34*d828266bSBiju Das 35*d828266bSBiju Das&scif2 { 36*d828266bSBiju Das status = "okay"; 37*d828266bSBiju Das}; 38