xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/r8a774c0-cat874.dts (revision a102b93eafef0994f1a96e9683d1e3d692a6bb48)
1d828266bSBiju Das// SPDX-License-Identifier: GPL-2.0
2d828266bSBiju Das/*
3d828266bSBiju Das * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
4d828266bSBiju Das *
5d828266bSBiju Das * Copyright (C) 2019 Renesas Electronics Corp.
6d828266bSBiju Das */
7d828266bSBiju Das
8d828266bSBiju Das/dts-v1/;
9d828266bSBiju Das#include "r8a774c0.dtsi"
10*a102b93eSBiju Das#include <dt-bindings/gpio/gpio.h>
11d828266bSBiju Das
12d828266bSBiju Das/ {
13d828266bSBiju Das	model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
14d828266bSBiju Das	compatible = "si-linux,cat874", "renesas,r8a774c0";
15d828266bSBiju Das
16d828266bSBiju Das	aliases {
17d828266bSBiju Das		serial0 = &scif2;
18d828266bSBiju Das	};
19d828266bSBiju Das
20d828266bSBiju Das	chosen {
21d828266bSBiju Das		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
22d828266bSBiju Das		stdout-path = "serial0:115200n8";
23d828266bSBiju Das	};
24d828266bSBiju Das
25d828266bSBiju Das	memory@48000000 {
26d828266bSBiju Das		device_type = "memory";
27d828266bSBiju Das		/* first 128MB is reserved for secure area. */
28d828266bSBiju Das		reg = <0x0 0x48000000 0x0 0x78000000>;
29d828266bSBiju Das	};
30*a102b93eSBiju Das
31*a102b93eSBiju Das	vcc_sdhi0: regulator-vcc-sdhi0 {
32*a102b93eSBiju Das		compatible = "regulator-fixed";
33*a102b93eSBiju Das
34*a102b93eSBiju Das		regulator-name = "SDHI0 Vcc";
35*a102b93eSBiju Das		regulator-min-microvolt = <3300000>;
36*a102b93eSBiju Das		regulator-max-microvolt = <3300000>;
37*a102b93eSBiju Das		regulator-always-on;
38*a102b93eSBiju Das		regulator-boot-on;
39*a102b93eSBiju Das	};
40*a102b93eSBiju Das
41*a102b93eSBiju Das	vccq_sdhi0: regulator-vccq-sdhi0 {
42*a102b93eSBiju Das		compatible = "regulator-gpio";
43*a102b93eSBiju Das
44*a102b93eSBiju Das		regulator-name = "SDHI0 VccQ";
45*a102b93eSBiju Das		regulator-min-microvolt = <1800000>;
46*a102b93eSBiju Das		regulator-max-microvolt = <3300000>;
47*a102b93eSBiju Das
48*a102b93eSBiju Das		gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
49*a102b93eSBiju Das		gpios-states = <1>;
50*a102b93eSBiju Das		states = <3300000 1
51*a102b93eSBiju Das			  1800000 0>;
52*a102b93eSBiju Das	};
53d828266bSBiju Das};
54d828266bSBiju Das
55d828266bSBiju Das&extal_clk {
56d828266bSBiju Das	clock-frequency = <48000000>;
57d828266bSBiju Das};
58d828266bSBiju Das
594cf1f6ceSBiju Das&pfc {
604cf1f6ceSBiju Das	scif2_pins: scif2 {
614cf1f6ceSBiju Das		groups = "scif2_data_a";
624cf1f6ceSBiju Das		function = "scif2";
634cf1f6ceSBiju Das	};
64*a102b93eSBiju Das
65*a102b93eSBiju Das	sdhi0_pins: sd0 {
66*a102b93eSBiju Das		groups = "sdhi0_data4", "sdhi0_ctrl";
67*a102b93eSBiju Das		function = "sdhi0";
68*a102b93eSBiju Das		power-source = <3300>;
69*a102b93eSBiju Das	};
70*a102b93eSBiju Das
71*a102b93eSBiju Das	sdhi0_pins_uhs: sd0_uhs {
72*a102b93eSBiju Das		groups = "sdhi0_data4", "sdhi0_ctrl";
73*a102b93eSBiju Das		function = "sdhi0";
74*a102b93eSBiju Das		power-source = <1800>;
75*a102b93eSBiju Das	};
764cf1f6ceSBiju Das};
774cf1f6ceSBiju Das
78d828266bSBiju Das&scif2 {
794cf1f6ceSBiju Das	pinctrl-0 = <&scif2_pins>;
804cf1f6ceSBiju Das	pinctrl-names = "default";
814cf1f6ceSBiju Das
82d828266bSBiju Das	status = "okay";
83d828266bSBiju Das};
84*a102b93eSBiju Das
85*a102b93eSBiju Das&sdhi0 {
86*a102b93eSBiju Das	pinctrl-0 = <&sdhi0_pins>;
87*a102b93eSBiju Das	pinctrl-1 = <&sdhi0_pins_uhs>;
88*a102b93eSBiju Das	pinctrl-names = "default", "state_uhs";
89*a102b93eSBiju Das
90*a102b93eSBiju Das	vmmc-supply = <&vcc_sdhi0>;
91*a102b93eSBiju Das	vqmmc-supply = <&vccq_sdhi0>;
92*a102b93eSBiju Das	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
93*a102b93eSBiju Das	bus-width = <4>;
94*a102b93eSBiju Das	sd-uhs-sdr50;
95*a102b93eSBiju Das	sd-uhs-sdr104;
96*a102b93eSBiju Das	status = "okay";
97*a102b93eSBiju Das};
98