xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/draak.dtsi (revision f5335aa6b2696e8cfaca9dcc5fd82637afe29294)
1*f5335aa6SGeert Uytterhoeven// SPDX-License-Identifier: GPL-2.0
2*f5335aa6SGeert Uytterhoeven/*
3*f5335aa6SGeert Uytterhoeven * Device Tree Source for the Draak board
4*f5335aa6SGeert Uytterhoeven *
5*f5335aa6SGeert Uytterhoeven * Copyright (C) 2016-2018 Renesas Electronics Corp.
6*f5335aa6SGeert Uytterhoeven * Copyright (C) 2017 Glider bvba
7*f5335aa6SGeert Uytterhoeven */
8*f5335aa6SGeert Uytterhoeven
9*f5335aa6SGeert Uytterhoeven#include <dt-bindings/gpio/gpio.h>
10*f5335aa6SGeert Uytterhoeven#include <dt-bindings/input/input.h>
11*f5335aa6SGeert Uytterhoeven
12*f5335aa6SGeert Uytterhoeven/ {
13*f5335aa6SGeert Uytterhoeven	model = "Renesas Draak board";
14*f5335aa6SGeert Uytterhoeven	compatible = "renesas,draak";
15*f5335aa6SGeert Uytterhoeven
16*f5335aa6SGeert Uytterhoeven	aliases {
17*f5335aa6SGeert Uytterhoeven		serial0 = &scif2;
18*f5335aa6SGeert Uytterhoeven		ethernet0 = &avb;
19*f5335aa6SGeert Uytterhoeven	};
20*f5335aa6SGeert Uytterhoeven
21*f5335aa6SGeert Uytterhoeven	audio_clkout: audio-clkout {
22*f5335aa6SGeert Uytterhoeven		/*
23*f5335aa6SGeert Uytterhoeven		 * This is same as <&rcar_sound 0>
24*f5335aa6SGeert Uytterhoeven		 * but needed to avoid cs2000/rcar_sound probe dead-lock
25*f5335aa6SGeert Uytterhoeven		 */
26*f5335aa6SGeert Uytterhoeven		compatible = "fixed-clock";
27*f5335aa6SGeert Uytterhoeven		#clock-cells = <0>;
28*f5335aa6SGeert Uytterhoeven		clock-frequency = <12288000>;
29*f5335aa6SGeert Uytterhoeven	};
30*f5335aa6SGeert Uytterhoeven
31*f5335aa6SGeert Uytterhoeven	backlight: backlight {
32*f5335aa6SGeert Uytterhoeven		compatible = "pwm-backlight";
33*f5335aa6SGeert Uytterhoeven		pwms = <&pwm1 0 50000>;
34*f5335aa6SGeert Uytterhoeven
35*f5335aa6SGeert Uytterhoeven		brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
36*f5335aa6SGeert Uytterhoeven		default-brightness-level = <10>;
37*f5335aa6SGeert Uytterhoeven
38*f5335aa6SGeert Uytterhoeven		power-supply = <&reg_12p0v>;
39*f5335aa6SGeert Uytterhoeven		enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
40*f5335aa6SGeert Uytterhoeven	};
41*f5335aa6SGeert Uytterhoeven
42*f5335aa6SGeert Uytterhoeven	chosen {
43*f5335aa6SGeert Uytterhoeven		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
44*f5335aa6SGeert Uytterhoeven		stdout-path = "serial0:115200n8";
45*f5335aa6SGeert Uytterhoeven	};
46*f5335aa6SGeert Uytterhoeven
47*f5335aa6SGeert Uytterhoeven	composite-in {
48*f5335aa6SGeert Uytterhoeven		compatible = "composite-video-connector";
49*f5335aa6SGeert Uytterhoeven
50*f5335aa6SGeert Uytterhoeven		port {
51*f5335aa6SGeert Uytterhoeven			composite_con_in: endpoint {
52*f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7180_in>;
53*f5335aa6SGeert Uytterhoeven			};
54*f5335aa6SGeert Uytterhoeven		};
55*f5335aa6SGeert Uytterhoeven	};
56*f5335aa6SGeert Uytterhoeven
57*f5335aa6SGeert Uytterhoeven	hdmi-in {
58*f5335aa6SGeert Uytterhoeven		compatible = "hdmi-connector";
59*f5335aa6SGeert Uytterhoeven		type = "a";
60*f5335aa6SGeert Uytterhoeven
61*f5335aa6SGeert Uytterhoeven		port {
62*f5335aa6SGeert Uytterhoeven			hdmi_con_in: endpoint {
63*f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7612_in>;
64*f5335aa6SGeert Uytterhoeven			};
65*f5335aa6SGeert Uytterhoeven		};
66*f5335aa6SGeert Uytterhoeven	};
67*f5335aa6SGeert Uytterhoeven
68*f5335aa6SGeert Uytterhoeven	hdmi-out {
69*f5335aa6SGeert Uytterhoeven		compatible = "hdmi-connector";
70*f5335aa6SGeert Uytterhoeven		type = "a";
71*f5335aa6SGeert Uytterhoeven
72*f5335aa6SGeert Uytterhoeven		port {
73*f5335aa6SGeert Uytterhoeven			hdmi_con_out: endpoint {
74*f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7511_out>;
75*f5335aa6SGeert Uytterhoeven			};
76*f5335aa6SGeert Uytterhoeven		};
77*f5335aa6SGeert Uytterhoeven	};
78*f5335aa6SGeert Uytterhoeven
79*f5335aa6SGeert Uytterhoeven	keys {
80*f5335aa6SGeert Uytterhoeven		compatible = "gpio-keys";
81*f5335aa6SGeert Uytterhoeven
82*f5335aa6SGeert Uytterhoeven		pinctrl-0 = <&keys_pins>;
83*f5335aa6SGeert Uytterhoeven		pinctrl-names = "default";
84*f5335aa6SGeert Uytterhoeven
85*f5335aa6SGeert Uytterhoeven		key-1 {
86*f5335aa6SGeert Uytterhoeven			gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
87*f5335aa6SGeert Uytterhoeven			linux,code = <KEY_1>;
88*f5335aa6SGeert Uytterhoeven			label = "SW56-1";
89*f5335aa6SGeert Uytterhoeven			wakeup-source;
90*f5335aa6SGeert Uytterhoeven			debounce-interval = <20>;
91*f5335aa6SGeert Uytterhoeven		};
92*f5335aa6SGeert Uytterhoeven		key-2 {
93*f5335aa6SGeert Uytterhoeven			gpios = <&gpio4 13 GPIO_ACTIVE_LOW>;
94*f5335aa6SGeert Uytterhoeven			linux,code = <KEY_2>;
95*f5335aa6SGeert Uytterhoeven			label = "SW56-2";
96*f5335aa6SGeert Uytterhoeven			wakeup-source;
97*f5335aa6SGeert Uytterhoeven			debounce-interval = <20>;
98*f5335aa6SGeert Uytterhoeven		};
99*f5335aa6SGeert Uytterhoeven		key-3 {
100*f5335aa6SGeert Uytterhoeven			gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
101*f5335aa6SGeert Uytterhoeven			linux,code = <KEY_3>;
102*f5335aa6SGeert Uytterhoeven			label = "SW56-3";
103*f5335aa6SGeert Uytterhoeven			wakeup-source;
104*f5335aa6SGeert Uytterhoeven			debounce-interval = <20>;
105*f5335aa6SGeert Uytterhoeven		};
106*f5335aa6SGeert Uytterhoeven		key-4 {
107*f5335aa6SGeert Uytterhoeven			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
108*f5335aa6SGeert Uytterhoeven			linux,code = <KEY_4>;
109*f5335aa6SGeert Uytterhoeven			label = "SW56-4";
110*f5335aa6SGeert Uytterhoeven			wakeup-source;
111*f5335aa6SGeert Uytterhoeven			debounce-interval = <20>;
112*f5335aa6SGeert Uytterhoeven		};
113*f5335aa6SGeert Uytterhoeven	};
114*f5335aa6SGeert Uytterhoeven
115*f5335aa6SGeert Uytterhoeven	lvds-decoder {
116*f5335aa6SGeert Uytterhoeven		compatible = "thine,thc63lvd1024";
117*f5335aa6SGeert Uytterhoeven		vcc-supply = <&reg_3p3v>;
118*f5335aa6SGeert Uytterhoeven
119*f5335aa6SGeert Uytterhoeven		ports {
120*f5335aa6SGeert Uytterhoeven			#address-cells = <1>;
121*f5335aa6SGeert Uytterhoeven			#size-cells = <0>;
122*f5335aa6SGeert Uytterhoeven
123*f5335aa6SGeert Uytterhoeven			port@0 {
124*f5335aa6SGeert Uytterhoeven				reg = <0>;
125*f5335aa6SGeert Uytterhoeven				thc63lvd1024_in: endpoint {
126*f5335aa6SGeert Uytterhoeven					remote-endpoint = <&lvds0_out>;
127*f5335aa6SGeert Uytterhoeven				};
128*f5335aa6SGeert Uytterhoeven			};
129*f5335aa6SGeert Uytterhoeven
130*f5335aa6SGeert Uytterhoeven			port@2 {
131*f5335aa6SGeert Uytterhoeven				reg = <2>;
132*f5335aa6SGeert Uytterhoeven				thc63lvd1024_out: endpoint {
133*f5335aa6SGeert Uytterhoeven					remote-endpoint = <&adv7511_in>;
134*f5335aa6SGeert Uytterhoeven				};
135*f5335aa6SGeert Uytterhoeven			};
136*f5335aa6SGeert Uytterhoeven		};
137*f5335aa6SGeert Uytterhoeven	};
138*f5335aa6SGeert Uytterhoeven
139*f5335aa6SGeert Uytterhoeven	memory@48000000 {
140*f5335aa6SGeert Uytterhoeven		device_type = "memory";
141*f5335aa6SGeert Uytterhoeven		/* first 128MB is reserved for secure area. */
142*f5335aa6SGeert Uytterhoeven		reg = <0x0 0x48000000 0x0 0x18000000>;
143*f5335aa6SGeert Uytterhoeven	};
144*f5335aa6SGeert Uytterhoeven
145*f5335aa6SGeert Uytterhoeven	reg_1p8v: regulator-1p8v {
146*f5335aa6SGeert Uytterhoeven		compatible = "regulator-fixed";
147*f5335aa6SGeert Uytterhoeven		regulator-name = "fixed-1.8V";
148*f5335aa6SGeert Uytterhoeven		regulator-min-microvolt = <1800000>;
149*f5335aa6SGeert Uytterhoeven		regulator-max-microvolt = <1800000>;
150*f5335aa6SGeert Uytterhoeven		regulator-boot-on;
151*f5335aa6SGeert Uytterhoeven		regulator-always-on;
152*f5335aa6SGeert Uytterhoeven	};
153*f5335aa6SGeert Uytterhoeven
154*f5335aa6SGeert Uytterhoeven	reg_3p3v: regulator-3p3v {
155*f5335aa6SGeert Uytterhoeven		compatible = "regulator-fixed";
156*f5335aa6SGeert Uytterhoeven		regulator-name = "fixed-3.3V";
157*f5335aa6SGeert Uytterhoeven		regulator-min-microvolt = <3300000>;
158*f5335aa6SGeert Uytterhoeven		regulator-max-microvolt = <3300000>;
159*f5335aa6SGeert Uytterhoeven		regulator-boot-on;
160*f5335aa6SGeert Uytterhoeven		regulator-always-on;
161*f5335aa6SGeert Uytterhoeven	};
162*f5335aa6SGeert Uytterhoeven
163*f5335aa6SGeert Uytterhoeven	reg_12p0v: regulator-12p0v {
164*f5335aa6SGeert Uytterhoeven		compatible = "regulator-fixed";
165*f5335aa6SGeert Uytterhoeven		regulator-name = "D12.0V";
166*f5335aa6SGeert Uytterhoeven		regulator-min-microvolt = <12000000>;
167*f5335aa6SGeert Uytterhoeven		regulator-max-microvolt = <12000000>;
168*f5335aa6SGeert Uytterhoeven		regulator-boot-on;
169*f5335aa6SGeert Uytterhoeven		regulator-always-on;
170*f5335aa6SGeert Uytterhoeven	};
171*f5335aa6SGeert Uytterhoeven
172*f5335aa6SGeert Uytterhoeven	sound_card: sound {
173*f5335aa6SGeert Uytterhoeven		compatible = "audio-graph-card";
174*f5335aa6SGeert Uytterhoeven
175*f5335aa6SGeert Uytterhoeven		dais = <&rsnd_port0	/* ak4613 */
176*f5335aa6SGeert Uytterhoeven			/* HDMI is not yet supported */
177*f5335aa6SGeert Uytterhoeven		>;
178*f5335aa6SGeert Uytterhoeven	};
179*f5335aa6SGeert Uytterhoeven
180*f5335aa6SGeert Uytterhoeven	vga {
181*f5335aa6SGeert Uytterhoeven		compatible = "vga-connector";
182*f5335aa6SGeert Uytterhoeven
183*f5335aa6SGeert Uytterhoeven		port {
184*f5335aa6SGeert Uytterhoeven			vga_in: endpoint {
185*f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7123_out>;
186*f5335aa6SGeert Uytterhoeven			};
187*f5335aa6SGeert Uytterhoeven		};
188*f5335aa6SGeert Uytterhoeven	};
189*f5335aa6SGeert Uytterhoeven
190*f5335aa6SGeert Uytterhoeven	vga-encoder {
191*f5335aa6SGeert Uytterhoeven		compatible = "adi,adv7123";
192*f5335aa6SGeert Uytterhoeven
193*f5335aa6SGeert Uytterhoeven		ports {
194*f5335aa6SGeert Uytterhoeven			#address-cells = <1>;
195*f5335aa6SGeert Uytterhoeven			#size-cells = <0>;
196*f5335aa6SGeert Uytterhoeven
197*f5335aa6SGeert Uytterhoeven			port@0 {
198*f5335aa6SGeert Uytterhoeven				reg = <0>;
199*f5335aa6SGeert Uytterhoeven				adv7123_in: endpoint {
200*f5335aa6SGeert Uytterhoeven					remote-endpoint = <&du_out_rgb>;
201*f5335aa6SGeert Uytterhoeven				};
202*f5335aa6SGeert Uytterhoeven			};
203*f5335aa6SGeert Uytterhoeven			port@1 {
204*f5335aa6SGeert Uytterhoeven				reg = <1>;
205*f5335aa6SGeert Uytterhoeven				adv7123_out: endpoint {
206*f5335aa6SGeert Uytterhoeven					remote-endpoint = <&vga_in>;
207*f5335aa6SGeert Uytterhoeven				};
208*f5335aa6SGeert Uytterhoeven			};
209*f5335aa6SGeert Uytterhoeven		};
210*f5335aa6SGeert Uytterhoeven	};
211*f5335aa6SGeert Uytterhoeven
212*f5335aa6SGeert Uytterhoeven	x12_clk: x12 {
213*f5335aa6SGeert Uytterhoeven		compatible = "fixed-clock";
214*f5335aa6SGeert Uytterhoeven		#clock-cells = <0>;
215*f5335aa6SGeert Uytterhoeven		clock-frequency = <74250000>;
216*f5335aa6SGeert Uytterhoeven	};
217*f5335aa6SGeert Uytterhoeven
218*f5335aa6SGeert Uytterhoeven	x19_clk: x19 {
219*f5335aa6SGeert Uytterhoeven		compatible = "fixed-clock";
220*f5335aa6SGeert Uytterhoeven		#clock-cells = <0>;
221*f5335aa6SGeert Uytterhoeven		clock-frequency = <24576000>;
222*f5335aa6SGeert Uytterhoeven	};
223*f5335aa6SGeert Uytterhoeven};
224*f5335aa6SGeert Uytterhoeven
225*f5335aa6SGeert Uytterhoeven&audio_clk_b {
226*f5335aa6SGeert Uytterhoeven	/*
227*f5335aa6SGeert Uytterhoeven	 * X11 is connected to VI4_FIELD/SCIF_CLK/AUDIO_CLKB,
228*f5335aa6SGeert Uytterhoeven	 * and R-Car Sound uses AUDIO_CLKB.
229*f5335aa6SGeert Uytterhoeven	 * Note is that schematic indicates VI4_FIELD conection only
230*f5335aa6SGeert Uytterhoeven	 * not AUDIO_CLKB at SoC page.
231*f5335aa6SGeert Uytterhoeven	 * And this VI4_FIELD/SCIF_CLK/AUDIO_CLKB is connected to SW60.
232*f5335aa6SGeert Uytterhoeven	 * SW60 should be 1-2.
233*f5335aa6SGeert Uytterhoeven	 */
234*f5335aa6SGeert Uytterhoeven
235*f5335aa6SGeert Uytterhoeven	clock-frequency = <22579200>;
236*f5335aa6SGeert Uytterhoeven};
237*f5335aa6SGeert Uytterhoeven
238*f5335aa6SGeert Uytterhoeven&avb {
239*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&avb0_pins>;
240*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
241*f5335aa6SGeert Uytterhoeven	renesas,no-ether-link;
242*f5335aa6SGeert Uytterhoeven	phy-handle = <&phy0>;
243*f5335aa6SGeert Uytterhoeven	status = "okay";
244*f5335aa6SGeert Uytterhoeven
245*f5335aa6SGeert Uytterhoeven	phy0: ethernet-phy@0 {
246*f5335aa6SGeert Uytterhoeven		rxc-skew-ps = <1500>;
247*f5335aa6SGeert Uytterhoeven		reg = <0>;
248*f5335aa6SGeert Uytterhoeven		interrupt-parent = <&gpio5>;
249*f5335aa6SGeert Uytterhoeven		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
250*f5335aa6SGeert Uytterhoeven		/*
251*f5335aa6SGeert Uytterhoeven		 * TX clock internal delay mode is required for reliable
252*f5335aa6SGeert Uytterhoeven		 * 1Gbps communication using the KSZ9031RNX phy present on
253*f5335aa6SGeert Uytterhoeven		 * the Draak board, however, TX clock internal delay mode
254*f5335aa6SGeert Uytterhoeven		 * isn't supported on R-Car D3(e).  Thus, limit speed to
255*f5335aa6SGeert Uytterhoeven		 * 100Mbps for reliable communication.
256*f5335aa6SGeert Uytterhoeven		 */
257*f5335aa6SGeert Uytterhoeven		max-speed = <100>;
258*f5335aa6SGeert Uytterhoeven	};
259*f5335aa6SGeert Uytterhoeven};
260*f5335aa6SGeert Uytterhoeven
261*f5335aa6SGeert Uytterhoeven&can0 {
262*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&can0_pins>;
263*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
264*f5335aa6SGeert Uytterhoeven	status = "okay";
265*f5335aa6SGeert Uytterhoeven};
266*f5335aa6SGeert Uytterhoeven
267*f5335aa6SGeert Uytterhoeven&can1 {
268*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&can1_pins>;
269*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
270*f5335aa6SGeert Uytterhoeven	status = "okay";
271*f5335aa6SGeert Uytterhoeven};
272*f5335aa6SGeert Uytterhoeven
273*f5335aa6SGeert Uytterhoeven&du {
274*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&du_pins>;
275*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
276*f5335aa6SGeert Uytterhoeven	status = "okay";
277*f5335aa6SGeert Uytterhoeven
278*f5335aa6SGeert Uytterhoeven	clocks = <&cpg CPG_MOD 724>,
279*f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 723>,
280*f5335aa6SGeert Uytterhoeven		 <&x12_clk>;
281*f5335aa6SGeert Uytterhoeven	clock-names = "du.0", "du.1", "dclkin.0";
282*f5335aa6SGeert Uytterhoeven
283*f5335aa6SGeert Uytterhoeven	ports {
284*f5335aa6SGeert Uytterhoeven		port@0 {
285*f5335aa6SGeert Uytterhoeven			endpoint {
286*f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7123_in>;
287*f5335aa6SGeert Uytterhoeven			};
288*f5335aa6SGeert Uytterhoeven		};
289*f5335aa6SGeert Uytterhoeven	};
290*f5335aa6SGeert Uytterhoeven};
291*f5335aa6SGeert Uytterhoeven
292*f5335aa6SGeert Uytterhoeven&ehci0 {
293*f5335aa6SGeert Uytterhoeven	dr_mode = "host";
294*f5335aa6SGeert Uytterhoeven	status = "okay";
295*f5335aa6SGeert Uytterhoeven};
296*f5335aa6SGeert Uytterhoeven
297*f5335aa6SGeert Uytterhoeven&extal_clk {
298*f5335aa6SGeert Uytterhoeven	clock-frequency = <48000000>;
299*f5335aa6SGeert Uytterhoeven};
300*f5335aa6SGeert Uytterhoeven
301*f5335aa6SGeert Uytterhoeven&hsusb {
302*f5335aa6SGeert Uytterhoeven	dr_mode = "host";
303*f5335aa6SGeert Uytterhoeven	status = "okay";
304*f5335aa6SGeert Uytterhoeven};
305*f5335aa6SGeert Uytterhoeven
306*f5335aa6SGeert Uytterhoeven&i2c0 {
307*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&i2c0_pins>;
308*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
309*f5335aa6SGeert Uytterhoeven	status = "okay";
310*f5335aa6SGeert Uytterhoeven
311*f5335aa6SGeert Uytterhoeven	ak4613: codec@10 {
312*f5335aa6SGeert Uytterhoeven		compatible = "asahi-kasei,ak4613";
313*f5335aa6SGeert Uytterhoeven		#sound-dai-cells = <0>;
314*f5335aa6SGeert Uytterhoeven		reg = <0x10>;
315*f5335aa6SGeert Uytterhoeven		clocks = <&rcar_sound 0>; /* audio_clkout */
316*f5335aa6SGeert Uytterhoeven
317*f5335aa6SGeert Uytterhoeven		asahi-kasei,in1-single-end;
318*f5335aa6SGeert Uytterhoeven		asahi-kasei,in2-single-end;
319*f5335aa6SGeert Uytterhoeven		asahi-kasei,out1-single-end;
320*f5335aa6SGeert Uytterhoeven		asahi-kasei,out2-single-end;
321*f5335aa6SGeert Uytterhoeven		asahi-kasei,out3-single-end;
322*f5335aa6SGeert Uytterhoeven		asahi-kasei,out4-single-end;
323*f5335aa6SGeert Uytterhoeven		asahi-kasei,out5-single-end;
324*f5335aa6SGeert Uytterhoeven		asahi-kasei,out6-single-end;
325*f5335aa6SGeert Uytterhoeven
326*f5335aa6SGeert Uytterhoeven		port {
327*f5335aa6SGeert Uytterhoeven			ak4613_endpoint: endpoint {
328*f5335aa6SGeert Uytterhoeven				remote-endpoint = <&rsnd_for_ak4613>;
329*f5335aa6SGeert Uytterhoeven			};
330*f5335aa6SGeert Uytterhoeven		};
331*f5335aa6SGeert Uytterhoeven	};
332*f5335aa6SGeert Uytterhoeven
333*f5335aa6SGeert Uytterhoeven	composite-in@20 {
334*f5335aa6SGeert Uytterhoeven		compatible = "adi,adv7180cp";
335*f5335aa6SGeert Uytterhoeven		reg = <0x20>;
336*f5335aa6SGeert Uytterhoeven
337*f5335aa6SGeert Uytterhoeven		ports {
338*f5335aa6SGeert Uytterhoeven			#address-cells = <1>;
339*f5335aa6SGeert Uytterhoeven			#size-cells = <0>;
340*f5335aa6SGeert Uytterhoeven
341*f5335aa6SGeert Uytterhoeven			port@0 {
342*f5335aa6SGeert Uytterhoeven				reg = <0>;
343*f5335aa6SGeert Uytterhoeven				adv7180_in: endpoint {
344*f5335aa6SGeert Uytterhoeven					remote-endpoint = <&composite_con_in>;
345*f5335aa6SGeert Uytterhoeven				};
346*f5335aa6SGeert Uytterhoeven			};
347*f5335aa6SGeert Uytterhoeven
348*f5335aa6SGeert Uytterhoeven			port@3 {
349*f5335aa6SGeert Uytterhoeven				reg = <3>;
350*f5335aa6SGeert Uytterhoeven
351*f5335aa6SGeert Uytterhoeven				/*
352*f5335aa6SGeert Uytterhoeven				 * The VIN4 video input path is shared between
353*f5335aa6SGeert Uytterhoeven				 * CVBS and HDMI inputs through SW[49-53]
354*f5335aa6SGeert Uytterhoeven				 * switches.
355*f5335aa6SGeert Uytterhoeven				 *
356*f5335aa6SGeert Uytterhoeven				 * CVBS is the default selection, link it to
357*f5335aa6SGeert Uytterhoeven				 * VIN4 here.
358*f5335aa6SGeert Uytterhoeven				 */
359*f5335aa6SGeert Uytterhoeven				adv7180_out: endpoint {
360*f5335aa6SGeert Uytterhoeven					remote-endpoint = <&vin4_in>;
361*f5335aa6SGeert Uytterhoeven				};
362*f5335aa6SGeert Uytterhoeven			};
363*f5335aa6SGeert Uytterhoeven		};
364*f5335aa6SGeert Uytterhoeven
365*f5335aa6SGeert Uytterhoeven	};
366*f5335aa6SGeert Uytterhoeven
367*f5335aa6SGeert Uytterhoeven	hdmi-encoder@39 {
368*f5335aa6SGeert Uytterhoeven		compatible = "adi,adv7511w";
369*f5335aa6SGeert Uytterhoeven		reg = <0x39>, <0x3f>, <0x3c>, <0x38>;
370*f5335aa6SGeert Uytterhoeven		reg-names = "main", "edid", "cec", "packet";
371*f5335aa6SGeert Uytterhoeven		interrupt-parent = <&gpio1>;
372*f5335aa6SGeert Uytterhoeven		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
373*f5335aa6SGeert Uytterhoeven
374*f5335aa6SGeert Uytterhoeven		adi,input-depth = <8>;
375*f5335aa6SGeert Uytterhoeven		adi,input-colorspace = "rgb";
376*f5335aa6SGeert Uytterhoeven		adi,input-clock = "1x";
377*f5335aa6SGeert Uytterhoeven
378*f5335aa6SGeert Uytterhoeven		ports {
379*f5335aa6SGeert Uytterhoeven			#address-cells = <1>;
380*f5335aa6SGeert Uytterhoeven			#size-cells = <0>;
381*f5335aa6SGeert Uytterhoeven
382*f5335aa6SGeert Uytterhoeven			port@0 {
383*f5335aa6SGeert Uytterhoeven				reg = <0>;
384*f5335aa6SGeert Uytterhoeven				adv7511_in: endpoint {
385*f5335aa6SGeert Uytterhoeven					remote-endpoint = <&thc63lvd1024_out>;
386*f5335aa6SGeert Uytterhoeven				};
387*f5335aa6SGeert Uytterhoeven			};
388*f5335aa6SGeert Uytterhoeven
389*f5335aa6SGeert Uytterhoeven			port@1 {
390*f5335aa6SGeert Uytterhoeven				reg = <1>;
391*f5335aa6SGeert Uytterhoeven				adv7511_out: endpoint {
392*f5335aa6SGeert Uytterhoeven					remote-endpoint = <&hdmi_con_out>;
393*f5335aa6SGeert Uytterhoeven				};
394*f5335aa6SGeert Uytterhoeven			};
395*f5335aa6SGeert Uytterhoeven		};
396*f5335aa6SGeert Uytterhoeven	};
397*f5335aa6SGeert Uytterhoeven
398*f5335aa6SGeert Uytterhoeven	hdmi-decoder@4c {
399*f5335aa6SGeert Uytterhoeven		compatible = "adi,adv7612";
400*f5335aa6SGeert Uytterhoeven		reg = <0x4c>;
401*f5335aa6SGeert Uytterhoeven		default-input = <0>;
402*f5335aa6SGeert Uytterhoeven
403*f5335aa6SGeert Uytterhoeven		ports {
404*f5335aa6SGeert Uytterhoeven			#address-cells = <1>;
405*f5335aa6SGeert Uytterhoeven			#size-cells = <0>;
406*f5335aa6SGeert Uytterhoeven
407*f5335aa6SGeert Uytterhoeven			port@0 {
408*f5335aa6SGeert Uytterhoeven				reg = <0>;
409*f5335aa6SGeert Uytterhoeven
410*f5335aa6SGeert Uytterhoeven				adv7612_in: endpoint {
411*f5335aa6SGeert Uytterhoeven					remote-endpoint = <&hdmi_con_in>;
412*f5335aa6SGeert Uytterhoeven				};
413*f5335aa6SGeert Uytterhoeven			};
414*f5335aa6SGeert Uytterhoeven
415*f5335aa6SGeert Uytterhoeven			port@2 {
416*f5335aa6SGeert Uytterhoeven				reg = <2>;
417*f5335aa6SGeert Uytterhoeven
418*f5335aa6SGeert Uytterhoeven				/*
419*f5335aa6SGeert Uytterhoeven				 * The VIN4 video input path is shared between
420*f5335aa6SGeert Uytterhoeven				 * CVBS and HDMI inputs through SW[49-53]
421*f5335aa6SGeert Uytterhoeven				 * switches.
422*f5335aa6SGeert Uytterhoeven				 *
423*f5335aa6SGeert Uytterhoeven				 * CVBS is the default selection, leave HDMI
424*f5335aa6SGeert Uytterhoeven				 * not connected here.
425*f5335aa6SGeert Uytterhoeven				 */
426*f5335aa6SGeert Uytterhoeven				adv7612_out: endpoint {
427*f5335aa6SGeert Uytterhoeven					pclk-sample = <0>;
428*f5335aa6SGeert Uytterhoeven					hsync-active = <0>;
429*f5335aa6SGeert Uytterhoeven					vsync-active = <0>;
430*f5335aa6SGeert Uytterhoeven				};
431*f5335aa6SGeert Uytterhoeven			};
432*f5335aa6SGeert Uytterhoeven		};
433*f5335aa6SGeert Uytterhoeven	};
434*f5335aa6SGeert Uytterhoeven
435*f5335aa6SGeert Uytterhoeven	cs2000: clk-multiplier@4f {
436*f5335aa6SGeert Uytterhoeven		#clock-cells = <0>;
437*f5335aa6SGeert Uytterhoeven		compatible = "cirrus,cs2000-cp";
438*f5335aa6SGeert Uytterhoeven		reg = <0x4f>;
439*f5335aa6SGeert Uytterhoeven		clocks = <&audio_clkout>, <&x19_clk>; /* audio_clkout_1, x19 */
440*f5335aa6SGeert Uytterhoeven		clock-names = "clk_in", "ref_clk";
441*f5335aa6SGeert Uytterhoeven
442*f5335aa6SGeert Uytterhoeven		assigned-clocks = <&cs2000>;
443*f5335aa6SGeert Uytterhoeven		assigned-clock-rates = <24576000>; /* 1/1 divide */
444*f5335aa6SGeert Uytterhoeven	};
445*f5335aa6SGeert Uytterhoeven
446*f5335aa6SGeert Uytterhoeven	eeprom@50 {
447*f5335aa6SGeert Uytterhoeven		compatible = "rohm,br24t01", "atmel,24c01";
448*f5335aa6SGeert Uytterhoeven		reg = <0x50>;
449*f5335aa6SGeert Uytterhoeven		pagesize = <8>;
450*f5335aa6SGeert Uytterhoeven	};
451*f5335aa6SGeert Uytterhoeven};
452*f5335aa6SGeert Uytterhoeven
453*f5335aa6SGeert Uytterhoeven&i2c1 {
454*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&i2c1_pins>;
455*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
456*f5335aa6SGeert Uytterhoeven	status = "okay";
457*f5335aa6SGeert Uytterhoeven};
458*f5335aa6SGeert Uytterhoeven
459*f5335aa6SGeert Uytterhoeven&lvds0 {
460*f5335aa6SGeert Uytterhoeven	status = "okay";
461*f5335aa6SGeert Uytterhoeven
462*f5335aa6SGeert Uytterhoeven	clocks = <&cpg CPG_MOD 727>,
463*f5335aa6SGeert Uytterhoeven		 <&x12_clk>,
464*f5335aa6SGeert Uytterhoeven		 <&extal_clk>;
465*f5335aa6SGeert Uytterhoeven	clock-names = "fck", "dclkin.0", "extal";
466*f5335aa6SGeert Uytterhoeven
467*f5335aa6SGeert Uytterhoeven	ports {
468*f5335aa6SGeert Uytterhoeven		port@1 {
469*f5335aa6SGeert Uytterhoeven			lvds0_out: endpoint {
470*f5335aa6SGeert Uytterhoeven				remote-endpoint = <&thc63lvd1024_in>;
471*f5335aa6SGeert Uytterhoeven			};
472*f5335aa6SGeert Uytterhoeven		};
473*f5335aa6SGeert Uytterhoeven	};
474*f5335aa6SGeert Uytterhoeven};
475*f5335aa6SGeert Uytterhoeven
476*f5335aa6SGeert Uytterhoeven&lvds1 {
477*f5335aa6SGeert Uytterhoeven	/*
478*f5335aa6SGeert Uytterhoeven	 * Even though the LVDS1 output is not connected, the encoder must be
479*f5335aa6SGeert Uytterhoeven	 * enabled to supply a pixel clock to the DU for the DPAD output when
480*f5335aa6SGeert Uytterhoeven	 * LVDS0 is in use.
481*f5335aa6SGeert Uytterhoeven	 */
482*f5335aa6SGeert Uytterhoeven	status = "okay";
483*f5335aa6SGeert Uytterhoeven
484*f5335aa6SGeert Uytterhoeven	clocks = <&cpg CPG_MOD 727>,
485*f5335aa6SGeert Uytterhoeven		 <&x12_clk>,
486*f5335aa6SGeert Uytterhoeven		 <&extal_clk>;
487*f5335aa6SGeert Uytterhoeven	clock-names = "fck", "dclkin.0", "extal";
488*f5335aa6SGeert Uytterhoeven};
489*f5335aa6SGeert Uytterhoeven
490*f5335aa6SGeert Uytterhoeven&ohci0 {
491*f5335aa6SGeert Uytterhoeven	dr_mode = "host";
492*f5335aa6SGeert Uytterhoeven	status = "okay";
493*f5335aa6SGeert Uytterhoeven};
494*f5335aa6SGeert Uytterhoeven
495*f5335aa6SGeert Uytterhoeven&pfc {
496*f5335aa6SGeert Uytterhoeven	avb0_pins: avb {
497*f5335aa6SGeert Uytterhoeven		groups = "avb0_link", "avb0_mdio", "avb0_mii";
498*f5335aa6SGeert Uytterhoeven		function = "avb0";
499*f5335aa6SGeert Uytterhoeven	};
500*f5335aa6SGeert Uytterhoeven
501*f5335aa6SGeert Uytterhoeven	can0_pins: can0 {
502*f5335aa6SGeert Uytterhoeven		groups = "can0_data_a";
503*f5335aa6SGeert Uytterhoeven		function = "can0";
504*f5335aa6SGeert Uytterhoeven	};
505*f5335aa6SGeert Uytterhoeven
506*f5335aa6SGeert Uytterhoeven	can1_pins: can1 {
507*f5335aa6SGeert Uytterhoeven		groups = "can1_data_a";
508*f5335aa6SGeert Uytterhoeven		function = "can1";
509*f5335aa6SGeert Uytterhoeven	};
510*f5335aa6SGeert Uytterhoeven
511*f5335aa6SGeert Uytterhoeven	du_pins: du {
512*f5335aa6SGeert Uytterhoeven		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
513*f5335aa6SGeert Uytterhoeven		function = "du";
514*f5335aa6SGeert Uytterhoeven	};
515*f5335aa6SGeert Uytterhoeven
516*f5335aa6SGeert Uytterhoeven	i2c0_pins: i2c0 {
517*f5335aa6SGeert Uytterhoeven		groups = "i2c0";
518*f5335aa6SGeert Uytterhoeven		function = "i2c0";
519*f5335aa6SGeert Uytterhoeven	};
520*f5335aa6SGeert Uytterhoeven
521*f5335aa6SGeert Uytterhoeven	i2c1_pins: i2c1 {
522*f5335aa6SGeert Uytterhoeven		groups = "i2c1";
523*f5335aa6SGeert Uytterhoeven		function = "i2c1";
524*f5335aa6SGeert Uytterhoeven	};
525*f5335aa6SGeert Uytterhoeven
526*f5335aa6SGeert Uytterhoeven	keys_pins: keys {
527*f5335aa6SGeert Uytterhoeven		pins = "GP_4_12", "GP_4_13", "GP_4_14", "GP_4_15";
528*f5335aa6SGeert Uytterhoeven		bias-pull-up;
529*f5335aa6SGeert Uytterhoeven	};
530*f5335aa6SGeert Uytterhoeven
531*f5335aa6SGeert Uytterhoeven	pwm0_pins: pwm0 {
532*f5335aa6SGeert Uytterhoeven		groups = "pwm0_c";
533*f5335aa6SGeert Uytterhoeven		function = "pwm0";
534*f5335aa6SGeert Uytterhoeven	};
535*f5335aa6SGeert Uytterhoeven
536*f5335aa6SGeert Uytterhoeven	pwm1_pins: pwm1 {
537*f5335aa6SGeert Uytterhoeven		groups = "pwm1_c";
538*f5335aa6SGeert Uytterhoeven		function = "pwm1";
539*f5335aa6SGeert Uytterhoeven	};
540*f5335aa6SGeert Uytterhoeven
541*f5335aa6SGeert Uytterhoeven	scif2_pins: scif2 {
542*f5335aa6SGeert Uytterhoeven		groups = "scif2_data";
543*f5335aa6SGeert Uytterhoeven		function = "scif2";
544*f5335aa6SGeert Uytterhoeven	};
545*f5335aa6SGeert Uytterhoeven
546*f5335aa6SGeert Uytterhoeven	sdhi2_pins: sd2 {
547*f5335aa6SGeert Uytterhoeven		groups = "mmc_data8", "mmc_ctrl";
548*f5335aa6SGeert Uytterhoeven		function = "mmc";
549*f5335aa6SGeert Uytterhoeven		power-source = <1800>;
550*f5335aa6SGeert Uytterhoeven	};
551*f5335aa6SGeert Uytterhoeven
552*f5335aa6SGeert Uytterhoeven	sdhi2_pins_uhs: sd2_uhs {
553*f5335aa6SGeert Uytterhoeven		groups = "mmc_data8", "mmc_ctrl";
554*f5335aa6SGeert Uytterhoeven		function = "mmc";
555*f5335aa6SGeert Uytterhoeven		power-source = <1800>;
556*f5335aa6SGeert Uytterhoeven	};
557*f5335aa6SGeert Uytterhoeven
558*f5335aa6SGeert Uytterhoeven	sound_pins: sound {
559*f5335aa6SGeert Uytterhoeven		groups = "ssi34_ctrl", "ssi3_data", "ssi4_data_a";
560*f5335aa6SGeert Uytterhoeven		function = "ssi";
561*f5335aa6SGeert Uytterhoeven	};
562*f5335aa6SGeert Uytterhoeven
563*f5335aa6SGeert Uytterhoeven	sound_clk_pins: sound-clk {
564*f5335aa6SGeert Uytterhoeven		groups = "audio_clk_a", "audio_clk_b",
565*f5335aa6SGeert Uytterhoeven			 "audio_clkout", "audio_clkout1";
566*f5335aa6SGeert Uytterhoeven		function = "audio_clk";
567*f5335aa6SGeert Uytterhoeven	};
568*f5335aa6SGeert Uytterhoeven
569*f5335aa6SGeert Uytterhoeven	usb0_pins: usb0 {
570*f5335aa6SGeert Uytterhoeven		groups = "usb0";
571*f5335aa6SGeert Uytterhoeven		function = "usb0";
572*f5335aa6SGeert Uytterhoeven	};
573*f5335aa6SGeert Uytterhoeven
574*f5335aa6SGeert Uytterhoeven	vin4_pins_cvbs: vin4 {
575*f5335aa6SGeert Uytterhoeven		groups = "vin4_data8", "vin4_sync", "vin4_clk";
576*f5335aa6SGeert Uytterhoeven		function = "vin4";
577*f5335aa6SGeert Uytterhoeven	};
578*f5335aa6SGeert Uytterhoeven};
579*f5335aa6SGeert Uytterhoeven
580*f5335aa6SGeert Uytterhoeven&pwm0 {
581*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&pwm0_pins>;
582*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
583*f5335aa6SGeert Uytterhoeven
584*f5335aa6SGeert Uytterhoeven	status = "okay";
585*f5335aa6SGeert Uytterhoeven};
586*f5335aa6SGeert Uytterhoeven
587*f5335aa6SGeert Uytterhoeven&pwm1 {
588*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&pwm1_pins>;
589*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
590*f5335aa6SGeert Uytterhoeven
591*f5335aa6SGeert Uytterhoeven	status = "okay";
592*f5335aa6SGeert Uytterhoeven};
593*f5335aa6SGeert Uytterhoeven
594*f5335aa6SGeert Uytterhoeven&rcar_sound {
595*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
596*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
597*f5335aa6SGeert Uytterhoeven
598*f5335aa6SGeert Uytterhoeven	/* Single DAI */
599*f5335aa6SGeert Uytterhoeven	#sound-dai-cells = <0>;
600*f5335aa6SGeert Uytterhoeven
601*f5335aa6SGeert Uytterhoeven	/* audio_clkout0/1 */
602*f5335aa6SGeert Uytterhoeven	#clock-cells = <1>;
603*f5335aa6SGeert Uytterhoeven	clock-frequency = <12288000 11289600>;
604*f5335aa6SGeert Uytterhoeven
605*f5335aa6SGeert Uytterhoeven	status = "okay";
606*f5335aa6SGeert Uytterhoeven
607*f5335aa6SGeert Uytterhoeven	clocks = <&cpg CPG_MOD 1005>,
608*f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>,
609*f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
610*f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
611*f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
612*f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
613*f5335aa6SGeert Uytterhoeven		 <&cs2000>, <&audio_clk_b>,
614*f5335aa6SGeert Uytterhoeven		 <&cpg CPG_CORE R8A77995_CLK_ZA2>;
615*f5335aa6SGeert Uytterhoeven
616*f5335aa6SGeert Uytterhoeven	ports {
617*f5335aa6SGeert Uytterhoeven		rsnd_port0: port {
618*f5335aa6SGeert Uytterhoeven			rsnd_for_ak4613: endpoint {
619*f5335aa6SGeert Uytterhoeven				remote-endpoint = <&ak4613_endpoint>;
620*f5335aa6SGeert Uytterhoeven				dai-format = "left_j";
621*f5335aa6SGeert Uytterhoeven				bitclock-master = <&rsnd_for_ak4613>;
622*f5335aa6SGeert Uytterhoeven				frame-master = <&rsnd_for_ak4613>;
623*f5335aa6SGeert Uytterhoeven				playback = <&ssi3>, <&src5>, <&dvc0>;
624*f5335aa6SGeert Uytterhoeven				capture  = <&ssi4>, <&src6>, <&dvc1>;
625*f5335aa6SGeert Uytterhoeven			};
626*f5335aa6SGeert Uytterhoeven		};
627*f5335aa6SGeert Uytterhoeven	};
628*f5335aa6SGeert Uytterhoeven};
629*f5335aa6SGeert Uytterhoeven
630*f5335aa6SGeert Uytterhoeven&rwdt {
631*f5335aa6SGeert Uytterhoeven	timeout-sec = <60>;
632*f5335aa6SGeert Uytterhoeven	status = "okay";
633*f5335aa6SGeert Uytterhoeven};
634*f5335aa6SGeert Uytterhoeven
635*f5335aa6SGeert Uytterhoeven&scif2 {
636*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&scif2_pins>;
637*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
638*f5335aa6SGeert Uytterhoeven
639*f5335aa6SGeert Uytterhoeven	status = "okay";
640*f5335aa6SGeert Uytterhoeven};
641*f5335aa6SGeert Uytterhoeven
642*f5335aa6SGeert Uytterhoeven&sdhi2 {
643*f5335aa6SGeert Uytterhoeven	/* used for on-board eMMC */
644*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&sdhi2_pins>;
645*f5335aa6SGeert Uytterhoeven	pinctrl-1 = <&sdhi2_pins_uhs>;
646*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default", "state_uhs";
647*f5335aa6SGeert Uytterhoeven
648*f5335aa6SGeert Uytterhoeven	vmmc-supply = <&reg_3p3v>;
649*f5335aa6SGeert Uytterhoeven	vqmmc-supply = <&reg_1p8v>;
650*f5335aa6SGeert Uytterhoeven	bus-width = <8>;
651*f5335aa6SGeert Uytterhoeven	mmc-hs200-1_8v;
652*f5335aa6SGeert Uytterhoeven	no-sd;
653*f5335aa6SGeert Uytterhoeven	no-sdio;
654*f5335aa6SGeert Uytterhoeven	non-removable;
655*f5335aa6SGeert Uytterhoeven	status = "okay";
656*f5335aa6SGeert Uytterhoeven};
657*f5335aa6SGeert Uytterhoeven
658*f5335aa6SGeert Uytterhoeven&ssi4 {
659*f5335aa6SGeert Uytterhoeven	shared-pin;
660*f5335aa6SGeert Uytterhoeven};
661*f5335aa6SGeert Uytterhoeven
662*f5335aa6SGeert Uytterhoeven&usb2_phy0 {
663*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&usb0_pins>;
664*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
665*f5335aa6SGeert Uytterhoeven
666*f5335aa6SGeert Uytterhoeven	renesas,no-otg-pins;
667*f5335aa6SGeert Uytterhoeven	status = "okay";
668*f5335aa6SGeert Uytterhoeven};
669*f5335aa6SGeert Uytterhoeven
670*f5335aa6SGeert Uytterhoeven&vin4 {
671*f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&vin4_pins_cvbs>;
672*f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
673*f5335aa6SGeert Uytterhoeven
674*f5335aa6SGeert Uytterhoeven	status = "okay";
675*f5335aa6SGeert Uytterhoeven
676*f5335aa6SGeert Uytterhoeven	ports {
677*f5335aa6SGeert Uytterhoeven		port {
678*f5335aa6SGeert Uytterhoeven			vin4_in: endpoint {
679*f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7180_out>;
680*f5335aa6SGeert Uytterhoeven			};
681*f5335aa6SGeert Uytterhoeven		};
682*f5335aa6SGeert Uytterhoeven	};
683*f5335aa6SGeert Uytterhoeven};
684