xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/draak.dtsi (revision 722d55f3a9bd810f3a1a31916cc74e2915a994ce)
1f5335aa6SGeert Uytterhoeven// SPDX-License-Identifier: GPL-2.0
2f5335aa6SGeert Uytterhoeven/*
3f5335aa6SGeert Uytterhoeven * Device Tree Source for the Draak board
4f5335aa6SGeert Uytterhoeven *
5f5335aa6SGeert Uytterhoeven * Copyright (C) 2016-2018 Renesas Electronics Corp.
6f5335aa6SGeert Uytterhoeven * Copyright (C) 2017 Glider bvba
7f5335aa6SGeert Uytterhoeven */
8f5335aa6SGeert Uytterhoeven
9f5335aa6SGeert Uytterhoeven#include <dt-bindings/gpio/gpio.h>
10f5335aa6SGeert Uytterhoeven#include <dt-bindings/input/input.h>
11f5335aa6SGeert Uytterhoeven
12f5335aa6SGeert Uytterhoeven/ {
13f5335aa6SGeert Uytterhoeven	model = "Renesas Draak board";
14f5335aa6SGeert Uytterhoeven	compatible = "renesas,draak";
15f5335aa6SGeert Uytterhoeven
16f5335aa6SGeert Uytterhoeven	aliases {
17f5335aa6SGeert Uytterhoeven		serial0 = &scif2;
18f5335aa6SGeert Uytterhoeven		ethernet0 = &avb;
19f5335aa6SGeert Uytterhoeven	};
20f5335aa6SGeert Uytterhoeven
21f5335aa6SGeert Uytterhoeven	audio_clkout: audio-clkout {
22f5335aa6SGeert Uytterhoeven		/*
23f5335aa6SGeert Uytterhoeven		 * This is same as <&rcar_sound 0>
24f5335aa6SGeert Uytterhoeven		 * but needed to avoid cs2000/rcar_sound probe dead-lock
25f5335aa6SGeert Uytterhoeven		 */
26f5335aa6SGeert Uytterhoeven		compatible = "fixed-clock";
27f5335aa6SGeert Uytterhoeven		#clock-cells = <0>;
28f5335aa6SGeert Uytterhoeven		clock-frequency = <12288000>;
29f5335aa6SGeert Uytterhoeven	};
30f5335aa6SGeert Uytterhoeven
31f5335aa6SGeert Uytterhoeven	backlight: backlight {
32f5335aa6SGeert Uytterhoeven		compatible = "pwm-backlight";
33f5335aa6SGeert Uytterhoeven		pwms = <&pwm1 0 50000>;
34f5335aa6SGeert Uytterhoeven
35f5335aa6SGeert Uytterhoeven		brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
36f5335aa6SGeert Uytterhoeven		default-brightness-level = <10>;
37f5335aa6SGeert Uytterhoeven
38f5335aa6SGeert Uytterhoeven		power-supply = <&reg_12p0v>;
39f5335aa6SGeert Uytterhoeven		enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
40f5335aa6SGeert Uytterhoeven	};
41f5335aa6SGeert Uytterhoeven
42f5335aa6SGeert Uytterhoeven	chosen {
43f5335aa6SGeert Uytterhoeven		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
44f5335aa6SGeert Uytterhoeven		stdout-path = "serial0:115200n8";
45f5335aa6SGeert Uytterhoeven	};
46f5335aa6SGeert Uytterhoeven
47f5335aa6SGeert Uytterhoeven	composite-in {
48f5335aa6SGeert Uytterhoeven		compatible = "composite-video-connector";
49f5335aa6SGeert Uytterhoeven
50f5335aa6SGeert Uytterhoeven		port {
51f5335aa6SGeert Uytterhoeven			composite_con_in: endpoint {
52f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7180_in>;
53f5335aa6SGeert Uytterhoeven			};
54f5335aa6SGeert Uytterhoeven		};
55f5335aa6SGeert Uytterhoeven	};
56f5335aa6SGeert Uytterhoeven
57f5335aa6SGeert Uytterhoeven	hdmi-in {
58f5335aa6SGeert Uytterhoeven		compatible = "hdmi-connector";
59f5335aa6SGeert Uytterhoeven		type = "a";
60f5335aa6SGeert Uytterhoeven
61f5335aa6SGeert Uytterhoeven		port {
62f5335aa6SGeert Uytterhoeven			hdmi_con_in: endpoint {
63f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7612_in>;
64f5335aa6SGeert Uytterhoeven			};
65f5335aa6SGeert Uytterhoeven		};
66f5335aa6SGeert Uytterhoeven	};
67f5335aa6SGeert Uytterhoeven
68f5335aa6SGeert Uytterhoeven	hdmi-out {
69f5335aa6SGeert Uytterhoeven		compatible = "hdmi-connector";
70f5335aa6SGeert Uytterhoeven		type = "a";
71f5335aa6SGeert Uytterhoeven
72f5335aa6SGeert Uytterhoeven		port {
73f5335aa6SGeert Uytterhoeven			hdmi_con_out: endpoint {
74f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7511_out>;
75f5335aa6SGeert Uytterhoeven			};
76f5335aa6SGeert Uytterhoeven		};
77f5335aa6SGeert Uytterhoeven	};
78f5335aa6SGeert Uytterhoeven
79f5335aa6SGeert Uytterhoeven	keys {
80f5335aa6SGeert Uytterhoeven		compatible = "gpio-keys";
81f5335aa6SGeert Uytterhoeven
82f5335aa6SGeert Uytterhoeven		pinctrl-0 = <&keys_pins>;
83f5335aa6SGeert Uytterhoeven		pinctrl-names = "default";
84f5335aa6SGeert Uytterhoeven
85f5335aa6SGeert Uytterhoeven		key-1 {
86f5335aa6SGeert Uytterhoeven			gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
87f5335aa6SGeert Uytterhoeven			linux,code = <KEY_1>;
88f5335aa6SGeert Uytterhoeven			label = "SW56-1";
89f5335aa6SGeert Uytterhoeven			wakeup-source;
90f5335aa6SGeert Uytterhoeven			debounce-interval = <20>;
91f5335aa6SGeert Uytterhoeven		};
92f5335aa6SGeert Uytterhoeven		key-2 {
93f5335aa6SGeert Uytterhoeven			gpios = <&gpio4 13 GPIO_ACTIVE_LOW>;
94f5335aa6SGeert Uytterhoeven			linux,code = <KEY_2>;
95f5335aa6SGeert Uytterhoeven			label = "SW56-2";
96f5335aa6SGeert Uytterhoeven			wakeup-source;
97f5335aa6SGeert Uytterhoeven			debounce-interval = <20>;
98f5335aa6SGeert Uytterhoeven		};
99f5335aa6SGeert Uytterhoeven		key-3 {
100f5335aa6SGeert Uytterhoeven			gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
101f5335aa6SGeert Uytterhoeven			linux,code = <KEY_3>;
102f5335aa6SGeert Uytterhoeven			label = "SW56-3";
103f5335aa6SGeert Uytterhoeven			wakeup-source;
104f5335aa6SGeert Uytterhoeven			debounce-interval = <20>;
105f5335aa6SGeert Uytterhoeven		};
106f5335aa6SGeert Uytterhoeven		key-4 {
107f5335aa6SGeert Uytterhoeven			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
108f5335aa6SGeert Uytterhoeven			linux,code = <KEY_4>;
109f5335aa6SGeert Uytterhoeven			label = "SW56-4";
110f5335aa6SGeert Uytterhoeven			wakeup-source;
111f5335aa6SGeert Uytterhoeven			debounce-interval = <20>;
112f5335aa6SGeert Uytterhoeven		};
113f5335aa6SGeert Uytterhoeven	};
114f5335aa6SGeert Uytterhoeven
115f5335aa6SGeert Uytterhoeven	lvds-decoder {
116f5335aa6SGeert Uytterhoeven		compatible = "thine,thc63lvd1024";
117f5335aa6SGeert Uytterhoeven		vcc-supply = <&reg_3p3v>;
118f5335aa6SGeert Uytterhoeven
119f5335aa6SGeert Uytterhoeven		ports {
120f5335aa6SGeert Uytterhoeven			#address-cells = <1>;
121f5335aa6SGeert Uytterhoeven			#size-cells = <0>;
122f5335aa6SGeert Uytterhoeven
123f5335aa6SGeert Uytterhoeven			port@0 {
124f5335aa6SGeert Uytterhoeven				reg = <0>;
125f5335aa6SGeert Uytterhoeven				thc63lvd1024_in: endpoint {
126f5335aa6SGeert Uytterhoeven					remote-endpoint = <&lvds0_out>;
127f5335aa6SGeert Uytterhoeven				};
128f5335aa6SGeert Uytterhoeven			};
129f5335aa6SGeert Uytterhoeven
130f5335aa6SGeert Uytterhoeven			port@2 {
131f5335aa6SGeert Uytterhoeven				reg = <2>;
132f5335aa6SGeert Uytterhoeven				thc63lvd1024_out: endpoint {
133f5335aa6SGeert Uytterhoeven					remote-endpoint = <&adv7511_in>;
134f5335aa6SGeert Uytterhoeven				};
135f5335aa6SGeert Uytterhoeven			};
136f5335aa6SGeert Uytterhoeven		};
137f5335aa6SGeert Uytterhoeven	};
138f5335aa6SGeert Uytterhoeven
139f5335aa6SGeert Uytterhoeven	memory@48000000 {
140f5335aa6SGeert Uytterhoeven		device_type = "memory";
141f5335aa6SGeert Uytterhoeven		/* first 128MB is reserved for secure area. */
142f5335aa6SGeert Uytterhoeven		reg = <0x0 0x48000000 0x0 0x18000000>;
143f5335aa6SGeert Uytterhoeven	};
144f5335aa6SGeert Uytterhoeven
145f5335aa6SGeert Uytterhoeven	reg_1p8v: regulator-1p8v {
146f5335aa6SGeert Uytterhoeven		compatible = "regulator-fixed";
147f5335aa6SGeert Uytterhoeven		regulator-name = "fixed-1.8V";
148f5335aa6SGeert Uytterhoeven		regulator-min-microvolt = <1800000>;
149f5335aa6SGeert Uytterhoeven		regulator-max-microvolt = <1800000>;
150f5335aa6SGeert Uytterhoeven		regulator-boot-on;
151f5335aa6SGeert Uytterhoeven		regulator-always-on;
152f5335aa6SGeert Uytterhoeven	};
153f5335aa6SGeert Uytterhoeven
154f5335aa6SGeert Uytterhoeven	reg_3p3v: regulator-3p3v {
155f5335aa6SGeert Uytterhoeven		compatible = "regulator-fixed";
156f5335aa6SGeert Uytterhoeven		regulator-name = "fixed-3.3V";
157f5335aa6SGeert Uytterhoeven		regulator-min-microvolt = <3300000>;
158f5335aa6SGeert Uytterhoeven		regulator-max-microvolt = <3300000>;
159f5335aa6SGeert Uytterhoeven		regulator-boot-on;
160f5335aa6SGeert Uytterhoeven		regulator-always-on;
161f5335aa6SGeert Uytterhoeven	};
162f5335aa6SGeert Uytterhoeven
163f5335aa6SGeert Uytterhoeven	reg_12p0v: regulator-12p0v {
164f5335aa6SGeert Uytterhoeven		compatible = "regulator-fixed";
165f5335aa6SGeert Uytterhoeven		regulator-name = "D12.0V";
166f5335aa6SGeert Uytterhoeven		regulator-min-microvolt = <12000000>;
167f5335aa6SGeert Uytterhoeven		regulator-max-microvolt = <12000000>;
168f5335aa6SGeert Uytterhoeven		regulator-boot-on;
169f5335aa6SGeert Uytterhoeven		regulator-always-on;
170f5335aa6SGeert Uytterhoeven	};
171f5335aa6SGeert Uytterhoeven
172f5335aa6SGeert Uytterhoeven	sound_card: sound {
173f5335aa6SGeert Uytterhoeven		compatible = "audio-graph-card";
174f5335aa6SGeert Uytterhoeven
175f5335aa6SGeert Uytterhoeven		dais = <&rsnd_port0	/* ak4613 */
176f5335aa6SGeert Uytterhoeven			/* HDMI is not yet supported */
177f5335aa6SGeert Uytterhoeven		>;
178f5335aa6SGeert Uytterhoeven	};
179f5335aa6SGeert Uytterhoeven
180f5335aa6SGeert Uytterhoeven	vga {
181f5335aa6SGeert Uytterhoeven		compatible = "vga-connector";
182f5335aa6SGeert Uytterhoeven
183f5335aa6SGeert Uytterhoeven		port {
184f5335aa6SGeert Uytterhoeven			vga_in: endpoint {
185f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7123_out>;
186f5335aa6SGeert Uytterhoeven			};
187f5335aa6SGeert Uytterhoeven		};
188f5335aa6SGeert Uytterhoeven	};
189f5335aa6SGeert Uytterhoeven
190f5335aa6SGeert Uytterhoeven	vga-encoder {
191f5335aa6SGeert Uytterhoeven		compatible = "adi,adv7123";
192f5335aa6SGeert Uytterhoeven
193f5335aa6SGeert Uytterhoeven		ports {
194f5335aa6SGeert Uytterhoeven			#address-cells = <1>;
195f5335aa6SGeert Uytterhoeven			#size-cells = <0>;
196f5335aa6SGeert Uytterhoeven
197f5335aa6SGeert Uytterhoeven			port@0 {
198f5335aa6SGeert Uytterhoeven				reg = <0>;
199f5335aa6SGeert Uytterhoeven				adv7123_in: endpoint {
200f5335aa6SGeert Uytterhoeven					remote-endpoint = <&du_out_rgb>;
201f5335aa6SGeert Uytterhoeven				};
202f5335aa6SGeert Uytterhoeven			};
203f5335aa6SGeert Uytterhoeven			port@1 {
204f5335aa6SGeert Uytterhoeven				reg = <1>;
205f5335aa6SGeert Uytterhoeven				adv7123_out: endpoint {
206f5335aa6SGeert Uytterhoeven					remote-endpoint = <&vga_in>;
207f5335aa6SGeert Uytterhoeven				};
208f5335aa6SGeert Uytterhoeven			};
209f5335aa6SGeert Uytterhoeven		};
210f5335aa6SGeert Uytterhoeven	};
211f5335aa6SGeert Uytterhoeven
212f5335aa6SGeert Uytterhoeven	x12_clk: x12 {
213f5335aa6SGeert Uytterhoeven		compatible = "fixed-clock";
214f5335aa6SGeert Uytterhoeven		#clock-cells = <0>;
215f5335aa6SGeert Uytterhoeven		clock-frequency = <74250000>;
216f5335aa6SGeert Uytterhoeven	};
217f5335aa6SGeert Uytterhoeven
218f5335aa6SGeert Uytterhoeven	x19_clk: x19 {
219f5335aa6SGeert Uytterhoeven		compatible = "fixed-clock";
220f5335aa6SGeert Uytterhoeven		#clock-cells = <0>;
221f5335aa6SGeert Uytterhoeven		clock-frequency = <24576000>;
222f5335aa6SGeert Uytterhoeven	};
223f5335aa6SGeert Uytterhoeven};
224f5335aa6SGeert Uytterhoeven
225f5335aa6SGeert Uytterhoeven&audio_clk_b {
226f5335aa6SGeert Uytterhoeven	/*
227f5335aa6SGeert Uytterhoeven	 * X11 is connected to VI4_FIELD/SCIF_CLK/AUDIO_CLKB,
228f5335aa6SGeert Uytterhoeven	 * and R-Car Sound uses AUDIO_CLKB.
229f5335aa6SGeert Uytterhoeven	 * Note is that schematic indicates VI4_FIELD conection only
230f5335aa6SGeert Uytterhoeven	 * not AUDIO_CLKB at SoC page.
231f5335aa6SGeert Uytterhoeven	 * And this VI4_FIELD/SCIF_CLK/AUDIO_CLKB is connected to SW60.
232f5335aa6SGeert Uytterhoeven	 * SW60 should be 1-2.
233f5335aa6SGeert Uytterhoeven	 */
234f5335aa6SGeert Uytterhoeven
235f5335aa6SGeert Uytterhoeven	clock-frequency = <22579200>;
236f5335aa6SGeert Uytterhoeven};
237f5335aa6SGeert Uytterhoeven
238f5335aa6SGeert Uytterhoeven&avb {
239f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&avb0_pins>;
240f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
241f5335aa6SGeert Uytterhoeven	renesas,no-ether-link;
242f5335aa6SGeert Uytterhoeven	phy-handle = <&phy0>;
243f5335aa6SGeert Uytterhoeven	status = "okay";
244f5335aa6SGeert Uytterhoeven
245f5335aa6SGeert Uytterhoeven	phy0: ethernet-phy@0 {
246*722d55f3SGeert Uytterhoeven		compatible = "ethernet-phy-id0022.1622",
247*722d55f3SGeert Uytterhoeven			     "ethernet-phy-ieee802.3-c22";
248f5335aa6SGeert Uytterhoeven		rxc-skew-ps = <1500>;
249f5335aa6SGeert Uytterhoeven		reg = <0>;
250f5335aa6SGeert Uytterhoeven		interrupt-parent = <&gpio5>;
251f5335aa6SGeert Uytterhoeven		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
252f5335aa6SGeert Uytterhoeven		/*
253f5335aa6SGeert Uytterhoeven		 * TX clock internal delay mode is required for reliable
254f5335aa6SGeert Uytterhoeven		 * 1Gbps communication using the KSZ9031RNX phy present on
255f5335aa6SGeert Uytterhoeven		 * the Draak board, however, TX clock internal delay mode
256f5335aa6SGeert Uytterhoeven		 * isn't supported on R-Car D3(e).  Thus, limit speed to
257f5335aa6SGeert Uytterhoeven		 * 100Mbps for reliable communication.
258f5335aa6SGeert Uytterhoeven		 */
259f5335aa6SGeert Uytterhoeven		max-speed = <100>;
260f5335aa6SGeert Uytterhoeven	};
261f5335aa6SGeert Uytterhoeven};
262f5335aa6SGeert Uytterhoeven
263f5335aa6SGeert Uytterhoeven&can0 {
264f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&can0_pins>;
265f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
266f5335aa6SGeert Uytterhoeven	status = "okay";
267f5335aa6SGeert Uytterhoeven};
268f5335aa6SGeert Uytterhoeven
269f5335aa6SGeert Uytterhoeven&can1 {
270f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&can1_pins>;
271f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
272f5335aa6SGeert Uytterhoeven	status = "okay";
273f5335aa6SGeert Uytterhoeven};
274f5335aa6SGeert Uytterhoeven
275f5335aa6SGeert Uytterhoeven&du {
276f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&du_pins>;
277f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
278f5335aa6SGeert Uytterhoeven	status = "okay";
279f5335aa6SGeert Uytterhoeven
280f5335aa6SGeert Uytterhoeven	clocks = <&cpg CPG_MOD 724>,
281f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 723>,
282f5335aa6SGeert Uytterhoeven		 <&x12_clk>;
283f5335aa6SGeert Uytterhoeven	clock-names = "du.0", "du.1", "dclkin.0";
284f5335aa6SGeert Uytterhoeven
285f5335aa6SGeert Uytterhoeven	ports {
286f5335aa6SGeert Uytterhoeven		port@0 {
287f5335aa6SGeert Uytterhoeven			endpoint {
288f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7123_in>;
289f5335aa6SGeert Uytterhoeven			};
290f5335aa6SGeert Uytterhoeven		};
291f5335aa6SGeert Uytterhoeven	};
292f5335aa6SGeert Uytterhoeven};
293f5335aa6SGeert Uytterhoeven
294f5335aa6SGeert Uytterhoeven&ehci0 {
295f5335aa6SGeert Uytterhoeven	dr_mode = "host";
296f5335aa6SGeert Uytterhoeven	status = "okay";
297f5335aa6SGeert Uytterhoeven};
298f5335aa6SGeert Uytterhoeven
299f5335aa6SGeert Uytterhoeven&extal_clk {
300f5335aa6SGeert Uytterhoeven	clock-frequency = <48000000>;
301f5335aa6SGeert Uytterhoeven};
302f5335aa6SGeert Uytterhoeven
303f5335aa6SGeert Uytterhoeven&hsusb {
304f5335aa6SGeert Uytterhoeven	dr_mode = "host";
305f5335aa6SGeert Uytterhoeven	status = "okay";
306f5335aa6SGeert Uytterhoeven};
307f5335aa6SGeert Uytterhoeven
308f5335aa6SGeert Uytterhoeven&i2c0 {
309f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&i2c0_pins>;
310f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
311f5335aa6SGeert Uytterhoeven	status = "okay";
312f5335aa6SGeert Uytterhoeven
313f5335aa6SGeert Uytterhoeven	ak4613: codec@10 {
314f5335aa6SGeert Uytterhoeven		compatible = "asahi-kasei,ak4613";
315f5335aa6SGeert Uytterhoeven		#sound-dai-cells = <0>;
316f5335aa6SGeert Uytterhoeven		reg = <0x10>;
317f5335aa6SGeert Uytterhoeven		clocks = <&rcar_sound 0>; /* audio_clkout */
318f5335aa6SGeert Uytterhoeven
319f5335aa6SGeert Uytterhoeven		asahi-kasei,in1-single-end;
320f5335aa6SGeert Uytterhoeven		asahi-kasei,in2-single-end;
321f5335aa6SGeert Uytterhoeven		asahi-kasei,out1-single-end;
322f5335aa6SGeert Uytterhoeven		asahi-kasei,out2-single-end;
323f5335aa6SGeert Uytterhoeven		asahi-kasei,out3-single-end;
324f5335aa6SGeert Uytterhoeven		asahi-kasei,out4-single-end;
325f5335aa6SGeert Uytterhoeven		asahi-kasei,out5-single-end;
326f5335aa6SGeert Uytterhoeven		asahi-kasei,out6-single-end;
327f5335aa6SGeert Uytterhoeven
328f5335aa6SGeert Uytterhoeven		port {
329f5335aa6SGeert Uytterhoeven			ak4613_endpoint: endpoint {
330f5335aa6SGeert Uytterhoeven				remote-endpoint = <&rsnd_for_ak4613>;
331f5335aa6SGeert Uytterhoeven			};
332f5335aa6SGeert Uytterhoeven		};
333f5335aa6SGeert Uytterhoeven	};
334f5335aa6SGeert Uytterhoeven
335f5335aa6SGeert Uytterhoeven	composite-in@20 {
336f5335aa6SGeert Uytterhoeven		compatible = "adi,adv7180cp";
337f5335aa6SGeert Uytterhoeven		reg = <0x20>;
338f5335aa6SGeert Uytterhoeven
339f5335aa6SGeert Uytterhoeven		ports {
340f5335aa6SGeert Uytterhoeven			#address-cells = <1>;
341f5335aa6SGeert Uytterhoeven			#size-cells = <0>;
342f5335aa6SGeert Uytterhoeven
343f5335aa6SGeert Uytterhoeven			port@0 {
344f5335aa6SGeert Uytterhoeven				reg = <0>;
345f5335aa6SGeert Uytterhoeven				adv7180_in: endpoint {
346f5335aa6SGeert Uytterhoeven					remote-endpoint = <&composite_con_in>;
347f5335aa6SGeert Uytterhoeven				};
348f5335aa6SGeert Uytterhoeven			};
349f5335aa6SGeert Uytterhoeven
350f5335aa6SGeert Uytterhoeven			port@3 {
351f5335aa6SGeert Uytterhoeven				reg = <3>;
352f5335aa6SGeert Uytterhoeven
353f5335aa6SGeert Uytterhoeven				/*
354f5335aa6SGeert Uytterhoeven				 * The VIN4 video input path is shared between
355f5335aa6SGeert Uytterhoeven				 * CVBS and HDMI inputs through SW[49-53]
356f5335aa6SGeert Uytterhoeven				 * switches.
357f5335aa6SGeert Uytterhoeven				 *
358f5335aa6SGeert Uytterhoeven				 * CVBS is the default selection, link it to
359f5335aa6SGeert Uytterhoeven				 * VIN4 here.
360f5335aa6SGeert Uytterhoeven				 */
361f5335aa6SGeert Uytterhoeven				adv7180_out: endpoint {
362f5335aa6SGeert Uytterhoeven					remote-endpoint = <&vin4_in>;
363f5335aa6SGeert Uytterhoeven				};
364f5335aa6SGeert Uytterhoeven			};
365f5335aa6SGeert Uytterhoeven		};
366f5335aa6SGeert Uytterhoeven
367f5335aa6SGeert Uytterhoeven	};
368f5335aa6SGeert Uytterhoeven
369f5335aa6SGeert Uytterhoeven	hdmi-encoder@39 {
370f5335aa6SGeert Uytterhoeven		compatible = "adi,adv7511w";
371f5335aa6SGeert Uytterhoeven		reg = <0x39>, <0x3f>, <0x3c>, <0x38>;
372f5335aa6SGeert Uytterhoeven		reg-names = "main", "edid", "cec", "packet";
373f5335aa6SGeert Uytterhoeven		interrupt-parent = <&gpio1>;
374f5335aa6SGeert Uytterhoeven		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
375f5335aa6SGeert Uytterhoeven
376f5335aa6SGeert Uytterhoeven		adi,input-depth = <8>;
377f5335aa6SGeert Uytterhoeven		adi,input-colorspace = "rgb";
378f5335aa6SGeert Uytterhoeven		adi,input-clock = "1x";
379f5335aa6SGeert Uytterhoeven
380f5335aa6SGeert Uytterhoeven		ports {
381f5335aa6SGeert Uytterhoeven			#address-cells = <1>;
382f5335aa6SGeert Uytterhoeven			#size-cells = <0>;
383f5335aa6SGeert Uytterhoeven
384f5335aa6SGeert Uytterhoeven			port@0 {
385f5335aa6SGeert Uytterhoeven				reg = <0>;
386f5335aa6SGeert Uytterhoeven				adv7511_in: endpoint {
387f5335aa6SGeert Uytterhoeven					remote-endpoint = <&thc63lvd1024_out>;
388f5335aa6SGeert Uytterhoeven				};
389f5335aa6SGeert Uytterhoeven			};
390f5335aa6SGeert Uytterhoeven
391f5335aa6SGeert Uytterhoeven			port@1 {
392f5335aa6SGeert Uytterhoeven				reg = <1>;
393f5335aa6SGeert Uytterhoeven				adv7511_out: endpoint {
394f5335aa6SGeert Uytterhoeven					remote-endpoint = <&hdmi_con_out>;
395f5335aa6SGeert Uytterhoeven				};
396f5335aa6SGeert Uytterhoeven			};
397f5335aa6SGeert Uytterhoeven		};
398f5335aa6SGeert Uytterhoeven	};
399f5335aa6SGeert Uytterhoeven
400f5335aa6SGeert Uytterhoeven	hdmi-decoder@4c {
401f5335aa6SGeert Uytterhoeven		compatible = "adi,adv7612";
402f5335aa6SGeert Uytterhoeven		reg = <0x4c>;
403f5335aa6SGeert Uytterhoeven		default-input = <0>;
404f5335aa6SGeert Uytterhoeven
405f5335aa6SGeert Uytterhoeven		ports {
406f5335aa6SGeert Uytterhoeven			#address-cells = <1>;
407f5335aa6SGeert Uytterhoeven			#size-cells = <0>;
408f5335aa6SGeert Uytterhoeven
409f5335aa6SGeert Uytterhoeven			port@0 {
410f5335aa6SGeert Uytterhoeven				reg = <0>;
411f5335aa6SGeert Uytterhoeven
412f5335aa6SGeert Uytterhoeven				adv7612_in: endpoint {
413f5335aa6SGeert Uytterhoeven					remote-endpoint = <&hdmi_con_in>;
414f5335aa6SGeert Uytterhoeven				};
415f5335aa6SGeert Uytterhoeven			};
416f5335aa6SGeert Uytterhoeven
417f5335aa6SGeert Uytterhoeven			port@2 {
418f5335aa6SGeert Uytterhoeven				reg = <2>;
419f5335aa6SGeert Uytterhoeven
420f5335aa6SGeert Uytterhoeven				/*
421f5335aa6SGeert Uytterhoeven				 * The VIN4 video input path is shared between
422f5335aa6SGeert Uytterhoeven				 * CVBS and HDMI inputs through SW[49-53]
423f5335aa6SGeert Uytterhoeven				 * switches.
424f5335aa6SGeert Uytterhoeven				 *
425f5335aa6SGeert Uytterhoeven				 * CVBS is the default selection, leave HDMI
426f5335aa6SGeert Uytterhoeven				 * not connected here.
427f5335aa6SGeert Uytterhoeven				 */
428f5335aa6SGeert Uytterhoeven				adv7612_out: endpoint {
429f5335aa6SGeert Uytterhoeven					pclk-sample = <0>;
430f5335aa6SGeert Uytterhoeven					hsync-active = <0>;
431f5335aa6SGeert Uytterhoeven					vsync-active = <0>;
432f5335aa6SGeert Uytterhoeven				};
433f5335aa6SGeert Uytterhoeven			};
434f5335aa6SGeert Uytterhoeven		};
435f5335aa6SGeert Uytterhoeven	};
436f5335aa6SGeert Uytterhoeven
437f5335aa6SGeert Uytterhoeven	cs2000: clk-multiplier@4f {
438f5335aa6SGeert Uytterhoeven		#clock-cells = <0>;
439f5335aa6SGeert Uytterhoeven		compatible = "cirrus,cs2000-cp";
440f5335aa6SGeert Uytterhoeven		reg = <0x4f>;
441f5335aa6SGeert Uytterhoeven		clocks = <&audio_clkout>, <&x19_clk>; /* audio_clkout_1, x19 */
442f5335aa6SGeert Uytterhoeven		clock-names = "clk_in", "ref_clk";
443f5335aa6SGeert Uytterhoeven
444f5335aa6SGeert Uytterhoeven		assigned-clocks = <&cs2000>;
445f5335aa6SGeert Uytterhoeven		assigned-clock-rates = <24576000>; /* 1/1 divide */
446f5335aa6SGeert Uytterhoeven	};
447f5335aa6SGeert Uytterhoeven
448f5335aa6SGeert Uytterhoeven	eeprom@50 {
449f5335aa6SGeert Uytterhoeven		compatible = "rohm,br24t01", "atmel,24c01";
450f5335aa6SGeert Uytterhoeven		reg = <0x50>;
451f5335aa6SGeert Uytterhoeven		pagesize = <8>;
452f5335aa6SGeert Uytterhoeven	};
453f5335aa6SGeert Uytterhoeven};
454f5335aa6SGeert Uytterhoeven
455f5335aa6SGeert Uytterhoeven&i2c1 {
456f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&i2c1_pins>;
457f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
458f5335aa6SGeert Uytterhoeven	status = "okay";
459f5335aa6SGeert Uytterhoeven};
460f5335aa6SGeert Uytterhoeven
461f5335aa6SGeert Uytterhoeven&lvds0 {
462f5335aa6SGeert Uytterhoeven	status = "okay";
463f5335aa6SGeert Uytterhoeven
464f5335aa6SGeert Uytterhoeven	clocks = <&cpg CPG_MOD 727>,
465f5335aa6SGeert Uytterhoeven		 <&x12_clk>,
466f5335aa6SGeert Uytterhoeven		 <&extal_clk>;
467f5335aa6SGeert Uytterhoeven	clock-names = "fck", "dclkin.0", "extal";
468f5335aa6SGeert Uytterhoeven
469f5335aa6SGeert Uytterhoeven	ports {
470f5335aa6SGeert Uytterhoeven		port@1 {
471f5335aa6SGeert Uytterhoeven			lvds0_out: endpoint {
472f5335aa6SGeert Uytterhoeven				remote-endpoint = <&thc63lvd1024_in>;
473f5335aa6SGeert Uytterhoeven			};
474f5335aa6SGeert Uytterhoeven		};
475f5335aa6SGeert Uytterhoeven	};
476f5335aa6SGeert Uytterhoeven};
477f5335aa6SGeert Uytterhoeven
478f5335aa6SGeert Uytterhoeven&lvds1 {
479f5335aa6SGeert Uytterhoeven	/*
480f5335aa6SGeert Uytterhoeven	 * Even though the LVDS1 output is not connected, the encoder must be
481f5335aa6SGeert Uytterhoeven	 * enabled to supply a pixel clock to the DU for the DPAD output when
482f5335aa6SGeert Uytterhoeven	 * LVDS0 is in use.
483f5335aa6SGeert Uytterhoeven	 */
484f5335aa6SGeert Uytterhoeven	status = "okay";
485f5335aa6SGeert Uytterhoeven
486f5335aa6SGeert Uytterhoeven	clocks = <&cpg CPG_MOD 727>,
487f5335aa6SGeert Uytterhoeven		 <&x12_clk>,
488f5335aa6SGeert Uytterhoeven		 <&extal_clk>;
489f5335aa6SGeert Uytterhoeven	clock-names = "fck", "dclkin.0", "extal";
490f5335aa6SGeert Uytterhoeven};
491f5335aa6SGeert Uytterhoeven
492f5335aa6SGeert Uytterhoeven&ohci0 {
493f5335aa6SGeert Uytterhoeven	dr_mode = "host";
494f5335aa6SGeert Uytterhoeven	status = "okay";
495f5335aa6SGeert Uytterhoeven};
496f5335aa6SGeert Uytterhoeven
497f5335aa6SGeert Uytterhoeven&pfc {
498f5335aa6SGeert Uytterhoeven	avb0_pins: avb {
499f5335aa6SGeert Uytterhoeven		groups = "avb0_link", "avb0_mdio", "avb0_mii";
500f5335aa6SGeert Uytterhoeven		function = "avb0";
501f5335aa6SGeert Uytterhoeven	};
502f5335aa6SGeert Uytterhoeven
503f5335aa6SGeert Uytterhoeven	can0_pins: can0 {
504f5335aa6SGeert Uytterhoeven		groups = "can0_data_a";
505f5335aa6SGeert Uytterhoeven		function = "can0";
506f5335aa6SGeert Uytterhoeven	};
507f5335aa6SGeert Uytterhoeven
508f5335aa6SGeert Uytterhoeven	can1_pins: can1 {
509f5335aa6SGeert Uytterhoeven		groups = "can1_data_a";
510f5335aa6SGeert Uytterhoeven		function = "can1";
511f5335aa6SGeert Uytterhoeven	};
512f5335aa6SGeert Uytterhoeven
513f5335aa6SGeert Uytterhoeven	du_pins: du {
514f5335aa6SGeert Uytterhoeven		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
515f5335aa6SGeert Uytterhoeven		function = "du";
516f5335aa6SGeert Uytterhoeven	};
517f5335aa6SGeert Uytterhoeven
518f5335aa6SGeert Uytterhoeven	i2c0_pins: i2c0 {
519f5335aa6SGeert Uytterhoeven		groups = "i2c0";
520f5335aa6SGeert Uytterhoeven		function = "i2c0";
521f5335aa6SGeert Uytterhoeven	};
522f5335aa6SGeert Uytterhoeven
523f5335aa6SGeert Uytterhoeven	i2c1_pins: i2c1 {
524f5335aa6SGeert Uytterhoeven		groups = "i2c1";
525f5335aa6SGeert Uytterhoeven		function = "i2c1";
526f5335aa6SGeert Uytterhoeven	};
527f5335aa6SGeert Uytterhoeven
528f5335aa6SGeert Uytterhoeven	keys_pins: keys {
529f5335aa6SGeert Uytterhoeven		pins = "GP_4_12", "GP_4_13", "GP_4_14", "GP_4_15";
530f5335aa6SGeert Uytterhoeven		bias-pull-up;
531f5335aa6SGeert Uytterhoeven	};
532f5335aa6SGeert Uytterhoeven
533f5335aa6SGeert Uytterhoeven	pwm0_pins: pwm0 {
534f5335aa6SGeert Uytterhoeven		groups = "pwm0_c";
535f5335aa6SGeert Uytterhoeven		function = "pwm0";
536f5335aa6SGeert Uytterhoeven	};
537f5335aa6SGeert Uytterhoeven
538f5335aa6SGeert Uytterhoeven	pwm1_pins: pwm1 {
539f5335aa6SGeert Uytterhoeven		groups = "pwm1_c";
540f5335aa6SGeert Uytterhoeven		function = "pwm1";
541f5335aa6SGeert Uytterhoeven	};
542f5335aa6SGeert Uytterhoeven
543f5335aa6SGeert Uytterhoeven	scif2_pins: scif2 {
544f5335aa6SGeert Uytterhoeven		groups = "scif2_data";
545f5335aa6SGeert Uytterhoeven		function = "scif2";
546f5335aa6SGeert Uytterhoeven	};
547f5335aa6SGeert Uytterhoeven
548f5335aa6SGeert Uytterhoeven	sdhi2_pins: sd2 {
549f5335aa6SGeert Uytterhoeven		groups = "mmc_data8", "mmc_ctrl";
550f5335aa6SGeert Uytterhoeven		function = "mmc";
551f5335aa6SGeert Uytterhoeven		power-source = <1800>;
552f5335aa6SGeert Uytterhoeven	};
553f5335aa6SGeert Uytterhoeven
554f5335aa6SGeert Uytterhoeven	sdhi2_pins_uhs: sd2_uhs {
555f5335aa6SGeert Uytterhoeven		groups = "mmc_data8", "mmc_ctrl";
556f5335aa6SGeert Uytterhoeven		function = "mmc";
557f5335aa6SGeert Uytterhoeven		power-source = <1800>;
558f5335aa6SGeert Uytterhoeven	};
559f5335aa6SGeert Uytterhoeven
560f5335aa6SGeert Uytterhoeven	sound_pins: sound {
561f5335aa6SGeert Uytterhoeven		groups = "ssi34_ctrl", "ssi3_data", "ssi4_data_a";
562f5335aa6SGeert Uytterhoeven		function = "ssi";
563f5335aa6SGeert Uytterhoeven	};
564f5335aa6SGeert Uytterhoeven
565f5335aa6SGeert Uytterhoeven	sound_clk_pins: sound-clk {
566f5335aa6SGeert Uytterhoeven		groups = "audio_clk_a", "audio_clk_b",
567f5335aa6SGeert Uytterhoeven			 "audio_clkout", "audio_clkout1";
568f5335aa6SGeert Uytterhoeven		function = "audio_clk";
569f5335aa6SGeert Uytterhoeven	};
570f5335aa6SGeert Uytterhoeven
571f5335aa6SGeert Uytterhoeven	usb0_pins: usb0 {
572f5335aa6SGeert Uytterhoeven		groups = "usb0";
573f5335aa6SGeert Uytterhoeven		function = "usb0";
574f5335aa6SGeert Uytterhoeven	};
575f5335aa6SGeert Uytterhoeven
576f5335aa6SGeert Uytterhoeven	vin4_pins_cvbs: vin4 {
577f5335aa6SGeert Uytterhoeven		groups = "vin4_data8", "vin4_sync", "vin4_clk";
578f5335aa6SGeert Uytterhoeven		function = "vin4";
579f5335aa6SGeert Uytterhoeven	};
580f5335aa6SGeert Uytterhoeven};
581f5335aa6SGeert Uytterhoeven
582f5335aa6SGeert Uytterhoeven&pwm0 {
583f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&pwm0_pins>;
584f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
585f5335aa6SGeert Uytterhoeven
586f5335aa6SGeert Uytterhoeven	status = "okay";
587f5335aa6SGeert Uytterhoeven};
588f5335aa6SGeert Uytterhoeven
589f5335aa6SGeert Uytterhoeven&pwm1 {
590f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&pwm1_pins>;
591f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
592f5335aa6SGeert Uytterhoeven
593f5335aa6SGeert Uytterhoeven	status = "okay";
594f5335aa6SGeert Uytterhoeven};
595f5335aa6SGeert Uytterhoeven
596f5335aa6SGeert Uytterhoeven&rcar_sound {
597f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
598f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
599f5335aa6SGeert Uytterhoeven
600f5335aa6SGeert Uytterhoeven	/* Single DAI */
601f5335aa6SGeert Uytterhoeven	#sound-dai-cells = <0>;
602f5335aa6SGeert Uytterhoeven
603f5335aa6SGeert Uytterhoeven	/* audio_clkout0/1 */
604f5335aa6SGeert Uytterhoeven	#clock-cells = <1>;
605f5335aa6SGeert Uytterhoeven	clock-frequency = <12288000 11289600>;
606f5335aa6SGeert Uytterhoeven
607f5335aa6SGeert Uytterhoeven	status = "okay";
608f5335aa6SGeert Uytterhoeven
609f5335aa6SGeert Uytterhoeven	clocks = <&cpg CPG_MOD 1005>,
610f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>,
611f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
612f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
613f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
614f5335aa6SGeert Uytterhoeven		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
615f5335aa6SGeert Uytterhoeven		 <&cs2000>, <&audio_clk_b>,
616f5335aa6SGeert Uytterhoeven		 <&cpg CPG_CORE R8A77995_CLK_ZA2>;
617f5335aa6SGeert Uytterhoeven
618f5335aa6SGeert Uytterhoeven	ports {
619f5335aa6SGeert Uytterhoeven		rsnd_port0: port {
620f5335aa6SGeert Uytterhoeven			rsnd_for_ak4613: endpoint {
621f5335aa6SGeert Uytterhoeven				remote-endpoint = <&ak4613_endpoint>;
622f5335aa6SGeert Uytterhoeven				dai-format = "left_j";
623f5335aa6SGeert Uytterhoeven				bitclock-master = <&rsnd_for_ak4613>;
624f5335aa6SGeert Uytterhoeven				frame-master = <&rsnd_for_ak4613>;
625f5335aa6SGeert Uytterhoeven				playback = <&ssi3>, <&src5>, <&dvc0>;
626f5335aa6SGeert Uytterhoeven				capture  = <&ssi4>, <&src6>, <&dvc1>;
627f5335aa6SGeert Uytterhoeven			};
628f5335aa6SGeert Uytterhoeven		};
629f5335aa6SGeert Uytterhoeven	};
630f5335aa6SGeert Uytterhoeven};
631f5335aa6SGeert Uytterhoeven
632f5335aa6SGeert Uytterhoeven&rwdt {
633f5335aa6SGeert Uytterhoeven	timeout-sec = <60>;
634f5335aa6SGeert Uytterhoeven	status = "okay";
635f5335aa6SGeert Uytterhoeven};
636f5335aa6SGeert Uytterhoeven
637f5335aa6SGeert Uytterhoeven&scif2 {
638f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&scif2_pins>;
639f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
640f5335aa6SGeert Uytterhoeven
641f5335aa6SGeert Uytterhoeven	status = "okay";
642f5335aa6SGeert Uytterhoeven};
643f5335aa6SGeert Uytterhoeven
644f5335aa6SGeert Uytterhoeven&sdhi2 {
645f5335aa6SGeert Uytterhoeven	/* used for on-board eMMC */
646f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&sdhi2_pins>;
647f5335aa6SGeert Uytterhoeven	pinctrl-1 = <&sdhi2_pins_uhs>;
648f5335aa6SGeert Uytterhoeven	pinctrl-names = "default", "state_uhs";
649f5335aa6SGeert Uytterhoeven
650f5335aa6SGeert Uytterhoeven	vmmc-supply = <&reg_3p3v>;
651f5335aa6SGeert Uytterhoeven	vqmmc-supply = <&reg_1p8v>;
652f5335aa6SGeert Uytterhoeven	bus-width = <8>;
653f5335aa6SGeert Uytterhoeven	mmc-hs200-1_8v;
654f5335aa6SGeert Uytterhoeven	no-sd;
655f5335aa6SGeert Uytterhoeven	no-sdio;
656f5335aa6SGeert Uytterhoeven	non-removable;
657f5335aa6SGeert Uytterhoeven	status = "okay";
658f5335aa6SGeert Uytterhoeven};
659f5335aa6SGeert Uytterhoeven
660f5335aa6SGeert Uytterhoeven&ssi4 {
661f5335aa6SGeert Uytterhoeven	shared-pin;
662f5335aa6SGeert Uytterhoeven};
663f5335aa6SGeert Uytterhoeven
664f5335aa6SGeert Uytterhoeven&usb2_phy0 {
665f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&usb0_pins>;
666f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
667f5335aa6SGeert Uytterhoeven
668f5335aa6SGeert Uytterhoeven	renesas,no-otg-pins;
669f5335aa6SGeert Uytterhoeven	status = "okay";
670f5335aa6SGeert Uytterhoeven};
671f5335aa6SGeert Uytterhoeven
672f5335aa6SGeert Uytterhoeven&vin4 {
673f5335aa6SGeert Uytterhoeven	pinctrl-0 = <&vin4_pins_cvbs>;
674f5335aa6SGeert Uytterhoeven	pinctrl-names = "default";
675f5335aa6SGeert Uytterhoeven
676f5335aa6SGeert Uytterhoeven	status = "okay";
677f5335aa6SGeert Uytterhoeven
678f5335aa6SGeert Uytterhoeven	ports {
679f5335aa6SGeert Uytterhoeven		port {
680f5335aa6SGeert Uytterhoeven			vin4_in: endpoint {
681f5335aa6SGeert Uytterhoeven				remote-endpoint = <&adv7180_out>;
682f5335aa6SGeert Uytterhoeven			};
683f5335aa6SGeert Uytterhoeven		};
684f5335aa6SGeert Uytterhoeven	};
685f5335aa6SGeert Uytterhoeven};
686