xref: /linux/scripts/dtc/include-prefixes/arm64/realtek/rtd1395.dtsi (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1769c00a2SAndreas Färber// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
2769c00a2SAndreas Färber/*
3769c00a2SAndreas Färber * Realtek RTD1395 SoC
4769c00a2SAndreas Färber *
5769c00a2SAndreas Färber * Copyright (c) 2019 Andreas Färber
6769c00a2SAndreas Färber */
7769c00a2SAndreas Färber
8769c00a2SAndreas Färber#include "rtd139x.dtsi"
9769c00a2SAndreas Färber
10769c00a2SAndreas Färber/ {
11769c00a2SAndreas Färber	compatible = "realtek,rtd1395";
12769c00a2SAndreas Färber
13769c00a2SAndreas Färber	cpus {
14769c00a2SAndreas Färber		#address-cells = <2>;
15769c00a2SAndreas Färber		#size-cells = <0>;
16769c00a2SAndreas Färber
17769c00a2SAndreas Färber		cpu0: cpu@0 {
18769c00a2SAndreas Färber			device_type = "cpu";
19769c00a2SAndreas Färber			compatible = "arm,cortex-a53";
20769c00a2SAndreas Färber			reg = <0x0 0x0>;
21769c00a2SAndreas Färber			next-level-cache = <&l2>;
22769c00a2SAndreas Färber		};
23769c00a2SAndreas Färber
24769c00a2SAndreas Färber		cpu1: cpu@1 {
25769c00a2SAndreas Färber			device_type = "cpu";
26769c00a2SAndreas Färber			compatible = "arm,cortex-a53";
27769c00a2SAndreas Färber			reg = <0x0 0x1>;
28769c00a2SAndreas Färber			next-level-cache = <&l2>;
29769c00a2SAndreas Färber		};
30769c00a2SAndreas Färber
31769c00a2SAndreas Färber		cpu2: cpu@2 {
32769c00a2SAndreas Färber			device_type = "cpu";
33769c00a2SAndreas Färber			compatible = "arm,cortex-a53";
34769c00a2SAndreas Färber			reg = <0x0 0x2>;
35769c00a2SAndreas Färber			next-level-cache = <&l2>;
36769c00a2SAndreas Färber		};
37769c00a2SAndreas Färber
38769c00a2SAndreas Färber		cpu3: cpu@3 {
39769c00a2SAndreas Färber			device_type = "cpu";
40769c00a2SAndreas Färber			compatible = "arm,cortex-a53";
41769c00a2SAndreas Färber			reg = <0x0 0x3>;
42769c00a2SAndreas Färber			next-level-cache = <&l2>;
43769c00a2SAndreas Färber		};
44769c00a2SAndreas Färber
45769c00a2SAndreas Färber		l2: l2-cache {
46769c00a2SAndreas Färber			compatible = "cache";
47*7a242135SKrzysztof Kozlowski			cache-level = <2>;
48*7a242135SKrzysztof Kozlowski			cache-unified;
49769c00a2SAndreas Färber		};
50769c00a2SAndreas Färber	};
51769c00a2SAndreas Färber
52769c00a2SAndreas Färber	timer {
53769c00a2SAndreas Färber		compatible = "arm,armv8-timer";
54769c00a2SAndreas Färber		interrupts = <GIC_PPI 13
55769c00a2SAndreas Färber			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
56769c00a2SAndreas Färber			     <GIC_PPI 14
57769c00a2SAndreas Färber			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
58769c00a2SAndreas Färber			     <GIC_PPI 11
59769c00a2SAndreas Färber			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
60769c00a2SAndreas Färber			     <GIC_PPI 10
61769c00a2SAndreas Färber			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
62769c00a2SAndreas Färber	};
63769c00a2SAndreas Färber};
64769c00a2SAndreas Färber
65769c00a2SAndreas Färber&arm_pmu {
66769c00a2SAndreas Färber	interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
67769c00a2SAndreas Färber};
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