xref: /linux/scripts/dtc/include-prefixes/arm64/qcom/sm8650-ayaneo-pocket-s2.dts (revision 0fc8f6200d2313278fbf4539bbab74677c685531)
1*df260487SKancyJoe// SPDX-License-Identifier: BSD-3-Clause
2*df260487SKancyJoe/*
3*df260487SKancyJoe * Copyright (c) 2023, Linaro Limited
4*df260487SKancyJoe * Copyright (c) 2025, Kancy Joe <kancy2333@outlook.com>
5*df260487SKancyJoe */
6*df260487SKancyJoe
7*df260487SKancyJoe/dts-v1/;
8*df260487SKancyJoe
9*df260487SKancyJoe#include <dt-bindings/leds/common.h>
10*df260487SKancyJoe#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11*df260487SKancyJoe#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12*df260487SKancyJoe#include "sm8650.dtsi"
13*df260487SKancyJoe#include "pm8550.dtsi"
14*df260487SKancyJoe#include "pm8550b.dtsi"
15*df260487SKancyJoe#define PMK8550VE_SID 8
16*df260487SKancyJoe#include "pm8550ve.dtsi"
17*df260487SKancyJoe#include "pm8550vs.dtsi"
18*df260487SKancyJoe#include "pmk8550.dtsi"
19*df260487SKancyJoe
20*df260487SKancyJoe/delete-node/ &rmtfs_mem;
21*df260487SKancyJoe/delete-node/ &hwfence_shbuf;
22*df260487SKancyJoe
23*df260487SKancyJoe/ {
24*df260487SKancyJoe	model = "AYANEO Pocket S2 (Pro)";
25*df260487SKancyJoe	compatible = "ayaneo,pocket-s2", "qcom,sm8650";
26*df260487SKancyJoe	chassis-type = "handset";
27*df260487SKancyJoe
28*df260487SKancyJoe	aliases {
29*df260487SKancyJoe		serial0 = &uart15;
30*df260487SKancyJoe		serial1 = &uart14;
31*df260487SKancyJoe	};
32*df260487SKancyJoe
33*df260487SKancyJoe	wcd939x: audio-codec {
34*df260487SKancyJoe		compatible = "qcom,wcd9395-codec", "qcom,wcd9390-codec";
35*df260487SKancyJoe
36*df260487SKancyJoe		pinctrl-0 = <&wcd_default>;
37*df260487SKancyJoe		pinctrl-names = "default";
38*df260487SKancyJoe
39*df260487SKancyJoe		qcom,micbias1-microvolt = <1800000>;
40*df260487SKancyJoe		qcom,micbias2-microvolt = <1800000>;
41*df260487SKancyJoe		qcom,micbias3-microvolt = <1800000>;
42*df260487SKancyJoe		qcom,micbias4-microvolt = <1800000>;
43*df260487SKancyJoe		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
44*df260487SKancyJoe		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
45*df260487SKancyJoe		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
46*df260487SKancyJoe		qcom,rx-device = <&wcd_rx>;
47*df260487SKancyJoe		qcom,tx-device = <&wcd_tx>;
48*df260487SKancyJoe
49*df260487SKancyJoe		reset-gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
50*df260487SKancyJoe
51*df260487SKancyJoe		vdd-buck-supply = <&vreg_l15b_1p8>;
52*df260487SKancyJoe		vdd-rxtx-supply = <&vreg_l15b_1p8>;
53*df260487SKancyJoe		vdd-io-supply = <&vreg_l15b_1p8>;
54*df260487SKancyJoe		vdd-mic-bias-supply = <&vreg_bob1>;
55*df260487SKancyJoe
56*df260487SKancyJoe		#sound-dai-cells = <1>;
57*df260487SKancyJoe	};
58*df260487SKancyJoe
59*df260487SKancyJoe	chosen {
60*df260487SKancyJoe		stdout-path = "serial0:115200n8";
61*df260487SKancyJoe	};
62*df260487SKancyJoe
63*df260487SKancyJoe	fan: fan {
64*df260487SKancyJoe		compatible = "pwm-fan";
65*df260487SKancyJoe
66*df260487SKancyJoe		interrupts-extended = <&tlmm 14 IRQ_TYPE_EDGE_FALLING>;
67*df260487SKancyJoe
68*df260487SKancyJoe		pwms = <&pm8550_pwm 3 50000>;
69*df260487SKancyJoe
70*df260487SKancyJoe		fan-supply = <&fan_pwr>;
71*df260487SKancyJoe
72*df260487SKancyJoe		#cooling-cells = <2>;
73*df260487SKancyJoe		cooling-levels = <0 16 32 45 60 80 105 130 155 180 205 230 255>;
74*df260487SKancyJoe
75*df260487SKancyJoe		pinctrl-0 = <&fan_int>, <&pwm_fan_ctrl_active>;
76*df260487SKancyJoe		pinctrl-1 = <&pwm_fan_ctrl_sleep>;
77*df260487SKancyJoe		pinctrl-names = "default", "sleep";
78*df260487SKancyJoe	};
79*df260487SKancyJoe
80*df260487SKancyJoe	fan_pwr: fan-pwr-regulator {
81*df260487SKancyJoe		compatible = "regulator-fixed";
82*df260487SKancyJoe
83*df260487SKancyJoe		regulator-name = "fan_pwr";
84*df260487SKancyJoe		regulator-min-microvolt = <5000000>;
85*df260487SKancyJoe		regulator-max-microvolt = <5000000>;
86*df260487SKancyJoe
87*df260487SKancyJoe		gpios = <&tlmm 125 GPIO_ACTIVE_HIGH>;
88*df260487SKancyJoe		enable-active-high;
89*df260487SKancyJoe
90*df260487SKancyJoe		vin-supply = <&fan_vdd>;
91*df260487SKancyJoe
92*df260487SKancyJoe		pinctrl-0 = <&fan_pwr_pins>;
93*df260487SKancyJoe		pinctrl-names = "default";
94*df260487SKancyJoe	};
95*df260487SKancyJoe
96*df260487SKancyJoe	fan_vdd: fan-vdd-regulator {
97*df260487SKancyJoe		compatible = "regulator-fixed";
98*df260487SKancyJoe
99*df260487SKancyJoe		regulator-name = "fan_vdd";
100*df260487SKancyJoe		regulator-min-microvolt = <5000000>;
101*df260487SKancyJoe		regulator-max-microvolt = <5000000>;
102*df260487SKancyJoe
103*df260487SKancyJoe		gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;
104*df260487SKancyJoe		enable-active-high;
105*df260487SKancyJoe
106*df260487SKancyJoe		vin-supply = <&vph_pwr>;
107*df260487SKancyJoe
108*df260487SKancyJoe		pinctrl-0 = <&fan_vdd_pins>;
109*df260487SKancyJoe		pinctrl-names = "default";
110*df260487SKancyJoe	};
111*df260487SKancyJoe
112*df260487SKancyJoe	gpio-keys {
113*df260487SKancyJoe		compatible = "gpio-keys";
114*df260487SKancyJoe
115*df260487SKancyJoe		pinctrl-0 = <&volume_up_n>;
116*df260487SKancyJoe		pinctrl-names = "default";
117*df260487SKancyJoe
118*df260487SKancyJoe		key-volume-up {
119*df260487SKancyJoe			label = "Volume Up";
120*df260487SKancyJoe			linux,code = <KEY_VOLUMEUP>;
121*df260487SKancyJoe			gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
122*df260487SKancyJoe			debounce-interval = <15>;
123*df260487SKancyJoe			linux,can-disable;
124*df260487SKancyJoe			wakeup-source;
125*df260487SKancyJoe		};
126*df260487SKancyJoe	};
127*df260487SKancyJoe
128*df260487SKancyJoe	pmic-glink {
129*df260487SKancyJoe		compatible = "qcom,sm8650-pmic-glink",
130*df260487SKancyJoe			     "qcom,sm8550-pmic-glink",
131*df260487SKancyJoe			     "qcom,pmic-glink";
132*df260487SKancyJoe		#address-cells = <1>;
133*df260487SKancyJoe		#size-cells = <0>;
134*df260487SKancyJoe
135*df260487SKancyJoe		orientation-gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>;
136*df260487SKancyJoe
137*df260487SKancyJoe		connector@0 {
138*df260487SKancyJoe			compatible = "usb-c-connector";
139*df260487SKancyJoe			reg = <0>;
140*df260487SKancyJoe
141*df260487SKancyJoe			power-role = "dual";
142*df260487SKancyJoe			data-role = "dual";
143*df260487SKancyJoe
144*df260487SKancyJoe			ports {
145*df260487SKancyJoe				#address-cells = <1>;
146*df260487SKancyJoe				#size-cells = <0>;
147*df260487SKancyJoe
148*df260487SKancyJoe				port@0 {
149*df260487SKancyJoe					reg = <0>;
150*df260487SKancyJoe
151*df260487SKancyJoe					pmic_glink_hs_in: endpoint {
152*df260487SKancyJoe						remote-endpoint = <&usb_1_dwc3_hs>;
153*df260487SKancyJoe					};
154*df260487SKancyJoe				};
155*df260487SKancyJoe
156*df260487SKancyJoe				port@1 {
157*df260487SKancyJoe					reg = <1>;
158*df260487SKancyJoe
159*df260487SKancyJoe					pmic_glink_ss_in: endpoint {
160*df260487SKancyJoe						remote-endpoint = <&redriver_ss_out>;
161*df260487SKancyJoe					};
162*df260487SKancyJoe				};
163*df260487SKancyJoe
164*df260487SKancyJoe				port@2 {
165*df260487SKancyJoe					reg = <2>;
166*df260487SKancyJoe
167*df260487SKancyJoe					pmic_glink_sbu: endpoint {
168*df260487SKancyJoe						remote-endpoint = <&wcd_usbss_sbu_mux>;
169*df260487SKancyJoe					};
170*df260487SKancyJoe				};
171*df260487SKancyJoe			};
172*df260487SKancyJoe		};
173*df260487SKancyJoe	};
174*df260487SKancyJoe
175*df260487SKancyJoe	upd720201_avdd33_reg: upd720201-avdd33-regulator {
176*df260487SKancyJoe		compatible = "regulator-fixed";
177*df260487SKancyJoe
178*df260487SKancyJoe		regulator-name = "upd720201_avdd33";
179*df260487SKancyJoe		regulator-min-microvolt = <3300000>;
180*df260487SKancyJoe		regulator-max-microvolt = <3300000>;
181*df260487SKancyJoe
182*df260487SKancyJoe		gpios = <&tlmm 123 GPIO_ACTIVE_HIGH>;
183*df260487SKancyJoe		enable-active-high;
184*df260487SKancyJoe
185*df260487SKancyJoe		vin-supply = <&vph_pwr>;
186*df260487SKancyJoe
187*df260487SKancyJoe		pinctrl-0 = <&upd720201_avdd33>;
188*df260487SKancyJoe		pinctrl-names = "default";
189*df260487SKancyJoe	};
190*df260487SKancyJoe
191*df260487SKancyJoe	upd720201_vdd10_reg: upd720201-vdd10-regulator {
192*df260487SKancyJoe		compatible = "regulator-fixed";
193*df260487SKancyJoe
194*df260487SKancyJoe		regulator-name = "upd720201_vdd10";
195*df260487SKancyJoe		regulator-min-microvolt = <1050000>;
196*df260487SKancyJoe		regulator-max-microvolt = <1050000>;
197*df260487SKancyJoe
198*df260487SKancyJoe		gpios = <&tlmm 122 GPIO_ACTIVE_HIGH>;
199*df260487SKancyJoe		enable-active-high;
200*df260487SKancyJoe
201*df260487SKancyJoe		vin-supply = <&vph_pwr>;
202*df260487SKancyJoe
203*df260487SKancyJoe		pinctrl-0 = <&upd720201_vdd10>;
204*df260487SKancyJoe		pinctrl-names = "default";
205*df260487SKancyJoe	};
206*df260487SKancyJoe
207*df260487SKancyJoe	upd720201_vdd33_reg: upd720201-vdd33-regulator {
208*df260487SKancyJoe		compatible = "regulator-fixed";
209*df260487SKancyJoe
210*df260487SKancyJoe		regulator-name = "upd720201_vdd33";
211*df260487SKancyJoe		regulator-min-microvolt = <3300000>;
212*df260487SKancyJoe		regulator-max-microvolt = <3300000>;
213*df260487SKancyJoe
214*df260487SKancyJoe		gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>;
215*df260487SKancyJoe		enable-active-high;
216*df260487SKancyJoe
217*df260487SKancyJoe		vin-supply = <&vph_pwr>;
218*df260487SKancyJoe
219*df260487SKancyJoe		pinctrl-0 = <&upd720201_vdd33>;
220*df260487SKancyJoe		pinctrl-names = "default";
221*df260487SKancyJoe	};
222*df260487SKancyJoe
223*df260487SKancyJoe	sound {
224*df260487SKancyJoe		compatible = "qcom,sm8650-sndcard", "qcom,sm8450-sndcard";
225*df260487SKancyJoe		model = "SM8650-APS2";
226*df260487SKancyJoe		audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
227*df260487SKancyJoe				"SpkrRight IN", "WSA_SPK2 OUT",
228*df260487SKancyJoe				"IN1_HPHL", "HPHL_OUT",
229*df260487SKancyJoe				"IN2_HPHR", "HPHR_OUT",
230*df260487SKancyJoe				"AMIC1", "MIC BIAS1",
231*df260487SKancyJoe				"AMIC2", "MIC BIAS2",
232*df260487SKancyJoe				"AMIC3", "MIC BIAS3",
233*df260487SKancyJoe				"AMIC4", "MIC BIAS3",
234*df260487SKancyJoe				"AMIC5", "MIC BIAS4",
235*df260487SKancyJoe				"TX SWR_INPUT0", "ADC1_OUTPUT",
236*df260487SKancyJoe				"TX SWR_INPUT1", "ADC2_OUTPUT",
237*df260487SKancyJoe				"TX SWR_INPUT7", "DMIC1_OUTPUT",
238*df260487SKancyJoe				"TX SWR_INPUT8", "DMIC2_OUTPUT";
239*df260487SKancyJoe
240*df260487SKancyJoe		wcd-playback-dai-link {
241*df260487SKancyJoe			link-name = "WCD Playback";
242*df260487SKancyJoe
243*df260487SKancyJoe			codec {
244*df260487SKancyJoe				sound-dai = <&wcd939x 0>,
245*df260487SKancyJoe					    <&swr1 0>,
246*df260487SKancyJoe					    <&lpass_rxmacro 0>;
247*df260487SKancyJoe			};
248*df260487SKancyJoe
249*df260487SKancyJoe			cpu {
250*df260487SKancyJoe				sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
251*df260487SKancyJoe			};
252*df260487SKancyJoe
253*df260487SKancyJoe			platform {
254*df260487SKancyJoe				sound-dai = <&q6apm>;
255*df260487SKancyJoe			};
256*df260487SKancyJoe		};
257*df260487SKancyJoe
258*df260487SKancyJoe		wcd-capture-dai-link {
259*df260487SKancyJoe			link-name = "WCD Capture";
260*df260487SKancyJoe			codec {
261*df260487SKancyJoe				sound-dai = <&wcd939x 1>,
262*df260487SKancyJoe					    <&swr2 0>,
263*df260487SKancyJoe					    <&lpass_txmacro 0>;
264*df260487SKancyJoe			};
265*df260487SKancyJoe
266*df260487SKancyJoe			cpu {
267*df260487SKancyJoe				sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
268*df260487SKancyJoe			};
269*df260487SKancyJoe
270*df260487SKancyJoe
271*df260487SKancyJoe			platform {
272*df260487SKancyJoe				sound-dai = <&q6apm>;
273*df260487SKancyJoe			};
274*df260487SKancyJoe		};
275*df260487SKancyJoe
276*df260487SKancyJoe		wsa-dai-link {
277*df260487SKancyJoe			link-name = "WSA Playback";
278*df260487SKancyJoe
279*df260487SKancyJoe			codec {
280*df260487SKancyJoe				sound-dai = <&right_spkr>,
281*df260487SKancyJoe					    <&left_spkr>,
282*df260487SKancyJoe					    <&swr3 0>,
283*df260487SKancyJoe					    <&lpass_wsa2macro 0>;
284*df260487SKancyJoe			};
285*df260487SKancyJoe
286*df260487SKancyJoe			cpu {
287*df260487SKancyJoe				sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
288*df260487SKancyJoe			};
289*df260487SKancyJoe
290*df260487SKancyJoe			platform {
291*df260487SKancyJoe				sound-dai = <&q6apm>;
292*df260487SKancyJoe			};
293*df260487SKancyJoe		};
294*df260487SKancyJoe
295*df260487SKancyJoe		va-dai-link {
296*df260487SKancyJoe			link-name = "VA Capture";
297*df260487SKancyJoe
298*df260487SKancyJoe			codec {
299*df260487SKancyJoe				sound-dai = <&lpass_vamacro 0>;
300*df260487SKancyJoe			};
301*df260487SKancyJoe
302*df260487SKancyJoe			cpu {
303*df260487SKancyJoe				sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
304*df260487SKancyJoe			};
305*df260487SKancyJoe
306*df260487SKancyJoe			platform {
307*df260487SKancyJoe				sound-dai = <&q6apm>;
308*df260487SKancyJoe			};
309*df260487SKancyJoe		};
310*df260487SKancyJoe
311*df260487SKancyJoe		dp-dai-link {
312*df260487SKancyJoe			link-name = "DisplayPort Playback";
313*df260487SKancyJoe
314*df260487SKancyJoe			codec {
315*df260487SKancyJoe				sound-dai = <&mdss_dp0>;
316*df260487SKancyJoe			};
317*df260487SKancyJoe
318*df260487SKancyJoe			cpu {
319*df260487SKancyJoe				sound-dai = <&q6apmbedai DISPLAY_PORT_RX_0>;
320*df260487SKancyJoe			};
321*df260487SKancyJoe
322*df260487SKancyJoe			platform {
323*df260487SKancyJoe				sound-dai = <&q6apm>;
324*df260487SKancyJoe			};
325*df260487SKancyJoe		};
326*df260487SKancyJoe	};
327*df260487SKancyJoe
328*df260487SKancyJoe	vph_pwr: vph-pwr-regulator {
329*df260487SKancyJoe		compatible = "regulator-fixed";
330*df260487SKancyJoe
331*df260487SKancyJoe		regulator-name = "vph_pwr";
332*df260487SKancyJoe		regulator-min-microvolt = <3700000>;
333*df260487SKancyJoe		regulator-max-microvolt = <3700000>;
334*df260487SKancyJoe
335*df260487SKancyJoe		regulator-always-on;
336*df260487SKancyJoe		regulator-boot-on;
337*df260487SKancyJoe	};
338*df260487SKancyJoe
339*df260487SKancyJoe	wcn7850-pmu {
340*df260487SKancyJoe		compatible = "qcom,wcn7850-pmu";
341*df260487SKancyJoe
342*df260487SKancyJoe		pinctrl-names = "default";
343*df260487SKancyJoe		pinctrl-0 = <&wlan_en>, <&bt_default>;
344*df260487SKancyJoe
345*df260487SKancyJoe		wlan-enable-gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>;
346*df260487SKancyJoe		bt-enable-gpios = <&tlmm 17 GPIO_ACTIVE_HIGH>;
347*df260487SKancyJoe
348*df260487SKancyJoe		vdd-supply = <&vreg_s4i_0p85>;
349*df260487SKancyJoe		vddio-supply = <&vreg_l15b_1p8>;
350*df260487SKancyJoe		vddio1p2-supply = <&vreg_l3c_1p2>;
351*df260487SKancyJoe		vddaon-supply = <&vreg_s2c_0p8>;
352*df260487SKancyJoe		vdddig-supply = <&vreg_s3c_0p9>;
353*df260487SKancyJoe		vddrfa1p2-supply = <&vreg_s1c_1p2>;
354*df260487SKancyJoe		vddrfa1p8-supply = <&vreg_s6c_1p8>;
355*df260487SKancyJoe
356*df260487SKancyJoe		clocks = <&rpmhcc RPMH_RF_CLK1>;
357*df260487SKancyJoe
358*df260487SKancyJoe		regulators {
359*df260487SKancyJoe			vreg_pmu_rfa_cmn: ldo0 {
360*df260487SKancyJoe				regulator-name = "vreg_pmu_rfa_cmn";
361*df260487SKancyJoe			};
362*df260487SKancyJoe
363*df260487SKancyJoe			vreg_pmu_aon_0p59: ldo1 {
364*df260487SKancyJoe				regulator-name = "vreg_pmu_aon_0p59";
365*df260487SKancyJoe			};
366*df260487SKancyJoe
367*df260487SKancyJoe			vreg_pmu_wlcx_0p8: ldo2 {
368*df260487SKancyJoe				regulator-name = "vreg_pmu_wlcx_0p8";
369*df260487SKancyJoe			};
370*df260487SKancyJoe
371*df260487SKancyJoe			vreg_pmu_wlmx_0p85: ldo3 {
372*df260487SKancyJoe				regulator-name = "vreg_pmu_wlmx_0p85";
373*df260487SKancyJoe			};
374*df260487SKancyJoe
375*df260487SKancyJoe			vreg_pmu_btcmx_0p85: ldo4 {
376*df260487SKancyJoe				regulator-name = "vreg_pmu_btcmx_0p85";
377*df260487SKancyJoe			};
378*df260487SKancyJoe
379*df260487SKancyJoe			vreg_pmu_rfa_0p8: ldo5 {
380*df260487SKancyJoe				regulator-name = "vreg_pmu_rfa_0p8";
381*df260487SKancyJoe			};
382*df260487SKancyJoe
383*df260487SKancyJoe			vreg_pmu_rfa_1p2: ldo6 {
384*df260487SKancyJoe				regulator-name = "vreg_pmu_rfa_1p2";
385*df260487SKancyJoe			};
386*df260487SKancyJoe
387*df260487SKancyJoe			vreg_pmu_rfa_1p8: ldo7 {
388*df260487SKancyJoe				regulator-name = "vreg_pmu_rfa_1p8";
389*df260487SKancyJoe			};
390*df260487SKancyJoe
391*df260487SKancyJoe			vreg_pmu_pcie_0p9: ldo8 {
392*df260487SKancyJoe				regulator-name = "vreg_pmu_pcie_0p9";
393*df260487SKancyJoe			};
394*df260487SKancyJoe
395*df260487SKancyJoe			vreg_pmu_pcie_1p8: ldo9 {
396*df260487SKancyJoe				regulator-name = "vreg_pmu_pcie_1p8";
397*df260487SKancyJoe			};
398*df260487SKancyJoe		};
399*df260487SKancyJoe	};
400*df260487SKancyJoe};
401*df260487SKancyJoe
402*df260487SKancyJoe&apps_rsc {
403*df260487SKancyJoe	regulators-0 {
404*df260487SKancyJoe		compatible = "qcom,pm8550-rpmh-regulators";
405*df260487SKancyJoe
406*df260487SKancyJoe		vdd-bob1-supply = <&vph_pwr>;
407*df260487SKancyJoe		vdd-bob2-supply = <&vph_pwr>;
408*df260487SKancyJoe		vdd-l2-l13-l14-supply = <&vreg_bob1>;
409*df260487SKancyJoe		vdd-l3-supply = <&vreg_s1c_1p2>;
410*df260487SKancyJoe		vdd-l5-l16-supply = <&vreg_bob1>;
411*df260487SKancyJoe		vdd-l6-l7-supply = <&vreg_bob1>;
412*df260487SKancyJoe		vdd-l8-l9-supply = <&vreg_bob1>;
413*df260487SKancyJoe		vdd-l11-supply = <&vreg_s1c_1p2>;
414*df260487SKancyJoe		vdd-l12-supply = <&vreg_s6c_1p8>;
415*df260487SKancyJoe		vdd-l15-supply = <&vreg_s6c_1p8>;
416*df260487SKancyJoe		vdd-l17-supply = <&vreg_bob2>;
417*df260487SKancyJoe
418*df260487SKancyJoe		qcom,pmic-id = "b";
419*df260487SKancyJoe
420*df260487SKancyJoe		vreg_bob1: bob1 {
421*df260487SKancyJoe			regulator-name = "vreg_bob1";
422*df260487SKancyJoe			regulator-min-microvolt = <3296000>;
423*df260487SKancyJoe			regulator-max-microvolt = <3960000>;
424*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
425*df260487SKancyJoe		};
426*df260487SKancyJoe
427*df260487SKancyJoe		vreg_bob2: bob2 {
428*df260487SKancyJoe			regulator-name = "vreg_bob2";
429*df260487SKancyJoe			regulator-min-microvolt = <2720000>;
430*df260487SKancyJoe			regulator-max-microvolt = <3008000>;
431*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
432*df260487SKancyJoe		};
433*df260487SKancyJoe
434*df260487SKancyJoe		vreg_l2b_3p0: ldo2 {
435*df260487SKancyJoe			regulator-name = "vreg_l2b_3p0";
436*df260487SKancyJoe			regulator-min-microvolt = <3008000>;
437*df260487SKancyJoe			regulator-max-microvolt = <3008000>;
438*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
439*df260487SKancyJoe			regulator-allow-set-load;
440*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
441*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
442*df260487SKancyJoe		};
443*df260487SKancyJoe
444*df260487SKancyJoe		vreg_l5b_3p1: ldo5 {
445*df260487SKancyJoe			regulator-name = "vreg_l5b_3p1";
446*df260487SKancyJoe			regulator-min-microvolt = <3104000>;
447*df260487SKancyJoe			regulator-max-microvolt = <3104000>;
448*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
449*df260487SKancyJoe			regulator-allow-set-load;
450*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
451*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
452*df260487SKancyJoe		};
453*df260487SKancyJoe
454*df260487SKancyJoe		vreg_l6b_1p8: ldo6 {
455*df260487SKancyJoe			regulator-name = "vreg_l6b_1p8";
456*df260487SKancyJoe			regulator-min-microvolt = <1800000>;
457*df260487SKancyJoe			regulator-max-microvolt = <3008000>;
458*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
459*df260487SKancyJoe			regulator-allow-set-load;
460*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
461*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
462*df260487SKancyJoe		};
463*df260487SKancyJoe
464*df260487SKancyJoe		vreg_l7b_1p8: ldo7 {
465*df260487SKancyJoe			regulator-name = "vreg_l7b_1p8";
466*df260487SKancyJoe			regulator-min-microvolt = <1800000>;
467*df260487SKancyJoe			regulator-max-microvolt = <3008000>;
468*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
469*df260487SKancyJoe		};
470*df260487SKancyJoe
471*df260487SKancyJoe		vreg_l8b_1p8: ldo8 {
472*df260487SKancyJoe			regulator-name = "vreg_l8b_1p8";
473*df260487SKancyJoe			regulator-min-microvolt = <1800000>;
474*df260487SKancyJoe			regulator-max-microvolt = <3008000>;
475*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
476*df260487SKancyJoe			regulator-allow-set-load;
477*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
478*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
479*df260487SKancyJoe		};
480*df260487SKancyJoe
481*df260487SKancyJoe		vreg_l9b_2p9: ldo9 {
482*df260487SKancyJoe			regulator-name = "vreg_l9b_2p9";
483*df260487SKancyJoe			regulator-min-microvolt = <2960000>;
484*df260487SKancyJoe			regulator-max-microvolt = <3008000>;
485*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
486*df260487SKancyJoe			regulator-allow-set-load;
487*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
488*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
489*df260487SKancyJoe		};
490*df260487SKancyJoe
491*df260487SKancyJoe		vreg_l11b_1p2: ldo11 {
492*df260487SKancyJoe			regulator-name = "vreg_l11b_1p2";
493*df260487SKancyJoe			regulator-min-microvolt = <1200000>;
494*df260487SKancyJoe			regulator-max-microvolt = <1504000>;
495*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
496*df260487SKancyJoe			regulator-allow-set-load;
497*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
498*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
499*df260487SKancyJoe		};
500*df260487SKancyJoe
501*df260487SKancyJoe		vreg_l12b_1p8: ldo12 {
502*df260487SKancyJoe			regulator-name = "vreg_l12b_1p8";
503*df260487SKancyJoe			regulator-min-microvolt = <1800000>;
504*df260487SKancyJoe			regulator-max-microvolt = <1800000>;
505*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
506*df260487SKancyJoe			regulator-allow-set-load;
507*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
508*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
509*df260487SKancyJoe		};
510*df260487SKancyJoe
511*df260487SKancyJoe		vreg_l13b_3p0: ldo13 {
512*df260487SKancyJoe			regulator-name = "vreg_l13b_3p0";
513*df260487SKancyJoe			regulator-min-microvolt = <3000000>;
514*df260487SKancyJoe			regulator-max-microvolt = <3000000>;
515*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
516*df260487SKancyJoe			regulator-allow-set-load;
517*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
518*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
519*df260487SKancyJoe		};
520*df260487SKancyJoe
521*df260487SKancyJoe		vreg_l14b_3p2: ldo14 {
522*df260487SKancyJoe			regulator-name = "vreg_l14b_3p2";
523*df260487SKancyJoe			regulator-min-microvolt = <3200000>;
524*df260487SKancyJoe			regulator-max-microvolt = <3200000>;
525*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
526*df260487SKancyJoe			regulator-allow-set-load;
527*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
528*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
529*df260487SKancyJoe		};
530*df260487SKancyJoe
531*df260487SKancyJoe		vreg_l15b_1p8: ldo15 {
532*df260487SKancyJoe			regulator-name = "vreg_l15b_1p8";
533*df260487SKancyJoe			regulator-min-microvolt = <1800000>;
534*df260487SKancyJoe			regulator-max-microvolt = <1800000>;
535*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
536*df260487SKancyJoe			regulator-allow-set-load;
537*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
538*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
539*df260487SKancyJoe		};
540*df260487SKancyJoe
541*df260487SKancyJoe		vreg_l16b_2p8: ldo16 {
542*df260487SKancyJoe			regulator-name = "vreg_l16b_2p8";
543*df260487SKancyJoe			regulator-min-microvolt = <2800000>;
544*df260487SKancyJoe			regulator-max-microvolt = <2800000>;
545*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
546*df260487SKancyJoe			regulator-allow-set-load;
547*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
548*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
549*df260487SKancyJoe			regulator-always-on;
550*df260487SKancyJoe			regulator-boot-on;
551*df260487SKancyJoe		};
552*df260487SKancyJoe
553*df260487SKancyJoe		vreg_l17b_2p5: ldo17 {
554*df260487SKancyJoe			regulator-name = "vreg_l17b_2p5";
555*df260487SKancyJoe			regulator-min-microvolt = <2504000>;
556*df260487SKancyJoe			regulator-max-microvolt = <2504000>;
557*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
558*df260487SKancyJoe			regulator-allow-set-load;
559*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
560*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
561*df260487SKancyJoe		};
562*df260487SKancyJoe	};
563*df260487SKancyJoe
564*df260487SKancyJoe	regulators-1 {
565*df260487SKancyJoe		compatible = "qcom,pm8550vs-rpmh-regulators";
566*df260487SKancyJoe
567*df260487SKancyJoe		vdd-l1-supply = <&vreg_s1c_1p2>;
568*df260487SKancyJoe		vdd-l2-supply = <&vreg_s1c_1p2>;
569*df260487SKancyJoe		vdd-l3-supply = <&vreg_s1c_1p2>;
570*df260487SKancyJoe		vdd-s1-supply = <&vph_pwr>;
571*df260487SKancyJoe		vdd-s2-supply = <&vph_pwr>;
572*df260487SKancyJoe		vdd-s3-supply = <&vph_pwr>;
573*df260487SKancyJoe		vdd-s4-supply = <&vph_pwr>;
574*df260487SKancyJoe		vdd-s5-supply = <&vph_pwr>;
575*df260487SKancyJoe		vdd-s6-supply = <&vph_pwr>;
576*df260487SKancyJoe
577*df260487SKancyJoe		qcom,pmic-id = "c";
578*df260487SKancyJoe
579*df260487SKancyJoe		vreg_s1c_1p2: smps1 {
580*df260487SKancyJoe			regulator-name = "vreg_s1c_1p2";
581*df260487SKancyJoe			regulator-min-microvolt = <1256000>;
582*df260487SKancyJoe			regulator-max-microvolt = <1348000>;
583*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
584*df260487SKancyJoe		};
585*df260487SKancyJoe
586*df260487SKancyJoe		vreg_s2c_0p8: smps2 {
587*df260487SKancyJoe			regulator-name = "vreg_s2c_0p8";
588*df260487SKancyJoe			regulator-min-microvolt = <852000>;
589*df260487SKancyJoe			regulator-max-microvolt = <1036000>;
590*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
591*df260487SKancyJoe		};
592*df260487SKancyJoe
593*df260487SKancyJoe		vreg_s3c_0p9: smps3 {
594*df260487SKancyJoe			regulator-name = "vreg_s3c_0p9";
595*df260487SKancyJoe			regulator-min-microvolt = <976000>;
596*df260487SKancyJoe			regulator-max-microvolt = <1064000>;
597*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
598*df260487SKancyJoe		};
599*df260487SKancyJoe
600*df260487SKancyJoe		vreg_s4c_1p2: smps4 {
601*df260487SKancyJoe			regulator-name = "vreg_s4c_1p2";
602*df260487SKancyJoe			regulator-min-microvolt = <1224000>;
603*df260487SKancyJoe			regulator-max-microvolt = <1280000>;
604*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
605*df260487SKancyJoe		};
606*df260487SKancyJoe
607*df260487SKancyJoe		vreg_s5c_0p7: smps5 {
608*df260487SKancyJoe			regulator-name = "vreg_s5c_0p7";
609*df260487SKancyJoe			regulator-min-microvolt = <752000>;
610*df260487SKancyJoe			regulator-max-microvolt = <900000>;
611*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
612*df260487SKancyJoe		};
613*df260487SKancyJoe
614*df260487SKancyJoe		vreg_s6c_1p8: smps6 {
615*df260487SKancyJoe			regulator-name = "vreg_s6c_1p8";
616*df260487SKancyJoe			regulator-min-microvolt = <1856000>;
617*df260487SKancyJoe			regulator-max-microvolt = <2000000>;
618*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
619*df260487SKancyJoe		};
620*df260487SKancyJoe
621*df260487SKancyJoe		vreg_l1c_1p2: ldo1 {
622*df260487SKancyJoe			regulator-name = "vreg_l1c_1p2";
623*df260487SKancyJoe			regulator-min-microvolt = <1200000>;
624*df260487SKancyJoe			regulator-max-microvolt = <1200000>;
625*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
626*df260487SKancyJoe			regulator-allow-set-load;
627*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
628*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
629*df260487SKancyJoe		};
630*df260487SKancyJoe
631*df260487SKancyJoe		vreg_l3c_1p2: ldo3 {
632*df260487SKancyJoe			regulator-name = "vreg_l3c_1p2";
633*df260487SKancyJoe			regulator-min-microvolt = <1200000>;
634*df260487SKancyJoe			regulator-max-microvolt = <1200000>;
635*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
636*df260487SKancyJoe			regulator-allow-set-load;
637*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
638*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
639*df260487SKancyJoe			regulator-always-on;
640*df260487SKancyJoe			regulator-boot-on;
641*df260487SKancyJoe		};
642*df260487SKancyJoe	};
643*df260487SKancyJoe
644*df260487SKancyJoe	regulators-2 {
645*df260487SKancyJoe		compatible = "qcom,pm8550vs-rpmh-regulators";
646*df260487SKancyJoe
647*df260487SKancyJoe		vdd-l1-supply = <&vreg_s3c_0p9>;
648*df260487SKancyJoe
649*df260487SKancyJoe		qcom,pmic-id = "d";
650*df260487SKancyJoe
651*df260487SKancyJoe		vreg_l1d_0p88: ldo1 {
652*df260487SKancyJoe			regulator-name = "vreg_l1d_0p88";
653*df260487SKancyJoe			regulator-min-microvolt = <912000>;
654*df260487SKancyJoe			regulator-max-microvolt = <920000>;
655*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
656*df260487SKancyJoe			regulator-allow-set-load;
657*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
658*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
659*df260487SKancyJoe		};
660*df260487SKancyJoe	};
661*df260487SKancyJoe
662*df260487SKancyJoe	regulators-3 {
663*df260487SKancyJoe		compatible = "qcom,pm8550vs-rpmh-regulators";
664*df260487SKancyJoe
665*df260487SKancyJoe		vdd-l3-supply = <&vreg_s3c_0p9>;
666*df260487SKancyJoe
667*df260487SKancyJoe		qcom,pmic-id = "e";
668*df260487SKancyJoe
669*df260487SKancyJoe		vreg_l3e_0p9: ldo3 {
670*df260487SKancyJoe			regulator-name = "vreg_l3e_0p9";
671*df260487SKancyJoe			regulator-min-microvolt = <880000>;
672*df260487SKancyJoe			regulator-max-microvolt = <920000>;
673*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
674*df260487SKancyJoe			regulator-allow-set-load;
675*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
676*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
677*df260487SKancyJoe		};
678*df260487SKancyJoe	};
679*df260487SKancyJoe
680*df260487SKancyJoe	regulators-4 {
681*df260487SKancyJoe		compatible = "qcom,pm8550vs-rpmh-regulators";
682*df260487SKancyJoe
683*df260487SKancyJoe		vdd-l1-supply = <&vreg_s3c_0p9>;
684*df260487SKancyJoe		vdd-l3-supply = <&vreg_s3c_0p9>;
685*df260487SKancyJoe
686*df260487SKancyJoe		qcom,pmic-id = "g";
687*df260487SKancyJoe
688*df260487SKancyJoe		vreg_l1g_0p91: ldo1 {
689*df260487SKancyJoe			regulator-name = "vreg_l1g_0p91";
690*df260487SKancyJoe			regulator-min-microvolt = <912000>;
691*df260487SKancyJoe			regulator-max-microvolt = <920000>;
692*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
693*df260487SKancyJoe			regulator-allow-set-load;
694*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
695*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
696*df260487SKancyJoe		};
697*df260487SKancyJoe
698*df260487SKancyJoe		vreg_l3g_0p91: ldo3 {
699*df260487SKancyJoe			regulator-name = "vreg_l3g_0p91";
700*df260487SKancyJoe			regulator-min-microvolt = <880000>;
701*df260487SKancyJoe			regulator-max-microvolt = <912000>;
702*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
703*df260487SKancyJoe			regulator-allow-set-load;
704*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
705*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
706*df260487SKancyJoe		};
707*df260487SKancyJoe	};
708*df260487SKancyJoe
709*df260487SKancyJoe	regulators-5 {
710*df260487SKancyJoe		compatible = "qcom,pm8550ve-rpmh-regulators";
711*df260487SKancyJoe
712*df260487SKancyJoe		vdd-l1-supply = <&vreg_s3c_0p9>;
713*df260487SKancyJoe		vdd-l2-supply = <&vreg_s3c_0p9>;
714*df260487SKancyJoe		vdd-l3-supply = <&vreg_s1c_1p2>;
715*df260487SKancyJoe		vdd-s4-supply = <&vph_pwr>;
716*df260487SKancyJoe
717*df260487SKancyJoe		qcom,pmic-id = "i";
718*df260487SKancyJoe
719*df260487SKancyJoe		vreg_s4i_0p85: smps4 {
720*df260487SKancyJoe			regulator-name = "vreg_s4i_0p85";
721*df260487SKancyJoe			regulator-min-microvolt = <852000>;
722*df260487SKancyJoe			regulator-max-microvolt = <1004000>;
723*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
724*df260487SKancyJoe		};
725*df260487SKancyJoe
726*df260487SKancyJoe		vreg_l1i_0p88: ldo1 {
727*df260487SKancyJoe			regulator-name = "vreg_l1i_0p88";
728*df260487SKancyJoe			regulator-min-microvolt = <880000>;
729*df260487SKancyJoe			regulator-max-microvolt = <912000>;
730*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
731*df260487SKancyJoe			regulator-allow-set-load;
732*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
733*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
734*df260487SKancyJoe		};
735*df260487SKancyJoe
736*df260487SKancyJoe		vreg_l2i_0p88: ldo2 {
737*df260487SKancyJoe			regulator-name = "vreg_l2i_0p88";
738*df260487SKancyJoe			regulator-min-microvolt = <880000>;
739*df260487SKancyJoe			regulator-max-microvolt = <912000>;
740*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
741*df260487SKancyJoe			regulator-allow-set-load;
742*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
743*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
744*df260487SKancyJoe		};
745*df260487SKancyJoe
746*df260487SKancyJoe		vreg_l3i_1p2: ldo3 {
747*df260487SKancyJoe			regulator-name = "vreg_l3i_0p91";
748*df260487SKancyJoe			regulator-min-microvolt = <1200000>;
749*df260487SKancyJoe			regulator-max-microvolt = <1200000>;
750*df260487SKancyJoe			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
751*df260487SKancyJoe			regulator-allow-set-load;
752*df260487SKancyJoe			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
753*df260487SKancyJoe						   RPMH_REGULATOR_MODE_HPM>;
754*df260487SKancyJoe		};
755*df260487SKancyJoe	};
756*df260487SKancyJoe};
757*df260487SKancyJoe
758*df260487SKancyJoe&cpu2_top_thermal {
759*df260487SKancyJoe	trips {
760*df260487SKancyJoe		cpu2_active: cpu2-active {
761*df260487SKancyJoe			temperature = <38000>;
762*df260487SKancyJoe			hysteresis = <2000>;
763*df260487SKancyJoe			type = "active";
764*df260487SKancyJoe		};
765*df260487SKancyJoe	};
766*df260487SKancyJoe
767*df260487SKancyJoe	cooling-maps {
768*df260487SKancyJoe		map {
769*df260487SKancyJoe			trip = <&cpu2_active>;
770*df260487SKancyJoe			cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
771*df260487SKancyJoe		};
772*df260487SKancyJoe	};
773*df260487SKancyJoe};
774*df260487SKancyJoe
775*df260487SKancyJoe&cpu3_top_thermal {
776*df260487SKancyJoe	trips {
777*df260487SKancyJoe		cpu3_active: cpu3-active {
778*df260487SKancyJoe			temperature = <38000>;
779*df260487SKancyJoe			hysteresis = <2000>;
780*df260487SKancyJoe			type = "active";
781*df260487SKancyJoe		};
782*df260487SKancyJoe	};
783*df260487SKancyJoe
784*df260487SKancyJoe	cooling-maps {
785*df260487SKancyJoe		map {
786*df260487SKancyJoe			trip = <&cpu3_active>;
787*df260487SKancyJoe			cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
788*df260487SKancyJoe		};
789*df260487SKancyJoe	};
790*df260487SKancyJoe};
791*df260487SKancyJoe
792*df260487SKancyJoe&cpu4_top_thermal {
793*df260487SKancyJoe	trips {
794*df260487SKancyJoe		cpu4_active: cpu4-active {
795*df260487SKancyJoe			temperature = <38000>;
796*df260487SKancyJoe			hysteresis = <2000>;
797*df260487SKancyJoe			type = "active";
798*df260487SKancyJoe		};
799*df260487SKancyJoe	};
800*df260487SKancyJoe
801*df260487SKancyJoe	cooling-maps {
802*df260487SKancyJoe		map {
803*df260487SKancyJoe			trip = <&cpu4_active>;
804*df260487SKancyJoe			cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
805*df260487SKancyJoe		};
806*df260487SKancyJoe	};
807*df260487SKancyJoe};
808*df260487SKancyJoe
809*df260487SKancyJoe&cpu5_top_thermal {
810*df260487SKancyJoe	trips {
811*df260487SKancyJoe		cpu5_active: cpu5-active {
812*df260487SKancyJoe			temperature = <38000>;
813*df260487SKancyJoe			hysteresis = <2000>;
814*df260487SKancyJoe			type = "active";
815*df260487SKancyJoe		};
816*df260487SKancyJoe	};
817*df260487SKancyJoe
818*df260487SKancyJoe	cooling-maps {
819*df260487SKancyJoe		map {
820*df260487SKancyJoe			trip = <&cpu5_active>;
821*df260487SKancyJoe			cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
822*df260487SKancyJoe		};
823*df260487SKancyJoe	};
824*df260487SKancyJoe};
825*df260487SKancyJoe
826*df260487SKancyJoe&cpu6_top_thermal {
827*df260487SKancyJoe	trips {
828*df260487SKancyJoe		cpu6_active: cpu6-active {
829*df260487SKancyJoe			temperature = <38000>;
830*df260487SKancyJoe			hysteresis = <2000>;
831*df260487SKancyJoe			type = "active";
832*df260487SKancyJoe		};
833*df260487SKancyJoe	};
834*df260487SKancyJoe
835*df260487SKancyJoe	cooling-maps {
836*df260487SKancyJoe		map {
837*df260487SKancyJoe			trip = <&cpu6_active>;
838*df260487SKancyJoe			cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
839*df260487SKancyJoe		};
840*df260487SKancyJoe	};
841*df260487SKancyJoe};
842*df260487SKancyJoe
843*df260487SKancyJoe&cpu7_top_thermal {
844*df260487SKancyJoe	trips {
845*df260487SKancyJoe		cpu7_active: cpu7-active {
846*df260487SKancyJoe			temperature = <38000>;
847*df260487SKancyJoe			hysteresis = <2000>;
848*df260487SKancyJoe			type = "active";
849*df260487SKancyJoe		};
850*df260487SKancyJoe	};
851*df260487SKancyJoe
852*df260487SKancyJoe	cooling-maps {
853*df260487SKancyJoe		map {
854*df260487SKancyJoe			trip = <&cpu7_active>;
855*df260487SKancyJoe			cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
856*df260487SKancyJoe		};
857*df260487SKancyJoe	};
858*df260487SKancyJoe};
859*df260487SKancyJoe
860*df260487SKancyJoe&gpi_dma1 {
861*df260487SKancyJoe	status = "okay";
862*df260487SKancyJoe};
863*df260487SKancyJoe
864*df260487SKancyJoe&gpi_dma2 {
865*df260487SKancyJoe	status = "okay";
866*df260487SKancyJoe};
867*df260487SKancyJoe
868*df260487SKancyJoe&gpu0_cooling_maps {
869*df260487SKancyJoe	map1 {
870*df260487SKancyJoe		trip = <&gpu0_active>;
871*df260487SKancyJoe		cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
872*df260487SKancyJoe	};
873*df260487SKancyJoe};
874*df260487SKancyJoe
875*df260487SKancyJoe&gpu1_cooling_maps {
876*df260487SKancyJoe	map1 {
877*df260487SKancyJoe		trip = <&gpu1_active>;
878*df260487SKancyJoe		cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
879*df260487SKancyJoe	};
880*df260487SKancyJoe};
881*df260487SKancyJoe
882*df260487SKancyJoe&gpu2_cooling_maps {
883*df260487SKancyJoe	map1 {
884*df260487SKancyJoe		trip = <&gpu2_active>;
885*df260487SKancyJoe		cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
886*df260487SKancyJoe	};
887*df260487SKancyJoe};
888*df260487SKancyJoe
889*df260487SKancyJoe&gpu3_cooling_maps {
890*df260487SKancyJoe	map1 {
891*df260487SKancyJoe		trip = <&gpu3_active>;
892*df260487SKancyJoe		cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
893*df260487SKancyJoe	};
894*df260487SKancyJoe};
895*df260487SKancyJoe
896*df260487SKancyJoe&gpu4_cooling_maps {
897*df260487SKancyJoe	map1 {
898*df260487SKancyJoe		trip = <&gpu4_active>;
899*df260487SKancyJoe		cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
900*df260487SKancyJoe	};
901*df260487SKancyJoe};
902*df260487SKancyJoe
903*df260487SKancyJoe&gpu5_cooling_maps {
904*df260487SKancyJoe	map1 {
905*df260487SKancyJoe		trip = <&gpu5_active>;
906*df260487SKancyJoe		cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
907*df260487SKancyJoe	};
908*df260487SKancyJoe};
909*df260487SKancyJoe
910*df260487SKancyJoe&gpu6_cooling_maps {
911*df260487SKancyJoe	map1 {
912*df260487SKancyJoe		trip = <&gpu6_active>;
913*df260487SKancyJoe		cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
914*df260487SKancyJoe	};
915*df260487SKancyJoe};
916*df260487SKancyJoe
917*df260487SKancyJoe&gpu7_cooling_maps {
918*df260487SKancyJoe	map1 {
919*df260487SKancyJoe		trip = <&gpu7_active>;
920*df260487SKancyJoe		cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
921*df260487SKancyJoe	};
922*df260487SKancyJoe};
923*df260487SKancyJoe
924*df260487SKancyJoe&gpu0_trips {
925*df260487SKancyJoe	gpu0_active: trip-active {
926*df260487SKancyJoe		temperature = <38000>;
927*df260487SKancyJoe		hysteresis = <2000>;
928*df260487SKancyJoe		type = "active";
929*df260487SKancyJoe	};
930*df260487SKancyJoe};
931*df260487SKancyJoe
932*df260487SKancyJoe&gpu1_trips {
933*df260487SKancyJoe	gpu1_active: trip-active {
934*df260487SKancyJoe		temperature = <38000>;
935*df260487SKancyJoe		hysteresis = <2000>;
936*df260487SKancyJoe		type = "active";
937*df260487SKancyJoe	};
938*df260487SKancyJoe};
939*df260487SKancyJoe
940*df260487SKancyJoe&gpu2_trips {
941*df260487SKancyJoe	gpu2_active: trip-active {
942*df260487SKancyJoe		temperature = <38000>;
943*df260487SKancyJoe		hysteresis = <2000>;
944*df260487SKancyJoe		type = "active";
945*df260487SKancyJoe	};
946*df260487SKancyJoe};
947*df260487SKancyJoe
948*df260487SKancyJoe&gpu3_trips {
949*df260487SKancyJoe	gpu3_active: trip-active {
950*df260487SKancyJoe		temperature = <38000>;
951*df260487SKancyJoe		hysteresis = <2000>;
952*df260487SKancyJoe		type = "active";
953*df260487SKancyJoe	};
954*df260487SKancyJoe};
955*df260487SKancyJoe
956*df260487SKancyJoe&gpu4_trips {
957*df260487SKancyJoe	gpu4_active: trip-active {
958*df260487SKancyJoe		temperature = <38000>;
959*df260487SKancyJoe		hysteresis = <2000>;
960*df260487SKancyJoe		type = "active";
961*df260487SKancyJoe	};
962*df260487SKancyJoe};
963*df260487SKancyJoe
964*df260487SKancyJoe&gpu5_trips {
965*df260487SKancyJoe	gpu5_active: trip-active {
966*df260487SKancyJoe		temperature = <38000>;
967*df260487SKancyJoe		hysteresis = <2000>;
968*df260487SKancyJoe		type = "active";
969*df260487SKancyJoe	};
970*df260487SKancyJoe};
971*df260487SKancyJoe
972*df260487SKancyJoe&gpu6_trips {
973*df260487SKancyJoe	gpu6_active: trip-active {
974*df260487SKancyJoe		temperature = <38000>;
975*df260487SKancyJoe		hysteresis = <2000>;
976*df260487SKancyJoe		type = "active";
977*df260487SKancyJoe	};
978*df260487SKancyJoe
979*df260487SKancyJoe};
980*df260487SKancyJoe
981*df260487SKancyJoe&gpu7_trips {
982*df260487SKancyJoe	gpu7_active: trip-active {
983*df260487SKancyJoe		temperature = <38000>;
984*df260487SKancyJoe		hysteresis = <2000>;
985*df260487SKancyJoe		type = "active";
986*df260487SKancyJoe	};
987*df260487SKancyJoe};
988*df260487SKancyJoe
989*df260487SKancyJoe&i2c3 {
990*df260487SKancyJoe	clock-frequency = <100000>;
991*df260487SKancyJoe
992*df260487SKancyJoe	status = "okay";
993*df260487SKancyJoe
994*df260487SKancyJoe	wcd_usbss: typec-mux@e {
995*df260487SKancyJoe		compatible = "qcom,wcd9395-usbss", "qcom,wcd9390-usbss";
996*df260487SKancyJoe		reg = <0xe>;
997*df260487SKancyJoe
998*df260487SKancyJoe		vdd-supply = <&vreg_l15b_1p8>;
999*df260487SKancyJoe		reset-gpios = <&tlmm 152 GPIO_ACTIVE_HIGH>;
1000*df260487SKancyJoe
1001*df260487SKancyJoe		mode-switch;
1002*df260487SKancyJoe		orientation-switch;
1003*df260487SKancyJoe
1004*df260487SKancyJoe		ports {
1005*df260487SKancyJoe			#address-cells = <1>;
1006*df260487SKancyJoe			#size-cells = <0>;
1007*df260487SKancyJoe
1008*df260487SKancyJoe			port@0 {
1009*df260487SKancyJoe				reg = <0>;
1010*df260487SKancyJoe
1011*df260487SKancyJoe				wcd_usbss_sbu_mux: endpoint {
1012*df260487SKancyJoe					remote-endpoint = <&pmic_glink_sbu>;
1013*df260487SKancyJoe				};
1014*df260487SKancyJoe			};
1015*df260487SKancyJoe		};
1016*df260487SKancyJoe	};
1017*df260487SKancyJoe};
1018*df260487SKancyJoe
1019*df260487SKancyJoe&i2c6 {
1020*df260487SKancyJoe	clock-frequency = <100000>;
1021*df260487SKancyJoe
1022*df260487SKancyJoe	status = "okay";
1023*df260487SKancyJoe
1024*df260487SKancyJoe	typec-mux@1c {
1025*df260487SKancyJoe		compatible = "onnn,nb7vpq904m";
1026*df260487SKancyJoe		reg = <0x1c>;
1027*df260487SKancyJoe
1028*df260487SKancyJoe		vcc-supply = <&vreg_l15b_1p8>;
1029*df260487SKancyJoe
1030*df260487SKancyJoe		retimer-switch;
1031*df260487SKancyJoe		orientation-switch;
1032*df260487SKancyJoe
1033*df260487SKancyJoe		ports {
1034*df260487SKancyJoe			#address-cells = <1>;
1035*df260487SKancyJoe			#size-cells = <0>;
1036*df260487SKancyJoe
1037*df260487SKancyJoe			port@0 {
1038*df260487SKancyJoe				reg = <0>;
1039*df260487SKancyJoe
1040*df260487SKancyJoe				redriver_ss_out: endpoint {
1041*df260487SKancyJoe					remote-endpoint = <&pmic_glink_ss_in>;
1042*df260487SKancyJoe				};
1043*df260487SKancyJoe			};
1044*df260487SKancyJoe
1045*df260487SKancyJoe			port@1 {
1046*df260487SKancyJoe				reg = <1>;
1047*df260487SKancyJoe
1048*df260487SKancyJoe				redriver_ss_in: endpoint {
1049*df260487SKancyJoe					remote-endpoint = <&usb_dp_qmpphy_out>;
1050*df260487SKancyJoe				};
1051*df260487SKancyJoe			};
1052*df260487SKancyJoe		};
1053*df260487SKancyJoe	};
1054*df260487SKancyJoe};
1055*df260487SKancyJoe
1056*df260487SKancyJoe&iris {
1057*df260487SKancyJoe	status = "okay";
1058*df260487SKancyJoe};
1059*df260487SKancyJoe
1060*df260487SKancyJoe&lpass_wsa2macro {
1061*df260487SKancyJoe	status = "okay";
1062*df260487SKancyJoe};
1063*df260487SKancyJoe
1064*df260487SKancyJoe&mdss {
1065*df260487SKancyJoe	status = "okay";
1066*df260487SKancyJoe};
1067*df260487SKancyJoe
1068*df260487SKancyJoe&mdss_dp0 {
1069*df260487SKancyJoe	status = "okay";
1070*df260487SKancyJoe};
1071*df260487SKancyJoe
1072*df260487SKancyJoe&mdss_dp0_out {
1073*df260487SKancyJoe	status = "okay";
1074*df260487SKancyJoe};
1075*df260487SKancyJoe
1076*df260487SKancyJoe&pcie0 {
1077*df260487SKancyJoe	wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
1078*df260487SKancyJoe	perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
1079*df260487SKancyJoe
1080*df260487SKancyJoe	pinctrl-0 = <&pcie0_default_state>;
1081*df260487SKancyJoe	pinctrl-names = "default";
1082*df260487SKancyJoe
1083*df260487SKancyJoe	status = "okay";
1084*df260487SKancyJoe};
1085*df260487SKancyJoe
1086*df260487SKancyJoe&pcieport0 {
1087*df260487SKancyJoe	wifi@0 {
1088*df260487SKancyJoe		compatible = "pci17cb,1107";
1089*df260487SKancyJoe		reg = <0x10000 0x0 0x0 0x0 0x0>;
1090*df260487SKancyJoe
1091*df260487SKancyJoe		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
1092*df260487SKancyJoe		vddaon-supply = <&vreg_pmu_aon_0p59>;
1093*df260487SKancyJoe		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
1094*df260487SKancyJoe		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
1095*df260487SKancyJoe		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
1096*df260487SKancyJoe		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
1097*df260487SKancyJoe		vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
1098*df260487SKancyJoe		vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
1099*df260487SKancyJoe		vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
1100*df260487SKancyJoe	};
1101*df260487SKancyJoe};
1102*df260487SKancyJoe
1103*df260487SKancyJoe&pcie0_phy {
1104*df260487SKancyJoe	vdda-phy-supply = <&vreg_l1i_0p88>;
1105*df260487SKancyJoe	vdda-pll-supply = <&vreg_l3i_1p2>;
1106*df260487SKancyJoe
1107*df260487SKancyJoe	status = "okay";
1108*df260487SKancyJoe};
1109*df260487SKancyJoe
1110*df260487SKancyJoe&pcie1 {
1111*df260487SKancyJoe	wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
1112*df260487SKancyJoe	perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
1113*df260487SKancyJoe
1114*df260487SKancyJoe	pinctrl-0 = <&pcie1_default_state>;
1115*df260487SKancyJoe	pinctrl-names = "default";
1116*df260487SKancyJoe
1117*df260487SKancyJoe	status = "okay";
1118*df260487SKancyJoe};
1119*df260487SKancyJoe
1120*df260487SKancyJoe&pcie1_port0 {
1121*df260487SKancyJoe	/* Renesas μPD720201 PCIe USB3.0 HOST CONTROLLER */
1122*df260487SKancyJoe	usb-controller@0 {
1123*df260487SKancyJoe		compatible = "pci1912,0014";
1124*df260487SKancyJoe		reg = <0x10000 0x0 0x0 0x0 0x0>;
1125*df260487SKancyJoe
1126*df260487SKancyJoe		avdd33-supply = <&upd720201_avdd33_reg>;
1127*df260487SKancyJoe		vdd10-supply = <&upd720201_vdd10_reg>;
1128*df260487SKancyJoe		vdd33-supply = <&upd720201_vdd33_reg>;
1129*df260487SKancyJoe
1130*df260487SKancyJoe		pinctrl-0 = <&gamepad_pwr_en>;
1131*df260487SKancyJoe		pinctrl-names = "default";
1132*df260487SKancyJoe	};
1133*df260487SKancyJoe};
1134*df260487SKancyJoe
1135*df260487SKancyJoe&pcie1_phy {
1136*df260487SKancyJoe	vdda-phy-supply = <&vreg_l3e_0p9>;
1137*df260487SKancyJoe	vdda-pll-supply = <&vreg_l3i_1p2>;
1138*df260487SKancyJoe	vdda-qref-supply = <&vreg_l1i_0p88>;
1139*df260487SKancyJoe
1140*df260487SKancyJoe	status = "okay";
1141*df260487SKancyJoe};
1142*df260487SKancyJoe
1143*df260487SKancyJoe&pon_pwrkey {
1144*df260487SKancyJoe	status = "okay";
1145*df260487SKancyJoe};
1146*df260487SKancyJoe
1147*df260487SKancyJoe&pon_resin {
1148*df260487SKancyJoe	linux,code = <KEY_VOLUMEDOWN>;
1149*df260487SKancyJoe
1150*df260487SKancyJoe	status = "okay";
1151*df260487SKancyJoe};
1152*df260487SKancyJoe
1153*df260487SKancyJoe&pm8550_gpios {
1154*df260487SKancyJoe	volume_up_n: volume-up-n-state {
1155*df260487SKancyJoe		pins = "gpio6";
1156*df260487SKancyJoe		function = "normal";
1157*df260487SKancyJoe		bias-pull-up;
1158*df260487SKancyJoe		input-enable;
1159*df260487SKancyJoe		power-source = <1>;
1160*df260487SKancyJoe	};
1161*df260487SKancyJoe
1162*df260487SKancyJoe	pwm_fan_ctrl_active: pwm-fan-ctrl-active-state {
1163*df260487SKancyJoe		pins = "gpio9";
1164*df260487SKancyJoe		function = "func1";
1165*df260487SKancyJoe		bias-disable;
1166*df260487SKancyJoe		power-source = <0>;
1167*df260487SKancyJoe		qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
1168*df260487SKancyJoe	};
1169*df260487SKancyJoe
1170*df260487SKancyJoe	pwm_fan_ctrl_sleep: pwm-fan-ctrl-sleep-state {
1171*df260487SKancyJoe		pins = "gpio9";
1172*df260487SKancyJoe		function = "normal";
1173*df260487SKancyJoe		output-high;
1174*df260487SKancyJoe		bias-disable;
1175*df260487SKancyJoe		power-source = <0>;
1176*df260487SKancyJoe		qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
1177*df260487SKancyJoe	};
1178*df260487SKancyJoe
1179*df260487SKancyJoe	sdc2_card_det_n: sdc2-card-det-state {
1180*df260487SKancyJoe		pins = "gpio12";
1181*df260487SKancyJoe		function = "normal";
1182*df260487SKancyJoe		bias-pull-up;
1183*df260487SKancyJoe		input-enable;
1184*df260487SKancyJoe		output-disable;
1185*df260487SKancyJoe		power-source = <1>; /* 1.8 V */
1186*df260487SKancyJoe	};
1187*df260487SKancyJoe};
1188*df260487SKancyJoe
1189*df260487SKancyJoe&pm8550_pwm {
1190*df260487SKancyJoe	status = "okay";
1191*df260487SKancyJoe
1192*df260487SKancyJoe	multi-led {
1193*df260487SKancyJoe		color = <LED_COLOR_ID_RGB>;
1194*df260487SKancyJoe		function = LED_FUNCTION_STATUS;
1195*df260487SKancyJoe		label = "Power Status";
1196*df260487SKancyJoe
1197*df260487SKancyJoe		#address-cells = <1>;
1198*df260487SKancyJoe		#size-cells = <0>;
1199*df260487SKancyJoe
1200*df260487SKancyJoe		led@1 {
1201*df260487SKancyJoe			reg = <1>;
1202*df260487SKancyJoe			color = <LED_COLOR_ID_RED>;
1203*df260487SKancyJoe		};
1204*df260487SKancyJoe
1205*df260487SKancyJoe		led@2 {
1206*df260487SKancyJoe			reg = <2>;
1207*df260487SKancyJoe			color = <LED_COLOR_ID_GREEN>;
1208*df260487SKancyJoe		};
1209*df260487SKancyJoe
1210*df260487SKancyJoe		led@3 {
1211*df260487SKancyJoe			reg = <3>;
1212*df260487SKancyJoe			color = <LED_COLOR_ID_BLUE>;
1213*df260487SKancyJoe		};
1214*df260487SKancyJoe	};
1215*df260487SKancyJoe};
1216*df260487SKancyJoe
1217*df260487SKancyJoe&pm8550b_eusb2_repeater {
1218*df260487SKancyJoe	vdd18-supply = <&vreg_l15b_1p8>;
1219*df260487SKancyJoe	vdd3-supply = <&vreg_l5b_3p1>;
1220*df260487SKancyJoe};
1221*df260487SKancyJoe
1222*df260487SKancyJoe&qup_i2c3_data_clk {
1223*df260487SKancyJoe	/* Use internal I2C pull-up */
1224*df260487SKancyJoe	bias-pull-up = <2200>;
1225*df260487SKancyJoe};
1226*df260487SKancyJoe
1227*df260487SKancyJoe&qupv3_id_0 {
1228*df260487SKancyJoe	status = "okay";
1229*df260487SKancyJoe};
1230*df260487SKancyJoe
1231*df260487SKancyJoe&qupv3_id_1 {
1232*df260487SKancyJoe	status = "okay";
1233*df260487SKancyJoe};
1234*df260487SKancyJoe
1235*df260487SKancyJoe&remoteproc_adsp {
1236*df260487SKancyJoe	firmware-name = "qcom/sm8650/ayaneo/ps2/adsp.mbn",
1237*df260487SKancyJoe			"qcom/sm8650/ayaneo/ps2/adsp_dtb.mbn";
1238*df260487SKancyJoe
1239*df260487SKancyJoe	status = "okay";
1240*df260487SKancyJoe};
1241*df260487SKancyJoe
1242*df260487SKancyJoe&remoteproc_cdsp {
1243*df260487SKancyJoe	firmware-name = "qcom/sm8650/ayaneo/ps2/cdsp.mbn",
1244*df260487SKancyJoe			"qcom/sm8650/ayaneo/ps2/cdsp_dtb.mbn";
1245*df260487SKancyJoe
1246*df260487SKancyJoe	status = "okay";
1247*df260487SKancyJoe};
1248*df260487SKancyJoe
1249*df260487SKancyJoe&reserved_memory {
1250*df260487SKancyJoe	lost_reg_mem: lost-reg-mem {
1251*df260487SKancyJoe		reg = <0 0x9b09c000 0 0x4000>;
1252*df260487SKancyJoe		no-map;
1253*df260487SKancyJoe	};
1254*df260487SKancyJoe
1255*df260487SKancyJoe	hwfence_shbuf: hwfence-shbuf@d4e23000 {
1256*df260487SKancyJoe		reg = <0 0xd4e23000 0 0x2dd000>;
1257*df260487SKancyJoe		no-map;
1258*df260487SKancyJoe	};
1259*df260487SKancyJoe
1260*df260487SKancyJoe	splash_region: splash-region {
1261*df260487SKancyJoe		label = "cont_splash_region";
1262*df260487SKancyJoe		reg = <0 0xd5100000 0 0x2b00000>;
1263*df260487SKancyJoe		no-map;
1264*df260487SKancyJoe	};
1265*df260487SKancyJoe};
1266*df260487SKancyJoe
1267*df260487SKancyJoe&sdhc_2 {
1268*df260487SKancyJoe	cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_LOW>;
1269*df260487SKancyJoe
1270*df260487SKancyJoe	vmmc-supply = <&vreg_l9b_2p9>;
1271*df260487SKancyJoe	vqmmc-supply = <&vreg_l8b_1p8>;
1272*df260487SKancyJoe	bus-width = <4>;
1273*df260487SKancyJoe	no-sdio;
1274*df260487SKancyJoe	no-mmc;
1275*df260487SKancyJoe
1276*df260487SKancyJoe	pinctrl-0 = <&sdc2_default>, <&sdc2_card_det_n>;
1277*df260487SKancyJoe	pinctrl-1 = <&sdc2_sleep>, <&sdc2_card_det_n>;
1278*df260487SKancyJoe	pinctrl-names = "default", "sleep";
1279*df260487SKancyJoe
1280*df260487SKancyJoe	status = "okay";
1281*df260487SKancyJoe};
1282*df260487SKancyJoe
1283*df260487SKancyJoe&sleep_clk {
1284*df260487SKancyJoe	clock-frequency = <32764>;
1285*df260487SKancyJoe};
1286*df260487SKancyJoe
1287*df260487SKancyJoe&swr1 {
1288*df260487SKancyJoe	status = "okay";
1289*df260487SKancyJoe
1290*df260487SKancyJoe	/* WCD9395 RX */
1291*df260487SKancyJoe	wcd_rx: codec@0,4 {
1292*df260487SKancyJoe		compatible = "sdw20217010e00";
1293*df260487SKancyJoe		reg = <0 4>;
1294*df260487SKancyJoe
1295*df260487SKancyJoe		/*
1296*df260487SKancyJoe		 * WCD9395 RX Port 1 (HPH_L/R)      <=> SWR1 Port 1 (HPH_L/R)
1297*df260487SKancyJoe		 * WCD9395 RX Port 2 (CLSH)         <=> SWR1 Port 2 (CLSH)
1298*df260487SKancyJoe		 * WCD9395 RX Port 3 (COMP_L/R)     <=> SWR1 Port 3 (COMP_L/R)
1299*df260487SKancyJoe		 * WCD9395 RX Port 4 (LO)           <=> SWR1 Port 4 (LO)
1300*df260487SKancyJoe		 * WCD9395 RX Port 5 (DSD_L/R)      <=> SWR1 Port 5 (DSD_L/R)
1301*df260487SKancyJoe		 * WCD9395 RX Port 6 (HIFI_PCM_L/R) <=> SWR1 Port 9 (HIFI_PCM_L/R)
1302*df260487SKancyJoe		 */
1303*df260487SKancyJoe		qcom,rx-port-mapping = <1 2 3 4 5 9>;
1304*df260487SKancyJoe	};
1305*df260487SKancyJoe};
1306*df260487SKancyJoe
1307*df260487SKancyJoe&swr2 {
1308*df260487SKancyJoe	status = "okay";
1309*df260487SKancyJoe
1310*df260487SKancyJoe	/* WCD9395 TX */
1311*df260487SKancyJoe	wcd_tx: codec@0,3 {
1312*df260487SKancyJoe		compatible = "sdw20217010e00";
1313*df260487SKancyJoe		reg = <0 3>;
1314*df260487SKancyJoe
1315*df260487SKancyJoe		/*
1316*df260487SKancyJoe		 * WCD9395 TX Port 1 (ADC1,2,3,4)         <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)
1317*df260487SKancyJoe		 * WCD9395 TX Port 2 (ADC3,4 & DMIC0,1)   <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)
1318*df260487SKancyJoe		 * WCD9395 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 (TX SWR_INPUT 4,5,6,7)
1319*df260487SKancyJoe		 * WCD9395 TX Port 4 (DMIC4,5,6,7)        <=> SWR2 Port 4 (TX SWR_INPUT 8,9,10,11)
1320*df260487SKancyJoe		 */
1321*df260487SKancyJoe		qcom,tx-port-mapping = <2 2 3 4>;
1322*df260487SKancyJoe	};
1323*df260487SKancyJoe};
1324*df260487SKancyJoe
1325*df260487SKancyJoe&swr3 {
1326*df260487SKancyJoe	status = "okay";
1327*df260487SKancyJoe
1328*df260487SKancyJoe	pinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>;
1329*df260487SKancyJoe	pinctrl-names = "default";
1330*df260487SKancyJoe
1331*df260487SKancyJoe	/* WSA8845, Speaker Left */
1332*df260487SKancyJoe	left_spkr: speaker@0,0 {
1333*df260487SKancyJoe		compatible = "sdw20217020400";
1334*df260487SKancyJoe		reg = <0 0>;
1335*df260487SKancyJoe		#sound-dai-cells = <0>;
1336*df260487SKancyJoe		reset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
1337*df260487SKancyJoe		sound-name-prefix = "SpkrLeft";
1338*df260487SKancyJoe		vdd-1p8-supply = <&vreg_l15b_1p8>;
1339*df260487SKancyJoe		vdd-io-supply = <&vreg_l3c_1p2>;
1340*df260487SKancyJoe
1341*df260487SKancyJoe		/*
1342*df260487SKancyJoe		 * WSA8845 Port 1 (DAC)     <=> SWR3 Port 1 (SPKR_L)
1343*df260487SKancyJoe		 * WSA8845 Port 2 (COMP)    <=> SWR3 Port 2 (SPKR_L_COMP)
1344*df260487SKancyJoe		 * WSA8845 Port 3 (BOOST)   <=> SWR3 Port 3 (SPKR_L_BOOST)
1345*df260487SKancyJoe		 * WSA8845 Port 4 (PBR)     <=> SWR3 Port 7 (PBR)
1346*df260487SKancyJoe		 * WSA8845 Port 5 (VISENSE) <=> SWR3 Port 10 (SPKR_L_VI)
1347*df260487SKancyJoe		 * WSA8845 Port 6 (CPS)     <=> SWR3 Port 13 (CPS)
1348*df260487SKancyJoe		 */
1349*df260487SKancyJoe		qcom,port-mapping = <1 2 3 7 10 13>;
1350*df260487SKancyJoe	};
1351*df260487SKancyJoe
1352*df260487SKancyJoe	/* WSA8845, Speaker Right */
1353*df260487SKancyJoe	right_spkr: speaker@0,1 {
1354*df260487SKancyJoe		compatible = "sdw20217020400";
1355*df260487SKancyJoe		reg = <0 1>;
1356*df260487SKancyJoe		#sound-dai-cells = <0>;
1357*df260487SKancyJoe		reset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
1358*df260487SKancyJoe		sound-name-prefix = "SpkrRight";
1359*df260487SKancyJoe		vdd-1p8-supply = <&vreg_l15b_1p8>;
1360*df260487SKancyJoe		vdd-io-supply = <&vreg_l3c_1p2>;
1361*df260487SKancyJoe
1362*df260487SKancyJoe		/*
1363*df260487SKancyJoe		 * WSA8845 Port 1 (DAC)     <=> SWR3 Port 4 (SPKR_R)
1364*df260487SKancyJoe		 * WSA8845 Port 2 (COMP)    <=> SWR3 Port 5 (SPKR_R_COMP)
1365*df260487SKancyJoe		 * WSA8845 Port 3 (BOOST)   <=> SWR3 Port 6 (SPKR_R_BOOST)
1366*df260487SKancyJoe		 * WSA8845 Port 4 (PBR)     <=> SWR3 Port 7 (PBR)
1367*df260487SKancyJoe		 * WSA8845 Port 5 (VISENSE) <=> SWR3 Port 11 (SPKR_R_VI)
1368*df260487SKancyJoe		 * WSA8845 Port 6 (CPS)     <=> SWR3 Port 13 (CPS)
1369*df260487SKancyJoe		 */
1370*df260487SKancyJoe		qcom,port-mapping = <4 5 6 7 11 13>;
1371*df260487SKancyJoe	};
1372*df260487SKancyJoe};
1373*df260487SKancyJoe
1374*df260487SKancyJoe&tlmm {
1375*df260487SKancyJoe	/* Reserved I/Os for NFC */
1376*df260487SKancyJoe	gpio-reserved-ranges = <32 4>, <36 1>, <38 6>, <74 1>;
1377*df260487SKancyJoe
1378*df260487SKancyJoe	bt_default: bt-default-state {
1379*df260487SKancyJoe		bt-en-pins {
1380*df260487SKancyJoe			pins = "gpio17";
1381*df260487SKancyJoe			function = "gpio";
1382*df260487SKancyJoe			drive-strength = <16>;
1383*df260487SKancyJoe			bias-disable;
1384*df260487SKancyJoe		};
1385*df260487SKancyJoe
1386*df260487SKancyJoe		sw-ctrl-pins {
1387*df260487SKancyJoe			pins = "gpio18";
1388*df260487SKancyJoe			function = "gpio";
1389*df260487SKancyJoe			bias-pull-down;
1390*df260487SKancyJoe		};
1391*df260487SKancyJoe	};
1392*df260487SKancyJoe
1393*df260487SKancyJoe	fan_pwr_pins: fan-pwr-state {
1394*df260487SKancyJoe		pins = "gpio125";
1395*df260487SKancyJoe		function = "gpio";
1396*df260487SKancyJoe		drive-strength = <2>;
1397*df260487SKancyJoe		bias-disable;
1398*df260487SKancyJoe	};
1399*df260487SKancyJoe
1400*df260487SKancyJoe	fan_vdd_pins: fan-vdd-state {
1401*df260487SKancyJoe		pins = "gpio124";
1402*df260487SKancyJoe		function = "gpio";
1403*df260487SKancyJoe		drive-strength = <2>;
1404*df260487SKancyJoe		bias-disable;
1405*df260487SKancyJoe	};
1406*df260487SKancyJoe
1407*df260487SKancyJoe	fan_int: fan-int-state {
1408*df260487SKancyJoe		pins = "gpio14";
1409*df260487SKancyJoe		function = "gpio";
1410*df260487SKancyJoe		drive-strength = <2>;
1411*df260487SKancyJoe		bias-pull-up;
1412*df260487SKancyJoe	};
1413*df260487SKancyJoe
1414*df260487SKancyJoe	upd720201_avdd33: upd720201-avdd33-state {
1415*df260487SKancyJoe		pins = "gpio123";
1416*df260487SKancyJoe		function = "gpio";
1417*df260487SKancyJoe		drive-strength = <2>;
1418*df260487SKancyJoe		bias-disable;
1419*df260487SKancyJoe	};
1420*df260487SKancyJoe
1421*df260487SKancyJoe	upd720201_vdd10: pd720201-vdd10-state {
1422*df260487SKancyJoe		pins = "gpio122";
1423*df260487SKancyJoe		function = "gpio";
1424*df260487SKancyJoe		drive-strength = <2>;
1425*df260487SKancyJoe		bias-disable;
1426*df260487SKancyJoe	};
1427*df260487SKancyJoe
1428*df260487SKancyJoe	upd720201_vdd33: upd720201-vdd33-state {
1429*df260487SKancyJoe		pins = "gpio121";
1430*df260487SKancyJoe		function = "gpio";
1431*df260487SKancyJoe		drive-strength = <2>;
1432*df260487SKancyJoe		bias-disable;
1433*df260487SKancyJoe	};
1434*df260487SKancyJoe
1435*df260487SKancyJoe	gamepad_pwr_en: gamepad-pwr-en-active-state {
1436*df260487SKancyJoe		pins = "gpio28";
1437*df260487SKancyJoe		function = "gpio";
1438*df260487SKancyJoe		drive-strength = <2>;
1439*df260487SKancyJoe		bias-disable;
1440*df260487SKancyJoe		output-high;
1441*df260487SKancyJoe	};
1442*df260487SKancyJoe
1443*df260487SKancyJoe	spkr_23_sd_n_active: spkr-23-sd-n-active-state {
1444*df260487SKancyJoe		pins = "gpio77";
1445*df260487SKancyJoe		function = "gpio";
1446*df260487SKancyJoe		drive-strength = <16>;
1447*df260487SKancyJoe		bias-disable;
1448*df260487SKancyJoe	};
1449*df260487SKancyJoe
1450*df260487SKancyJoe	spkr_01_sd_n_active: spkr-01-sd-n-active-state {
1451*df260487SKancyJoe		pins = "gpio21";
1452*df260487SKancyJoe		function = "gpio";
1453*df260487SKancyJoe		drive-strength = <16>;
1454*df260487SKancyJoe		bias-disable;
1455*df260487SKancyJoe	};
1456*df260487SKancyJoe
1457*df260487SKancyJoe	wcd_default: wcd-reset-n-active-state {
1458*df260487SKancyJoe		pins = "gpio107";
1459*df260487SKancyJoe		function = "gpio";
1460*df260487SKancyJoe		drive-strength = <16>;
1461*df260487SKancyJoe		bias-disable;
1462*df260487SKancyJoe	};
1463*df260487SKancyJoe
1464*df260487SKancyJoe	wlan_en: wlan-en-state {
1465*df260487SKancyJoe		pins = "gpio16";
1466*df260487SKancyJoe		function = "gpio";
1467*df260487SKancyJoe		drive-strength = <8>;
1468*df260487SKancyJoe		bias-pull-down;
1469*df260487SKancyJoe	};
1470*df260487SKancyJoe};
1471*df260487SKancyJoe
1472*df260487SKancyJoe&uart14 {
1473*df260487SKancyJoe	status = "okay";
1474*df260487SKancyJoe
1475*df260487SKancyJoe	bluetooth {
1476*df260487SKancyJoe		compatible = "qcom,wcn7850-bt";
1477*df260487SKancyJoe
1478*df260487SKancyJoe		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
1479*df260487SKancyJoe		vddaon-supply = <&vreg_pmu_aon_0p59>;
1480*df260487SKancyJoe		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
1481*df260487SKancyJoe		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
1482*df260487SKancyJoe		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
1483*df260487SKancyJoe		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
1484*df260487SKancyJoe		vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
1485*df260487SKancyJoe
1486*df260487SKancyJoe		max-speed = <3200000>;
1487*df260487SKancyJoe	};
1488*df260487SKancyJoe};
1489*df260487SKancyJoe
1490*df260487SKancyJoe&uart15 {
1491*df260487SKancyJoe	status = "okay";
1492*df260487SKancyJoe};
1493*df260487SKancyJoe
1494*df260487SKancyJoe&ufs_mem_hc {
1495*df260487SKancyJoe	reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
1496*df260487SKancyJoe
1497*df260487SKancyJoe	vcc-supply = <&vreg_l17b_2p5>;
1498*df260487SKancyJoe	vcc-max-microamp = <1300000>;
1499*df260487SKancyJoe	vccq-supply = <&vreg_l1c_1p2>;
1500*df260487SKancyJoe	vccq-max-microamp = <1200000>;
1501*df260487SKancyJoe
1502*df260487SKancyJoe	status = "okay";
1503*df260487SKancyJoe};
1504*df260487SKancyJoe
1505*df260487SKancyJoe&ufs_mem_phy {
1506*df260487SKancyJoe	vdda-phy-supply = <&vreg_l1d_0p88>;
1507*df260487SKancyJoe	vdda-pll-supply = <&vreg_l3i_1p2>;
1508*df260487SKancyJoe
1509*df260487SKancyJoe	status = "okay";
1510*df260487SKancyJoe};
1511*df260487SKancyJoe
1512*df260487SKancyJoe/*
1513*df260487SKancyJoe * DPAUX -> WCD9395 -> USB_SBU -> USB-C
1514*df260487SKancyJoe * eUSB2 DP/DM -> PM85550HS -> eUSB2 DP/DM -> WCD9395 -> USB-C
1515*df260487SKancyJoe * USB SS -> NB7VPQ904MMUTWG -> USB-C
1516*df260487SKancyJoe */
1517*df260487SKancyJoe
1518*df260487SKancyJoe&usb_1 {
1519*df260487SKancyJoe	dr_mode = "otg";
1520*df260487SKancyJoe	usb-role-switch;
1521*df260487SKancyJoe
1522*df260487SKancyJoe	status = "okay";
1523*df260487SKancyJoe};
1524*df260487SKancyJoe
1525*df260487SKancyJoe&usb_1_dwc3_hs {
1526*df260487SKancyJoe	remote-endpoint = <&pmic_glink_hs_in>;
1527*df260487SKancyJoe};
1528*df260487SKancyJoe
1529*df260487SKancyJoe&usb_1_hsphy {
1530*df260487SKancyJoe	vdd-supply = <&vreg_l1i_0p88>;
1531*df260487SKancyJoe	vdda12-supply = <&vreg_l3i_1p2>;
1532*df260487SKancyJoe
1533*df260487SKancyJoe	phys = <&pm8550b_eusb2_repeater>;
1534*df260487SKancyJoe
1535*df260487SKancyJoe	status = "okay";
1536*df260487SKancyJoe};
1537*df260487SKancyJoe
1538*df260487SKancyJoe&usb_dp_qmpphy {
1539*df260487SKancyJoe	vdda-phy-supply = <&vreg_l3i_1p2>;
1540*df260487SKancyJoe	vdda-pll-supply = <&vreg_l3g_0p91>;
1541*df260487SKancyJoe
1542*df260487SKancyJoe	status = "okay";
1543*df260487SKancyJoe};
1544*df260487SKancyJoe
1545*df260487SKancyJoe&usb_dp_qmpphy_out {
1546*df260487SKancyJoe	remote-endpoint = <&redriver_ss_in>;
1547*df260487SKancyJoe};
1548*df260487SKancyJoe
1549*df260487SKancyJoe&xo_board {
1550*df260487SKancyJoe	clock-frequency = <76800000>;
1551*df260487SKancyJoe};
1552