xref: /linux/scripts/dtc/include-prefixes/arm64/qcom/sdm845-db845c-navigation-mezzanine.dtso (revision ec71f661a572a770d7c861cd52a50cbbb0e1a8d1)
1*30df676aSBryan O'Donoghue// SPDX-License-Identifier: GPL-2.0
2*30df676aSBryan O'Donoghue/*
3*30df676aSBryan O'Donoghue * Copyright (c) 2022, Linaro Ltd.
4*30df676aSBryan O'Donoghue */
5*30df676aSBryan O'Donoghue
6*30df676aSBryan O'Donoghue/dts-v1/;
7*30df676aSBryan O'Donoghue/plugin/;
8*30df676aSBryan O'Donoghue
9*30df676aSBryan O'Donoghue#include <dt-bindings/clock/qcom,camcc-sdm845.h>
10*30df676aSBryan O'Donoghue#include <dt-bindings/gpio/gpio.h>
11*30df676aSBryan O'Donoghue
12*30df676aSBryan O'Donoghue&camss {
13*30df676aSBryan O'Donoghue	vdda-phy-supply = <&vreg_l1a_0p875>;
14*30df676aSBryan O'Donoghue	vdda-pll-supply = <&vreg_l26a_1p2>;
15*30df676aSBryan O'Donoghue
16*30df676aSBryan O'Donoghue	status = "okay";
17*30df676aSBryan O'Donoghue
18*30df676aSBryan O'Donoghue	ports {
19*30df676aSBryan O'Donoghue		port@0 {
20*30df676aSBryan O'Donoghue			csiphy0_ep: endpoint {
21*30df676aSBryan O'Donoghue				data-lanes = <0 1 2 3>;
22*30df676aSBryan O'Donoghue				remote-endpoint = <&ov8856_ep>;
23*30df676aSBryan O'Donoghue			};
24*30df676aSBryan O'Donoghue		};
25*30df676aSBryan O'Donoghue	};
26*30df676aSBryan O'Donoghue};
27*30df676aSBryan O'Donoghue
28*30df676aSBryan O'Donoghue&cci {
29*30df676aSBryan O'Donoghue	status = "okay";
30*30df676aSBryan O'Donoghue};
31*30df676aSBryan O'Donoghue
32*30df676aSBryan O'Donoghue&cci_i2c0 {
33*30df676aSBryan O'Donoghue	#address-cells = <1>;
34*30df676aSBryan O'Donoghue	#size-cells = <0>;
35*30df676aSBryan O'Donoghue
36*30df676aSBryan O'Donoghue	camera@10 {
37*30df676aSBryan O'Donoghue		compatible = "ovti,ov8856";
38*30df676aSBryan O'Donoghue		reg = <0x10>;
39*30df676aSBryan O'Donoghue
40*30df676aSBryan O'Donoghue		/* CAM0_RST_N */
41*30df676aSBryan O'Donoghue		reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
42*30df676aSBryan O'Donoghue		pinctrl-names = "default";
43*30df676aSBryan O'Donoghue		pinctrl-0 = <&cam0_default>;
44*30df676aSBryan O'Donoghue
45*30df676aSBryan O'Donoghue		clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
46*30df676aSBryan O'Donoghue		clock-names = "xvclk";
47*30df676aSBryan O'Donoghue		clock-frequency = <19200000>;
48*30df676aSBryan O'Donoghue
49*30df676aSBryan O'Donoghue		/*
50*30df676aSBryan O'Donoghue		 * The &vreg_s4a_1p8 trace is powered on as a,
51*30df676aSBryan O'Donoghue		 * so it is represented by a fixed regulator.
52*30df676aSBryan O'Donoghue		 *
53*30df676aSBryan O'Donoghue		 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
54*30df676aSBryan O'Donoghue		 * both have to be enabled through the power management
55*30df676aSBryan O'Donoghue		 * gpios.
56*30df676aSBryan O'Donoghue		 */
57*30df676aSBryan O'Donoghue		dovdd-supply = <&vreg_lvs1a_1p8>;
58*30df676aSBryan O'Donoghue		avdd-supply = <&cam0_avdd_2v8>;
59*30df676aSBryan O'Donoghue		dvdd-supply = <&cam0_dvdd_1v2>;
60*30df676aSBryan O'Donoghue
61*30df676aSBryan O'Donoghue		port {
62*30df676aSBryan O'Donoghue			ov8856_ep: endpoint {
63*30df676aSBryan O'Donoghue				link-frequencies = /bits/ 64
64*30df676aSBryan O'Donoghue					<360000000 180000000>;
65*30df676aSBryan O'Donoghue				data-lanes = <1 2 3 4>;
66*30df676aSBryan O'Donoghue				remote-endpoint = <&csiphy0_ep>;
67*30df676aSBryan O'Donoghue			};
68*30df676aSBryan O'Donoghue		};
69*30df676aSBryan O'Donoghue	};
70*30df676aSBryan O'Donoghue};
71