xref: /linux/scripts/dtc/include-prefixes/arm64/qcom/sdm845-cheza.dtsi (revision ec71f661a572a770d7c861cd52a50cbbb0e1a8d1)
179e7739fSRob Clark// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
279e7739fSRob Clark/*
379e7739fSRob Clark * Google Cheza device tree source (common between revisions)
479e7739fSRob Clark *
579e7739fSRob Clark * Copyright 2018 Google LLC.
679e7739fSRob Clark */
779e7739fSRob Clark
879e7739fSRob Clark#include <dt-bindings/input/input.h>
979e7739fSRob Clark#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
1079e7739fSRob Clark#include "sdm845.dtsi"
1179e7739fSRob Clark
1279e7739fSRob Clark/* PMICs depend on spmi_bus label and so must come after SoC */
1379e7739fSRob Clark#include "pm8005.dtsi"
1479e7739fSRob Clark#include "pm8998.dtsi"
1579e7739fSRob Clark
1679e7739fSRob Clark/ {
1779e7739fSRob Clark	aliases {
1879e7739fSRob Clark		bluetooth0 = &bluetooth;
194772c030SCaleb Connolly		serial1 = &uart6;
2079e7739fSRob Clark		serial0 = &uart9;
2179e7739fSRob Clark		wifi0 = &wifi;
2279e7739fSRob Clark	};
2379e7739fSRob Clark
2479e7739fSRob Clark	chosen {
2579e7739fSRob Clark		stdout-path = "serial0:115200n8";
2679e7739fSRob Clark	};
2779e7739fSRob Clark
2879e7739fSRob Clark	backlight: backlight {
2979e7739fSRob Clark		compatible = "pwm-backlight";
3079e7739fSRob Clark		pwms = <&cros_ec_pwm 0>;
3179e7739fSRob Clark		enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
3279e7739fSRob Clark		power-supply = <&ppvar_sys>;
3379e7739fSRob Clark		pinctrl-names = "default";
3479e7739fSRob Clark		pinctrl-0 = <&ap_edp_bklten>;
3579e7739fSRob Clark	};
3679e7739fSRob Clark
3779e7739fSRob Clark	/* FIXED REGULATORS - parents above children */
3879e7739fSRob Clark
3979e7739fSRob Clark	/* This is the top level supply and variable voltage */
4079e7739fSRob Clark	ppvar_sys: ppvar-sys-regulator {
4179e7739fSRob Clark		compatible = "regulator-fixed";
4279e7739fSRob Clark		regulator-name = "ppvar_sys";
4379e7739fSRob Clark		regulator-always-on;
4479e7739fSRob Clark		regulator-boot-on;
4579e7739fSRob Clark	};
4679e7739fSRob Clark
4779e7739fSRob Clark	/* This divides ppvar_sys by 2, so voltage is variable */
4879e7739fSRob Clark	src_vph_pwr: src-vph-pwr-regulator {
4979e7739fSRob Clark		compatible = "regulator-fixed";
5079e7739fSRob Clark		regulator-name = "src_vph_pwr";
5179e7739fSRob Clark
5279e7739fSRob Clark		/* EC turns on with switchcap_on_l; always on for AP */
5379e7739fSRob Clark		regulator-always-on;
5479e7739fSRob Clark		regulator-boot-on;
5579e7739fSRob Clark
5679e7739fSRob Clark		vin-supply = <&ppvar_sys>;
5779e7739fSRob Clark	};
5879e7739fSRob Clark
5979e7739fSRob Clark	pp5000_a: pp5000-a-regulator {
6079e7739fSRob Clark		compatible = "regulator-fixed";
6179e7739fSRob Clark		regulator-name = "pp5000_a";
6279e7739fSRob Clark
6379e7739fSRob Clark		/* EC turns on with en_pp5000_a; always on for AP */
6479e7739fSRob Clark		regulator-always-on;
6579e7739fSRob Clark		regulator-boot-on;
6679e7739fSRob Clark		regulator-min-microvolt = <5000000>;
6779e7739fSRob Clark		regulator-max-microvolt = <5000000>;
6879e7739fSRob Clark
6979e7739fSRob Clark		vin-supply = <&ppvar_sys>;
7079e7739fSRob Clark	};
7179e7739fSRob Clark
7279e7739fSRob Clark	src_vreg_bob: src-vreg-bob-regulator {
7379e7739fSRob Clark		compatible = "regulator-fixed";
7479e7739fSRob Clark		regulator-name = "src_vreg_bob";
7579e7739fSRob Clark
7679e7739fSRob Clark		/* EC turns on with vbob_en; always on for AP */
7779e7739fSRob Clark		regulator-always-on;
7879e7739fSRob Clark		regulator-boot-on;
7979e7739fSRob Clark		regulator-min-microvolt = <3600000>;
8079e7739fSRob Clark		regulator-max-microvolt = <3600000>;
8179e7739fSRob Clark
8279e7739fSRob Clark		vin-supply = <&ppvar_sys>;
8379e7739fSRob Clark	};
8479e7739fSRob Clark
8579e7739fSRob Clark	pp3300_dx_edp: pp3300-dx-edp-regulator {
8679e7739fSRob Clark		compatible = "regulator-fixed";
8779e7739fSRob Clark		regulator-name = "pp3300_dx_edp";
8879e7739fSRob Clark
8979e7739fSRob Clark		regulator-min-microvolt = <3300000>;
9079e7739fSRob Clark		regulator-max-microvolt = <3300000>;
9179e7739fSRob Clark
9279e7739fSRob Clark		gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
9379e7739fSRob Clark		enable-active-high;
9479e7739fSRob Clark		pinctrl-names = "default";
9579e7739fSRob Clark		pinctrl-0 = <&en_pp3300_dx_edp>;
9679e7739fSRob Clark	};
9779e7739fSRob Clark
9879e7739fSRob Clark	/*
9979e7739fSRob Clark	 * Apparently RPMh does not provide support for PM8998 S4 because it
10079e7739fSRob Clark	 * is always-on; model it as a fixed regulator.
10179e7739fSRob Clark	 */
10279e7739fSRob Clark	src_pp1800_s4a: pm8998-smps4 {
10379e7739fSRob Clark		compatible = "regulator-fixed";
10479e7739fSRob Clark		regulator-name = "src_pp1800_s4a";
10579e7739fSRob Clark
10679e7739fSRob Clark		regulator-min-microvolt = <1800000>;
10779e7739fSRob Clark		regulator-max-microvolt = <1800000>;
10879e7739fSRob Clark
10979e7739fSRob Clark		regulator-always-on;
11079e7739fSRob Clark		regulator-boot-on;
11179e7739fSRob Clark
11279e7739fSRob Clark		vin-supply = <&src_vph_pwr>;
11379e7739fSRob Clark	};
11479e7739fSRob Clark
11579e7739fSRob Clark	/* BOARD-SPECIFIC TOP LEVEL NODES */
11679e7739fSRob Clark
11779e7739fSRob Clark	gpio-keys {
11879e7739fSRob Clark		compatible = "gpio-keys";
11979e7739fSRob Clark		pinctrl-names = "default";
12079e7739fSRob Clark		pinctrl-0 = <&pen_eject_odl>;
12179e7739fSRob Clark
122b08f5cbdSKrzysztof Kozlowski		switch-pen-insert {
12379e7739fSRob Clark			label = "Pen Insert";
12479e7739fSRob Clark			/* Insert = low, eject = high */
12579e7739fSRob Clark			gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
12679e7739fSRob Clark			linux,code = <SW_PEN_INSERTED>;
12779e7739fSRob Clark			linux,input-type = <EV_SW>;
12879e7739fSRob Clark			wakeup-source;
12979e7739fSRob Clark		};
13079e7739fSRob Clark	};
13179e7739fSRob Clark
13279e7739fSRob Clark	panel: panel {
13379e7739fSRob Clark		compatible = "innolux,p120zdg-bf1";
13479e7739fSRob Clark		power-supply = <&pp3300_dx_edp>;
13579e7739fSRob Clark		backlight = <&backlight>;
13679e7739fSRob Clark		no-hpd;
13779e7739fSRob Clark
13879e7739fSRob Clark		panel_in: port {
13979e7739fSRob Clark			panel_in_edp: endpoint {
14079e7739fSRob Clark				remote-endpoint = <&sn65dsi86_out>;
14179e7739fSRob Clark			};
14279e7739fSRob Clark		};
14379e7739fSRob Clark	};
14479e7739fSRob Clark};
14579e7739fSRob Clark
146197ae69dSDavid Heidelberg&cpufreq_hw {
147197ae69dSDavid Heidelberg	/delete-property/ interrupts-extended; /* reference to lmh_cluster[01] */
148197ae69dSDavid Heidelberg};
149197ae69dSDavid Heidelberg
150a1ade6caSAbel Vesa&psci {
151a5f01673SDavid Heidelberg	/delete-node/ power-domain-cpu0;
152a5f01673SDavid Heidelberg	/delete-node/ power-domain-cpu1;
153a5f01673SDavid Heidelberg	/delete-node/ power-domain-cpu2;
154a5f01673SDavid Heidelberg	/delete-node/ power-domain-cpu3;
155a5f01673SDavid Heidelberg	/delete-node/ power-domain-cpu4;
156a5f01673SDavid Heidelberg	/delete-node/ power-domain-cpu5;
157a5f01673SDavid Heidelberg	/delete-node/ power-domain-cpu6;
158a5f01673SDavid Heidelberg	/delete-node/ power-domain-cpu7;
159a5f01673SDavid Heidelberg	/delete-node/ power-domain-cluster;
160a1ade6caSAbel Vesa};
161a1ade6caSAbel Vesa
162a1ade6caSAbel Vesa&cpus {
163a1ade6caSAbel Vesa	/delete-node/ domain-idle-states;
164a1ade6caSAbel Vesa};
165a1ade6caSAbel Vesa
166a1ade6caSAbel Vesa&cpu_idle_states {
167*4c047c47SKrzysztof Kozlowski	little_cpu_sleep_0: cpu-sleep-0-0 {
168a1ade6caSAbel Vesa		compatible = "arm,idle-state";
169a1ade6caSAbel Vesa		idle-state-name = "little-power-down";
170a1ade6caSAbel Vesa		arm,psci-suspend-param = <0x40000003>;
171a1ade6caSAbel Vesa		entry-latency-us = <350>;
172a1ade6caSAbel Vesa		exit-latency-us = <461>;
173a1ade6caSAbel Vesa		min-residency-us = <1890>;
174a1ade6caSAbel Vesa		local-timer-stop;
175a1ade6caSAbel Vesa	};
176a1ade6caSAbel Vesa
177*4c047c47SKrzysztof Kozlowski	little_cpu_sleep_1: cpu-sleep-0-1 {
178a1ade6caSAbel Vesa		compatible = "arm,idle-state";
179a1ade6caSAbel Vesa		idle-state-name = "little-rail-power-down";
180a1ade6caSAbel Vesa		arm,psci-suspend-param = <0x40000004>;
181a1ade6caSAbel Vesa		entry-latency-us = <360>;
182a1ade6caSAbel Vesa		exit-latency-us = <531>;
183a1ade6caSAbel Vesa		min-residency-us = <3934>;
184a1ade6caSAbel Vesa		local-timer-stop;
185a1ade6caSAbel Vesa	};
186a1ade6caSAbel Vesa
187*4c047c47SKrzysztof Kozlowski	big_cpu_sleep_0: cpu-sleep-1-0 {
188a1ade6caSAbel Vesa		compatible = "arm,idle-state";
189a1ade6caSAbel Vesa		idle-state-name = "big-power-down";
190a1ade6caSAbel Vesa		arm,psci-suspend-param = <0x40000003>;
191a1ade6caSAbel Vesa		entry-latency-us = <264>;
192a1ade6caSAbel Vesa		exit-latency-us = <621>;
193a1ade6caSAbel Vesa		min-residency-us = <952>;
194a1ade6caSAbel Vesa		local-timer-stop;
195a1ade6caSAbel Vesa	};
196a1ade6caSAbel Vesa
197*4c047c47SKrzysztof Kozlowski	big_cpu_sleep_1: cpu-sleep-1-1 {
198a1ade6caSAbel Vesa		compatible = "arm,idle-state";
199a1ade6caSAbel Vesa		idle-state-name = "big-rail-power-down";
200a1ade6caSAbel Vesa		arm,psci-suspend-param = <0x40000004>;
201a1ade6caSAbel Vesa		entry-latency-us = <702>;
202a1ade6caSAbel Vesa		exit-latency-us = <1061>;
203a1ade6caSAbel Vesa		min-residency-us = <4488>;
204a1ade6caSAbel Vesa		local-timer-stop;
205a1ade6caSAbel Vesa	};
206a1ade6caSAbel Vesa
207*4c047c47SKrzysztof Kozlowski	cluster_sleep_0: cluster-sleep-0 {
208a1ade6caSAbel Vesa		compatible = "arm,idle-state";
209a1ade6caSAbel Vesa		idle-state-name = "cluster-power-down";
210a1ade6caSAbel Vesa		arm,psci-suspend-param = <0x400000F4>;
211a1ade6caSAbel Vesa		entry-latency-us = <3263>;
212a1ade6caSAbel Vesa		exit-latency-us = <6562>;
213a1ade6caSAbel Vesa		min-residency-us = <9987>;
214a1ade6caSAbel Vesa		local-timer-stop;
215a1ade6caSAbel Vesa	};
216a1ade6caSAbel Vesa};
217a1ade6caSAbel Vesa
218*4c047c47SKrzysztof Kozlowski&cpu0 {
219a1ade6caSAbel Vesa	/delete-property/ power-domains;
220a1ade6caSAbel Vesa	/delete-property/ power-domain-names;
221*4c047c47SKrzysztof Kozlowski	cpu-idle-states = <&little_cpu_sleep_0
222*4c047c47SKrzysztof Kozlowski			   &little_cpu_sleep_1
223*4c047c47SKrzysztof Kozlowski			   &cluster_sleep_0>;
224a1ade6caSAbel Vesa};
225a1ade6caSAbel Vesa
226*4c047c47SKrzysztof Kozlowski&cpu1 {
227a1ade6caSAbel Vesa	/delete-property/ power-domains;
228a1ade6caSAbel Vesa	/delete-property/ power-domain-names;
229*4c047c47SKrzysztof Kozlowski	cpu-idle-states = <&little_cpu_sleep_0
230*4c047c47SKrzysztof Kozlowski			   &little_cpu_sleep_1
231*4c047c47SKrzysztof Kozlowski			   &cluster_sleep_0>;
232a1ade6caSAbel Vesa};
233a1ade6caSAbel Vesa
234*4c047c47SKrzysztof Kozlowski&cpu2 {
235a1ade6caSAbel Vesa	/delete-property/ power-domains;
236a1ade6caSAbel Vesa	/delete-property/ power-domain-names;
237*4c047c47SKrzysztof Kozlowski	cpu-idle-states = <&little_cpu_sleep_0
238*4c047c47SKrzysztof Kozlowski			   &little_cpu_sleep_1
239*4c047c47SKrzysztof Kozlowski			   &cluster_sleep_0>;
240a1ade6caSAbel Vesa};
241a1ade6caSAbel Vesa
242*4c047c47SKrzysztof Kozlowski&cpu3 {
243a1ade6caSAbel Vesa	/delete-property/ power-domains;
244a1ade6caSAbel Vesa	/delete-property/ power-domain-names;
245*4c047c47SKrzysztof Kozlowski	cpu-idle-states = <&little_cpu_sleep_0
246*4c047c47SKrzysztof Kozlowski			   &little_cpu_sleep_1
247*4c047c47SKrzysztof Kozlowski			   &cluster_sleep_0>;
248a1ade6caSAbel Vesa};
249a1ade6caSAbel Vesa
250*4c047c47SKrzysztof Kozlowski&cpu4 {
251a1ade6caSAbel Vesa	/delete-property/ power-domains;
252a1ade6caSAbel Vesa	/delete-property/ power-domain-names;
253*4c047c47SKrzysztof Kozlowski	cpu-idle-states = <&big_cpu_sleep_0
254*4c047c47SKrzysztof Kozlowski			   &big_cpu_sleep_1
255*4c047c47SKrzysztof Kozlowski			   &cluster_sleep_0>;
256a1ade6caSAbel Vesa};
257a1ade6caSAbel Vesa
258*4c047c47SKrzysztof Kozlowski&cpu5 {
259a1ade6caSAbel Vesa	/delete-property/ power-domains;
260a1ade6caSAbel Vesa	/delete-property/ power-domain-names;
261*4c047c47SKrzysztof Kozlowski	cpu-idle-states = <&big_cpu_sleep_0
262*4c047c47SKrzysztof Kozlowski			   &big_cpu_sleep_1
263*4c047c47SKrzysztof Kozlowski			   &cluster_sleep_0>;
264a1ade6caSAbel Vesa};
265a1ade6caSAbel Vesa
266*4c047c47SKrzysztof Kozlowski&cpu6 {
267a1ade6caSAbel Vesa	/delete-property/ power-domains;
268a1ade6caSAbel Vesa	/delete-property/ power-domain-names;
269*4c047c47SKrzysztof Kozlowski	cpu-idle-states = <&big_cpu_sleep_0
270*4c047c47SKrzysztof Kozlowski			   &big_cpu_sleep_1
271*4c047c47SKrzysztof Kozlowski			   &cluster_sleep_0>;
272a1ade6caSAbel Vesa};
273a1ade6caSAbel Vesa
274*4c047c47SKrzysztof Kozlowski&cpu7 {
275a1ade6caSAbel Vesa	/delete-property/ power-domains;
276a1ade6caSAbel Vesa	/delete-property/ power-domain-names;
277*4c047c47SKrzysztof Kozlowski	cpu-idle-states = <&big_cpu_sleep_0
278*4c047c47SKrzysztof Kozlowski			   &big_cpu_sleep_1
279*4c047c47SKrzysztof Kozlowski			   &cluster_sleep_0>;
280a1ade6caSAbel Vesa};
281a1ade6caSAbel Vesa
282197ae69dSDavid Heidelberg&lmh_cluster0 {
283197ae69dSDavid Heidelberg	status = "disabled";
284197ae69dSDavid Heidelberg};
285197ae69dSDavid Heidelberg
286197ae69dSDavid Heidelberg&lmh_cluster1 {
287197ae69dSDavid Heidelberg	status = "disabled";
288197ae69dSDavid Heidelberg};
289197ae69dSDavid Heidelberg
29079e7739fSRob Clark/*
29179e7739fSRob Clark * Reserved memory changes
29279e7739fSRob Clark *
29379e7739fSRob Clark * Putting this all together (out of order with the rest of the file) to keep
29479e7739fSRob Clark * all modifications to the memory map (from sdm845.dtsi) in one place.
29579e7739fSRob Clark */
29679e7739fSRob Clark
29779e7739fSRob Clark/*
29879e7739fSRob Clark * Our mpss_region is 8MB bigger than the default one and that conflicts
29979e7739fSRob Clark * with venus_mem and cdsp_mem.
30079e7739fSRob Clark *
30179e7739fSRob Clark * For venus_mem we'll delete and re-create at a different address.
30279e7739fSRob Clark *
30379e7739fSRob Clark * cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but
30479e7739fSRob Clark * that also means we need to delete cdsp_pas.
30579e7739fSRob Clark */
30679e7739fSRob Clark/delete-node/ &venus_mem;
30779e7739fSRob Clark/delete-node/ &cdsp_mem;
30879e7739fSRob Clark/delete-node/ &cdsp_pas;
30943b0a4b4SRob Clark/delete-node/ &gpu_mem;
31079e7739fSRob Clark
31179e7739fSRob Clark/* Increase the size from 120 MB to 128 MB */
31279e7739fSRob Clark&mpss_region {
31379e7739fSRob Clark	reg = <0 0x8e000000 0 0x8000000>;
31479e7739fSRob Clark};
31579e7739fSRob Clark
31679e7739fSRob Clark/* Increase the size from 2MB to 8MB */
31779e7739fSRob Clark&rmtfs_mem {
31879e7739fSRob Clark	reg = <0 0x88f00000 0 0x800000>;
31979e7739fSRob Clark};
32079e7739fSRob Clark
32179e7739fSRob Clark/ {
32279e7739fSRob Clark	reserved-memory {
32379e7739fSRob Clark		venus_mem: memory@96000000 {
32479e7739fSRob Clark			reg = <0 0x96000000 0 0x500000>;
32579e7739fSRob Clark			no-map;
32679e7739fSRob Clark		};
32779e7739fSRob Clark	};
32879e7739fSRob Clark};
32979e7739fSRob Clark
33079e7739fSRob Clark&qspi {
33179e7739fSRob Clark	status = "okay";
3329f5cdeb7SDouglas Anderson	pinctrl-names = "default", "sleep";
3339f5cdeb7SDouglas Anderson	pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, <&qspi_data1>;
3349f5cdeb7SDouglas Anderson	pinctrl-1 = <&qspi_sleep>;
33579e7739fSRob Clark
33679e7739fSRob Clark	flash@0 {
33779e7739fSRob Clark		compatible = "jedec,spi-nor";
33879e7739fSRob Clark		reg = <0>;
33979e7739fSRob Clark
34079e7739fSRob Clark		/*
34179e7739fSRob Clark		 * In theory chip supports up to 104 MHz and controller up
34279e7739fSRob Clark		 * to 80 MHz, but above 25 MHz wasn't reliable so we'll use
34379e7739fSRob Clark		 * that for now.  b:117440651
34479e7739fSRob Clark		 */
34579e7739fSRob Clark		spi-max-frequency = <25000000>;
34679e7739fSRob Clark		spi-tx-bus-width = <2>;
34779e7739fSRob Clark		spi-rx-bus-width = <2>;
34879e7739fSRob Clark	};
34979e7739fSRob Clark};
35079e7739fSRob Clark
35179e7739fSRob Clark
35279e7739fSRob Clark&apps_rsc {
353a5f01673SDavid Heidelberg	/delete-property/ power-domains;
354a5f01673SDavid Heidelberg
35586dd19bbSKrzysztof Kozlowski	regulators-0 {
35679e7739fSRob Clark		compatible = "qcom,pm8998-rpmh-regulators";
35779e7739fSRob Clark		qcom,pmic-id = "a";
35879e7739fSRob Clark
35979e7739fSRob Clark		vdd-s1-supply = <&src_vph_pwr>;
36079e7739fSRob Clark		vdd-s2-supply = <&src_vph_pwr>;
36179e7739fSRob Clark		vdd-s3-supply = <&src_vph_pwr>;
36279e7739fSRob Clark		vdd-s4-supply = <&src_vph_pwr>;
36379e7739fSRob Clark		vdd-s5-supply = <&src_vph_pwr>;
36479e7739fSRob Clark		vdd-s6-supply = <&src_vph_pwr>;
36579e7739fSRob Clark		vdd-s7-supply = <&src_vph_pwr>;
36679e7739fSRob Clark		vdd-s8-supply = <&src_vph_pwr>;
36779e7739fSRob Clark		vdd-s9-supply = <&src_vph_pwr>;
36879e7739fSRob Clark		vdd-s10-supply = <&src_vph_pwr>;
36979e7739fSRob Clark		vdd-s11-supply = <&src_vph_pwr>;
37079e7739fSRob Clark		vdd-s12-supply = <&src_vph_pwr>;
37179e7739fSRob Clark		vdd-s13-supply = <&src_vph_pwr>;
37279e7739fSRob Clark		vdd-l1-l27-supply = <&src_pp1025_s7a>;
37379e7739fSRob Clark		vdd-l2-l8-l17-supply = <&src_pp1350_s3a>;
37479e7739fSRob Clark		vdd-l3-l11-supply = <&src_pp1025_s7a>;
37579e7739fSRob Clark		vdd-l4-l5-supply = <&src_pp1025_s7a>;
37679e7739fSRob Clark		vdd-l6-supply = <&src_vph_pwr>;
37779e7739fSRob Clark		vdd-l7-l12-l14-l15-supply = <&src_pp2040_s5a>;
37879e7739fSRob Clark		vdd-l9-supply = <&src_pp2040_s5a>;
37979e7739fSRob Clark		vdd-l10-l23-l25-supply = <&src_vreg_bob>;
38079e7739fSRob Clark		vdd-l13-l19-l21-supply = <&src_vreg_bob>;
38179e7739fSRob Clark		vdd-l16-l28-supply = <&src_vreg_bob>;
38279e7739fSRob Clark		vdd-l18-l22-supply = <&src_vreg_bob>;
38379e7739fSRob Clark		vdd-l20-l24-supply = <&src_vreg_bob>;
38479e7739fSRob Clark		vdd-l26-supply = <&src_pp1350_s3a>;
38579e7739fSRob Clark		vin-lvs-1-2-supply = <&src_pp1800_s4a>;
38679e7739fSRob Clark
38779e7739fSRob Clark		src_pp1125_s2a: smps2 {
38879e7739fSRob Clark			regulator-min-microvolt = <1100000>;
38979e7739fSRob Clark			regulator-max-microvolt = <1100000>;
39079e7739fSRob Clark		};
39179e7739fSRob Clark
39279e7739fSRob Clark		src_pp1350_s3a: smps3 {
39379e7739fSRob Clark			regulator-min-microvolt = <1352000>;
39479e7739fSRob Clark			regulator-max-microvolt = <1352000>;
39579e7739fSRob Clark		};
39679e7739fSRob Clark
39779e7739fSRob Clark		src_pp2040_s5a: smps5 {
39879e7739fSRob Clark			regulator-min-microvolt = <1904000>;
39979e7739fSRob Clark			regulator-max-microvolt = <2040000>;
40079e7739fSRob Clark		};
40179e7739fSRob Clark
40279e7739fSRob Clark		src_pp1025_s7a: smps7 {
40379e7739fSRob Clark			regulator-min-microvolt = <900000>;
40479e7739fSRob Clark			regulator-max-microvolt = <1028000>;
40579e7739fSRob Clark		};
40679e7739fSRob Clark
40779e7739fSRob Clark		vdd_qusb_hs0:
40879e7739fSRob Clark		vdda_hp_pcie_core:
40979e7739fSRob Clark		vdda_mipi_csi0_0p9:
41079e7739fSRob Clark		vdda_mipi_csi1_0p9:
41179e7739fSRob Clark		vdda_mipi_csi2_0p9:
41279e7739fSRob Clark		vdda_mipi_dsi0_pll:
41379e7739fSRob Clark		vdda_mipi_dsi1_pll:
41479e7739fSRob Clark		vdda_qlink_lv:
41579e7739fSRob Clark		vdda_qlink_lv_ck:
41679e7739fSRob Clark		vdda_qrefs_0p875:
41779e7739fSRob Clark		vdda_pcie_core:
41879e7739fSRob Clark		vdda_pll_cc_ebi01:
41979e7739fSRob Clark		vdda_pll_cc_ebi23:
42079e7739fSRob Clark		vdda_sp_sensor:
42179e7739fSRob Clark		vdda_ufs1_core:
42279e7739fSRob Clark		vdda_ufs2_core:
42379e7739fSRob Clark		vdda_usb1_ss_core:
42479e7739fSRob Clark		vdda_usb2_ss_core:
42579e7739fSRob Clark		src_pp875_l1a: ldo1 {
42679e7739fSRob Clark			regulator-min-microvolt = <880000>;
42779e7739fSRob Clark			regulator-max-microvolt = <880000>;
42879e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
42979e7739fSRob Clark		};
43079e7739fSRob Clark
43179e7739fSRob Clark		vddpx_10:
43279e7739fSRob Clark		src_pp1200_l2a: ldo2 {
43379e7739fSRob Clark			regulator-min-microvolt = <1200000>;
43479e7739fSRob Clark			regulator-max-microvolt = <1200000>;
43579e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
43679e7739fSRob Clark
43779e7739fSRob Clark			/* TODO: why??? */
43879e7739fSRob Clark			regulator-always-on;
43979e7739fSRob Clark		};
44079e7739fSRob Clark
44179e7739fSRob Clark		pp1000_l3a_sdr845: ldo3 {
44279e7739fSRob Clark			regulator-min-microvolt = <1000000>;
44379e7739fSRob Clark			regulator-max-microvolt = <1000000>;
44479e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
44579e7739fSRob Clark		};
44679e7739fSRob Clark
44779e7739fSRob Clark		vdd_wcss_cx:
44879e7739fSRob Clark		vdd_wcss_mx:
44979e7739fSRob Clark		vdda_wcss_pll:
45079e7739fSRob Clark		src_pp800_l5a: ldo5 {
45179e7739fSRob Clark			regulator-min-microvolt = <800000>;
45279e7739fSRob Clark			regulator-max-microvolt = <800000>;
45379e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
45479e7739fSRob Clark		};
45579e7739fSRob Clark
45679e7739fSRob Clark		vddpx_13:
45779e7739fSRob Clark		src_pp1800_l6a: ldo6 {
45879e7739fSRob Clark			regulator-min-microvolt = <1856000>;
45979e7739fSRob Clark			regulator-max-microvolt = <1856000>;
46079e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
46179e7739fSRob Clark		};
46279e7739fSRob Clark
46379e7739fSRob Clark		pp1800_l7a_wcn3990: ldo7 {
46479e7739fSRob Clark			regulator-min-microvolt = <1800000>;
46579e7739fSRob Clark			regulator-max-microvolt = <1800000>;
46679e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
46779e7739fSRob Clark		};
46879e7739fSRob Clark
46979e7739fSRob Clark		src_pp1200_l8a: ldo8 {
47079e7739fSRob Clark			regulator-min-microvolt = <1200000>;
47179e7739fSRob Clark			regulator-max-microvolt = <1248000>;
47279e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
47379e7739fSRob Clark		};
47479e7739fSRob Clark
47579e7739fSRob Clark		pp1800_dx_pen:
47679e7739fSRob Clark		src_pp1800_l9a: ldo9 {
47779e7739fSRob Clark			regulator-min-microvolt = <1800000>;
47879e7739fSRob Clark			regulator-max-microvolt = <1800000>;
47979e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
48079e7739fSRob Clark		};
48179e7739fSRob Clark
48279e7739fSRob Clark		src_pp1800_l10a: ldo10 {
48379e7739fSRob Clark			regulator-min-microvolt = <1800000>;
48479e7739fSRob Clark			regulator-max-microvolt = <1800000>;
48579e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
48679e7739fSRob Clark		};
48779e7739fSRob Clark
48879e7739fSRob Clark		pp1000_l11a_sdr845: ldo11 {
48979e7739fSRob Clark			regulator-min-microvolt = <1000000>;
49079e7739fSRob Clark			regulator-max-microvolt = <1048000>;
49179e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
49279e7739fSRob Clark		};
49379e7739fSRob Clark
49479e7739fSRob Clark		vdd_qfprom:
49579e7739fSRob Clark		vdd_qfprom_sp:
49679e7739fSRob Clark		vdda_apc1_cs_1p8:
49779e7739fSRob Clark		vdda_gfx_cs_1p8:
49879e7739fSRob Clark		vdda_qrefs_1p8:
49979e7739fSRob Clark		vdda_qusb_hs0_1p8:
50079e7739fSRob Clark		vddpx_11:
50179e7739fSRob Clark		src_pp1800_l12a: ldo12 {
50279e7739fSRob Clark			regulator-min-microvolt = <1800000>;
50379e7739fSRob Clark			regulator-max-microvolt = <1800000>;
50479e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
50579e7739fSRob Clark		};
50679e7739fSRob Clark
50779e7739fSRob Clark		vddpx_2:
50879e7739fSRob Clark		src_pp2950_l13a: ldo13 {
50979e7739fSRob Clark			regulator-min-microvolt = <1800000>;
51079e7739fSRob Clark			regulator-max-microvolt = <2960000>;
51179e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
51279e7739fSRob Clark		};
51379e7739fSRob Clark
51479e7739fSRob Clark		src_pp1800_l14a: ldo14 {
51579e7739fSRob Clark			regulator-min-microvolt = <1800000>;
51679e7739fSRob Clark			regulator-max-microvolt = <1800000>;
51779e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
51879e7739fSRob Clark		};
51979e7739fSRob Clark
52079e7739fSRob Clark		src_pp1800_l15a: ldo15 {
52179e7739fSRob Clark			regulator-min-microvolt = <1800000>;
52279e7739fSRob Clark			regulator-max-microvolt = <1800000>;
52379e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
52479e7739fSRob Clark		};
52579e7739fSRob Clark
52679e7739fSRob Clark		pp2700_l16a: ldo16 {
52779e7739fSRob Clark			regulator-min-microvolt = <2704000>;
52879e7739fSRob Clark			regulator-max-microvolt = <2704000>;
52979e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
53079e7739fSRob Clark		};
53179e7739fSRob Clark
53279e7739fSRob Clark		src_pp1300_l17a: ldo17 {
53379e7739fSRob Clark			regulator-min-microvolt = <1304000>;
53479e7739fSRob Clark			regulator-max-microvolt = <1304000>;
53579e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
53679e7739fSRob Clark		};
53779e7739fSRob Clark
53879e7739fSRob Clark		pp2700_l18a: ldo18 {
53979e7739fSRob Clark			regulator-min-microvolt = <2704000>;
54079e7739fSRob Clark			regulator-max-microvolt = <2960000>;
54179e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
54279e7739fSRob Clark		};
54379e7739fSRob Clark
54479e7739fSRob Clark		/*
54579e7739fSRob Clark		 * NOTE: this rail should have been called
54679e7739fSRob Clark		 * src_pp3300_l19a in the schematic
54779e7739fSRob Clark		 */
54879e7739fSRob Clark		src_pp3000_l19a: ldo19 {
54979e7739fSRob Clark			regulator-min-microvolt = <3304000>;
55079e7739fSRob Clark			regulator-max-microvolt = <3304000>;
55179e7739fSRob Clark
55279e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
55379e7739fSRob Clark		};
55479e7739fSRob Clark
55579e7739fSRob Clark		src_pp2950_l20a: ldo20 {
55679e7739fSRob Clark			regulator-min-microvolt = <2704000>;
55779e7739fSRob Clark			regulator-max-microvolt = <2960000>;
55879e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
55979e7739fSRob Clark		};
56079e7739fSRob Clark
56179e7739fSRob Clark		src_pp2950_l21a: ldo21 {
56279e7739fSRob Clark			regulator-min-microvolt = <2704000>;
56379e7739fSRob Clark			regulator-max-microvolt = <2960000>;
56479e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
56579e7739fSRob Clark		};
56679e7739fSRob Clark
56779e7739fSRob Clark		pp3300_hub:
56879e7739fSRob Clark		src_pp3300_l22a: ldo22 {
56979e7739fSRob Clark			regulator-min-microvolt = <3304000>;
57079e7739fSRob Clark			regulator-max-microvolt = <3304000>;
57179e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
57279e7739fSRob Clark			/*
57379e7739fSRob Clark			 * HACK: Should add a usb hub node and driver
57479e7739fSRob Clark			 * to turn this on and off at suspend/resume time
57579e7739fSRob Clark			 */
57679e7739fSRob Clark			regulator-boot-on;
57779e7739fSRob Clark			regulator-always-on;
57879e7739fSRob Clark		};
57979e7739fSRob Clark
58079e7739fSRob Clark		pp3300_l23a_ch1_wcn3990: ldo23 {
58179e7739fSRob Clark			regulator-min-microvolt = <3000000>;
58279e7739fSRob Clark			regulator-max-microvolt = <3312000>;
58379e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
58479e7739fSRob Clark		};
58579e7739fSRob Clark
58679e7739fSRob Clark		vdda_qusb_hs0_3p1:
58779e7739fSRob Clark		src_pp3075_l24a: ldo24 {
58879e7739fSRob Clark			regulator-min-microvolt = <3088000>;
58979e7739fSRob Clark			regulator-max-microvolt = <3088000>;
59079e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
59179e7739fSRob Clark		};
59279e7739fSRob Clark
59379e7739fSRob Clark		pp3300_l25a_ch0_wcn3990: ldo25 {
59479e7739fSRob Clark			regulator-min-microvolt = <3304000>;
59579e7739fSRob Clark			regulator-max-microvolt = <3304000>;
59679e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
59779e7739fSRob Clark		};
59879e7739fSRob Clark
59979e7739fSRob Clark		pp1200_hub:
60079e7739fSRob Clark		vdda_hp_pcie_1p2:
60179e7739fSRob Clark		vdda_hv_ebi0:
60279e7739fSRob Clark		vdda_hv_ebi1:
60379e7739fSRob Clark		vdda_hv_ebi2:
60479e7739fSRob Clark		vdda_hv_ebi3:
60579e7739fSRob Clark		vdda_mipi_csi_1p25:
60679e7739fSRob Clark		vdda_mipi_dsi0_1p2:
60779e7739fSRob Clark		vdda_mipi_dsi1_1p2:
60879e7739fSRob Clark		vdda_pcie_1p2:
60979e7739fSRob Clark		vdda_ufs1_1p2:
61079e7739fSRob Clark		vdda_ufs2_1p2:
61179e7739fSRob Clark		vdda_usb1_ss_1p2:
61279e7739fSRob Clark		vdda_usb2_ss_1p2:
61379e7739fSRob Clark		src_pp1200_l26a: ldo26 {
61479e7739fSRob Clark			regulator-min-microvolt = <1200000>;
61579e7739fSRob Clark			regulator-max-microvolt = <1200000>;
61679e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
61779e7739fSRob Clark		};
61879e7739fSRob Clark
61979e7739fSRob Clark		pp3300_dx_pen:
62079e7739fSRob Clark		src_pp3300_l28a: ldo28 {
62179e7739fSRob Clark			regulator-min-microvolt = <3304000>;
62279e7739fSRob Clark			regulator-max-microvolt = <3304000>;
62379e7739fSRob Clark			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
62479e7739fSRob Clark		};
62579e7739fSRob Clark
62679e7739fSRob Clark		src_pp1800_lvs1: lvs1 {
62779e7739fSRob Clark			regulator-min-microvolt = <1800000>;
62879e7739fSRob Clark			regulator-max-microvolt = <1800000>;
62979e7739fSRob Clark		};
63079e7739fSRob Clark
63179e7739fSRob Clark		src_pp1800_lvs2: lvs2 {
63279e7739fSRob Clark			regulator-min-microvolt = <1800000>;
63379e7739fSRob Clark			regulator-max-microvolt = <1800000>;
63479e7739fSRob Clark		};
63579e7739fSRob Clark	};
63679e7739fSRob Clark
63786dd19bbSKrzysztof Kozlowski	regulators-1 {
63879e7739fSRob Clark		compatible = "qcom,pm8005-rpmh-regulators";
63979e7739fSRob Clark		qcom,pmic-id = "c";
64079e7739fSRob Clark
64179e7739fSRob Clark		vdd-s1-supply = <&src_vph_pwr>;
64279e7739fSRob Clark		vdd-s2-supply = <&src_vph_pwr>;
64379e7739fSRob Clark		vdd-s3-supply = <&src_vph_pwr>;
64479e7739fSRob Clark		vdd-s4-supply = <&src_vph_pwr>;
64579e7739fSRob Clark
64679e7739fSRob Clark		src_pp600_s3c: smps3 {
64779e7739fSRob Clark			regulator-min-microvolt = <600000>;
64879e7739fSRob Clark			regulator-max-microvolt = <600000>;
64979e7739fSRob Clark		};
65079e7739fSRob Clark	};
65179e7739fSRob Clark};
65279e7739fSRob Clark
65379e7739fSRob Clarkedp_brij_i2c: &i2c3 {
65479e7739fSRob Clark	status = "okay";
65579e7739fSRob Clark	clock-frequency = <400000>;
65679e7739fSRob Clark
65779e7739fSRob Clark	sn65dsi86_bridge: bridge@2d {
65879e7739fSRob Clark		compatible = "ti,sn65dsi86";
65979e7739fSRob Clark		reg = <0x2d>;
66079e7739fSRob Clark		pinctrl-names = "default";
66179e7739fSRob Clark		pinctrl-0 = <&edp_brij_en &edp_brij_irq>;
66279e7739fSRob Clark
66379e7739fSRob Clark		interrupt-parent = <&tlmm>;
66479e7739fSRob Clark		interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
66579e7739fSRob Clark
66679e7739fSRob Clark		enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
66779e7739fSRob Clark
66879e7739fSRob Clark		vpll-supply = <&src_pp1800_s4a>;
66979e7739fSRob Clark		vccio-supply = <&src_pp1800_s4a>;
67079e7739fSRob Clark		vcca-supply = <&src_pp1200_l2a>;
67179e7739fSRob Clark		vcc-supply = <&src_pp1200_l2a>;
67279e7739fSRob Clark
67379e7739fSRob Clark		clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
67479e7739fSRob Clark		clock-names = "refclk";
67579e7739fSRob Clark
6760d1ce0d1SDouglas Anderson		no-hpd;
6770d1ce0d1SDouglas Anderson
67879e7739fSRob Clark		ports {
67979e7739fSRob Clark			#address-cells = <1>;
68079e7739fSRob Clark			#size-cells = <0>;
68179e7739fSRob Clark
68279e7739fSRob Clark			port@0 {
68379e7739fSRob Clark				reg = <0>;
68479e7739fSRob Clark				sn65dsi86_in: endpoint {
6858fe25ba3SDmitry Baryshkov					remote-endpoint = <&mdss_dsi0_out>;
68679e7739fSRob Clark				};
68779e7739fSRob Clark			};
68879e7739fSRob Clark
68979e7739fSRob Clark			port@1 {
69079e7739fSRob Clark				reg = <1>;
69179e7739fSRob Clark				sn65dsi86_out: endpoint {
69279e7739fSRob Clark					remote-endpoint = <&panel_in_edp>;
69379e7739fSRob Clark				};
69479e7739fSRob Clark			};
69579e7739fSRob Clark		};
69679e7739fSRob Clark	};
69779e7739fSRob Clark};
69879e7739fSRob Clark
69979e7739fSRob Clarkap_pen_1v8: &i2c11 {
70079e7739fSRob Clark	status = "okay";
70179e7739fSRob Clark	clock-frequency = <400000>;
70279e7739fSRob Clark
70379e7739fSRob Clark	digitizer@9 {
70479e7739fSRob Clark		compatible = "wacom,w9013", "hid-over-i2c";
70579e7739fSRob Clark		reg = <0x9>;
70679e7739fSRob Clark		pinctrl-names = "default";
70779e7739fSRob Clark		pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
70879e7739fSRob Clark
70979e7739fSRob Clark		vdd-supply = <&pp3300_dx_pen>;
71079e7739fSRob Clark		vddl-supply = <&pp1800_dx_pen>;
71179e7739fSRob Clark		post-power-on-delay-ms = <100>;
71279e7739fSRob Clark
71379e7739fSRob Clark		interrupt-parent = <&tlmm>;
71479e7739fSRob Clark		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
71579e7739fSRob Clark
71679e7739fSRob Clark		hid-descr-addr = <0x1>;
71779e7739fSRob Clark	};
71879e7739fSRob Clark};
71979e7739fSRob Clark
72079e7739fSRob Clarkamp_i2c: &i2c12 {
72179e7739fSRob Clark	status = "okay";
72279e7739fSRob Clark	clock-frequency = <400000>;
72379e7739fSRob Clark};
72479e7739fSRob Clark
72579e7739fSRob Clarkap_ts_i2c: &i2c14 {
72679e7739fSRob Clark	status = "okay";
72779e7739fSRob Clark	clock-frequency = <400000>;
72879e7739fSRob Clark
72979e7739fSRob Clark	touchscreen@10 {
73079e7739fSRob Clark		compatible = "elan,ekth3500";
73179e7739fSRob Clark		reg = <0x10>;
73279e7739fSRob Clark		pinctrl-names = "default";
73379e7739fSRob Clark		pinctrl-0 = <&ts_int_l &ts_reset_l>;
73479e7739fSRob Clark
73579e7739fSRob Clark		interrupt-parent = <&tlmm>;
73679e7739fSRob Clark		interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
73779e7739fSRob Clark
73879e7739fSRob Clark		vcc33-supply = <&src_pp3300_l28a>;
73979e7739fSRob Clark
74079e7739fSRob Clark		reset-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
74179e7739fSRob Clark	};
74279e7739fSRob Clark};
74379e7739fSRob Clark
7447f761609SKonrad Dybcio&gpu {
7457f761609SKonrad Dybcio	status = "okay";
7467f761609SKonrad Dybcio};
7477f761609SKonrad Dybcio
748392a5855SAlex Elder&ipa {
749a9a9e857SAlex Elder	qcom,gsi-loader = "modem";
750392a5855SAlex Elder	status = "okay";
751392a5855SAlex Elder};
752392a5855SAlex Elder
75379e7739fSRob Clark&lpasscc {
75479e7739fSRob Clark	status = "okay";
75579e7739fSRob Clark};
75679e7739fSRob Clark
75779e7739fSRob Clark&mdss {
75879e7739fSRob Clark	status = "okay";
75979e7739fSRob Clark};
76079e7739fSRob Clark
7618fe25ba3SDmitry Baryshkov&mdss_dsi0 {
7628fe25ba3SDmitry Baryshkov	status = "okay";
7638fe25ba3SDmitry Baryshkov	vdda-supply = <&vdda_mipi_dsi0_1p2>;
7648fe25ba3SDmitry Baryshkov
7658fe25ba3SDmitry Baryshkov	ports {
7668fe25ba3SDmitry Baryshkov		port@1 {
7678fe25ba3SDmitry Baryshkov			endpoint {
7688fe25ba3SDmitry Baryshkov				remote-endpoint = <&sn65dsi86_in>;
7698fe25ba3SDmitry Baryshkov				data-lanes = <0 1 2 3>;
7708fe25ba3SDmitry Baryshkov			};
7718fe25ba3SDmitry Baryshkov		};
7728fe25ba3SDmitry Baryshkov	};
7738fe25ba3SDmitry Baryshkov};
7748fe25ba3SDmitry Baryshkov
7758fe25ba3SDmitry Baryshkov&mdss_dsi0_phy {
7768fe25ba3SDmitry Baryshkov	status = "okay";
7778fe25ba3SDmitry Baryshkov	vdds-supply = <&vdda_mipi_dsi0_pll>;
7788fe25ba3SDmitry Baryshkov};
7798fe25ba3SDmitry Baryshkov
7807e5258b0SJordan Crouse/*
7817e5258b0SJordan Crouse * Cheza fw does not properly program the GPU aperture to allow the
7827e5258b0SJordan Crouse * GPU to update the SMMU pagetables for context switches.  Work
7837e5258b0SJordan Crouse * around this by dropping the "qcom,adreno-smmu" compat string.
7847e5258b0SJordan Crouse */
7857e5258b0SJordan Crouse&adreno_smmu {
7867e5258b0SJordan Crouse	compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
7877e5258b0SJordan Crouse};
7887e5258b0SJordan Crouse
78968aee4afSSibi Sankar&mss_pil {
7907f761609SKonrad Dybcio	status = "okay";
7917f761609SKonrad Dybcio
79208257610SSibi Sankar	iommus = <&apps_smmu 0x781 0x0>,
79368aee4afSSibi Sankar		 <&apps_smmu 0x724 0x3>;
79468aee4afSSibi Sankar};
79568aee4afSSibi Sankar
79631a233a5SStephen Boyd&pm8998_pwrkey {
79731a233a5SStephen Boyd	status = "disabled";
79831a233a5SStephen Boyd};
79931a233a5SStephen Boyd
80079e7739fSRob Clark&qupv3_id_0 {
80179e7739fSRob Clark	status = "okay";
8024785cff7SStephen Boyd	iommus = <&apps_smmu 0x0 0x3>;
80379e7739fSRob Clark};
80479e7739fSRob Clark
80579e7739fSRob Clark&qupv3_id_1 {
80679e7739fSRob Clark	status = "okay";
8074785cff7SStephen Boyd	iommus = <&apps_smmu 0x6c0 0x3>;
80879e7739fSRob Clark};
80979e7739fSRob Clark
81079e7739fSRob Clark&sdhc_2 {
81179e7739fSRob Clark	status = "okay";
81279e7739fSRob Clark
81379e7739fSRob Clark	pinctrl-names = "default";
81479e7739fSRob Clark	pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_cd_odl>;
81579e7739fSRob Clark
81679e7739fSRob Clark	vmmc-supply = <&src_pp2950_l21a>;
81779e7739fSRob Clark	vqmmc-supply = <&vddpx_2>;
81879e7739fSRob Clark
81979e7739fSRob Clark	cd-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
82079e7739fSRob Clark};
82179e7739fSRob Clark
82279e7739fSRob Clark&spi0 {
82379e7739fSRob Clark	status = "okay";
82479e7739fSRob Clark};
82579e7739fSRob Clark
82639523c56SStephen Boyd&spi5 {
82739523c56SStephen Boyd	status = "okay";
82839523c56SStephen Boyd
82939523c56SStephen Boyd	tpm@0 {
83039523c56SStephen Boyd		compatible = "google,cr50";
83139523c56SStephen Boyd		reg = <0>;
83239523c56SStephen Boyd		pinctrl-names = "default";
83339523c56SStephen Boyd		pinctrl-0 = <&h1_ap_int_odl>;
83439523c56SStephen Boyd		spi-max-frequency = <800000>;
83539523c56SStephen Boyd		interrupt-parent = <&tlmm>;
83639523c56SStephen Boyd		interrupts = <129 IRQ_TYPE_EDGE_RISING>;
83739523c56SStephen Boyd	};
83839523c56SStephen Boyd};
83939523c56SStephen Boyd
84079e7739fSRob Clark&spi10 {
84179e7739fSRob Clark	status = "okay";
84279e7739fSRob Clark
84379e7739fSRob Clark	cros_ec: ec@0 {
84479e7739fSRob Clark		compatible = "google,cros-ec-spi";
84579e7739fSRob Clark		reg = <0>;
84679e7739fSRob Clark		interrupt-parent = <&tlmm>;
84779e7739fSRob Clark		interrupts = <122 IRQ_TYPE_LEVEL_LOW>;
84879e7739fSRob Clark		pinctrl-names = "default";
84979e7739fSRob Clark		pinctrl-0 = <&ec_ap_int_l>;
85079e7739fSRob Clark		spi-max-frequency = <3000000>;
851a7baa25bSMark Hasemeyer		wakeup-source;
85279e7739fSRob Clark
8531e49defbSKrzysztof Kozlowski		cros_ec_pwm: pwm {
85479e7739fSRob Clark			compatible = "google,cros-ec-pwm";
85579e7739fSRob Clark			#pwm-cells = <1>;
85679e7739fSRob Clark		};
85779e7739fSRob Clark
85879e7739fSRob Clark		i2c_tunnel: i2c-tunnel {
85979e7739fSRob Clark			compatible = "google,cros-ec-i2c-tunnel";
86079e7739fSRob Clark			google,remote-bus = <0>;
86179e7739fSRob Clark			#address-cells = <1>;
86279e7739fSRob Clark			#size-cells = <0>;
86379e7739fSRob Clark		};
86479e7739fSRob Clark	};
86579e7739fSRob Clark};
86679e7739fSRob Clark
86779e7739fSRob Clark#include <arm/cros-ec-keyboard.dtsi>
86879e7739fSRob Clark#include <arm/cros-ec-sbs.dtsi>
86979e7739fSRob Clark
87079e7739fSRob Clark&uart6 {
87179e7739fSRob Clark	status = "okay";
87279e7739fSRob Clark
873691dfbf5SCaleb Connolly	pinctrl-0 = <&qup_uart6_4pin>;
874691dfbf5SCaleb Connolly
875f7aaaf30SKrzysztof Kozlowski	bluetooth: bluetooth {
87679e7739fSRob Clark		compatible = "qcom,wcn3990-bt";
87779e7739fSRob Clark		vddio-supply = <&src_pp1800_s4a>;
87879e7739fSRob Clark		vddxo-supply = <&pp1800_l7a_wcn3990>;
87979e7739fSRob Clark		vddrf-supply = <&src_pp1300_l17a>;
88079e7739fSRob Clark		vddch0-supply = <&pp3300_l25a_ch0_wcn3990>;
88179e7739fSRob Clark		max-speed = <3200000>;
88279e7739fSRob Clark	};
88379e7739fSRob Clark};
88479e7739fSRob Clark
88579e7739fSRob Clark&uart9 {
88679e7739fSRob Clark	status = "okay";
88779e7739fSRob Clark};
88879e7739fSRob Clark
88979e7739fSRob Clark&ufs_mem_hc {
89079e7739fSRob Clark	status = "okay";
89110e99d47SStephen Boyd
89210e99d47SStephen Boyd	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
89379e7739fSRob Clark
89479e7739fSRob Clark	vcc-supply = <&src_pp2950_l20a>;
89579e7739fSRob Clark	vcc-max-microamp = <600000>;
89679e7739fSRob Clark};
89779e7739fSRob Clark
89879e7739fSRob Clark&ufs_mem_phy {
89979e7739fSRob Clark	status = "okay";
90079e7739fSRob Clark
90179e7739fSRob Clark	vdda-phy-supply = <&vdda_ufs1_core>;
90279e7739fSRob Clark	vdda-pll-supply = <&vdda_ufs1_1p2>;
90379e7739fSRob Clark};
90479e7739fSRob Clark
90579e7739fSRob Clark&usb_1 {
90679e7739fSRob Clark	status = "okay";
90779e7739fSRob Clark
90879e7739fSRob Clark	/* We'll use this as USB 2.0 only */
90979e7739fSRob Clark	qcom,select-utmi-as-pipe-clk;
91079e7739fSRob Clark};
91179e7739fSRob Clark
91279e7739fSRob Clark&usb_1_dwc3 {
91379e7739fSRob Clark	/*
91479e7739fSRob Clark	 * The hardware design intends this port to be hooked up in peripheral
91579e7739fSRob Clark	 * mode, so we'll hardcode it here.  Some details:
91679e7739fSRob Clark	 * - SDM845 expects only a single Type C connector so it has only one
91779e7739fSRob Clark	 *   native Type C port but cheza has two Type C connectors.
91879e7739fSRob Clark	 * - The only source of DP is the single native Type C port.
91979e7739fSRob Clark	 * - On cheza we want to be able to hook DP up to _either_ of the
92079e7739fSRob Clark	 *   two Type C connectors and want to be able to achieve 4 lanes of DP.
92179e7739fSRob Clark	 * - When you configure a Type C port for 4 lanes of DP you lose USB3.
92279e7739fSRob Clark	 * - In order to make everything work, the native Type C port is always
92379e7739fSRob Clark	 *   configured as 4-lanes DP so it's always available.
92479e7739fSRob Clark	 * - The extra USB3 port on SDM845 goes to a USB 3 hub which is then
92579e7739fSRob Clark	 *   sent to the two Type C connectors.
92679e7739fSRob Clark	 * - The extra USB2 lines from the native Type C port are always
92779e7739fSRob Clark	 *   setup as "peripheral" so that we can mux them over to one connector
92879e7739fSRob Clark	 *   or the other if someone needs the connector configured as a gadget
92979e7739fSRob Clark	 *   (but they only get USB2 speeds).
93079e7739fSRob Clark	 *
93179e7739fSRob Clark	 * All the hardware muxes would allow us to hook things up in different
93279e7739fSRob Clark	 * ways to some potential benefit for static configurations (you could
93379e7739fSRob Clark	 * achieve extra USB2 bandwidth by using two different ports for the
934e3c5bc56SGeert Uytterhoeven	 * two connectors or possibly even get USB3 peripheral mode), but in
93579e7739fSRob Clark	 * each case you end up forcing to disconnect/reconnect an in-use
93679e7739fSRob Clark	 * USB session in some cases depending on what you hotplug into the
93779e7739fSRob Clark	 * other connector.  Thus hardcoding this as peripheral makes sense.
93879e7739fSRob Clark	 */
93979e7739fSRob Clark	dr_mode = "peripheral";
94079e7739fSRob Clark
94179e7739fSRob Clark	/*
94279e7739fSRob Clark	 * We always need the high speed pins as 4-lanes DP in case someone
94379e7739fSRob Clark	 * hotplugs a DP peripheral.  Thus limit this port to a max of high
94479e7739fSRob Clark	 * speed.
94579e7739fSRob Clark	 */
94679e7739fSRob Clark	maximum-speed = "high-speed";
94779e7739fSRob Clark
94879e7739fSRob Clark	/*
94979e7739fSRob Clark	 * We don't need the usb3-phy since we run in highspeed mode always, so
95079e7739fSRob Clark	 * re-define these properties removing the superspeed USB PHY reference.
95179e7739fSRob Clark	 */
95279e7739fSRob Clark	phys = <&usb_1_hsphy>;
95379e7739fSRob Clark	phy-names = "usb2-phy";
95479e7739fSRob Clark};
95579e7739fSRob Clark
95679e7739fSRob Clark&usb_1_hsphy {
95779e7739fSRob Clark	status = "okay";
95879e7739fSRob Clark
95979e7739fSRob Clark	vdd-supply = <&vdda_usb1_ss_core>;
96079e7739fSRob Clark	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
96179e7739fSRob Clark	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
96279e7739fSRob Clark
96379e7739fSRob Clark	qcom,imp-res-offset-value = <8>;
96479e7739fSRob Clark	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
96579e7739fSRob Clark	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
96679e7739fSRob Clark	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
96779e7739fSRob Clark};
96879e7739fSRob Clark
96979e7739fSRob Clark&usb_2 {
97079e7739fSRob Clark	status = "okay";
97179e7739fSRob Clark};
97279e7739fSRob Clark
97379e7739fSRob Clark&usb_2_dwc3 {
97479e7739fSRob Clark	/* We have this hooked up to a hub and we always use in host mode */
97579e7739fSRob Clark	dr_mode = "host";
97679e7739fSRob Clark};
97779e7739fSRob Clark
97879e7739fSRob Clark&usb_2_hsphy {
97979e7739fSRob Clark	status = "okay";
98079e7739fSRob Clark
98179e7739fSRob Clark	vdd-supply = <&vdda_usb2_ss_core>;
98279e7739fSRob Clark	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
98379e7739fSRob Clark	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
98479e7739fSRob Clark
98579e7739fSRob Clark	qcom,imp-res-offset-value = <8>;
98679e7739fSRob Clark	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
98779e7739fSRob Clark};
98879e7739fSRob Clark
98979e7739fSRob Clark&usb_2_qmpphy {
99079e7739fSRob Clark	status = "okay";
99179e7739fSRob Clark
99279e7739fSRob Clark	vdda-phy-supply = <&vdda_usb2_ss_1p2>;
99379e7739fSRob Clark	vdda-pll-supply = <&vdda_usb2_ss_core>;
99479e7739fSRob Clark};
99579e7739fSRob Clark
99679e7739fSRob Clark&wifi {
99779e7739fSRob Clark	status = "okay";
99879e7739fSRob Clark
99979e7739fSRob Clark	vdd-0.8-cx-mx-supply = <&src_pp800_l5a >;
100079e7739fSRob Clark	vdd-1.8-xo-supply = <&pp1800_l7a_wcn3990>;
100179e7739fSRob Clark	vdd-1.3-rfa-supply = <&src_pp1300_l17a>;
100279e7739fSRob Clark	vdd-3.3-ch0-supply = <&pp3300_l25a_ch0_wcn3990>;
100379e7739fSRob Clark};
100479e7739fSRob Clark
100579e7739fSRob Clark/* PINCTRL - additions to nodes defined in sdm845.dtsi */
100679e7739fSRob Clark
100779e7739fSRob Clark&qspi_cs0 {
10089f5cdeb7SDouglas Anderson	bias-disable;		/* External pullup */
100979e7739fSRob Clark};
101079e7739fSRob Clark
101179e7739fSRob Clark&qspi_clk {
10129f5cdeb7SDouglas Anderson	bias-disable;		/* Rely on Cr50 internal pulldown */
101379e7739fSRob Clark};
101479e7739fSRob Clark
10159f5cdeb7SDouglas Anderson&qspi_data0 {
10169f5cdeb7SDouglas Anderson	bias-disable;		/* Rely on Cr50 internal pulldown */
10179f5cdeb7SDouglas Anderson};
10189f5cdeb7SDouglas Anderson
10199f5cdeb7SDouglas Anderson&qspi_data1 {
10209f5cdeb7SDouglas Anderson	bias-pull-down;
102179e7739fSRob Clark};
102279e7739fSRob Clark
102379e7739fSRob Clark&qup_i2c3_default {
102479e7739fSRob Clark	drive-strength = <2>;
102579e7739fSRob Clark
102679e7739fSRob Clark	/* Has external pullup */
102779e7739fSRob Clark	bias-disable;
102879e7739fSRob Clark};
102979e7739fSRob Clark
103079e7739fSRob Clark&qup_i2c11_default {
103179e7739fSRob Clark	drive-strength = <2>;
103279e7739fSRob Clark
103379e7739fSRob Clark	/* Has external pullup */
103479e7739fSRob Clark	bias-disable;
103579e7739fSRob Clark};
103679e7739fSRob Clark
103779e7739fSRob Clark&qup_i2c12_default {
103879e7739fSRob Clark	drive-strength = <2>;
103979e7739fSRob Clark
104079e7739fSRob Clark	/* Has external pullup */
104179e7739fSRob Clark	bias-disable;
104279e7739fSRob Clark};
104379e7739fSRob Clark
104479e7739fSRob Clark&qup_i2c14_default {
104579e7739fSRob Clark	drive-strength = <2>;
104679e7739fSRob Clark
104779e7739fSRob Clark	/* Has external pullup */
104879e7739fSRob Clark	bias-disable;
104979e7739fSRob Clark};
105079e7739fSRob Clark
105179e7739fSRob Clark&qup_spi0_default {
105279e7739fSRob Clark	drive-strength = <2>;
105379e7739fSRob Clark	bias-disable;
105479e7739fSRob Clark};
105579e7739fSRob Clark
105679e7739fSRob Clark&qup_spi5_default {
105779e7739fSRob Clark	drive-strength = <2>;
105879e7739fSRob Clark	bias-disable;
105979e7739fSRob Clark};
106079e7739fSRob Clark
106179e7739fSRob Clark&qup_spi10_default {
106279e7739fSRob Clark	drive-strength = <2>;
106379e7739fSRob Clark	bias-disable;
106479e7739fSRob Clark};
106579e7739fSRob Clark
1066d05e3428SKrzysztof Kozlowski&qup_uart9_rx {
106779e7739fSRob Clark	drive-strength = <2>;
106879e7739fSRob Clark	bias-pull-up;
106979e7739fSRob Clark};
1070d05e3428SKrzysztof Kozlowski
1071d05e3428SKrzysztof Kozlowski&qup_uart9_tx {
1072d05e3428SKrzysztof Kozlowski	drive-strength = <2>;
1073d05e3428SKrzysztof Kozlowski	bias-disable;
107479e7739fSRob Clark};
107579e7739fSRob Clark
107679e7739fSRob Clark/* PINCTRL - board-specific pinctrl */
1077ea25d61bSMarijn Suijten&pm8005_gpios {
107879e7739fSRob Clark	gpio-line-names = "",
107979e7739fSRob Clark			  "",
108079e7739fSRob Clark			  "SLB",
108179e7739fSRob Clark			  "";
108279e7739fSRob Clark};
108379e7739fSRob Clark
108479e7739fSRob Clark&pm8998_adc {
108541c18552SMarijn Suijten	channel@4d {
108679e7739fSRob Clark		reg = <ADC5_AMUX_THM1_100K_PU>;
108779e7739fSRob Clark		label = "sdm_temp";
108879e7739fSRob Clark	};
108979e7739fSRob Clark
109041c18552SMarijn Suijten	channel@4e {
109179e7739fSRob Clark		reg = <ADC5_AMUX_THM2_100K_PU>;
109279e7739fSRob Clark		label = "quiet_temp";
109379e7739fSRob Clark	};
109479e7739fSRob Clark
109541c18552SMarijn Suijten	channel@4f {
109679e7739fSRob Clark		reg = <ADC5_AMUX_THM3_100K_PU>;
109779e7739fSRob Clark		label = "lte_temp_1";
109879e7739fSRob Clark	};
109979e7739fSRob Clark
110041c18552SMarijn Suijten	channel@50 {
110179e7739fSRob Clark		reg = <ADC5_AMUX_THM4_100K_PU>;
110279e7739fSRob Clark		label = "lte_temp_2";
110379e7739fSRob Clark	};
110479e7739fSRob Clark
110541c18552SMarijn Suijten	channel@51 {
110679e7739fSRob Clark		reg = <ADC5_AMUX_THM5_100K_PU>;
110779e7739fSRob Clark		label = "charger_temp";
110879e7739fSRob Clark	};
110979e7739fSRob Clark};
111079e7739fSRob Clark
1111ea25d61bSMarijn Suijten&pm8998_gpios {
111279e7739fSRob Clark	gpio-line-names = "",
111379e7739fSRob Clark			  "",
111479e7739fSRob Clark			  "SW_CTRL",
111579e7739fSRob Clark			  "",
111679e7739fSRob Clark			  "",
111779e7739fSRob Clark			  "",
111879e7739fSRob Clark			  "",
111979e7739fSRob Clark			  "",
112079e7739fSRob Clark			  "",
112179e7739fSRob Clark			  "",
112279e7739fSRob Clark			  "",
112379e7739fSRob Clark			  "",
112479e7739fSRob Clark			  "",
112579e7739fSRob Clark			  "",
112679e7739fSRob Clark			  "",
112779e7739fSRob Clark			  "",
112879e7739fSRob Clark			  "",
112979e7739fSRob Clark			  "",
113079e7739fSRob Clark			  "",
113179e7739fSRob Clark			  "",
113279e7739fSRob Clark			  "",
113379e7739fSRob Clark			  "CFG_OPT1",
113479e7739fSRob Clark			  "WCSS_PWR_REQ",
113579e7739fSRob Clark			  "",
113679e7739fSRob Clark			  "CFG_OPT2",
113779e7739fSRob Clark			  "SLB";
113879e7739fSRob Clark};
113979e7739fSRob Clark
114079e7739fSRob Clark&tlmm {
114179e7739fSRob Clark	/*
114279e7739fSRob Clark	 * pinctrl settings for pins that have no real owners.
114379e7739fSRob Clark	 */
114479e7739fSRob Clark	pinctrl-names = "default", "sleep";
114579e7739fSRob Clark	pinctrl-0 = <&bios_flash_wp_r_l>,
114679e7739fSRob Clark		    <&ap_suspend_l_deassert>;
114779e7739fSRob Clark
114879e7739fSRob Clark	pinctrl-1 = <&bios_flash_wp_r_l>,
114979e7739fSRob Clark		    <&ap_suspend_l_assert>;
115079e7739fSRob Clark
115179e7739fSRob Clark	/*
115279e7739fSRob Clark	 * Hogs prevent usermode from changing the value. A GPIO can be both
115379e7739fSRob Clark	 * here and in the pinctrl section.
115479e7739fSRob Clark	 */
115579e7739fSRob Clark	ap-suspend-l-hog {
115679e7739fSRob Clark		gpio-hog;
115779e7739fSRob Clark		gpios = <126 GPIO_ACTIVE_LOW>;
115879e7739fSRob Clark		output-low;
115979e7739fSRob Clark	};
116079e7739fSRob Clark
1161d05e3428SKrzysztof Kozlowski	ap_edp_bklten: ap-edp-bklten-state {
116279e7739fSRob Clark		pins = "gpio37";
116379e7739fSRob Clark		function = "gpio";
116479e7739fSRob Clark		drive-strength = <2>;
116579e7739fSRob Clark		bias-disable;
116679e7739fSRob Clark	};
116779e7739fSRob Clark
1168d05e3428SKrzysztof Kozlowski	bios_flash_wp_r_l: bios-flash-wp-r-l-state {
116979e7739fSRob Clark		pins = "gpio128";
117079e7739fSRob Clark		function = "gpio";
117179e7739fSRob Clark		bias-disable;
117279e7739fSRob Clark	};
117379e7739fSRob Clark
1174d05e3428SKrzysztof Kozlowski	ec_ap_int_l: ec-ap-int-l-state {
117579e7739fSRob Clark	       pins = "gpio122";
117679e7739fSRob Clark	       function = "gpio";
117779e7739fSRob Clark	       bias-pull-up;
117879e7739fSRob Clark	};
117979e7739fSRob Clark
1180d05e3428SKrzysztof Kozlowski	edp_brij_en: edp-brij-en-state {
118179e7739fSRob Clark		pins = "gpio102";
118279e7739fSRob Clark		function = "gpio";
118379e7739fSRob Clark		drive-strength = <2>;
118479e7739fSRob Clark		bias-disable;
118579e7739fSRob Clark	};
118679e7739fSRob Clark
1187d05e3428SKrzysztof Kozlowski	edp_brij_irq: edp-brij-irq-state {
118879e7739fSRob Clark		pins = "gpio10";
118979e7739fSRob Clark		function = "gpio";
119079e7739fSRob Clark		drive-strength = <2>;
119179e7739fSRob Clark		bias-pull-down;
119279e7739fSRob Clark	};
119379e7739fSRob Clark
1194d05e3428SKrzysztof Kozlowski	en_pp3300_dx_edp: en-pp3300-dx-edp-state {
119579e7739fSRob Clark		pins = "gpio43";
119679e7739fSRob Clark		function = "gpio";
119779e7739fSRob Clark		drive-strength = <2>;
119879e7739fSRob Clark		bias-disable;
119979e7739fSRob Clark	};
120079e7739fSRob Clark
1201d05e3428SKrzysztof Kozlowski	h1_ap_int_odl: h1-ap-int-odl-state {
120279e7739fSRob Clark		pins = "gpio129";
120379e7739fSRob Clark		function = "gpio";
120479e7739fSRob Clark		bias-pull-up;
120579e7739fSRob Clark	};
120679e7739fSRob Clark
1207d05e3428SKrzysztof Kozlowski	pen_eject_odl: pen-eject-odl-state {
120879e7739fSRob Clark		pins = "gpio119";
120979e7739fSRob Clark		function = "gpio";
121079e7739fSRob Clark		bias-pull-up;
121179e7739fSRob Clark	};
121279e7739fSRob Clark
1213d05e3428SKrzysztof Kozlowski	pen_irq_l: pen-irq-l-state {
121479e7739fSRob Clark		pins = "gpio24";
121579e7739fSRob Clark		function = "gpio";
121679e7739fSRob Clark
121779e7739fSRob Clark		/* Has external pullup */
121879e7739fSRob Clark		bias-disable;
121979e7739fSRob Clark	};
122079e7739fSRob Clark
1221d05e3428SKrzysztof Kozlowski	pen_pdct_l: pen-pdct-l-state {
122279e7739fSRob Clark		pins = "gpio63";
122379e7739fSRob Clark		function = "gpio";
122479e7739fSRob Clark
122579e7739fSRob Clark		/* Has external pullup */
122679e7739fSRob Clark		bias-disable;
122779e7739fSRob Clark	};
122879e7739fSRob Clark
1229d05e3428SKrzysztof Kozlowski	pen_rst_l: pen-rst-l-state {
123079e7739fSRob Clark		pins = "gpio23";
123179e7739fSRob Clark		function = "gpio";
123279e7739fSRob Clark		bias-disable;
123379e7739fSRob Clark		drive-strength = <2>;
123479e7739fSRob Clark
123579e7739fSRob Clark		/*
123679e7739fSRob Clark		 * The pen driver doesn't currently support
123779e7739fSRob Clark		 * driving this reset line.  By specifying
123879e7739fSRob Clark		 * output-high here we're relying on the fact
123979e7739fSRob Clark		 * that this pin has a default pulldown at boot
124079e7739fSRob Clark		 * (which makes sure the pen was in reset if it
124179e7739fSRob Clark		 * was powered) and then we set it high here to
124279e7739fSRob Clark		 * take it out of reset.  Better would be if the
124379e7739fSRob Clark		 * pen driver could control this and we could
124479e7739fSRob Clark		 * remove "output-high" here.
124579e7739fSRob Clark		 */
124679e7739fSRob Clark		output-high;
124779e7739fSRob Clark	};
124879e7739fSRob Clark
12499f5cdeb7SDouglas Anderson	qspi_sleep: qspi-sleep-state {
12509f5cdeb7SDouglas Anderson		pins = "gpio90", "gpio91", "gpio92", "gpio95";
12519f5cdeb7SDouglas Anderson
12529f5cdeb7SDouglas Anderson		/*
12539f5cdeb7SDouglas Anderson		 * When we're not actively transferring we want pins as GPIOs
12549f5cdeb7SDouglas Anderson		 * with output disabled so that the quad SPI IP block stops
12559f5cdeb7SDouglas Anderson		 * driving them. We rely on the normal pulls configured in
12569f5cdeb7SDouglas Anderson		 * the active state and don't redefine them here. Also note
12579f5cdeb7SDouglas Anderson		 * that we don't need the reverse (output-enable) in the
12589f5cdeb7SDouglas Anderson		 * normal mode since the "output-enable" only matters for
12599f5cdeb7SDouglas Anderson		 * GPIO function.
12609f5cdeb7SDouglas Anderson		 */
12619f5cdeb7SDouglas Anderson		function = "gpio";
12629f5cdeb7SDouglas Anderson		output-disable;
12639f5cdeb7SDouglas Anderson	};
12649f5cdeb7SDouglas Anderson
1265d05e3428SKrzysztof Kozlowski	sdc2_clk: sdc2-clk-state {
126679e7739fSRob Clark		pins = "sdc2_clk";
126779e7739fSRob Clark		bias-disable;
126879e7739fSRob Clark
126979e7739fSRob Clark		/*
127079e7739fSRob Clark		 * It seems that mmc_test reports errors if drive
127179e7739fSRob Clark		 * strength is not 16.
127279e7739fSRob Clark		 */
127379e7739fSRob Clark		drive-strength = <16>;
127479e7739fSRob Clark	};
127579e7739fSRob Clark
1276d05e3428SKrzysztof Kozlowski	sdc2_cmd: sdc2-cmd-state {
127779e7739fSRob Clark		pins = "sdc2_cmd";
127879e7739fSRob Clark		bias-pull-up;
127979e7739fSRob Clark		drive-strength = <16>;
128079e7739fSRob Clark	};
128179e7739fSRob Clark
1282d05e3428SKrzysztof Kozlowski	sdc2_data: sdc2-data-state {
128379e7739fSRob Clark		pins = "sdc2_data";
128479e7739fSRob Clark		bias-pull-up;
128579e7739fSRob Clark		drive-strength = <16>;
128679e7739fSRob Clark	};
128779e7739fSRob Clark
1288d05e3428SKrzysztof Kozlowski	sd_cd_odl: sd-cd-odl-state {
128979e7739fSRob Clark		pins = "gpio44";
129079e7739fSRob Clark		function = "gpio";
129179e7739fSRob Clark		bias-pull-up;
129279e7739fSRob Clark	};
129379e7739fSRob Clark
1294d05e3428SKrzysztof Kozlowski	ts_int_l: ts-int-l-state {
129579e7739fSRob Clark		pins = "gpio125";
129679e7739fSRob Clark		function = "gpio";
129779e7739fSRob Clark		bias-pull-up;
129879e7739fSRob Clark	};
129979e7739fSRob Clark
1300d05e3428SKrzysztof Kozlowski	ts_reset_l: ts-reset-l-state {
130179e7739fSRob Clark		pins = "gpio118";
130279e7739fSRob Clark		function = "gpio";
130379e7739fSRob Clark		bias-disable;
130479e7739fSRob Clark		drive-strength = <2>;
130579e7739fSRob Clark	};
130679e7739fSRob Clark
1307d05e3428SKrzysztof Kozlowski	ap_suspend_l_assert: ap-suspend-l-assert-state {
130879e7739fSRob Clark		pins = "gpio126";
130979e7739fSRob Clark		function = "gpio";
13109bce41faSKrzysztof Kozlowski		bias-disable;
131179e7739fSRob Clark		drive-strength = <2>;
131279e7739fSRob Clark		output-low;
131379e7739fSRob Clark	};
131479e7739fSRob Clark
1315d05e3428SKrzysztof Kozlowski	ap_suspend_l_deassert: ap-suspend-l-deassert-state {
131679e7739fSRob Clark		pins = "gpio126";
131779e7739fSRob Clark		function = "gpio";
13189bce41faSKrzysztof Kozlowski		bias-disable;
131979e7739fSRob Clark		drive-strength = <2>;
132079e7739fSRob Clark		output-high;
132179e7739fSRob Clark	};
132279e7739fSRob Clark};
132348a0585bSAlexandre Courbot
132448a0585bSAlexandre Courbot&venus {
13257f761609SKonrad Dybcio	status = "okay";
13267f761609SKonrad Dybcio
132748a0585bSAlexandre Courbot	video-firmware {
132848a0585bSAlexandre Courbot		iommus = <&apps_smmu 0x10b2 0x0>;
132948a0585bSAlexandre Courbot	};
133048a0585bSAlexandre Courbot};
1331