116a7fed1SJens Glathe// SPDX-License-Identifier: BSD-3-Clause 216a7fed1SJens Glathe/* 316a7fed1SJens Glathe * Copyright (c) 2021, The Linux Foundation. All rights reserved. 416a7fed1SJens Glathe * Copyright (c) 2022, Linaro Limited 516a7fed1SJens Glathe * Copyright (c) 2023, Merck Hung <merckhung@gmail.com> 616a7fed1SJens Glathe * Copyright (c) 2023, 2024 Jens Glathe <jens.glathe@oldschoolsolutions.biz> 716a7fed1SJens Glathe */ 816a7fed1SJens Glathe 916a7fed1SJens Glathe/dts-v1/; 1016a7fed1SJens Glathe 1116a7fed1SJens Glathe#include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h> 1216a7fed1SJens Glathe#include <dt-bindings/gpio/gpio.h> 1316a7fed1SJens Glathe#include <dt-bindings/input/gpio-keys.h> 1416a7fed1SJens Glathe#include <dt-bindings/input/input.h> 1516a7fed1SJens Glathe#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 1616a7fed1SJens Glathe 1716a7fed1SJens Glathe#include "sc8280xp.dtsi" 1816a7fed1SJens Glathe#include "sc8280xp-pmics.dtsi" 1916a7fed1SJens Glathe 2016a7fed1SJens Glathe/ { 2116a7fed1SJens Glathe model = "Windows Dev Kit 2023"; 2216a7fed1SJens Glathe compatible = "microsoft,blackrock", "qcom,sc8280xp"; 2316a7fed1SJens Glathe chassis-type = "desktop"; 2416a7fed1SJens Glathe 2516a7fed1SJens Glathe aliases { 2616a7fed1SJens Glathe i2c4 = &i2c4; 2716a7fed1SJens Glathe i2c21 = &i2c21; 2816a7fed1SJens Glathe serial1 = &uart2; 2916a7fed1SJens Glathe }; 3016a7fed1SJens Glathe 3116a7fed1SJens Glathe wcd938x: audio-codec { 3216a7fed1SJens Glathe compatible = "qcom,wcd9380-codec"; 3316a7fed1SJens Glathe 3416a7fed1SJens Glathe pinctrl-0 = <&wcd_default>; 3516a7fed1SJens Glathe pinctrl-names = "default"; 3616a7fed1SJens Glathe 3716a7fed1SJens Glathe reset-gpios = <&tlmm 106 GPIO_ACTIVE_LOW>; 3816a7fed1SJens Glathe 3916a7fed1SJens Glathe vdd-buck-supply = <&vreg_s10b>; 4016a7fed1SJens Glathe vdd-rxtx-supply = <&vreg_s10b>; 4116a7fed1SJens Glathe vdd-io-supply = <&vreg_s10b>; 4216a7fed1SJens Glathe vdd-mic-bias-supply = <&vreg_bob>; 4316a7fed1SJens Glathe 4416a7fed1SJens Glathe qcom,micbias1-microvolt = <1800000>; 4516a7fed1SJens Glathe qcom,micbias2-microvolt = <1800000>; 4616a7fed1SJens Glathe qcom,micbias3-microvolt = <1800000>; 4716a7fed1SJens Glathe qcom,micbias4-microvolt = <1800000>; 4816a7fed1SJens Glathe qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 4916a7fed1SJens Glathe qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 5016a7fed1SJens Glathe qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 5116a7fed1SJens Glathe qcom,rx-device = <&wcd_rx>; 5216a7fed1SJens Glathe qcom,tx-device = <&wcd_tx>; 5316a7fed1SJens Glathe 5416a7fed1SJens Glathe #sound-dai-cells = <1>; 5516a7fed1SJens Glathe }; 5616a7fed1SJens Glathe 5716a7fed1SJens Glathe dp3_connector: connector { 5816a7fed1SJens Glathe compatible = "dp-connector"; 5916a7fed1SJens Glathe label = "DP-3"; 6016a7fed1SJens Glathe type = "mini"; 6116a7fed1SJens Glathe 6216a7fed1SJens Glathe dp-pwr-supply = <&vreg_misc_3p3>; 6316a7fed1SJens Glathe 6416a7fed1SJens Glathe port { 6516a7fed1SJens Glathe dp1_connector_in: endpoint { 6616a7fed1SJens Glathe remote-endpoint = <&mdss0_dp2_phy_out>; 6716a7fed1SJens Glathe }; 6816a7fed1SJens Glathe }; 6916a7fed1SJens Glathe }; 7016a7fed1SJens Glathe 7116a7fed1SJens Glathe pmic-glink { 7216a7fed1SJens Glathe compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink"; 7316a7fed1SJens Glathe 7416a7fed1SJens Glathe #address-cells = <1>; 7516a7fed1SJens Glathe #size-cells = <0>; 7616a7fed1SJens Glathe orientation-gpios = <&tlmm 166 GPIO_ACTIVE_HIGH>, 7716a7fed1SJens Glathe <&tlmm 49 GPIO_ACTIVE_HIGH>; 7816a7fed1SJens Glathe 7916a7fed1SJens Glathe /* Left-side rear port */ 8016a7fed1SJens Glathe connector@0 { 8116a7fed1SJens Glathe compatible = "usb-c-connector"; 8216a7fed1SJens Glathe reg = <0>; 8316a7fed1SJens Glathe power-role = "source"; 8416a7fed1SJens Glathe data-role = "dual"; 8516a7fed1SJens Glathe 8616a7fed1SJens Glathe ports { 8716a7fed1SJens Glathe #address-cells = <1>; 8816a7fed1SJens Glathe #size-cells = <0>; 8916a7fed1SJens Glathe 9016a7fed1SJens Glathe port@0 { 9116a7fed1SJens Glathe reg = <0>; 9216a7fed1SJens Glathe 9316a7fed1SJens Glathe pmic_glink_con0_hs: endpoint { 9416a7fed1SJens Glathe remote-endpoint = <&usb_0_dwc3_hs>; 9516a7fed1SJens Glathe }; 9616a7fed1SJens Glathe }; 9716a7fed1SJens Glathe 9816a7fed1SJens Glathe port@1 { 9916a7fed1SJens Glathe reg = <1>; 10016a7fed1SJens Glathe 10116a7fed1SJens Glathe pmic_glink_con0_ss: endpoint { 10216a7fed1SJens Glathe remote-endpoint = <&usb_0_qmpphy_out>; 10316a7fed1SJens Glathe }; 10416a7fed1SJens Glathe }; 10516a7fed1SJens Glathe 10616a7fed1SJens Glathe port@2 { 10716a7fed1SJens Glathe reg = <2>; 10816a7fed1SJens Glathe 10916a7fed1SJens Glathe pmic_glink_con0_sbu: endpoint { 11016a7fed1SJens Glathe remote-endpoint = <&usb0_sbu_mux>; 11116a7fed1SJens Glathe }; 11216a7fed1SJens Glathe }; 11316a7fed1SJens Glathe }; 11416a7fed1SJens Glathe }; 11516a7fed1SJens Glathe 11616a7fed1SJens Glathe /* Left-side front port */ 11716a7fed1SJens Glathe connector@1 { 11816a7fed1SJens Glathe compatible = "usb-c-connector"; 11916a7fed1SJens Glathe reg = <1>; 12016a7fed1SJens Glathe power-role = "source"; 12116a7fed1SJens Glathe data-role = "dual"; 12216a7fed1SJens Glathe 12316a7fed1SJens Glathe ports { 12416a7fed1SJens Glathe #address-cells = <1>; 12516a7fed1SJens Glathe #size-cells = <0>; 12616a7fed1SJens Glathe 12716a7fed1SJens Glathe port@0 { 12816a7fed1SJens Glathe reg = <0>; 12916a7fed1SJens Glathe 13016a7fed1SJens Glathe pmic_glink_con1_hs: endpoint { 13116a7fed1SJens Glathe remote-endpoint = <&usb_1_dwc3_hs>; 13216a7fed1SJens Glathe }; 13316a7fed1SJens Glathe }; 13416a7fed1SJens Glathe 13516a7fed1SJens Glathe port@1 { 13616a7fed1SJens Glathe reg = <1>; 13716a7fed1SJens Glathe 13816a7fed1SJens Glathe pmic_glink_con1_ss: endpoint { 13916a7fed1SJens Glathe remote-endpoint = <&usb_1_qmpphy_out>; 14016a7fed1SJens Glathe }; 14116a7fed1SJens Glathe }; 14216a7fed1SJens Glathe 14316a7fed1SJens Glathe port@2 { 14416a7fed1SJens Glathe reg = <2>; 14516a7fed1SJens Glathe 14616a7fed1SJens Glathe pmic_glink_con1_sbu: endpoint { 14716a7fed1SJens Glathe remote-endpoint = <&usb1_sbu_mux>; 14816a7fed1SJens Glathe }; 14916a7fed1SJens Glathe }; 15016a7fed1SJens Glathe }; 15116a7fed1SJens Glathe }; 15216a7fed1SJens Glathe }; 15316a7fed1SJens Glathe 15416a7fed1SJens Glathe vreg_misc_3p3: regulator-misc-3p3 { 15516a7fed1SJens Glathe compatible = "regulator-fixed"; 15616a7fed1SJens Glathe 15716a7fed1SJens Glathe regulator-name = "VCC3B"; 15816a7fed1SJens Glathe regulator-min-microvolt = <3300000>; 15916a7fed1SJens Glathe regulator-max-microvolt = <3300000>; 16016a7fed1SJens Glathe 16116a7fed1SJens Glathe gpio = <&pmc8280_1_gpios 1 GPIO_ACTIVE_HIGH>; 16216a7fed1SJens Glathe enable-active-high; 16316a7fed1SJens Glathe 16416a7fed1SJens Glathe pinctrl-0 = <&misc_3p3_reg_en>; 16516a7fed1SJens Glathe pinctrl-names = "default"; 16616a7fed1SJens Glathe 16716a7fed1SJens Glathe regulator-boot-on; 16816a7fed1SJens Glathe regulator-always-on; 16916a7fed1SJens Glathe }; 17016a7fed1SJens Glathe 17116a7fed1SJens Glathe vreg_nvme: regulator-nvme { 17216a7fed1SJens Glathe compatible = "regulator-fixed"; 17316a7fed1SJens Glathe 17416a7fed1SJens Glathe regulator-name = "VCC3_SSD"; 17516a7fed1SJens Glathe regulator-min-microvolt = <3300000>; 17616a7fed1SJens Glathe regulator-max-microvolt = <3300000>; 17716a7fed1SJens Glathe 17816a7fed1SJens Glathe gpio = <&tlmm 135 GPIO_ACTIVE_HIGH>; 17916a7fed1SJens Glathe enable-active-high; 18016a7fed1SJens Glathe 18116a7fed1SJens Glathe pinctrl-0 = <&nvme_reg_en>; 18216a7fed1SJens Glathe pinctrl-names = "default"; 18316a7fed1SJens Glathe 18416a7fed1SJens Glathe regulator-boot-on; 18516a7fed1SJens Glathe }; 18616a7fed1SJens Glathe 18716a7fed1SJens Glathe vreg_vph_pwr: regulator-vph-pwr { 18816a7fed1SJens Glathe compatible = "regulator-fixed"; 18916a7fed1SJens Glathe 19016a7fed1SJens Glathe regulator-name = "VPH_VCC3R9"; 19116a7fed1SJens Glathe regulator-min-microvolt = <3900000>; 19216a7fed1SJens Glathe regulator-max-microvolt = <3900000>; 19316a7fed1SJens Glathe 19416a7fed1SJens Glathe regulator-always-on; 19516a7fed1SJens Glathe }; 19616a7fed1SJens Glathe 19716a7fed1SJens Glathe vreg_wlan: regulator-wlan { 19816a7fed1SJens Glathe compatible = "regulator-fixed"; 19916a7fed1SJens Glathe 20016a7fed1SJens Glathe regulator-name = "VCC_WLAN_3R9"; 20116a7fed1SJens Glathe regulator-min-microvolt = <3900000>; 20216a7fed1SJens Glathe regulator-max-microvolt = <3900000>; 20316a7fed1SJens Glathe 20416a7fed1SJens Glathe gpio = <&pmr735a_gpios 1 GPIO_ACTIVE_HIGH>; 20516a7fed1SJens Glathe enable-active-high; 20616a7fed1SJens Glathe 20716a7fed1SJens Glathe pinctrl-0 = <&hastings_reg_en>; 20816a7fed1SJens Glathe pinctrl-names = "default"; 20916a7fed1SJens Glathe 21016a7fed1SJens Glathe regulator-boot-on; 21116a7fed1SJens Glathe }; 21216a7fed1SJens Glathe 21316a7fed1SJens Glathe vreg_wwan: regulator-wwan { 21416a7fed1SJens Glathe compatible = "regulator-fixed"; 21516a7fed1SJens Glathe 21616a7fed1SJens Glathe regulator-name = "VCC3B_WAN"; 21716a7fed1SJens Glathe regulator-min-microvolt = <3300000>; 21816a7fed1SJens Glathe regulator-max-microvolt = <3300000>; 21916a7fed1SJens Glathe 22016a7fed1SJens Glathe gpio = <&pmc8280_2_gpios 1 GPIO_ACTIVE_HIGH>; 22116a7fed1SJens Glathe enable-active-high; 22216a7fed1SJens Glathe 22316a7fed1SJens Glathe pinctrl-0 = <&wwan_sw_en>; 22416a7fed1SJens Glathe pinctrl-names = "default"; 22516a7fed1SJens Glathe 22616a7fed1SJens Glathe regulator-boot-on; 22716a7fed1SJens Glathe }; 22816a7fed1SJens Glathe 22916a7fed1SJens Glathe reserved-memory { 23016a7fed1SJens Glathe gpu_mem: gpu-mem@8bf00000 { 23116a7fed1SJens Glathe reg = <0 0x8bf00000 0 0x2000>; 23216a7fed1SJens Glathe no-map; 23316a7fed1SJens Glathe }; 23416a7fed1SJens Glathe 23516a7fed1SJens Glathe linux,cma { 23616a7fed1SJens Glathe compatible = "shared-dma-pool"; 23716a7fed1SJens Glathe size = <0x0 0x8000000>; 23816a7fed1SJens Glathe reusable; 23916a7fed1SJens Glathe linux,cma-default; 24016a7fed1SJens Glathe }; 24116a7fed1SJens Glathe }; 24216a7fed1SJens Glathe 24316a7fed1SJens Glathe usb0-sbu-mux { 24416a7fed1SJens Glathe compatible = "pericom,pi3usb102", "gpio-sbu-mux"; 24516a7fed1SJens Glathe 24616a7fed1SJens Glathe enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; 24716a7fed1SJens Glathe select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>; 24816a7fed1SJens Glathe 24916a7fed1SJens Glathe pinctrl-0 = <&usb0_sbu_default>; 25016a7fed1SJens Glathe pinctrl-names = "default"; 25116a7fed1SJens Glathe 25216a7fed1SJens Glathe mode-switch; 25316a7fed1SJens Glathe orientation-switch; 25416a7fed1SJens Glathe 25516a7fed1SJens Glathe port { 25616a7fed1SJens Glathe usb0_sbu_mux: endpoint { 25716a7fed1SJens Glathe remote-endpoint = <&pmic_glink_con0_sbu>; 25816a7fed1SJens Glathe }; 25916a7fed1SJens Glathe }; 26016a7fed1SJens Glathe }; 26116a7fed1SJens Glathe 26216a7fed1SJens Glathe usb1-sbu-mux { 26316a7fed1SJens Glathe compatible = "pericom,pi3usb102", "gpio-sbu-mux"; 26416a7fed1SJens Glathe 26516a7fed1SJens Glathe enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>; 26616a7fed1SJens Glathe select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>; 26716a7fed1SJens Glathe 26816a7fed1SJens Glathe pinctrl-0 = <&usb1_sbu_default>; 26916a7fed1SJens Glathe pinctrl-names = "default"; 27016a7fed1SJens Glathe 27116a7fed1SJens Glathe mode-switch; 27216a7fed1SJens Glathe orientation-switch; 27316a7fed1SJens Glathe 27416a7fed1SJens Glathe port { 27516a7fed1SJens Glathe usb1_sbu_mux: endpoint { 27616a7fed1SJens Glathe remote-endpoint = <&pmic_glink_con1_sbu>; 27716a7fed1SJens Glathe }; 27816a7fed1SJens Glathe }; 27916a7fed1SJens Glathe }; 28016a7fed1SJens Glathe 28116a7fed1SJens Glathe wcn6855-pmu { 28216a7fed1SJens Glathe compatible = "qcom,wcn6855-pmu"; 28316a7fed1SJens Glathe 28416a7fed1SJens Glathe pinctrl-0 = <&bt_default>, <&wlan_en>; 28516a7fed1SJens Glathe pinctrl-names = "default"; 28616a7fed1SJens Glathe 28716a7fed1SJens Glathe wlan-enable-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>; 28816a7fed1SJens Glathe bt-enable-gpios = <&tlmm 133 GPIO_ACTIVE_HIGH>; 28916a7fed1SJens Glathe swctrl-gpios = <&tlmm 132 GPIO_ACTIVE_HIGH>; 29016a7fed1SJens Glathe 29116a7fed1SJens Glathe vddio-supply = <&vreg_s10b>; 29216a7fed1SJens Glathe vddaon-supply = <&vreg_s12b>; 29316a7fed1SJens Glathe vddpmu-supply = <&vreg_s12b>; 29416a7fed1SJens Glathe vddpmumx-supply = <&vreg_s12b>; 29516a7fed1SJens Glathe vddpmucx-supply = <&vreg_s12b>; 29616a7fed1SJens Glathe vddrfa0p95-supply = <&vreg_s12b>; 29716a7fed1SJens Glathe vddrfa1p3-supply = <&vreg_s11b>; 29816a7fed1SJens Glathe vddrfa1p9-supply = <&vreg_s1c>; 29916a7fed1SJens Glathe vddpcie1p3-supply = <&vreg_s11b>; 30016a7fed1SJens Glathe vddpcie1p9-supply = <&vreg_s1c>; 30116a7fed1SJens Glathe 30216a7fed1SJens Glathe regulators { 30316a7fed1SJens Glathe vreg_pmu_rfa_cmn_0p8: ldo0 { 30416a7fed1SJens Glathe regulator-name = "vreg_pmu_rfa_cmn_0p8"; 30516a7fed1SJens Glathe }; 30616a7fed1SJens Glathe 30716a7fed1SJens Glathe vreg_pmu_aon_0p8: ldo1 { 30816a7fed1SJens Glathe regulator-name = "vreg_pmu_aon_0p8"; 30916a7fed1SJens Glathe }; 31016a7fed1SJens Glathe 31116a7fed1SJens Glathe vreg_pmu_wlcx_0p8: ldo2 { 31216a7fed1SJens Glathe regulator-name = "vreg_pmu_wlcx_0p8"; 31316a7fed1SJens Glathe }; 31416a7fed1SJens Glathe 31516a7fed1SJens Glathe vreg_pmu_wlmx_0p8: ldo3 { 31616a7fed1SJens Glathe regulator-name = "vreg_pmu_wlmx_0p8"; 31716a7fed1SJens Glathe }; 31816a7fed1SJens Glathe 31916a7fed1SJens Glathe vreg_pmu_btcmx_0p8: ldo4 { 32016a7fed1SJens Glathe regulator-name = "vreg_pmu_btcmx_0p8"; 32116a7fed1SJens Glathe }; 32216a7fed1SJens Glathe 32316a7fed1SJens Glathe vreg_pmu_pcie_1p8: ldo5 { 32416a7fed1SJens Glathe regulator-name = "vreg_pmu_pcie_1p8"; 32516a7fed1SJens Glathe }; 32616a7fed1SJens Glathe 32716a7fed1SJens Glathe vreg_pmu_pcie_0p9: ldo6 { 32816a7fed1SJens Glathe regulator-name = "vreg_pmu_pcie_0p9"; 32916a7fed1SJens Glathe }; 33016a7fed1SJens Glathe 33116a7fed1SJens Glathe vreg_pmu_rfa_0p8: ldo7 { 33216a7fed1SJens Glathe regulator-name = "vreg_pmu_rfa_0p8"; 33316a7fed1SJens Glathe }; 33416a7fed1SJens Glathe 33516a7fed1SJens Glathe vreg_pmu_rfa_1p2: ldo8 { 33616a7fed1SJens Glathe regulator-name = "vreg_pmu_rfa_1p2"; 33716a7fed1SJens Glathe }; 33816a7fed1SJens Glathe 33916a7fed1SJens Glathe vreg_pmu_rfa_1p7: ldo9 { 34016a7fed1SJens Glathe regulator-name = "vreg_pmu_rfa_1p7"; 34116a7fed1SJens Glathe }; 34216a7fed1SJens Glathe }; 34316a7fed1SJens Glathe }; 34416a7fed1SJens Glathe}; 34516a7fed1SJens Glathe 34616a7fed1SJens Glathe&apps_rsc { 34716a7fed1SJens Glathe regulators-0 { 34816a7fed1SJens Glathe compatible = "qcom,pm8350-rpmh-regulators"; 34916a7fed1SJens Glathe qcom,pmic-id = "b"; 35016a7fed1SJens Glathe 35116a7fed1SJens Glathe vdd-s10-supply = <&vreg_vph_pwr>; 35216a7fed1SJens Glathe vdd-s11-supply = <&vreg_vph_pwr>; 35316a7fed1SJens Glathe vdd-s12-supply = <&vreg_vph_pwr>; 35416a7fed1SJens Glathe vdd-l1-l4-supply = <&vreg_s12b>; 35516a7fed1SJens Glathe vdd-l2-l7-supply = <&vreg_bob>; 35616a7fed1SJens Glathe vdd-l3-l5-supply = <&vreg_s11b>; 35716a7fed1SJens Glathe vdd-l6-l9-l10-supply = <&vreg_s12b>; 35816a7fed1SJens Glathe vdd-l8-supply = <&vreg_s12b>; 35916a7fed1SJens Glathe 36016a7fed1SJens Glathe vreg_s10b: smps10 { 36116a7fed1SJens Glathe regulator-name = "vreg_s10b"; 36216a7fed1SJens Glathe regulator-min-microvolt = <1800000>; 36316a7fed1SJens Glathe regulator-max-microvolt = <1800000>; 36416a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 36516a7fed1SJens Glathe regulator-always-on; 36616a7fed1SJens Glathe }; 36716a7fed1SJens Glathe 36816a7fed1SJens Glathe vreg_s11b: smps11 { 36916a7fed1SJens Glathe regulator-name = "vreg_s11b"; 37016a7fed1SJens Glathe regulator-min-microvolt = <1272000>; 37116a7fed1SJens Glathe regulator-max-microvolt = <1272000>; 37216a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 37316a7fed1SJens Glathe }; 37416a7fed1SJens Glathe 37516a7fed1SJens Glathe vreg_s12b: smps12 { 37616a7fed1SJens Glathe regulator-name = "vreg_s12b"; 37716a7fed1SJens Glathe regulator-min-microvolt = <984000>; 37816a7fed1SJens Glathe regulator-max-microvolt = <984000>; 37916a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 38016a7fed1SJens Glathe }; 38116a7fed1SJens Glathe 38216a7fed1SJens Glathe vreg_l1b: ldo1 { 38316a7fed1SJens Glathe regulator-name = "vreg_l1b"; 38416a7fed1SJens Glathe regulator-min-microvolt = <912000>; 38516a7fed1SJens Glathe regulator-max-microvolt = <912000>; 38616a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 38716a7fed1SJens Glathe }; 38816a7fed1SJens Glathe 38916a7fed1SJens Glathe vreg_l3b: ldo3 { 39016a7fed1SJens Glathe regulator-name = "vreg_l3b"; 39116a7fed1SJens Glathe regulator-min-microvolt = <1200000>; 39216a7fed1SJens Glathe regulator-max-microvolt = <1200000>; 39316a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 39416a7fed1SJens Glathe regulator-boot-on; 39516a7fed1SJens Glathe }; 39616a7fed1SJens Glathe 39716a7fed1SJens Glathe vreg_l4b: ldo4 { 39816a7fed1SJens Glathe regulator-name = "vreg_l4b"; 39916a7fed1SJens Glathe regulator-min-microvolt = <912000>; 40016a7fed1SJens Glathe regulator-max-microvolt = <912000>; 40116a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 40216a7fed1SJens Glathe }; 40316a7fed1SJens Glathe 40416a7fed1SJens Glathe vreg_l6b: ldo6 { 40516a7fed1SJens Glathe regulator-name = "vreg_l6b"; 40616a7fed1SJens Glathe regulator-min-microvolt = <880000>; 40716a7fed1SJens Glathe regulator-max-microvolt = <880000>; 40816a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 40916a7fed1SJens Glathe regulator-boot-on; 41016a7fed1SJens Glathe }; 41116a7fed1SJens Glathe }; 41216a7fed1SJens Glathe 41316a7fed1SJens Glathe regulators-1 { 41416a7fed1SJens Glathe compatible = "qcom,pm8350c-rpmh-regulators"; 41516a7fed1SJens Glathe qcom,pmic-id = "c"; 41616a7fed1SJens Glathe 41716a7fed1SJens Glathe vdd-bob-supply = <&vreg_vph_pwr>; 41816a7fed1SJens Glathe vdd-l1-l12-supply = <&vreg_s1c>; 41916a7fed1SJens Glathe vdd-l2-l8-supply = <&vreg_s1c>; 42016a7fed1SJens Glathe vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; 42116a7fed1SJens Glathe vdd-l6-l9-l11-supply = <&vreg_bob>; 42216a7fed1SJens Glathe vdd-l10-supply = <&vreg_s11b>; 42316a7fed1SJens Glathe 42416a7fed1SJens Glathe vreg_s1c: smps1 { 42516a7fed1SJens Glathe regulator-name = "vreg_s1c"; 42616a7fed1SJens Glathe regulator-min-microvolt = <1880000>; 42716a7fed1SJens Glathe regulator-max-microvolt = <1900000>; 42816a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 42916a7fed1SJens Glathe regulator-always-on; 43016a7fed1SJens Glathe }; 43116a7fed1SJens Glathe 43216a7fed1SJens Glathe vreg_l1c: ldo1 { 43316a7fed1SJens Glathe regulator-name = "vreg_l1c"; 43416a7fed1SJens Glathe regulator-min-microvolt = <1800000>; 43516a7fed1SJens Glathe regulator-max-microvolt = <1800000>; 43616a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 43716a7fed1SJens Glathe }; 43816a7fed1SJens Glathe 43916a7fed1SJens Glathe vreg_l6c: ldo6 { 44016a7fed1SJens Glathe regulator-name = "vreg_l6c"; 44116a7fed1SJens Glathe regulator-min-microvolt = <1800000>; 44216a7fed1SJens Glathe regulator-max-microvolt = <2960000>; 44316a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 44416a7fed1SJens Glathe }; 44516a7fed1SJens Glathe 44616a7fed1SJens Glathe vreg_l7c: ldo7 { 44716a7fed1SJens Glathe regulator-name = "vreg_l7c"; 44816a7fed1SJens Glathe regulator-min-microvolt = <2504000>; 44916a7fed1SJens Glathe regulator-max-microvolt = <2504000>; 45016a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 45116a7fed1SJens Glathe regulator-allow-set-load; 45216a7fed1SJens Glathe regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 45316a7fed1SJens Glathe RPMH_REGULATOR_MODE_HPM>; 45416a7fed1SJens Glathe }; 45516a7fed1SJens Glathe 45616a7fed1SJens Glathe vreg_l8c: ldo8 { 45716a7fed1SJens Glathe regulator-name = "vreg_l8c"; 45816a7fed1SJens Glathe regulator-min-microvolt = <1800000>; 45916a7fed1SJens Glathe regulator-max-microvolt = <1800000>; 46016a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 46116a7fed1SJens Glathe }; 46216a7fed1SJens Glathe 46316a7fed1SJens Glathe vreg_l9c: ldo9 { 46416a7fed1SJens Glathe regulator-name = "vreg_l9c"; 46516a7fed1SJens Glathe regulator-min-microvolt = <2960000>; 46616a7fed1SJens Glathe regulator-max-microvolt = <2960000>; 46716a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 46816a7fed1SJens Glathe }; 46916a7fed1SJens Glathe 47016a7fed1SJens Glathe vreg_l12c: ldo12 { 47116a7fed1SJens Glathe regulator-name = "vreg_l12c"; 47216a7fed1SJens Glathe regulator-min-microvolt = <1800000>; 47316a7fed1SJens Glathe regulator-max-microvolt = <1800000>; 47416a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 47516a7fed1SJens Glathe }; 47616a7fed1SJens Glathe 47716a7fed1SJens Glathe vreg_l13c: ldo13 { 47816a7fed1SJens Glathe regulator-name = "vreg_l13c"; 47916a7fed1SJens Glathe regulator-min-microvolt = <3072000>; 48016a7fed1SJens Glathe regulator-max-microvolt = <3072000>; 48116a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 48216a7fed1SJens Glathe }; 48316a7fed1SJens Glathe 48416a7fed1SJens Glathe vreg_bob: bob { 48516a7fed1SJens Glathe regulator-name = "vreg_bob"; 48616a7fed1SJens Glathe regulator-min-microvolt = <3008000>; 48716a7fed1SJens Glathe regulator-max-microvolt = <3960000>; 48816a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 48916a7fed1SJens Glathe regulator-always-on; 49016a7fed1SJens Glathe }; 49116a7fed1SJens Glathe }; 49216a7fed1SJens Glathe 49316a7fed1SJens Glathe regulators-2 { 49416a7fed1SJens Glathe compatible = "qcom,pm8350-rpmh-regulators"; 49516a7fed1SJens Glathe qcom,pmic-id = "d"; 49616a7fed1SJens Glathe 49716a7fed1SJens Glathe vdd-l1-l4-supply = <&vreg_s11b>; 49816a7fed1SJens Glathe vdd-l2-l7-supply = <&vreg_bob>; 49916a7fed1SJens Glathe vdd-l3-l5-supply = <&vreg_s11b>; 50016a7fed1SJens Glathe vdd-l6-l9-l10-supply = <&vreg_s12b>; 50116a7fed1SJens Glathe vdd-l8-supply = <&vreg_s12b>; 50216a7fed1SJens Glathe 50316a7fed1SJens Glathe vreg_l2d: ldo2 { 50416a7fed1SJens Glathe regulator-name = "vreg_l2d"; 50516a7fed1SJens Glathe regulator-min-microvolt = <3072000>; 50616a7fed1SJens Glathe regulator-max-microvolt = <3072000>; 50716a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 50816a7fed1SJens Glathe }; 50916a7fed1SJens Glathe 51016a7fed1SJens Glathe vreg_l3d: ldo3 { 51116a7fed1SJens Glathe regulator-name = "vreg_l3d"; 51216a7fed1SJens Glathe regulator-min-microvolt = <1200000>; 51316a7fed1SJens Glathe regulator-max-microvolt = <1200000>; 51416a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 51516a7fed1SJens Glathe regulator-allow-set-load; 51616a7fed1SJens Glathe regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 51716a7fed1SJens Glathe RPMH_REGULATOR_MODE_HPM>; 51816a7fed1SJens Glathe }; 51916a7fed1SJens Glathe 52016a7fed1SJens Glathe vreg_l4d: ldo4 { 52116a7fed1SJens Glathe regulator-name = "vreg_l4d"; 52216a7fed1SJens Glathe regulator-min-microvolt = <1200000>; 52316a7fed1SJens Glathe regulator-max-microvolt = <1200000>; 52416a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 52516a7fed1SJens Glathe }; 52616a7fed1SJens Glathe 52716a7fed1SJens Glathe vreg_l6d: ldo6 { 52816a7fed1SJens Glathe regulator-name = "vreg_l6d"; 52916a7fed1SJens Glathe regulator-min-microvolt = <880000>; 53016a7fed1SJens Glathe regulator-max-microvolt = <880000>; 53116a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 53216a7fed1SJens Glathe }; 53316a7fed1SJens Glathe 53416a7fed1SJens Glathe vreg_l7d: ldo7 { 53516a7fed1SJens Glathe regulator-name = "vreg_l7d"; 53616a7fed1SJens Glathe regulator-min-microvolt = <3072000>; 53716a7fed1SJens Glathe regulator-max-microvolt = <3072000>; 53816a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 53916a7fed1SJens Glathe }; 54016a7fed1SJens Glathe 54116a7fed1SJens Glathe vreg_l8d: ldo8 { 54216a7fed1SJens Glathe regulator-name = "vreg_l8d"; 54316a7fed1SJens Glathe regulator-min-microvolt = <912000>; 54416a7fed1SJens Glathe regulator-max-microvolt = <912000>; 54516a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 54616a7fed1SJens Glathe }; 54716a7fed1SJens Glathe 54816a7fed1SJens Glathe vreg_l9d: ldo9 { 54916a7fed1SJens Glathe regulator-name = "vreg_l9d"; 55016a7fed1SJens Glathe regulator-min-microvolt = <912000>; 55116a7fed1SJens Glathe regulator-max-microvolt = <912000>; 55216a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 55316a7fed1SJens Glathe }; 55416a7fed1SJens Glathe 55516a7fed1SJens Glathe vreg_l10d: ldo10 { 55616a7fed1SJens Glathe regulator-name = "vreg_l10d"; 55716a7fed1SJens Glathe regulator-min-microvolt = <912000>; 55816a7fed1SJens Glathe regulator-max-microvolt = <912000>; 55916a7fed1SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 56016a7fed1SJens Glathe }; 56116a7fed1SJens Glathe }; 56216a7fed1SJens Glathe}; 56316a7fed1SJens Glathe 56416a7fed1SJens Glathe&dispcc0 { 56516a7fed1SJens Glathe status = "okay"; 56616a7fed1SJens Glathe}; 56716a7fed1SJens Glathe 56816a7fed1SJens Glathe&gpu { 56916a7fed1SJens Glathe status = "okay"; 57016a7fed1SJens Glathe 57116a7fed1SJens Glathe zap-shader { 57216a7fed1SJens Glathe memory-region = <&gpu_mem>; 57316a7fed1SJens Glathe firmware-name = "qcom/sc8280xp/microsoft/blackrock/qcdxkmsuc8280.mbn"; 57416a7fed1SJens Glathe }; 57516a7fed1SJens Glathe}; 57616a7fed1SJens Glathe 57716a7fed1SJens Glathe&mdss0 { 57816a7fed1SJens Glathe status = "okay"; 57916a7fed1SJens Glathe}; 58016a7fed1SJens Glathe 58116a7fed1SJens Glathe&mdss0_dp0 { 58216a7fed1SJens Glathe status = "okay"; 58316a7fed1SJens Glathe}; 58416a7fed1SJens Glathe 58516a7fed1SJens Glathe&mdss0_dp0_out { 58616a7fed1SJens Glathe data-lanes = <0 1>; 58716a7fed1SJens Glathe remote-endpoint = <&usb_0_qmpphy_dp_in>; 58816a7fed1SJens Glathe}; 58916a7fed1SJens Glathe 59016a7fed1SJens Glathe&mdss0_dp1 { 59116a7fed1SJens Glathe status = "okay"; 59216a7fed1SJens Glathe}; 59316a7fed1SJens Glathe 59416a7fed1SJens Glathe&mdss0_dp1_out { 59516a7fed1SJens Glathe data-lanes = <0 1>; 59616a7fed1SJens Glathe remote-endpoint = <&usb_1_qmpphy_dp_in>; 59716a7fed1SJens Glathe}; 59816a7fed1SJens Glathe 59916a7fed1SJens Glathe&mdss0_dp2 { 60016a7fed1SJens Glathe compatible = "qcom,sc8280xp-dp"; 60116a7fed1SJens Glathe 60216a7fed1SJens Glathe data-lanes = <0 1 2 3>; 60316a7fed1SJens Glathe 60416a7fed1SJens Glathe status = "okay"; 60516a7fed1SJens Glathe 60616a7fed1SJens Glathe ports { 60716a7fed1SJens Glathe port@1 { 60816a7fed1SJens Glathe reg = <1>; 60916a7fed1SJens Glathe mdss0_dp2_phy_out: endpoint { 61016a7fed1SJens Glathe remote-endpoint = <&dp1_connector_in>; 61116a7fed1SJens Glathe }; 61216a7fed1SJens Glathe }; 61316a7fed1SJens Glathe }; 61416a7fed1SJens Glathe}; 61516a7fed1SJens Glathe 61616a7fed1SJens Glathe&mdss0_dp2_phy { 61716a7fed1SJens Glathe compatible = "qcom,sc8280xp-dp-phy"; 61816a7fed1SJens Glathe 61916a7fed1SJens Glathe vdda-phy-supply = <&vreg_l3b>; 62016a7fed1SJens Glathe vdda-pll-supply = <&vreg_l6b>; 62116a7fed1SJens Glathe 62216a7fed1SJens Glathe status = "okay"; 62316a7fed1SJens Glathe}; 62416a7fed1SJens Glathe 62516a7fed1SJens Glathe&pcie2a { 62616a7fed1SJens Glathe perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; 62716a7fed1SJens Glathe wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; 62816a7fed1SJens Glathe 62916a7fed1SJens Glathe vddpe-3v3-supply = <&vreg_nvme>; 63016a7fed1SJens Glathe 63116a7fed1SJens Glathe pinctrl-0 = <&pcie2a_default>; 63216a7fed1SJens Glathe pinctrl-names = "default"; 63316a7fed1SJens Glathe 63416a7fed1SJens Glathe status = "okay"; 63516a7fed1SJens Glathe}; 63616a7fed1SJens Glathe 63716a7fed1SJens Glathe&pcie2a_phy { 63816a7fed1SJens Glathe vdda-phy-supply = <&vreg_l4d>; 63916a7fed1SJens Glathe vdda-pll-supply = <&vreg_l6d>; 64016a7fed1SJens Glathe 64116a7fed1SJens Glathe status = "okay"; 64216a7fed1SJens Glathe}; 64316a7fed1SJens Glathe 64416a7fed1SJens Glathe&pcie4 { 64516a7fed1SJens Glathe max-link-speed = <2>; 64616a7fed1SJens Glathe 64716a7fed1SJens Glathe perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>; 64816a7fed1SJens Glathe wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>; 64916a7fed1SJens Glathe 65016a7fed1SJens Glathe vddpe-3v3-supply = <&vreg_wlan>; 65116a7fed1SJens Glathe 65216a7fed1SJens Glathe pinctrl-0 = <&pcie4_default>; 65316a7fed1SJens Glathe pinctrl-names = "default"; 65416a7fed1SJens Glathe 65516a7fed1SJens Glathe status = "okay"; 65616a7fed1SJens Glathe}; 65716a7fed1SJens Glathe 65816a7fed1SJens Glathe&pcie4_port0 { 65916a7fed1SJens Glathe wifi@0 { 66016a7fed1SJens Glathe compatible = "pci17cb,1103"; 66116a7fed1SJens Glathe reg = <0x10000 0x0 0x0 0x0 0x0>; 66216a7fed1SJens Glathe 66316a7fed1SJens Glathe vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>; 66416a7fed1SJens Glathe vddaon-supply = <&vreg_pmu_aon_0p8>; 66516a7fed1SJens Glathe vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 66616a7fed1SJens Glathe vddwlmx-supply = <&vreg_pmu_wlmx_0p8>; 66716a7fed1SJens Glathe vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>; 66816a7fed1SJens Glathe vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>; 66916a7fed1SJens Glathe vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 67016a7fed1SJens Glathe vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 67116a7fed1SJens Glathe vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>; 67216a7fed1SJens Glathe 673*d12ce84cSKrzysztof Kozlowski qcom,calibration-variant = "MS_Volterra"; 67416a7fed1SJens Glathe }; 67516a7fed1SJens Glathe}; 67616a7fed1SJens Glathe 67716a7fed1SJens Glathe&pcie4_phy { 67816a7fed1SJens Glathe vdda-phy-supply = <&vreg_l4d>; 67916a7fed1SJens Glathe vdda-pll-supply = <&vreg_l6d>; 68016a7fed1SJens Glathe 68116a7fed1SJens Glathe status = "okay"; 68216a7fed1SJens Glathe}; 68316a7fed1SJens Glathe 68416a7fed1SJens Glathe&pmc8280c_lpg { 68516a7fed1SJens Glathe status = "okay"; 68616a7fed1SJens Glathe}; 68716a7fed1SJens Glathe 68816a7fed1SJens Glathe&pmk8280_adc_tm { 68916a7fed1SJens Glathe status = "okay"; 69016a7fed1SJens Glathe 69116a7fed1SJens Glathe sys-therm@0 { 69216a7fed1SJens Glathe reg = <0>; 69316a7fed1SJens Glathe io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(1)>; 69416a7fed1SJens Glathe qcom,hw-settle-time-us = <200>; 69516a7fed1SJens Glathe qcom,avg-samples = <2>; 69616a7fed1SJens Glathe qcom,ratiometric; 69716a7fed1SJens Glathe }; 69816a7fed1SJens Glathe 69916a7fed1SJens Glathe sys-therm@1 { 70016a7fed1SJens Glathe reg = <1>; 70116a7fed1SJens Glathe io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(1)>; 70216a7fed1SJens Glathe qcom,hw-settle-time-us = <200>; 70316a7fed1SJens Glathe qcom,avg-samples = <2>; 70416a7fed1SJens Glathe qcom,ratiometric; 70516a7fed1SJens Glathe }; 70616a7fed1SJens Glathe 70716a7fed1SJens Glathe sys-therm@2 { 70816a7fed1SJens Glathe reg = <2>; 70916a7fed1SJens Glathe io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(1)>; 71016a7fed1SJens Glathe qcom,hw-settle-time-us = <200>; 71116a7fed1SJens Glathe qcom,avg-samples = <2>; 71216a7fed1SJens Glathe qcom,ratiometric; 71316a7fed1SJens Glathe }; 71416a7fed1SJens Glathe 71516a7fed1SJens Glathe sys-therm@3 { 71616a7fed1SJens Glathe reg = <3>; 71716a7fed1SJens Glathe io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)>; 71816a7fed1SJens Glathe qcom,hw-settle-time-us = <200>; 71916a7fed1SJens Glathe qcom,avg-samples = <2>; 72016a7fed1SJens Glathe qcom,ratiometric; 72116a7fed1SJens Glathe }; 72216a7fed1SJens Glathe 72316a7fed1SJens Glathe sys-therm@4 { 72416a7fed1SJens Glathe reg = <4>; 72516a7fed1SJens Glathe io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM1_100K_PU(3)>; 72616a7fed1SJens Glathe qcom,hw-settle-time-us = <200>; 72716a7fed1SJens Glathe qcom,avg-samples = <2>; 72816a7fed1SJens Glathe qcom,ratiometric; 72916a7fed1SJens Glathe }; 73016a7fed1SJens Glathe 73116a7fed1SJens Glathe sys-therm@5 { 73216a7fed1SJens Glathe reg = <5>; 73316a7fed1SJens Glathe io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM2_100K_PU(3)>; 73416a7fed1SJens Glathe qcom,hw-settle-time-us = <200>; 73516a7fed1SJens Glathe qcom,avg-samples = <2>; 73616a7fed1SJens Glathe qcom,ratiometric; 73716a7fed1SJens Glathe }; 73816a7fed1SJens Glathe 73916a7fed1SJens Glathe sys-therm@6 { 74016a7fed1SJens Glathe reg = <6>; 74116a7fed1SJens Glathe io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM3_100K_PU(3)>; 74216a7fed1SJens Glathe qcom,hw-settle-time-us = <200>; 74316a7fed1SJens Glathe qcom,avg-samples = <2>; 74416a7fed1SJens Glathe qcom,ratiometric; 74516a7fed1SJens Glathe }; 74616a7fed1SJens Glathe 74716a7fed1SJens Glathe sys-therm@7 { 74816a7fed1SJens Glathe reg = <7>; 74916a7fed1SJens Glathe io-channels = <&pmk8280_vadc PM8350_ADC7_AMUX_THM4_100K_PU(3)>; 75016a7fed1SJens Glathe qcom,hw-settle-time-us = <200>; 75116a7fed1SJens Glathe qcom,avg-samples = <2>; 75216a7fed1SJens Glathe qcom,ratiometric; 75316a7fed1SJens Glathe }; 75416a7fed1SJens Glathe}; 75516a7fed1SJens Glathe 75616a7fed1SJens Glathe&pmk8280_pon_pwrkey { 75716a7fed1SJens Glathe status = "okay"; 75816a7fed1SJens Glathe}; 75916a7fed1SJens Glathe 76016a7fed1SJens Glathe&pmk8280_pon_resin { 76116a7fed1SJens Glathe status = "okay"; 76216a7fed1SJens Glathe}; 76316a7fed1SJens Glathe 76416a7fed1SJens Glathe&pmk8280_rtc { 76516a7fed1SJens Glathe nvmem-cells = <&rtc_offset>; 76616a7fed1SJens Glathe nvmem-cell-names = "offset"; 76716a7fed1SJens Glathe 76816a7fed1SJens Glathe status = "okay"; 76916a7fed1SJens Glathe}; 77016a7fed1SJens Glathe 77116a7fed1SJens Glathe&pmk8280_sdam_6 { 77216a7fed1SJens Glathe status = "okay"; 77316a7fed1SJens Glathe 77416a7fed1SJens Glathe rtc_offset: rtc-offset@bc { 77516a7fed1SJens Glathe reg = <0xbc 0x4>; 77616a7fed1SJens Glathe }; 77716a7fed1SJens Glathe}; 77816a7fed1SJens Glathe 77916a7fed1SJens Glathe&pmk8280_vadc { 78016a7fed1SJens Glathe channel@144 { 78116a7fed1SJens Glathe reg = <PM8350_ADC7_AMUX_THM1_100K_PU(1)>; 78216a7fed1SJens Glathe qcom,hw-settle-time = <200>; 78316a7fed1SJens Glathe qcom,ratiometric; 78416a7fed1SJens Glathe label = "sys_therm1"; 78516a7fed1SJens Glathe }; 78616a7fed1SJens Glathe 78716a7fed1SJens Glathe channel@145 { 78816a7fed1SJens Glathe reg = <PM8350_ADC7_AMUX_THM2_100K_PU(1)>; 78916a7fed1SJens Glathe qcom,hw-settle-time = <200>; 79016a7fed1SJens Glathe qcom,ratiometric; 79116a7fed1SJens Glathe label = "sys_therm2"; 79216a7fed1SJens Glathe }; 79316a7fed1SJens Glathe 79416a7fed1SJens Glathe channel@146 { 79516a7fed1SJens Glathe reg = <PM8350_ADC7_AMUX_THM3_100K_PU(1)>; 79616a7fed1SJens Glathe qcom,hw-settle-time = <200>; 79716a7fed1SJens Glathe qcom,ratiometric; 79816a7fed1SJens Glathe label = "sys_therm3"; 79916a7fed1SJens Glathe }; 80016a7fed1SJens Glathe 80116a7fed1SJens Glathe channel@147 { 80216a7fed1SJens Glathe reg = <PM8350_ADC7_AMUX_THM4_100K_PU(1)>; 80316a7fed1SJens Glathe qcom,hw-settle-time = <200>; 80416a7fed1SJens Glathe qcom,ratiometric; 80516a7fed1SJens Glathe label = "sys_therm4"; 80616a7fed1SJens Glathe }; 80716a7fed1SJens Glathe 80816a7fed1SJens Glathe channel@344 { 80916a7fed1SJens Glathe reg = <PM8350_ADC7_AMUX_THM1_100K_PU(3)>; 81016a7fed1SJens Glathe qcom,hw-settle-time = <200>; 81116a7fed1SJens Glathe qcom,ratiometric; 81216a7fed1SJens Glathe label = "sys_therm5"; 81316a7fed1SJens Glathe }; 81416a7fed1SJens Glathe 81516a7fed1SJens Glathe channel@345 { 81616a7fed1SJens Glathe reg = <PM8350_ADC7_AMUX_THM2_100K_PU(3)>; 81716a7fed1SJens Glathe qcom,hw-settle-time = <200>; 81816a7fed1SJens Glathe qcom,ratiometric; 81916a7fed1SJens Glathe label = "sys_therm6"; 82016a7fed1SJens Glathe }; 82116a7fed1SJens Glathe 82216a7fed1SJens Glathe channel@346 { 82316a7fed1SJens Glathe reg = <PM8350_ADC7_AMUX_THM3_100K_PU(3)>; 82416a7fed1SJens Glathe qcom,hw-settle-time = <200>; 82516a7fed1SJens Glathe qcom,ratiometric; 82616a7fed1SJens Glathe label = "sys_therm7"; 82716a7fed1SJens Glathe }; 82816a7fed1SJens Glathe 82916a7fed1SJens Glathe channel@347 { 83016a7fed1SJens Glathe reg = <PM8350_ADC7_AMUX_THM4_100K_PU(3)>; 83116a7fed1SJens Glathe qcom,hw-settle-time = <200>; 83216a7fed1SJens Glathe qcom,ratiometric; 83316a7fed1SJens Glathe label = "sys_therm8"; 83416a7fed1SJens Glathe }; 83516a7fed1SJens Glathe}; 83616a7fed1SJens Glathe 83716a7fed1SJens Glathe&qup0 { 83816a7fed1SJens Glathe status = "okay"; 83916a7fed1SJens Glathe}; 84016a7fed1SJens Glathe 84116a7fed1SJens Glathe&qup1 { 84216a7fed1SJens Glathe status = "okay"; 84316a7fed1SJens Glathe}; 84416a7fed1SJens Glathe 84516a7fed1SJens Glathe&qup2 { 84616a7fed1SJens Glathe status = "okay"; 84716a7fed1SJens Glathe}; 84816a7fed1SJens Glathe 84916a7fed1SJens Glathe&remoteproc_adsp { 85016a7fed1SJens Glathe firmware-name = "qcom/sc8280xp/microsoft/blackrock/qcadsp8280.mbn"; 85116a7fed1SJens Glathe 85216a7fed1SJens Glathe status = "okay"; 85316a7fed1SJens Glathe}; 85416a7fed1SJens Glathe 85516a7fed1SJens Glathe&remoteproc_nsp0 { 85616a7fed1SJens Glathe firmware-name = "qcom/sc8280xp/microsoft/blackrock/qccdsp8280.mbn"; 85716a7fed1SJens Glathe 85816a7fed1SJens Glathe status = "okay"; 85916a7fed1SJens Glathe}; 86016a7fed1SJens Glathe 86116a7fed1SJens Glathe&rxmacro { 86216a7fed1SJens Glathe status = "okay"; 86316a7fed1SJens Glathe}; 86416a7fed1SJens Glathe 86516a7fed1SJens Glathe&sound { 86616a7fed1SJens Glathe compatible = "qcom,sc8280xp-sndcard"; 86716a7fed1SJens Glathe model = "microsoft/blackrock"; 86816a7fed1SJens Glathe 86916a7fed1SJens Glathe wcd-playback-dai-link { 87016a7fed1SJens Glathe link-name = "WCD Playback"; 87116a7fed1SJens Glathe 87216a7fed1SJens Glathe cpu { 87316a7fed1SJens Glathe sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 87416a7fed1SJens Glathe }; 87516a7fed1SJens Glathe 87616a7fed1SJens Glathe codec { 87716a7fed1SJens Glathe sound-dai = <&wcd938x 0>, <&swr1 0>, <&rxmacro 0>; 87816a7fed1SJens Glathe }; 87916a7fed1SJens Glathe 88016a7fed1SJens Glathe platform { 88116a7fed1SJens Glathe sound-dai = <&q6apm>; 88216a7fed1SJens Glathe }; 88316a7fed1SJens Glathe }; 88416a7fed1SJens Glathe 88516a7fed1SJens Glathe wcd-capture-dai-link { 88616a7fed1SJens Glathe link-name = "WCD Capture"; 88716a7fed1SJens Glathe 88816a7fed1SJens Glathe cpu { 88916a7fed1SJens Glathe sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 89016a7fed1SJens Glathe }; 89116a7fed1SJens Glathe 89216a7fed1SJens Glathe codec { 89316a7fed1SJens Glathe sound-dai = <&wcd938x 1>, <&swr2 0>, <&txmacro 0>; 89416a7fed1SJens Glathe }; 89516a7fed1SJens Glathe 89616a7fed1SJens Glathe platform { 89716a7fed1SJens Glathe sound-dai = <&q6apm>; 89816a7fed1SJens Glathe }; 89916a7fed1SJens Glathe }; 90016a7fed1SJens Glathe 90116a7fed1SJens Glathe wsa-dai-link { 90216a7fed1SJens Glathe link-name = "WSA Playback"; 90316a7fed1SJens Glathe 90416a7fed1SJens Glathe cpu { 90516a7fed1SJens Glathe sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 90616a7fed1SJens Glathe }; 90716a7fed1SJens Glathe 90816a7fed1SJens Glathe codec { 90916a7fed1SJens Glathe sound-dai = <&swr0 0>, <&wsamacro 0>; 91016a7fed1SJens Glathe }; 91116a7fed1SJens Glathe 91216a7fed1SJens Glathe platform { 91316a7fed1SJens Glathe sound-dai = <&q6apm>; 91416a7fed1SJens Glathe }; 91516a7fed1SJens Glathe }; 91616a7fed1SJens Glathe 91716a7fed1SJens Glathe va-dai-link { 91816a7fed1SJens Glathe link-name = "VA Capture"; 91916a7fed1SJens Glathe 92016a7fed1SJens Glathe cpu { 92116a7fed1SJens Glathe sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; 92216a7fed1SJens Glathe }; 92316a7fed1SJens Glathe 92416a7fed1SJens Glathe platform { 92516a7fed1SJens Glathe sound-dai = <&q6apm>; 92616a7fed1SJens Glathe }; 92716a7fed1SJens Glathe 92816a7fed1SJens Glathe codec { 92916a7fed1SJens Glathe sound-dai = <&vamacro 0>; 93016a7fed1SJens Glathe }; 93116a7fed1SJens Glathe }; 93216a7fed1SJens Glathe}; 93316a7fed1SJens Glathe 93416a7fed1SJens Glathe&swr0 { 93516a7fed1SJens Glathe status = "okay"; 93616a7fed1SJens Glathe}; 93716a7fed1SJens Glathe 93816a7fed1SJens Glathe&swr1 { 93916a7fed1SJens Glathe status = "okay"; 94016a7fed1SJens Glathe 94116a7fed1SJens Glathe wcd_rx: wcd9380-rx@0,4 { 94216a7fed1SJens Glathe compatible = "sdw20217010d00"; 94316a7fed1SJens Glathe reg = <0 4>; 94416a7fed1SJens Glathe qcom,rx-port-mapping = <1 2 3 4 5>; 94516a7fed1SJens Glathe }; 94616a7fed1SJens Glathe}; 94716a7fed1SJens Glathe 94816a7fed1SJens Glathe&swr2 { 94916a7fed1SJens Glathe status = "okay"; 95016a7fed1SJens Glathe 95116a7fed1SJens Glathe wcd_tx: wcd9380-tx@0,3 { 95216a7fed1SJens Glathe compatible = "sdw20217010d00"; 95316a7fed1SJens Glathe reg = <0 3>; 95416a7fed1SJens Glathe qcom,tx-port-mapping = <1 1 2 3>; 95516a7fed1SJens Glathe }; 95616a7fed1SJens Glathe}; 95716a7fed1SJens Glathe 95816a7fed1SJens Glathe&txmacro { 95916a7fed1SJens Glathe status = "okay"; 96016a7fed1SJens Glathe}; 96116a7fed1SJens Glathe 96216a7fed1SJens Glathe&uart2 { 96316a7fed1SJens Glathe pinctrl-0 = <&uart2_default>; 96416a7fed1SJens Glathe pinctrl-names = "default"; 96516a7fed1SJens Glathe 96616a7fed1SJens Glathe status = "okay"; 96716a7fed1SJens Glathe 96816a7fed1SJens Glathe bluetooth { 96916a7fed1SJens Glathe compatible = "qcom,wcn6855-bt"; 97016a7fed1SJens Glathe 97116a7fed1SJens Glathe vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>; 97216a7fed1SJens Glathe vddaon-supply = <&vreg_pmu_aon_0p8>; 97316a7fed1SJens Glathe vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 97416a7fed1SJens Glathe vddwlmx-supply = <&vreg_pmu_wlmx_0p8>; 97516a7fed1SJens Glathe vddbtcmx-supply = <&vreg_pmu_btcmx_0p8>; 97616a7fed1SJens Glathe vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 97716a7fed1SJens Glathe vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 97816a7fed1SJens Glathe vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>; 97916a7fed1SJens Glathe 98016a7fed1SJens Glathe max-speed = <3200000>; 98116a7fed1SJens Glathe }; 98216a7fed1SJens Glathe}; 98316a7fed1SJens Glathe 98416a7fed1SJens Glathe&usb_0 { 98516a7fed1SJens Glathe status = "okay"; 98616a7fed1SJens Glathe}; 98716a7fed1SJens Glathe 98816a7fed1SJens Glathe&usb_0_dwc3 { 98916a7fed1SJens Glathe dr_mode = "host"; 99016a7fed1SJens Glathe}; 99116a7fed1SJens Glathe 99216a7fed1SJens Glathe&usb_0_dwc3_hs { 99316a7fed1SJens Glathe remote-endpoint = <&pmic_glink_con0_hs>; 99416a7fed1SJens Glathe}; 99516a7fed1SJens Glathe 99616a7fed1SJens Glathe&usb_0_hsphy { 99716a7fed1SJens Glathe vdda-pll-supply = <&vreg_l9d>; 99816a7fed1SJens Glathe vdda18-supply = <&vreg_l1c>; 99916a7fed1SJens Glathe vdda33-supply = <&vreg_l7d>; 100016a7fed1SJens Glathe 100116a7fed1SJens Glathe status = "okay"; 100216a7fed1SJens Glathe}; 100316a7fed1SJens Glathe 100416a7fed1SJens Glathe&usb_0_qmpphy { 100516a7fed1SJens Glathe vdda-phy-supply = <&vreg_l4d>; 100616a7fed1SJens Glathe vdda-pll-supply = <&vreg_l9d>; 100716a7fed1SJens Glathe 100816a7fed1SJens Glathe orientation-switch; 100916a7fed1SJens Glathe 101016a7fed1SJens Glathe status = "okay"; 101116a7fed1SJens Glathe}; 101216a7fed1SJens Glathe 101316a7fed1SJens Glathe&usb_0_qmpphy_dp_in { 101416a7fed1SJens Glathe remote-endpoint = <&mdss0_dp0_out>; 101516a7fed1SJens Glathe}; 101616a7fed1SJens Glathe 101716a7fed1SJens Glathe&usb_0_qmpphy_out { 101816a7fed1SJens Glathe remote-endpoint = <&pmic_glink_con0_ss>; 101916a7fed1SJens Glathe}; 102016a7fed1SJens Glathe 102116a7fed1SJens Glathe&usb_1 { 102216a7fed1SJens Glathe status = "okay"; 102316a7fed1SJens Glathe}; 102416a7fed1SJens Glathe 102516a7fed1SJens Glathe&usb_1_dwc3 { 102616a7fed1SJens Glathe dr_mode = "host"; 102716a7fed1SJens Glathe}; 102816a7fed1SJens Glathe 102916a7fed1SJens Glathe&usb_1_dwc3_hs { 103016a7fed1SJens Glathe remote-endpoint = <&pmic_glink_con1_hs>; 103116a7fed1SJens Glathe}; 103216a7fed1SJens Glathe 103316a7fed1SJens Glathe&usb_1_hsphy { 103416a7fed1SJens Glathe vdda-pll-supply = <&vreg_l4b>; 103516a7fed1SJens Glathe vdda18-supply = <&vreg_l1c>; 103616a7fed1SJens Glathe vdda33-supply = <&vreg_l13c>; 103716a7fed1SJens Glathe 103816a7fed1SJens Glathe status = "okay"; 103916a7fed1SJens Glathe}; 104016a7fed1SJens Glathe 104116a7fed1SJens Glathe&usb_1_qmpphy { 104216a7fed1SJens Glathe vdda-phy-supply = <&vreg_l3b>; 104316a7fed1SJens Glathe vdda-pll-supply = <&vreg_l4b>; 104416a7fed1SJens Glathe 104516a7fed1SJens Glathe orientation-switch; 104616a7fed1SJens Glathe 104716a7fed1SJens Glathe status = "okay"; 104816a7fed1SJens Glathe}; 104916a7fed1SJens Glathe 105016a7fed1SJens Glathe&usb_1_qmpphy_dp_in { 105116a7fed1SJens Glathe remote-endpoint = <&mdss0_dp1_out>; 105216a7fed1SJens Glathe}; 105316a7fed1SJens Glathe 105416a7fed1SJens Glathe&usb_1_qmpphy_out { 105516a7fed1SJens Glathe remote-endpoint = <&pmic_glink_con1_ss>; 105616a7fed1SJens Glathe}; 105716a7fed1SJens Glathe 105816a7fed1SJens Glathe&usb_2 { 105916a7fed1SJens Glathe pinctrl-0 = <&usb2_en_state>; 106016a7fed1SJens Glathe pinctrl-names = "default"; 106116a7fed1SJens Glathe 106216a7fed1SJens Glathe status = "okay"; 106316a7fed1SJens Glathe}; 106416a7fed1SJens Glathe 106516a7fed1SJens Glathe&usb_2_dwc3 { 106616a7fed1SJens Glathe phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>; 106716a7fed1SJens Glathe phy-names = "usb2-0", "usb3-0"; 106816a7fed1SJens Glathe}; 106916a7fed1SJens Glathe 107016a7fed1SJens Glathe&usb_2_hsphy0 { 107116a7fed1SJens Glathe vdda-pll-supply = <&vreg_l1b>; 107216a7fed1SJens Glathe vdda18-supply = <&vreg_l1c>; 107316a7fed1SJens Glathe vdda33-supply = <&vreg_l7d>; 107416a7fed1SJens Glathe 107516a7fed1SJens Glathe status = "okay"; 107616a7fed1SJens Glathe}; 107716a7fed1SJens Glathe 107816a7fed1SJens Glathe&usb_2_qmpphy0 { 107916a7fed1SJens Glathe vdda-phy-supply = <&vreg_l1b>; 108016a7fed1SJens Glathe vdda-pll-supply = <&vreg_l4d>; 108116a7fed1SJens Glathe 108216a7fed1SJens Glathe status = "okay"; 108316a7fed1SJens Glathe}; 108416a7fed1SJens Glathe 108516a7fed1SJens Glathe&vamacro { 108616a7fed1SJens Glathe pinctrl-0 = <&dmic01_default>, <&dmic23_default>; 108716a7fed1SJens Glathe pinctrl-names = "default"; 108816a7fed1SJens Glathe 108916a7fed1SJens Glathe vdd-micb-supply = <&vreg_s10b>; 109016a7fed1SJens Glathe 109116a7fed1SJens Glathe qcom,dmic-sample-rate = <4800000>; 109216a7fed1SJens Glathe 109316a7fed1SJens Glathe status = "okay"; 109416a7fed1SJens Glathe}; 109516a7fed1SJens Glathe 109616a7fed1SJens Glathe&wsamacro { 109716a7fed1SJens Glathe status = "okay"; 109816a7fed1SJens Glathe}; 109916a7fed1SJens Glathe 110016a7fed1SJens Glathe&xo_board_clk { 110116a7fed1SJens Glathe clock-frequency = <38400000>; 110216a7fed1SJens Glathe}; 110316a7fed1SJens Glathe 110416a7fed1SJens Glathe/* PINCTRL */ 110516a7fed1SJens Glathe 110616a7fed1SJens Glathe&lpass_tlmm { 110716a7fed1SJens Glathe status = "okay"; 110816a7fed1SJens Glathe}; 110916a7fed1SJens Glathe 111016a7fed1SJens Glathe&pmc8280_1_gpios { 111116a7fed1SJens Glathe misc_3p3_reg_en: misc-3p3-reg-en-state { 111216a7fed1SJens Glathe pins = "gpio1"; 111316a7fed1SJens Glathe function = "normal"; 111416a7fed1SJens Glathe }; 111516a7fed1SJens Glathe 111616a7fed1SJens Glathe edp_bl_en: edp-bl-en-state { 111716a7fed1SJens Glathe pins = "gpio8"; 111816a7fed1SJens Glathe function = "normal"; 111916a7fed1SJens Glathe }; 112016a7fed1SJens Glathe 112116a7fed1SJens Glathe edp_bl_reg_en: edp-bl-reg-en-state { 112216a7fed1SJens Glathe pins = "gpio9"; 112316a7fed1SJens Glathe function = "normal"; 112416a7fed1SJens Glathe }; 112516a7fed1SJens Glathe}; 112616a7fed1SJens Glathe 112716a7fed1SJens Glathe&pmc8280_2_gpios { 112816a7fed1SJens Glathe wwan_sw_en: wwan-sw-en-state { 112916a7fed1SJens Glathe pins = "gpio1"; 113016a7fed1SJens Glathe function = "normal"; 113116a7fed1SJens Glathe }; 113216a7fed1SJens Glathe}; 113316a7fed1SJens Glathe 113416a7fed1SJens Glathe&pmc8280c_gpios { 113516a7fed1SJens Glathe edp_bl_pwm: edp-bl-pwm-state { 113616a7fed1SJens Glathe pins = "gpio8"; 113716a7fed1SJens Glathe function = "func1"; 113816a7fed1SJens Glathe }; 113916a7fed1SJens Glathe}; 114016a7fed1SJens Glathe 114116a7fed1SJens Glathe&pmr735a_gpios { 114216a7fed1SJens Glathe hastings_reg_en: hastings-reg-en-state { 114316a7fed1SJens Glathe pins = "gpio1"; 114416a7fed1SJens Glathe function = "normal"; 114516a7fed1SJens Glathe }; 114616a7fed1SJens Glathe}; 114716a7fed1SJens Glathe 114816a7fed1SJens Glathe&tlmm { 114916a7fed1SJens Glathe bt_default: bt-default-state { 115016a7fed1SJens Glathe hstp-bt-en-pins { 115116a7fed1SJens Glathe pins = "gpio133"; 115216a7fed1SJens Glathe function = "gpio"; 115316a7fed1SJens Glathe drive-strength = <16>; 115416a7fed1SJens Glathe bias-disable; 115516a7fed1SJens Glathe }; 115616a7fed1SJens Glathe 115716a7fed1SJens Glathe hstp-sw-ctrl-pins { 115816a7fed1SJens Glathe pins = "gpio132"; 115916a7fed1SJens Glathe function = "gpio"; 116016a7fed1SJens Glathe bias-pull-down; 116116a7fed1SJens Glathe }; 116216a7fed1SJens Glathe }; 116316a7fed1SJens Glathe 116416a7fed1SJens Glathe nvme_reg_en: nvme-reg-en-state { 116516a7fed1SJens Glathe pins = "gpio135"; 116616a7fed1SJens Glathe function = "gpio"; 116716a7fed1SJens Glathe drive-strength = <2>; 116816a7fed1SJens Glathe bias-disable; 116916a7fed1SJens Glathe }; 117016a7fed1SJens Glathe 117116a7fed1SJens Glathe pcie2a_default: pcie2a-default-state { 117216a7fed1SJens Glathe clkreq-n-pins { 117316a7fed1SJens Glathe pins = "gpio142"; 117416a7fed1SJens Glathe function = "pcie2a_clkreq"; 117516a7fed1SJens Glathe drive-strength = <2>; 117616a7fed1SJens Glathe bias-pull-up; 117716a7fed1SJens Glathe }; 117816a7fed1SJens Glathe 117916a7fed1SJens Glathe perst-n-pins { 118016a7fed1SJens Glathe pins = "gpio143"; 118116a7fed1SJens Glathe function = "gpio"; 118216a7fed1SJens Glathe drive-strength = <2>; 118316a7fed1SJens Glathe bias-disable; 118416a7fed1SJens Glathe }; 118516a7fed1SJens Glathe 118616a7fed1SJens Glathe wake-n-pins { 118716a7fed1SJens Glathe pins = "gpio145"; 118816a7fed1SJens Glathe function = "gpio"; 118916a7fed1SJens Glathe drive-strength = <2>; 119016a7fed1SJens Glathe bias-pull-up; 119116a7fed1SJens Glathe }; 119216a7fed1SJens Glathe }; 119316a7fed1SJens Glathe 119416a7fed1SJens Glathe pcie3a_default: pcie3a-default-state { 119516a7fed1SJens Glathe clkreq-n-pins { 119616a7fed1SJens Glathe pins = "gpio150"; 119716a7fed1SJens Glathe function = "pcie3a_clkreq"; 119816a7fed1SJens Glathe drive-strength = <2>; 119916a7fed1SJens Glathe bias-pull-up; 120016a7fed1SJens Glathe }; 120116a7fed1SJens Glathe 120216a7fed1SJens Glathe perst-n-pins { 120316a7fed1SJens Glathe pins = "gpio151"; 120416a7fed1SJens Glathe function = "gpio"; 120516a7fed1SJens Glathe drive-strength = <2>; 120616a7fed1SJens Glathe bias-disable; 120716a7fed1SJens Glathe }; 120816a7fed1SJens Glathe 120916a7fed1SJens Glathe wake-n-pins { 121016a7fed1SJens Glathe pins = "gpio148"; 121116a7fed1SJens Glathe function = "gpio"; 121216a7fed1SJens Glathe drive-strength = <2>; 121316a7fed1SJens Glathe bias-pull-up; 121416a7fed1SJens Glathe }; 121516a7fed1SJens Glathe }; 121616a7fed1SJens Glathe 121716a7fed1SJens Glathe pcie4_default: pcie4-default-state { 121816a7fed1SJens Glathe clkreq-n-pins { 121916a7fed1SJens Glathe pins = "gpio140"; 122016a7fed1SJens Glathe function = "pcie4_clkreq"; 122116a7fed1SJens Glathe drive-strength = <2>; 122216a7fed1SJens Glathe bias-pull-up; 122316a7fed1SJens Glathe }; 122416a7fed1SJens Glathe 122516a7fed1SJens Glathe perst-n-pins { 122616a7fed1SJens Glathe pins = "gpio141"; 122716a7fed1SJens Glathe function = "gpio"; 122816a7fed1SJens Glathe drive-strength = <2>; 122916a7fed1SJens Glathe bias-disable; 123016a7fed1SJens Glathe }; 123116a7fed1SJens Glathe 123216a7fed1SJens Glathe wake-n-pins { 123316a7fed1SJens Glathe pins = "gpio139"; 123416a7fed1SJens Glathe function = "gpio"; 123516a7fed1SJens Glathe drive-strength = <2>; 123616a7fed1SJens Glathe bias-pull-up; 123716a7fed1SJens Glathe }; 123816a7fed1SJens Glathe }; 123916a7fed1SJens Glathe 124016a7fed1SJens Glathe uart2_default: uart2-default-state { 124116a7fed1SJens Glathe cts-pins { 124216a7fed1SJens Glathe pins = "gpio121"; 124316a7fed1SJens Glathe function = "qup2"; 124416a7fed1SJens Glathe bias-bus-hold; 124516a7fed1SJens Glathe }; 124616a7fed1SJens Glathe 124716a7fed1SJens Glathe rts-pins { 124816a7fed1SJens Glathe pins = "gpio122"; 124916a7fed1SJens Glathe function = "qup2"; 125016a7fed1SJens Glathe drive-strength = <2>; 125116a7fed1SJens Glathe bias-disable; 125216a7fed1SJens Glathe }; 125316a7fed1SJens Glathe 125416a7fed1SJens Glathe rx-pins { 125516a7fed1SJens Glathe pins = "gpio124"; 125616a7fed1SJens Glathe function = "qup2"; 125716a7fed1SJens Glathe bias-pull-up; 125816a7fed1SJens Glathe }; 125916a7fed1SJens Glathe 126016a7fed1SJens Glathe tx-pins { 126116a7fed1SJens Glathe pins = "gpio123"; 126216a7fed1SJens Glathe function = "qup2"; 126316a7fed1SJens Glathe drive-strength = <2>; 126416a7fed1SJens Glathe bias-disable; 126516a7fed1SJens Glathe }; 126616a7fed1SJens Glathe }; 126716a7fed1SJens Glathe 126816a7fed1SJens Glathe usb0_sbu_default: usb0-sbu-state { 126916a7fed1SJens Glathe oe-n-pins { 127016a7fed1SJens Glathe pins = "gpio101"; 127116a7fed1SJens Glathe function = "gpio"; 127216a7fed1SJens Glathe bias-disable; 127316a7fed1SJens Glathe drive-strength = <16>; 127416a7fed1SJens Glathe output-high; 127516a7fed1SJens Glathe }; 127616a7fed1SJens Glathe 127716a7fed1SJens Glathe sel-pins { 127816a7fed1SJens Glathe pins = "gpio164"; 127916a7fed1SJens Glathe function = "gpio"; 128016a7fed1SJens Glathe bias-disable; 128116a7fed1SJens Glathe drive-strength = <16>; 128216a7fed1SJens Glathe }; 128316a7fed1SJens Glathe }; 128416a7fed1SJens Glathe 128516a7fed1SJens Glathe usb1_sbu_default: usb1-sbu-state { 128616a7fed1SJens Glathe oe-n-pins { 128716a7fed1SJens Glathe pins = "gpio48"; 128816a7fed1SJens Glathe function = "gpio"; 128916a7fed1SJens Glathe bias-disable; 129016a7fed1SJens Glathe drive-strength = <16>; 129116a7fed1SJens Glathe output-high; 129216a7fed1SJens Glathe }; 129316a7fed1SJens Glathe 129416a7fed1SJens Glathe sel-pins { 129516a7fed1SJens Glathe pins = "gpio47"; 129616a7fed1SJens Glathe function = "gpio"; 129716a7fed1SJens Glathe bias-disable; 129816a7fed1SJens Glathe drive-strength = <16>; 129916a7fed1SJens Glathe }; 130016a7fed1SJens Glathe }; 130116a7fed1SJens Glathe 130216a7fed1SJens Glathe usb2_en_state: usb2-en-state { 130316a7fed1SJens Glathe /* TS3USB221A USB2.0 mux select */ 130416a7fed1SJens Glathe pins = "gpio24"; 130516a7fed1SJens Glathe function = "gpio"; 130616a7fed1SJens Glathe drive-strength = <2>; 130716a7fed1SJens Glathe bias-disable; 130816a7fed1SJens Glathe output-low; 130916a7fed1SJens Glathe }; 131016a7fed1SJens Glathe 131116a7fed1SJens Glathe wcd_default: wcd-default-state { 131216a7fed1SJens Glathe reset-pins { 131316a7fed1SJens Glathe pins = "gpio106"; 131416a7fed1SJens Glathe function = "gpio"; 131516a7fed1SJens Glathe bias-disable; 131616a7fed1SJens Glathe }; 131716a7fed1SJens Glathe }; 131816a7fed1SJens Glathe 131916a7fed1SJens Glathe wlan_en: wlan-en-state { 132016a7fed1SJens Glathe pins = "gpio134"; 132116a7fed1SJens Glathe function = "gpio"; 132216a7fed1SJens Glathe drive-strength = <8>; 132316a7fed1SJens Glathe bias-pull-down; 132416a7fed1SJens Glathe }; 132516a7fed1SJens Glathe}; 1326