xref: /linux/scripts/dtc/include-prefixes/arm64/qcom/lemans-pmics.dtsi (revision 4f38da1f027ea2c9f01bb71daa7a299c191b6940)
1*d39e1d73SWasim Nazir// SPDX-License-Identifier: BSD-3-Clause
2*d39e1d73SWasim Nazir/*
3*d39e1d73SWasim Nazir * Copyright (c) 2023, Linaro Limited
4*d39e1d73SWasim Nazir */
5*d39e1d73SWasim Nazir
6*d39e1d73SWasim Nazir#include <dt-bindings/input/input.h>
7*d39e1d73SWasim Nazir#include <dt-bindings/spmi/spmi.h>
8*d39e1d73SWasim Nazir
9*d39e1d73SWasim Nazir/ {
10*d39e1d73SWasim Nazir	thermal-zones {
11*d39e1d73SWasim Nazir		pmm8654au_0_thermal: pm8775-0-thermal {
12*d39e1d73SWasim Nazir			polling-delay-passive = <100>;
13*d39e1d73SWasim Nazir
14*d39e1d73SWasim Nazir			thermal-sensors = <&pmm8654au_0_temp_alarm>;
15*d39e1d73SWasim Nazir
16*d39e1d73SWasim Nazir			trips {
17*d39e1d73SWasim Nazir				trip0 {
18*d39e1d73SWasim Nazir					temperature = <105000>;
19*d39e1d73SWasim Nazir					hysteresis = <0>;
20*d39e1d73SWasim Nazir					type = "passive";
21*d39e1d73SWasim Nazir				};
22*d39e1d73SWasim Nazir
23*d39e1d73SWasim Nazir				trip1 {
24*d39e1d73SWasim Nazir					temperature = <125000>;
25*d39e1d73SWasim Nazir					hysteresis = <0>;
26*d39e1d73SWasim Nazir					type = "critical";
27*d39e1d73SWasim Nazir				};
28*d39e1d73SWasim Nazir			};
29*d39e1d73SWasim Nazir		};
30*d39e1d73SWasim Nazir
31*d39e1d73SWasim Nazir		pmm8654au_1_thermal: pm8775-1-thermal {
32*d39e1d73SWasim Nazir			polling-delay-passive = <100>;
33*d39e1d73SWasim Nazir
34*d39e1d73SWasim Nazir			thermal-sensors = <&pmm8654au_1_temp_alarm>;
35*d39e1d73SWasim Nazir
36*d39e1d73SWasim Nazir			trips {
37*d39e1d73SWasim Nazir				trip0 {
38*d39e1d73SWasim Nazir					temperature = <105000>;
39*d39e1d73SWasim Nazir					hysteresis = <0>;
40*d39e1d73SWasim Nazir					type = "passive";
41*d39e1d73SWasim Nazir				};
42*d39e1d73SWasim Nazir
43*d39e1d73SWasim Nazir				trip1 {
44*d39e1d73SWasim Nazir					temperature = <125000>;
45*d39e1d73SWasim Nazir					hysteresis = <0>;
46*d39e1d73SWasim Nazir					type = "critical";
47*d39e1d73SWasim Nazir				};
48*d39e1d73SWasim Nazir			};
49*d39e1d73SWasim Nazir		};
50*d39e1d73SWasim Nazir
51*d39e1d73SWasim Nazir		pmm8654au_2_thermal: pm8775-2-thermal {
52*d39e1d73SWasim Nazir			polling-delay-passive = <100>;
53*d39e1d73SWasim Nazir
54*d39e1d73SWasim Nazir			thermal-sensors = <&pmm8654au_2_temp_alarm>;
55*d39e1d73SWasim Nazir
56*d39e1d73SWasim Nazir			trips {
57*d39e1d73SWasim Nazir				trip0 {
58*d39e1d73SWasim Nazir					temperature = <105000>;
59*d39e1d73SWasim Nazir					hysteresis = <0>;
60*d39e1d73SWasim Nazir					type = "passive";
61*d39e1d73SWasim Nazir				};
62*d39e1d73SWasim Nazir
63*d39e1d73SWasim Nazir				trip1 {
64*d39e1d73SWasim Nazir					temperature = <125000>;
65*d39e1d73SWasim Nazir					hysteresis = <0>;
66*d39e1d73SWasim Nazir					type = "critical";
67*d39e1d73SWasim Nazir				};
68*d39e1d73SWasim Nazir			};
69*d39e1d73SWasim Nazir		};
70*d39e1d73SWasim Nazir
71*d39e1d73SWasim Nazir		pmm8654au_3_thermal: pm8775-3-thermal {
72*d39e1d73SWasim Nazir			polling-delay-passive = <100>;
73*d39e1d73SWasim Nazir
74*d39e1d73SWasim Nazir			thermal-sensors = <&pmm8654au_3_temp_alarm>;
75*d39e1d73SWasim Nazir
76*d39e1d73SWasim Nazir			trips {
77*d39e1d73SWasim Nazir				trip0 {
78*d39e1d73SWasim Nazir					temperature = <105000>;
79*d39e1d73SWasim Nazir					hysteresis = <0>;
80*d39e1d73SWasim Nazir					type = "passive";
81*d39e1d73SWasim Nazir				};
82*d39e1d73SWasim Nazir
83*d39e1d73SWasim Nazir				trip1 {
84*d39e1d73SWasim Nazir					temperature = <125000>;
85*d39e1d73SWasim Nazir					hysteresis = <0>;
86*d39e1d73SWasim Nazir					type = "critical";
87*d39e1d73SWasim Nazir				};
88*d39e1d73SWasim Nazir			};
89*d39e1d73SWasim Nazir		};
90*d39e1d73SWasim Nazir	};
91*d39e1d73SWasim Nazir
92*d39e1d73SWasim Nazir	reboot-mode {
93*d39e1d73SWasim Nazir		compatible = "nvmem-reboot-mode";
94*d39e1d73SWasim Nazir		nvmem-cells = <&reboot_reason>;
95*d39e1d73SWasim Nazir		nvmem-cell-names = "reboot-mode";
96*d39e1d73SWasim Nazir		mode-recovery = <0x01>;
97*d39e1d73SWasim Nazir		mode-bootloader = <0x02>;
98*d39e1d73SWasim Nazir	};
99*d39e1d73SWasim Nazir};
100*d39e1d73SWasim Nazir
101*d39e1d73SWasim Nazir&spmi_bus {
102*d39e1d73SWasim Nazir	pmm8654au_0: pmic@0 {
103*d39e1d73SWasim Nazir		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
104*d39e1d73SWasim Nazir		reg = <0x0 SPMI_USID>;
105*d39e1d73SWasim Nazir		#address-cells = <1>;
106*d39e1d73SWasim Nazir		#size-cells = <0>;
107*d39e1d73SWasim Nazir
108*d39e1d73SWasim Nazir		pmm8654au_0_temp_alarm: temp-alarm@a00 {
109*d39e1d73SWasim Nazir			compatible = "qcom,spmi-temp-alarm";
110*d39e1d73SWasim Nazir			reg = <0xa00>;
111*d39e1d73SWasim Nazir			interrupts-extended = <&spmi_bus 0x0 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
112*d39e1d73SWasim Nazir			#thermal-sensor-cells = <0>;
113*d39e1d73SWasim Nazir		};
114*d39e1d73SWasim Nazir
115*d39e1d73SWasim Nazir		pmm8654au_0_pon: pon@1200 {
116*d39e1d73SWasim Nazir			compatible = "qcom,pmk8350-pon";
117*d39e1d73SWasim Nazir			reg = <0x1200>, <0x800>;
118*d39e1d73SWasim Nazir			reg-names = "hlos", "pbs";
119*d39e1d73SWasim Nazir
120*d39e1d73SWasim Nazir			pmm8654au_0_pon_pwrkey: pwrkey {
121*d39e1d73SWasim Nazir				compatible = "qcom,pmk8350-pwrkey";
122*d39e1d73SWasim Nazir				interrupts-extended = <&spmi_bus 0x0 0x12 0x7 IRQ_TYPE_EDGE_BOTH>;
123*d39e1d73SWasim Nazir				linux,code = <KEY_POWER>;
124*d39e1d73SWasim Nazir				debounce = <15625>;
125*d39e1d73SWasim Nazir			};
126*d39e1d73SWasim Nazir
127*d39e1d73SWasim Nazir			pmm8654au_0_pon_resin: resin {
128*d39e1d73SWasim Nazir				compatible = "qcom,pmk8350-resin";
129*d39e1d73SWasim Nazir				interrupts-extended = <&spmi_bus 0x0 0x12 0x6 IRQ_TYPE_EDGE_BOTH>;
130*d39e1d73SWasim Nazir				debounce = <15625>;
131*d39e1d73SWasim Nazir				status = "disabled";
132*d39e1d73SWasim Nazir			};
133*d39e1d73SWasim Nazir		};
134*d39e1d73SWasim Nazir
135*d39e1d73SWasim Nazir		pmm8654au_0_gpios: gpio@8800 {
136*d39e1d73SWasim Nazir			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
137*d39e1d73SWasim Nazir			reg = <0x8800>;
138*d39e1d73SWasim Nazir			gpio-controller;
139*d39e1d73SWasim Nazir			gpio-ranges = <&pmm8654au_0_gpios 0 0 12>;
140*d39e1d73SWasim Nazir			#gpio-cells = <2>;
141*d39e1d73SWasim Nazir			interrupt-controller;
142*d39e1d73SWasim Nazir			#interrupt-cells = <2>;
143*d39e1d73SWasim Nazir		};
144*d39e1d73SWasim Nazir
145*d39e1d73SWasim Nazir		pmm8654au_0_sdam_0: nvram@7100 {
146*d39e1d73SWasim Nazir			compatible = "qcom,spmi-sdam";
147*d39e1d73SWasim Nazir			reg = <0x7100>;
148*d39e1d73SWasim Nazir			#address-cells = <1>;
149*d39e1d73SWasim Nazir			#size-cells = <1>;
150*d39e1d73SWasim Nazir			ranges = <0 0x7100 0x100>;
151*d39e1d73SWasim Nazir
152*d39e1d73SWasim Nazir			reboot_reason: reboot-reason@48 {
153*d39e1d73SWasim Nazir				reg = <0x48 0x1>;
154*d39e1d73SWasim Nazir				bits = <1 7>;
155*d39e1d73SWasim Nazir			};
156*d39e1d73SWasim Nazir		};
157*d39e1d73SWasim Nazir	};
158*d39e1d73SWasim Nazir
159*d39e1d73SWasim Nazir	pmm8654au_1: pmic@2 {
160*d39e1d73SWasim Nazir		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
161*d39e1d73SWasim Nazir		reg = <0x2 SPMI_USID>;
162*d39e1d73SWasim Nazir		#address-cells = <1>;
163*d39e1d73SWasim Nazir		#size-cells = <0>;
164*d39e1d73SWasim Nazir
165*d39e1d73SWasim Nazir		pmm8654au_1_temp_alarm: temp-alarm@a00 {
166*d39e1d73SWasim Nazir			compatible = "qcom,spmi-temp-alarm";
167*d39e1d73SWasim Nazir			reg = <0xa00>;
168*d39e1d73SWasim Nazir			interrupts-extended = <&spmi_bus 0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
169*d39e1d73SWasim Nazir			#thermal-sensor-cells = <0>;
170*d39e1d73SWasim Nazir		};
171*d39e1d73SWasim Nazir
172*d39e1d73SWasim Nazir		pmm8654au_1_gpios: gpio@8800 {
173*d39e1d73SWasim Nazir			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
174*d39e1d73SWasim Nazir			reg = <0x8800>;
175*d39e1d73SWasim Nazir			gpio-controller;
176*d39e1d73SWasim Nazir			gpio-ranges = <&pmm8654au_1_gpios 0 0 12>;
177*d39e1d73SWasim Nazir			#gpio-cells = <2>;
178*d39e1d73SWasim Nazir			interrupt-controller;
179*d39e1d73SWasim Nazir			#interrupt-cells = <2>;
180*d39e1d73SWasim Nazir		};
181*d39e1d73SWasim Nazir	};
182*d39e1d73SWasim Nazir
183*d39e1d73SWasim Nazir	pmm8654au_2: pmic@4 {
184*d39e1d73SWasim Nazir		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
185*d39e1d73SWasim Nazir		reg = <0x4 SPMI_USID>;
186*d39e1d73SWasim Nazir		#address-cells = <1>;
187*d39e1d73SWasim Nazir		#size-cells = <0>;
188*d39e1d73SWasim Nazir
189*d39e1d73SWasim Nazir		pmm8654au_2_temp_alarm: temp-alarm@a00 {
190*d39e1d73SWasim Nazir			compatible = "qcom,spmi-temp-alarm";
191*d39e1d73SWasim Nazir			reg = <0xa00>;
192*d39e1d73SWasim Nazir			interrupts-extended = <&spmi_bus 0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
193*d39e1d73SWasim Nazir			#thermal-sensor-cells = <0>;
194*d39e1d73SWasim Nazir		};
195*d39e1d73SWasim Nazir
196*d39e1d73SWasim Nazir		pmm8654au_2_gpios: gpio@8800 {
197*d39e1d73SWasim Nazir			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
198*d39e1d73SWasim Nazir			reg = <0x8800>;
199*d39e1d73SWasim Nazir			gpio-controller;
200*d39e1d73SWasim Nazir			gpio-ranges = <&pmm8654au_2_gpios 0 0 12>;
201*d39e1d73SWasim Nazir			#gpio-cells = <2>;
202*d39e1d73SWasim Nazir			interrupt-controller;
203*d39e1d73SWasim Nazir			#interrupt-cells = <2>;
204*d39e1d73SWasim Nazir		};
205*d39e1d73SWasim Nazir	};
206*d39e1d73SWasim Nazir
207*d39e1d73SWasim Nazir	pmm8654au_3: pmic@6 {
208*d39e1d73SWasim Nazir		compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
209*d39e1d73SWasim Nazir		reg = <0x6 SPMI_USID>;
210*d39e1d73SWasim Nazir		#address-cells = <1>;
211*d39e1d73SWasim Nazir		#size-cells = <0>;
212*d39e1d73SWasim Nazir
213*d39e1d73SWasim Nazir		pmm8654au_3_temp_alarm: temp-alarm@a00 {
214*d39e1d73SWasim Nazir			compatible = "qcom,spmi-temp-alarm";
215*d39e1d73SWasim Nazir			reg = <0xa00>;
216*d39e1d73SWasim Nazir			interrupts-extended = <&spmi_bus 0x6 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
217*d39e1d73SWasim Nazir			#thermal-sensor-cells = <0>;
218*d39e1d73SWasim Nazir		};
219*d39e1d73SWasim Nazir
220*d39e1d73SWasim Nazir		pmm8654au_3_gpios: gpio@8800 {
221*d39e1d73SWasim Nazir			compatible = "qcom,pmm8654au-gpio", "qcom,spmi-gpio";
222*d39e1d73SWasim Nazir			reg = <0x8800>;
223*d39e1d73SWasim Nazir			gpio-controller;
224*d39e1d73SWasim Nazir			gpio-ranges = <&pmm8654au_3_gpios 0 0 12>;
225*d39e1d73SWasim Nazir			#gpio-cells = <2>;
226*d39e1d73SWasim Nazir			interrupt-controller;
227*d39e1d73SWasim Nazir			#interrupt-cells = <2>;
228*d39e1d73SWasim Nazir		};
229*d39e1d73SWasim Nazir	};
230*d39e1d73SWasim Nazir};
231