1*fc1fd9d5SVaradarajan Narayanan// SPDX-License-Identifier: BSD-3-Clause 2*fc1fd9d5SVaradarajan Narayanan/* 3*fc1fd9d5SVaradarajan Narayanan * IPQ9574 RDP433 board device tree source 4*fc1fd9d5SVaradarajan Narayanan * 5*fc1fd9d5SVaradarajan Narayanan * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 6*fc1fd9d5SVaradarajan Narayanan * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 7*fc1fd9d5SVaradarajan Narayanan */ 8*fc1fd9d5SVaradarajan Narayanan 9*fc1fd9d5SVaradarajan Narayanan&pcie1_phy { 10*fc1fd9d5SVaradarajan Narayanan status = "okay"; 11*fc1fd9d5SVaradarajan Narayanan}; 12*fc1fd9d5SVaradarajan Narayanan 13*fc1fd9d5SVaradarajan Narayanan&pcie1 { 14*fc1fd9d5SVaradarajan Narayanan pinctrl-0 = <&pcie1_default>; 15*fc1fd9d5SVaradarajan Narayanan pinctrl-names = "default"; 16*fc1fd9d5SVaradarajan Narayanan 17*fc1fd9d5SVaradarajan Narayanan perst-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; 18*fc1fd9d5SVaradarajan Narayanan wake-gpios = <&tlmm 27 GPIO_ACTIVE_LOW>; 19*fc1fd9d5SVaradarajan Narayanan status = "okay"; 20*fc1fd9d5SVaradarajan Narayanan}; 21*fc1fd9d5SVaradarajan Narayanan 22*fc1fd9d5SVaradarajan Narayanan&pcie2_phy { 23*fc1fd9d5SVaradarajan Narayanan status = "okay"; 24*fc1fd9d5SVaradarajan Narayanan}; 25*fc1fd9d5SVaradarajan Narayanan 26*fc1fd9d5SVaradarajan Narayanan&pcie2 { 27*fc1fd9d5SVaradarajan Narayanan pinctrl-0 = <&pcie2_default>; 28*fc1fd9d5SVaradarajan Narayanan pinctrl-names = "default"; 29*fc1fd9d5SVaradarajan Narayanan 30*fc1fd9d5SVaradarajan Narayanan perst-gpios = <&tlmm 29 GPIO_ACTIVE_LOW>; 31*fc1fd9d5SVaradarajan Narayanan wake-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>; 32*fc1fd9d5SVaradarajan Narayanan status = "okay"; 33*fc1fd9d5SVaradarajan Narayanan}; 34*fc1fd9d5SVaradarajan Narayanan 35*fc1fd9d5SVaradarajan Narayanan&pcie3_phy { 36*fc1fd9d5SVaradarajan Narayanan status = "okay"; 37*fc1fd9d5SVaradarajan Narayanan}; 38*fc1fd9d5SVaradarajan Narayanan 39*fc1fd9d5SVaradarajan Narayanan&pcie3 { 40*fc1fd9d5SVaradarajan Narayanan pinctrl-0 = <&pcie3_default>; 41*fc1fd9d5SVaradarajan Narayanan pinctrl-names = "default"; 42*fc1fd9d5SVaradarajan Narayanan 43*fc1fd9d5SVaradarajan Narayanan perst-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; 44*fc1fd9d5SVaradarajan Narayanan wake-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>; 45*fc1fd9d5SVaradarajan Narayanan status = "okay"; 46*fc1fd9d5SVaradarajan Narayanan}; 47*fc1fd9d5SVaradarajan Narayanan 48*fc1fd9d5SVaradarajan Narayanan&tlmm { 49*fc1fd9d5SVaradarajan Narayanan 50*fc1fd9d5SVaradarajan Narayanan pcie1_default: pcie1-default-state { 51*fc1fd9d5SVaradarajan Narayanan clkreq-n-pins { 52*fc1fd9d5SVaradarajan Narayanan pins = "gpio25"; 53*fc1fd9d5SVaradarajan Narayanan function = "pcie1_clk"; 54*fc1fd9d5SVaradarajan Narayanan drive-strength = <6>; 55*fc1fd9d5SVaradarajan Narayanan bias-pull-up; 56*fc1fd9d5SVaradarajan Narayanan }; 57*fc1fd9d5SVaradarajan Narayanan 58*fc1fd9d5SVaradarajan Narayanan perst-n-pins { 59*fc1fd9d5SVaradarajan Narayanan pins = "gpio26"; 60*fc1fd9d5SVaradarajan Narayanan function = "gpio"; 61*fc1fd9d5SVaradarajan Narayanan drive-strength = <8>; 62*fc1fd9d5SVaradarajan Narayanan bias-pull-down; 63*fc1fd9d5SVaradarajan Narayanan output-low; 64*fc1fd9d5SVaradarajan Narayanan }; 65*fc1fd9d5SVaradarajan Narayanan 66*fc1fd9d5SVaradarajan Narayanan wake-n-pins { 67*fc1fd9d5SVaradarajan Narayanan pins = "gpio27"; 68*fc1fd9d5SVaradarajan Narayanan function = "pcie1_wake"; 69*fc1fd9d5SVaradarajan Narayanan drive-strength = <6>; 70*fc1fd9d5SVaradarajan Narayanan bias-pull-up; 71*fc1fd9d5SVaradarajan Narayanan }; 72*fc1fd9d5SVaradarajan Narayanan }; 73*fc1fd9d5SVaradarajan Narayanan 74*fc1fd9d5SVaradarajan Narayanan pcie2_default: pcie2-default-state { 75*fc1fd9d5SVaradarajan Narayanan clkreq-n-pins { 76*fc1fd9d5SVaradarajan Narayanan pins = "gpio28"; 77*fc1fd9d5SVaradarajan Narayanan function = "pcie2_clk"; 78*fc1fd9d5SVaradarajan Narayanan drive-strength = <6>; 79*fc1fd9d5SVaradarajan Narayanan bias-pull-up; 80*fc1fd9d5SVaradarajan Narayanan }; 81*fc1fd9d5SVaradarajan Narayanan 82*fc1fd9d5SVaradarajan Narayanan perst-n-pins { 83*fc1fd9d5SVaradarajan Narayanan pins = "gpio29"; 84*fc1fd9d5SVaradarajan Narayanan function = "gpio"; 85*fc1fd9d5SVaradarajan Narayanan drive-strength = <8>; 86*fc1fd9d5SVaradarajan Narayanan bias-pull-down; 87*fc1fd9d5SVaradarajan Narayanan output-low; 88*fc1fd9d5SVaradarajan Narayanan }; 89*fc1fd9d5SVaradarajan Narayanan 90*fc1fd9d5SVaradarajan Narayanan wake-n-pins { 91*fc1fd9d5SVaradarajan Narayanan pins = "gpio30"; 92*fc1fd9d5SVaradarajan Narayanan function = "pcie2_wake"; 93*fc1fd9d5SVaradarajan Narayanan drive-strength = <6>; 94*fc1fd9d5SVaradarajan Narayanan bias-pull-up; 95*fc1fd9d5SVaradarajan Narayanan }; 96*fc1fd9d5SVaradarajan Narayanan }; 97*fc1fd9d5SVaradarajan Narayanan 98*fc1fd9d5SVaradarajan Narayanan pcie3_default: pcie3-default-state { 99*fc1fd9d5SVaradarajan Narayanan clkreq-n-pins { 100*fc1fd9d5SVaradarajan Narayanan pins = "gpio31"; 101*fc1fd9d5SVaradarajan Narayanan function = "pcie3_clk"; 102*fc1fd9d5SVaradarajan Narayanan drive-strength = <6>; 103*fc1fd9d5SVaradarajan Narayanan bias-pull-up; 104*fc1fd9d5SVaradarajan Narayanan }; 105*fc1fd9d5SVaradarajan Narayanan 106*fc1fd9d5SVaradarajan Narayanan perst-n-pins { 107*fc1fd9d5SVaradarajan Narayanan pins = "gpio32"; 108*fc1fd9d5SVaradarajan Narayanan function = "gpio"; 109*fc1fd9d5SVaradarajan Narayanan drive-strength = <8>; 110*fc1fd9d5SVaradarajan Narayanan bias-pull-up; 111*fc1fd9d5SVaradarajan Narayanan output-low; 112*fc1fd9d5SVaradarajan Narayanan }; 113*fc1fd9d5SVaradarajan Narayanan 114*fc1fd9d5SVaradarajan Narayanan wake-n-pins { 115*fc1fd9d5SVaradarajan Narayanan pins = "gpio33"; 116*fc1fd9d5SVaradarajan Narayanan function = "pcie3_wake"; 117*fc1fd9d5SVaradarajan Narayanan drive-strength = <6>; 118*fc1fd9d5SVaradarajan Narayanan bias-pull-up; 119*fc1fd9d5SVaradarajan Narayanan }; 120*fc1fd9d5SVaradarajan Narayanan }; 121*fc1fd9d5SVaradarajan Narayanan}; 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