xref: /linux/scripts/dtc/include-prefixes/arm64/mediatek/mt8390-grinn-genio-som.dtsi (revision 0cac5ce06e524755b3dac1e0a060b05992076d93)

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Copyright (C) 2025 Grinn sp. z o.o.
 * Author: Mateusz Koza <mateusz.koza@grinn-global.com>
 */

#include "mt6359.dtsi"
#include <dt-bindings/input/input.h>

/ {
	aliases {
		i2c1 = &i2c1;
		mmc0 = &mmc0;
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	clock-frequency = <400000>;
	status = "okay";
};

&mfg0 {
	domain-supply = <&mt6359_vproc2_buck_reg>;
};

&mfg1 {
	domain-supply = <&mt6359_vsram_others_ldo_reg>;
};

&mmc0 {
	status = "okay";
	pinctrl-names = "default", "state_uhs";
	pinctrl-0 = <&mmc0_default_pins>;
	pinctrl-1 = <&mmc0_uhs_pins>;
	bus-width = <8>;
	max-frequency = <200000000>;
	cap-mmc-highspeed;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	supports-cqe;
	cap-mmc-hw-reset;
	no-sdio;
	no-sd;
	hs400-ds-delay = <0x1481b>;
	vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
	vqmmc-supply = <&mt6359_vufs_ldo_reg>;
	non-removable;
};

&mt6359_vbbck_ldo_reg {
	regulator-always-on;
};

&mt6359_vcn18_ldo_reg {
	regulator-name = "vcn18_pmu";
	regulator-always-on;
};

&mt6359_vcn33_2_bt_ldo_reg {
	regulator-name = "vcn33_2_pmu";
	regulator-always-on;
};

&mt6359_vcore_buck_reg {
	regulator-name = "dvdd_proc_l";
	regulator-always-on;
};

&mt6359_vgpu11_buck_reg {
	regulator-name = "dvdd_core";
	regulator-always-on;
};

&mt6359_vpa_buck_reg {
	regulator-name = "vpa_pmu";
	regulator-max-microvolt = <3100000>;
};

&mt6359_vproc2_buck_reg {
	/* The name "vgpu" is required by mtk-regulator-coupler */
	regulator-name = "vgpu";
	regulator-min-microvolt = <550000>;
	regulator-max-microvolt = <800000>;
	regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
	regulator-coupled-max-spread = <6250>;
};

&mt6359_vpu_buck_reg {
	regulator-name = "dvdd_adsp";
	regulator-always-on;
};

&mt6359_vrf12_ldo_reg {
	regulator-name = "va12_abb2_pmu";
	regulator-always-on;
};

&mt6359_vsim1_ldo_reg {
	regulator-name = "vsim1_pmu";
	regulator-enable-ramp-delay = <480>;
};

&mt6359_vsram_others_ldo_reg {
	/* The name "vsram_gpu" is required by mtk-regulator-coupler */
	regulator-name = "vsram_gpu";
	regulator-min-microvolt = <750000>;
	regulator-max-microvolt = <800000>;
	regulator-coupled-with = <&mt6359_vproc2_buck_reg>;
	regulator-coupled-max-spread = <6250>;
};

&mt6359_vufs_ldo_reg {
	regulator-name = "vufs18_pmu";
	regulator-always-on;
};

&pio {

	i2c1_pins: i2c1-pins {
		pins {
			pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>,
				 <PINMUX_GPIO57__FUNC_B1_SCL1>;
			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
			drive-strength-microamp = <1000>;
		};
	};

	mmc0_default_pins: mmc0-default-pins {
		pins-clk {
			pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
			drive-strength = <6>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};

		pins-cmd-dat {
			pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
				 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
				 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
				 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
				 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
				 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
				 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
				 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
				 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
			input-enable;
			drive-strength = <6>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};

		pins-rst {
			pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
			drive-strength = <6>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};
	};

	mmc0_uhs_pins: mmc0-uhs-pins {
		pins-clk {
			pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
			drive-strength = <8>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};

		pins-cmd-dat {
			pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
				 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
				 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
				 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
				 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
				 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
				 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
				 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
				 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
			input-enable;
			drive-strength = <8>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};

		pins-ds {
			pinmux = <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>;
			drive-strength = <8>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};

		pins-rst {
			pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
			drive-strength = <8>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};
	};
};

&pmic {
	interrupt-parent = <&pio>;
	interrupts = <222 IRQ_TYPE_LEVEL_HIGH>;
	interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;

	keys {
		compatible = "mediatek,mt6359-keys";
		mediatek,long-press-mode = <1>;
		power-off-time-sec = <0>;

		power-key {
			linux,keycodes = <KEY_POWER>;
			wakeup-source;
		};
	};
};