xref: /linux/scripts/dtc/include-prefixes/arm64/mediatek/mt8195-demo.dts (revision 6147314aeedc24ecf70ea5656884b03cba836782) 
1*6147314aSFabien Parent// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*6147314aSFabien Parent/*
3*6147314aSFabien Parent * Copyright (C) 2022 BayLibre, SAS.
4*6147314aSFabien Parent * Author: Fabien Parent <fparent@baylibre.com>
5*6147314aSFabien Parent */
6*6147314aSFabien Parent/dts-v1/;
7*6147314aSFabien Parent
8*6147314aSFabien Parent#include "mt8195.dtsi"
9*6147314aSFabien Parent#include "mt6359.dtsi"
10*6147314aSFabien Parent
11*6147314aSFabien Parent#include <dt-bindings/gpio/gpio.h>
12*6147314aSFabien Parent#include <dt-bindings/input/input.h>
13*6147314aSFabien Parent#include <dt-bindings/pinctrl/mt8195-pinfunc.h>
14*6147314aSFabien Parent#include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
15*6147314aSFabien Parent
16*6147314aSFabien Parent/ {
17*6147314aSFabien Parent	model = "MediaTek MT8195 demo board";
18*6147314aSFabien Parent	compatible = "mediatek,mt8195-demo", "mediatek,mt8195";
19*6147314aSFabien Parent
20*6147314aSFabien Parent	aliases {
21*6147314aSFabien Parent		serial0 = &uart0;
22*6147314aSFabien Parent	};
23*6147314aSFabien Parent
24*6147314aSFabien Parent	chosen {
25*6147314aSFabien Parent		stdout-path = "serial0:921600n8";
26*6147314aSFabien Parent	};
27*6147314aSFabien Parent
28*6147314aSFabien Parent	firmware {
29*6147314aSFabien Parent		optee {
30*6147314aSFabien Parent			compatible = "linaro,optee-tz";
31*6147314aSFabien Parent			method = "smc";
32*6147314aSFabien Parent		};
33*6147314aSFabien Parent	};
34*6147314aSFabien Parent
35*6147314aSFabien Parent	gpio-keys {
36*6147314aSFabien Parent		compatible = "gpio-keys";
37*6147314aSFabien Parent		input-name = "gpio-keys";
38*6147314aSFabien Parent		pinctrl-names = "default";
39*6147314aSFabien Parent		pinctrl-0 = <&gpio_keys_pins>;
40*6147314aSFabien Parent
41*6147314aSFabien Parent		key-0 {
42*6147314aSFabien Parent			gpios = <&pio 106 GPIO_ACTIVE_LOW>;
43*6147314aSFabien Parent			label = "volume_up";
44*6147314aSFabien Parent			linux,code = <KEY_VOLUMEUP>;
45*6147314aSFabien Parent			wakeup-source;
46*6147314aSFabien Parent			debounce-interval = <15>;
47*6147314aSFabien Parent		};
48*6147314aSFabien Parent	};
49*6147314aSFabien Parent
50*6147314aSFabien Parent	memory@40000000 {
51*6147314aSFabien Parent		device_type = "memory";
52*6147314aSFabien Parent		reg = <0 0x40000000 0 0x80000000>;
53*6147314aSFabien Parent	};
54*6147314aSFabien Parent
55*6147314aSFabien Parent	reserved-memory {
56*6147314aSFabien Parent		#address-cells = <2>;
57*6147314aSFabien Parent		#size-cells = <2>;
58*6147314aSFabien Parent		ranges;
59*6147314aSFabien Parent
60*6147314aSFabien Parent		/* 192 KiB reserved for ARM Trusted Firmware (BL31) */
61*6147314aSFabien Parent		bl31_secmon_reserved: secmon@54600000 {
62*6147314aSFabien Parent			no-map;
63*6147314aSFabien Parent			reg = <0 0x54600000 0x0 0x30000>;
64*6147314aSFabien Parent		};
65*6147314aSFabien Parent
66*6147314aSFabien Parent		/* 12 MiB reserved for OP-TEE (BL32)
67*6147314aSFabien Parent		 * +-----------------------+ 0x43e0_0000
68*6147314aSFabien Parent		 * |      SHMEM 2MiB       |
69*6147314aSFabien Parent		 * +-----------------------+ 0x43c0_0000
70*6147314aSFabien Parent		 * |        | TA_RAM  8MiB |
71*6147314aSFabien Parent		 * + TZDRAM +--------------+ 0x4340_0000
72*6147314aSFabien Parent		 * |        | TEE_RAM 2MiB |
73*6147314aSFabien Parent		 * +-----------------------+ 0x4320_0000
74*6147314aSFabien Parent		 */
75*6147314aSFabien Parent		optee_reserved: optee@43200000 {
76*6147314aSFabien Parent			no-map;
77*6147314aSFabien Parent			reg = <0 0x43200000 0 0x00c00000>;
78*6147314aSFabien Parent		};
79*6147314aSFabien Parent	};
80*6147314aSFabien Parent};
81*6147314aSFabien Parent
82*6147314aSFabien Parent&i2c6 {
83*6147314aSFabien Parent	clock-frequency = <400000>;
84*6147314aSFabien Parent	pinctrl-0 = <&i2c6_pins>;
85*6147314aSFabien Parent	pinctrl-names = "default";
86*6147314aSFabien Parent	status = "okay";
87*6147314aSFabien Parent
88*6147314aSFabien Parent	mt6360: pmic@34 {
89*6147314aSFabien Parent		compatible = "mediatek,mt6360";
90*6147314aSFabien Parent		reg = <0x34>;
91*6147314aSFabien Parent		interrupt-controller;
92*6147314aSFabien Parent		interrupts-extended = <&pio 101 IRQ_TYPE_EDGE_FALLING>;
93*6147314aSFabien Parent		interrupt-names = "IRQB";
94*6147314aSFabien Parent
95*6147314aSFabien Parent		charger {
96*6147314aSFabien Parent			compatible = "mediatek,mt6360-chg";
97*6147314aSFabien Parent			richtek,vinovp-microvolt = <14500000>;
98*6147314aSFabien Parent
99*6147314aSFabien Parent			otg_vbus_regulator: usb-otg-vbus-regulator {
100*6147314aSFabien Parent				regulator-compatible = "usb-otg-vbus";
101*6147314aSFabien Parent				regulator-name = "usb-otg-vbus";
102*6147314aSFabien Parent				regulator-min-microvolt = <4425000>;
103*6147314aSFabien Parent				regulator-max-microvolt = <5825000>;
104*6147314aSFabien Parent			};
105*6147314aSFabien Parent		};
106*6147314aSFabien Parent
107*6147314aSFabien Parent		regulator {
108*6147314aSFabien Parent			compatible = "mediatek,mt6360-regulator";
109*6147314aSFabien Parent			LDO_VIN3-supply = <&mt6360_buck2>;
110*6147314aSFabien Parent
111*6147314aSFabien Parent			mt6360_buck1: buck1 {
112*6147314aSFabien Parent				regulator-compatible = "BUCK1";
113*6147314aSFabien Parent				regulator-name = "mt6360,buck1";
114*6147314aSFabien Parent				regulator-min-microvolt = <300000>;
115*6147314aSFabien Parent				regulator-max-microvolt = <1300000>;
116*6147314aSFabien Parent				regulator-allowed-modes = <MT6360_OPMODE_NORMAL
117*6147314aSFabien Parent							   MT6360_OPMODE_LP
118*6147314aSFabien Parent							   MT6360_OPMODE_ULP>;
119*6147314aSFabien Parent				regulator-always-on;
120*6147314aSFabien Parent			};
121*6147314aSFabien Parent
122*6147314aSFabien Parent			mt6360_buck2: buck2 {
123*6147314aSFabien Parent				regulator-compatible = "BUCK2";
124*6147314aSFabien Parent				regulator-name = "mt6360,buck2";
125*6147314aSFabien Parent				regulator-min-microvolt = <300000>;
126*6147314aSFabien Parent				regulator-max-microvolt = <1300000>;
127*6147314aSFabien Parent				regulator-allowed-modes = <MT6360_OPMODE_NORMAL
128*6147314aSFabien Parent							   MT6360_OPMODE_LP
129*6147314aSFabien Parent							   MT6360_OPMODE_ULP>;
130*6147314aSFabien Parent				regulator-always-on;
131*6147314aSFabien Parent			};
132*6147314aSFabien Parent
133*6147314aSFabien Parent			mt6360_ldo1: ldo1 {
134*6147314aSFabien Parent				regulator-compatible = "LDO1";
135*6147314aSFabien Parent				regulator-name = "mt6360,ldo1";
136*6147314aSFabien Parent				regulator-min-microvolt = <1200000>;
137*6147314aSFabien Parent				regulator-max-microvolt = <3600000>;
138*6147314aSFabien Parent				regulator-allowed-modes = <MT6360_OPMODE_NORMAL
139*6147314aSFabien Parent							   MT6360_OPMODE_LP>;
140*6147314aSFabien Parent			};
141*6147314aSFabien Parent
142*6147314aSFabien Parent			mt6360_ldo2: ldo2 {
143*6147314aSFabien Parent				regulator-compatible = "LDO2";
144*6147314aSFabien Parent				regulator-name = "mt6360,ldo2";
145*6147314aSFabien Parent				regulator-min-microvolt = <1200000>;
146*6147314aSFabien Parent				regulator-max-microvolt = <3600000>;
147*6147314aSFabien Parent				regulator-allowed-modes = <MT6360_OPMODE_NORMAL
148*6147314aSFabien Parent							   MT6360_OPMODE_LP>;
149*6147314aSFabien Parent			};
150*6147314aSFabien Parent
151*6147314aSFabien Parent			mt6360_ldo3: ldo3 {
152*6147314aSFabien Parent				regulator-compatible = "LDO3";
153*6147314aSFabien Parent				regulator-name = "mt6360,ldo3";
154*6147314aSFabien Parent				regulator-min-microvolt = <1200000>;
155*6147314aSFabien Parent				regulator-max-microvolt = <3600000>;
156*6147314aSFabien Parent				regulator-allowed-modes = <MT6360_OPMODE_NORMAL
157*6147314aSFabien Parent							   MT6360_OPMODE_LP>;
158*6147314aSFabien Parent			};
159*6147314aSFabien Parent
160*6147314aSFabien Parent			mt6360_ldo5: ldo5 {
161*6147314aSFabien Parent				regulator-compatible = "LDO5";
162*6147314aSFabien Parent				regulator-name = "mt6360,ldo5";
163*6147314aSFabien Parent				regulator-min-microvolt = <2700000>;
164*6147314aSFabien Parent				regulator-max-microvolt = <3600000>;
165*6147314aSFabien Parent				regulator-allowed-modes = <MT6360_OPMODE_NORMAL
166*6147314aSFabien Parent							   MT6360_OPMODE_LP>;
167*6147314aSFabien Parent			};
168*6147314aSFabien Parent
169*6147314aSFabien Parent			mt6360_ldo6: ldo6 {
170*6147314aSFabien Parent				regulator-compatible = "LDO6";
171*6147314aSFabien Parent				regulator-name = "mt6360,ldo6";
172*6147314aSFabien Parent				regulator-min-microvolt = <500000>;
173*6147314aSFabien Parent				regulator-max-microvolt = <2100000>;
174*6147314aSFabien Parent				regulator-allowed-modes = <MT6360_OPMODE_NORMAL
175*6147314aSFabien Parent							   MT6360_OPMODE_LP>;
176*6147314aSFabien Parent			};
177*6147314aSFabien Parent
178*6147314aSFabien Parent			mt6360_ldo7: ldo7 {
179*6147314aSFabien Parent				regulator-compatible = "LDO7";
180*6147314aSFabien Parent				regulator-name = "mt6360,ldo7";
181*6147314aSFabien Parent				regulator-min-microvolt = <500000>;
182*6147314aSFabien Parent				regulator-max-microvolt = <2100000>;
183*6147314aSFabien Parent				regulator-allowed-modes = <MT6360_OPMODE_NORMAL
184*6147314aSFabien Parent							   MT6360_OPMODE_LP>;
185*6147314aSFabien Parent				regulator-always-on;
186*6147314aSFabien Parent			};
187*6147314aSFabien Parent		};
188*6147314aSFabien Parent	};
189*6147314aSFabien Parent};
190*6147314aSFabien Parent
191*6147314aSFabien Parent&mmc0 {
192*6147314aSFabien Parent	status = "okay";
193*6147314aSFabien Parent	pinctrl-names = "default", "state_uhs";
194*6147314aSFabien Parent	pinctrl-0 = <&mmc0_default_pins>;
195*6147314aSFabien Parent	pinctrl-1 = <&mmc0_uhs_pins>;
196*6147314aSFabien Parent	bus-width = <8>;
197*6147314aSFabien Parent	max-frequency = <200000000>;
198*6147314aSFabien Parent	cap-mmc-highspeed;
199*6147314aSFabien Parent	mmc-hs200-1_8v;
200*6147314aSFabien Parent	mmc-hs400-1_8v;
201*6147314aSFabien Parent	cap-mmc-hw-reset;
202*6147314aSFabien Parent	no-sdio;
203*6147314aSFabien Parent	no-sd;
204*6147314aSFabien Parent	hs400-ds-delay = <0x14c11>;
205*6147314aSFabien Parent	vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
206*6147314aSFabien Parent	vqmmc-supply = <&mt6359_vufs_ldo_reg>;
207*6147314aSFabien Parent	non-removable;
208*6147314aSFabien Parent};
209*6147314aSFabien Parent
210*6147314aSFabien Parent&mmc1 {
211*6147314aSFabien Parent	pinctrl-names = "default", "state_uhs";
212*6147314aSFabien Parent	pinctrl-0 = <&mmc1_default_pins>;
213*6147314aSFabien Parent	pinctrl-1 = <&mmc1_uhs_pins>;
214*6147314aSFabien Parent	cd-gpios = <&pio 129 GPIO_ACTIVE_LOW>;
215*6147314aSFabien Parent	bus-width = <4>;
216*6147314aSFabien Parent	max-frequency = <200000000>;
217*6147314aSFabien Parent	cap-sd-highspeed;
218*6147314aSFabien Parent	sd-uhs-sdr50;
219*6147314aSFabien Parent	sd-uhs-sdr104;
220*6147314aSFabien Parent	vmmc-supply = <&mt6360_ldo5>;
221*6147314aSFabien Parent	vqmmc-supply = <&mt6360_ldo3>;
222*6147314aSFabien Parent	status = "okay";
223*6147314aSFabien Parent};
224*6147314aSFabien Parent
225*6147314aSFabien Parent&mt6359_vbbck_ldo_reg {
226*6147314aSFabien Parent	regulator-always-on;
227*6147314aSFabien Parent};
228*6147314aSFabien Parent
229*6147314aSFabien Parent&mt6359_vcore_buck_reg {
230*6147314aSFabien Parent	regulator-always-on;
231*6147314aSFabien Parent};
232*6147314aSFabien Parent
233*6147314aSFabien Parent&mt6359_vgpu11_buck_reg {
234*6147314aSFabien Parent	regulator-always-on;
235*6147314aSFabien Parent};
236*6147314aSFabien Parent
237*6147314aSFabien Parent&mt6359_vproc1_buck_reg {
238*6147314aSFabien Parent	regulator-always-on;
239*6147314aSFabien Parent};
240*6147314aSFabien Parent
241*6147314aSFabien Parent&mt6359_vproc2_buck_reg {
242*6147314aSFabien Parent	regulator-always-on;
243*6147314aSFabien Parent};
244*6147314aSFabien Parent
245*6147314aSFabien Parent&mt6359_vpu_buck_reg {
246*6147314aSFabien Parent	regulator-always-on;
247*6147314aSFabien Parent};
248*6147314aSFabien Parent
249*6147314aSFabien Parent&mt6359_vrf12_ldo_reg {
250*6147314aSFabien Parent	regulator-always-on;
251*6147314aSFabien Parent};
252*6147314aSFabien Parent
253*6147314aSFabien Parent&mt6359_vsram_md_ldo_reg {
254*6147314aSFabien Parent	regulator-always-on;
255*6147314aSFabien Parent};
256*6147314aSFabien Parent
257*6147314aSFabien Parent&mt6359_vsram_others_ldo_reg {
258*6147314aSFabien Parent	regulator-always-on;
259*6147314aSFabien Parent};
260*6147314aSFabien Parent
261*6147314aSFabien Parent&pio {
262*6147314aSFabien Parent	gpio_keys_pins: gpio-keys-pins {
263*6147314aSFabien Parent		pins {
264*6147314aSFabien Parent			pinmux = <PINMUX_GPIO106__FUNC_GPIO106>;
265*6147314aSFabien Parent			input-enable;
266*6147314aSFabien Parent		};
267*6147314aSFabien Parent	};
268*6147314aSFabien Parent
269*6147314aSFabien Parent	i2c6_pins: i2c6-pins {
270*6147314aSFabien Parent		pins {
271*6147314aSFabien Parent			pinmux = <PINMUX_GPIO25__FUNC_SDA6>,
272*6147314aSFabien Parent				 <PINMUX_GPIO26__FUNC_SCL6>;
273*6147314aSFabien Parent			bias-pull-up;
274*6147314aSFabien Parent		};
275*6147314aSFabien Parent	};
276*6147314aSFabien Parent
277*6147314aSFabien Parent	mmc0_default_pins: mmc0-default-pins {
278*6147314aSFabien Parent		pins-clk {
279*6147314aSFabien Parent			pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
280*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_6mA>;
281*6147314aSFabien Parent			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
282*6147314aSFabien Parent		};
283*6147314aSFabien Parent
284*6147314aSFabien Parent		pins-cmd-dat {
285*6147314aSFabien Parent			pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
286*6147314aSFabien Parent				 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
287*6147314aSFabien Parent				 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
288*6147314aSFabien Parent				 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
289*6147314aSFabien Parent				 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
290*6147314aSFabien Parent				 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
291*6147314aSFabien Parent				 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
292*6147314aSFabien Parent				 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
293*6147314aSFabien Parent				 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
294*6147314aSFabien Parent			input-enable;
295*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_6mA>;
296*6147314aSFabien Parent			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
297*6147314aSFabien Parent		};
298*6147314aSFabien Parent
299*6147314aSFabien Parent		pins-rst {
300*6147314aSFabien Parent			pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
301*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_6mA>;
302*6147314aSFabien Parent			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
303*6147314aSFabien Parent		};
304*6147314aSFabien Parent	};
305*6147314aSFabien Parent
306*6147314aSFabien Parent	mmc0_uhs_pins: mmc0-uhs-pins {
307*6147314aSFabien Parent		pins-clk {
308*6147314aSFabien Parent			pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
309*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_8mA>;
310*6147314aSFabien Parent			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
311*6147314aSFabien Parent		};
312*6147314aSFabien Parent
313*6147314aSFabien Parent		pins-cmd-dat {
314*6147314aSFabien Parent			pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
315*6147314aSFabien Parent				 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
316*6147314aSFabien Parent				 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
317*6147314aSFabien Parent				 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
318*6147314aSFabien Parent				 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
319*6147314aSFabien Parent				 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
320*6147314aSFabien Parent				 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
321*6147314aSFabien Parent				 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
322*6147314aSFabien Parent				 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
323*6147314aSFabien Parent			input-enable;
324*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_8mA>;
325*6147314aSFabien Parent			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
326*6147314aSFabien Parent		};
327*6147314aSFabien Parent
328*6147314aSFabien Parent		pins-ds {
329*6147314aSFabien Parent			pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
330*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_8mA>;
331*6147314aSFabien Parent			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
332*6147314aSFabien Parent		};
333*6147314aSFabien Parent
334*6147314aSFabien Parent		pins-rst {
335*6147314aSFabien Parent			pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
336*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_8mA>;
337*6147314aSFabien Parent			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
338*6147314aSFabien Parent		};
339*6147314aSFabien Parent	};
340*6147314aSFabien Parent
341*6147314aSFabien Parent	mmc1_default_pins: mmc1-default-pins {
342*6147314aSFabien Parent		pins-clk {
343*6147314aSFabien Parent			pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
344*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_8mA>;
345*6147314aSFabien Parent			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
346*6147314aSFabien Parent		};
347*6147314aSFabien Parent
348*6147314aSFabien Parent		pins-cmd-dat {
349*6147314aSFabien Parent			pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
350*6147314aSFabien Parent				 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
351*6147314aSFabien Parent				 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
352*6147314aSFabien Parent				 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
353*6147314aSFabien Parent				 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
354*6147314aSFabien Parent			input-enable;
355*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_8mA>;
356*6147314aSFabien Parent			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
357*6147314aSFabien Parent		};
358*6147314aSFabien Parent
359*6147314aSFabien Parent		pins-insert {
360*6147314aSFabien Parent			pinmux = <PINMUX_GPIO129__FUNC_GPIO129>;
361*6147314aSFabien Parent			bias-pull-up;
362*6147314aSFabien Parent		};
363*6147314aSFabien Parent	};
364*6147314aSFabien Parent
365*6147314aSFabien Parent	mmc1_uhs_pins: mmc1-uhs-pins {
366*6147314aSFabien Parent		pins-clk {
367*6147314aSFabien Parent			pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
368*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_8mA>;
369*6147314aSFabien Parent			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
370*6147314aSFabien Parent		};
371*6147314aSFabien Parent
372*6147314aSFabien Parent		pins-cmd-dat {
373*6147314aSFabien Parent			pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
374*6147314aSFabien Parent				 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
375*6147314aSFabien Parent				 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
376*6147314aSFabien Parent				 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
377*6147314aSFabien Parent				 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
378*6147314aSFabien Parent			input-enable;
379*6147314aSFabien Parent			drive-strength = <MTK_DRIVE_8mA>;
380*6147314aSFabien Parent			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
381*6147314aSFabien Parent		};
382*6147314aSFabien Parent	};
383*6147314aSFabien Parent
384*6147314aSFabien Parent	uart0_pins: uart0-pins {
385*6147314aSFabien Parent		pins {
386*6147314aSFabien Parent			pinmux = <PINMUX_GPIO98__FUNC_UTXD0>,
387*6147314aSFabien Parent				 <PINMUX_GPIO99__FUNC_URXD0>;
388*6147314aSFabien Parent		};
389*6147314aSFabien Parent	};
390*6147314aSFabien Parent
391*6147314aSFabien Parent	uart1_pins: uart1-pins {
392*6147314aSFabien Parent		pins {
393*6147314aSFabien Parent			pinmux = <PINMUX_GPIO102__FUNC_UTXD1>,
394*6147314aSFabien Parent				 <PINMUX_GPIO103__FUNC_URXD1>;
395*6147314aSFabien Parent		};
396*6147314aSFabien Parent	};
397*6147314aSFabien Parent};
398*6147314aSFabien Parent
399*6147314aSFabien Parent
400*6147314aSFabien Parent&pmic {
401*6147314aSFabien Parent	interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
402*6147314aSFabien Parent};
403*6147314aSFabien Parent
404*6147314aSFabien Parent&uart0 {
405*6147314aSFabien Parent	pinctrl-names = "default";
406*6147314aSFabien Parent	pinctrl-0 = <&uart0_pins>;
407*6147314aSFabien Parent	status = "okay";
408*6147314aSFabien Parent};
409*6147314aSFabien Parent
410*6147314aSFabien Parent&u3phy0 {
411*6147314aSFabien Parent	status = "okay";
412*6147314aSFabien Parent};
413*6147314aSFabien Parent
414*6147314aSFabien Parent&u3phy1 {
415*6147314aSFabien Parent	status = "okay";
416*6147314aSFabien Parent};
417*6147314aSFabien Parent
418*6147314aSFabien Parent&u3phy2 {
419*6147314aSFabien Parent	status = "okay";
420*6147314aSFabien Parent};
421*6147314aSFabien Parent
422*6147314aSFabien Parent&u3phy3 {
423*6147314aSFabien Parent	status = "okay";
424*6147314aSFabien Parent};
425*6147314aSFabien Parent
426*6147314aSFabien Parent&xhci0 {
427*6147314aSFabien Parent	vusb33-supply = <&mt6359_vusb_ldo_reg>;
428*6147314aSFabien Parent	vbus-supply = <&otg_vbus_regulator>;
429*6147314aSFabien Parent	status = "okay";
430*6147314aSFabien Parent};
431*6147314aSFabien Parent
432*6147314aSFabien Parent&xhci1 {
433*6147314aSFabien Parent	vusb33-supply = <&mt6359_vusb_ldo_reg>;
434*6147314aSFabien Parent	status = "okay";
435*6147314aSFabien Parent};
436*6147314aSFabien Parent
437*6147314aSFabien Parent&xhci2 {
438*6147314aSFabien Parent	vusb33-supply = <&mt6359_vusb_ldo_reg>;
439*6147314aSFabien Parent	status = "okay";
440*6147314aSFabien Parent};
441*6147314aSFabien Parent
442*6147314aSFabien Parent&xhci3 {
443*6147314aSFabien Parent	vusb33-supply = <&mt6359_vusb_ldo_reg>;
444*6147314aSFabien Parent	status = "okay";
445*6147314aSFabien Parent};
446