xref: /linux/scripts/dtc/include-prefixes/arm64/mediatek/mt8195-cherry.dtsi (revision 4d3807080708d824d8674c8d93fd32652f00d41d)

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Copyright (C) 2021 MediaTek Inc.
 */

#include <dt-bindings/gpio/gpio.h>
#include "mt8195.dtsi"
#include "mt6359.dtsi"

/ {
	aliases {
		mmc0 = &mmc0;
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0 0x40000000 0 0x80000000>;
	};

	/* system wide LDO 3.3V power rail */
	pp3300_z5: regulator-pp3300-ldo-z5 {
		compatible = "regulator-fixed";
		regulator-name = "pp3300_ldo_z5";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&ppvar_sys>;
	};

	/* separately switched 3.3V power rail */
	pp3300_s3: regulator-pp3300-s3 {
		compatible = "regulator-fixed";
		regulator-name = "pp3300_s3";
		/* automatically sequenced by PMIC EXT_PMIC_EN2 */
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&pp3300_z2>;
	};

	/* system wide 3.3V power rail */
	pp3300_z2: regulator-pp3300-z2 {
		compatible = "regulator-fixed";
		regulator-name = "pp3300_z2";
		/* EN pin tied to pp4200_z2, which is controlled by EC */
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&ppvar_sys>;
	};

	/* system wide 4.2V power rail */
	pp4200_z2: regulator-pp4200-z2 {
		compatible = "regulator-fixed";
		regulator-name = "pp4200_z2";
		/* controlled by EC */
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <4200000>;
		regulator-max-microvolt = <4200000>;
		vin-supply = <&ppvar_sys>;
	};

	/* system wide switching 5.0V power rail */
	pp5000_s5: regulator-pp5000-s5 {
		compatible = "regulator-fixed";
		regulator-name = "pp5000_s5";
		/* controlled by EC */
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&ppvar_sys>;
	};

	/* system wide semi-regulated power rail from battery or USB */
	ppvar_sys: regulator-ppvar-sys {
		compatible = "regulator-fixed";
		regulator-name = "ppvar_sys";
		regulator-always-on;
		regulator-boot-on;
	};
};

&mmc0 {
	status = "okay";

	bus-width = <8>;
	cap-mmc-highspeed;
	cap-mmc-hw-reset;
	hs400-ds-delay = <0x14c11>;
	max-frequency = <200000000>;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	no-sdio;
	no-sd;
	non-removable;
	pinctrl-names = "default", "state_uhs";
	pinctrl-0 = <&mmc0_pins_default>;
	pinctrl-1 = <&mmc0_pins_uhs>;
	vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
	vqmmc-supply = <&mt6359_vufs_ldo_reg>;
};

/* for CPU-L */
&mt6359_vcore_buck_reg {
	regulator-always-on;
};

/* for CORE */
&mt6359_vgpu11_buck_reg {
	regulator-always-on;
};

&mt6359_vgpu11_sshub_buck_reg {
	regulator-always-on;
	regulator-min-microvolt = <550000>;
	regulator-max-microvolt = <550000>;
};

/* for CORE SRAM */
&mt6359_vpu_buck_reg {
	regulator-always-on;
};

&mt6359_vrf12_ldo_reg {
	regulator-always-on;
};

/* for GPU SRAM */
&mt6359_vsram_others_ldo_reg {
	regulator-always-on;
	regulator-min-microvolt = <750000>;
	regulator-max-microvolt = <750000>;
};

&mt6359_vufs_ldo_reg {
	regulator-always-on;
};

&pio {
	mmc0_pins_default: mmc0-default-pins {
		pins-cmd-dat {
			pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
				 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
				 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
				 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
				 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
				 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
				 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
				 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
				 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
			input-enable;
			drive-strength = <6>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};

		pins-clk {
			pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
			drive-strength = <6>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};

		pins-rst {
			pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
			drive-strength = <6>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};
	};

	mmc0_pins_uhs: mmc0-uhs-pins {
		pins-cmd-dat {
			pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
				 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
				 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
				 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
				 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
				 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
				 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
				 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
				 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
			input-enable;
			drive-strength = <8>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};

		pins-clk {
			pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
			drive-strength = <8>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};

		pins-ds {
			pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
			drive-strength = <8>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
		};

		pins-rst {
			pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
			drive-strength = <8>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
		};
	};
};

&pmic {
	interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
};

&uart0 {
	status = "okay";
};