xref: /linux/scripts/dtc/include-prefixes/arm64/mediatek/mt8183-evb.dts (revision ed32f8d42cee118b075e4372a55c7739a11094b2)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Ben Ho <ben.ho@mediatek.com>
5 *	   Erin Lo <erin.lo@mediatek.com>
6 */
7
8/dts-v1/;
9#include "mt8183.dtsi"
10
11/ {
12	model = "MediaTek MT8183 evaluation board";
13	compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
14
15	aliases {
16		serial0 = &uart0;
17	};
18
19	memory@40000000 {
20		device_type = "memory";
21		reg = <0 0x40000000 0 0x80000000>;
22	};
23
24	chosen {
25		stdout-path = "serial0:921600n8";
26	};
27};
28
29&auxadc {
30	status = "okay";
31};
32
33&pio {
34	spi_pins_0: spi0{
35		pins_spi{
36			pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
37				 <PINMUX_GPIO86__FUNC_SPI0_CSB>,
38				 <PINMUX_GPIO87__FUNC_SPI0_MO>,
39				 <PINMUX_GPIO88__FUNC_SPI0_CLK>;
40			bias-disable;
41		};
42	};
43
44	spi_pins_1: spi1{
45		pins_spi{
46			pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
47				 <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
48				 <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
49				 <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
50			bias-disable;
51		};
52	};
53
54	spi_pins_2: spi2{
55		pins_spi{
56			pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
57				 <PINMUX_GPIO1__FUNC_SPI2_MO>,
58				 <PINMUX_GPIO2__FUNC_SPI2_CLK>,
59				 <PINMUX_GPIO94__FUNC_SPI2_MI>;
60			bias-disable;
61		};
62	};
63
64	spi_pins_3: spi3{
65		pins_spi{
66			pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
67				 <PINMUX_GPIO22__FUNC_SPI3_CSB>,
68				 <PINMUX_GPIO23__FUNC_SPI3_MO>,
69				 <PINMUX_GPIO24__FUNC_SPI3_CLK>;
70			bias-disable;
71		};
72	};
73
74	spi_pins_4: spi4{
75		pins_spi{
76			pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
77				 <PINMUX_GPIO18__FUNC_SPI4_CSB>,
78				 <PINMUX_GPIO19__FUNC_SPI4_MO>,
79				 <PINMUX_GPIO20__FUNC_SPI4_CLK>;
80			bias-disable;
81		};
82	};
83
84	spi_pins_5: spi5{
85		pins_spi{
86			pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
87				 <PINMUX_GPIO14__FUNC_SPI5_CSB>,
88				 <PINMUX_GPIO15__FUNC_SPI5_MO>,
89				 <PINMUX_GPIO16__FUNC_SPI5_CLK>;
90			bias-disable;
91		};
92	};
93};
94
95&spi0 {
96	pinctrl-names = "default";
97	pinctrl-0 = <&spi_pins_0>;
98	mediatek,pad-select = <0>;
99	status = "okay";
100};
101
102&spi1 {
103	pinctrl-names = "default";
104	pinctrl-0 = <&spi_pins_1>;
105	mediatek,pad-select = <0>;
106	status = "okay";
107};
108
109&spi2 {
110	pinctrl-names = "default";
111	pinctrl-0 = <&spi_pins_2>;
112	mediatek,pad-select = <0>;
113	status = "okay";
114};
115
116&spi3 {
117	pinctrl-names = "default";
118	pinctrl-0 = <&spi_pins_3>;
119	mediatek,pad-select = <0>;
120	status = "okay";
121};
122
123&spi4 {
124	pinctrl-names = "default";
125	pinctrl-0 = <&spi_pins_4>;
126	mediatek,pad-select = <0>;
127	status = "okay";
128};
129
130&spi5 {
131	pinctrl-names = "default";
132	pinctrl-0 = <&spi_pins_5>;
133	mediatek,pad-select = <0>;
134	status = "okay";
135
136};
137
138&uart0 {
139	status = "okay";
140};
141