xref: /linux/scripts/dtc/include-prefixes/arm64/mediatek/mt8183-evb.dts (revision cef7298262e9af841fb70d8673af45caf55300a1) 
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Ben Ho <ben.ho@mediatek.com>
5 *	   Erin Lo <erin.lo@mediatek.com>
6 */
7
8/dts-v1/;
9#include "mt8183.dtsi"
10
11/ {
12	model = "MediaTek MT8183 evaluation board";
13	compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
14
15	aliases {
16		serial0 = &uart0;
17	};
18
19	memory@40000000 {
20		device_type = "memory";
21		reg = <0 0x40000000 0 0x80000000>;
22	};
23
24	chosen {
25		stdout-path = "serial0:921600n8";
26	};
27};
28
29&auxadc {
30	status = "okay";
31};
32
33&i2c0 {
34	pinctrl-names = "default";
35	pinctrl-0 = <&i2c_pins_0>;
36	status = "okay";
37	clock-frequency = <100000>;
38};
39
40&i2c1 {
41	pinctrl-names = "default";
42	pinctrl-0 = <&i2c_pins_1>;
43	status = "okay";
44	clock-frequency = <100000>;
45};
46
47&i2c2 {
48	pinctrl-names = "default";
49	pinctrl-0 = <&i2c_pins_2>;
50	status = "okay";
51	clock-frequency = <100000>;
52};
53
54&i2c3 {
55	pinctrl-names = "default";
56	pinctrl-0 = <&i2c_pins_3>;
57	status = "okay";
58	clock-frequency = <100000>;
59};
60
61&i2c4 {
62	pinctrl-names = "default";
63	pinctrl-0 = <&i2c_pins_4>;
64	status = "okay";
65	clock-frequency = <1000000>;
66};
67
68&i2c5 {
69	pinctrl-names = "default";
70	pinctrl-0 = <&i2c_pins_5>;
71	status = "okay";
72	clock-frequency = <1000000>;
73};
74
75&pio {
76	i2c_pins_0: i2c0{
77		pins_i2c{
78			pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
79				 <PINMUX_GPIO83__FUNC_SCL0>;
80			mediatek,pull-up-adv = <3>;
81			mediatek,drive-strength-adv = <00>;
82		};
83	};
84
85	i2c_pins_1: i2c1{
86		pins_i2c{
87			pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
88				 <PINMUX_GPIO84__FUNC_SCL1>;
89			mediatek,pull-up-adv = <3>;
90			mediatek,drive-strength-adv = <00>;
91		};
92	};
93
94	i2c_pins_2: i2c2{
95		pins_i2c{
96			pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
97				 <PINMUX_GPIO104__FUNC_SDA2>;
98			mediatek,pull-up-adv = <3>;
99			mediatek,drive-strength-adv = <00>;
100		};
101	};
102
103	i2c_pins_3: i2c3{
104		pins_i2c{
105			pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
106				 <PINMUX_GPIO51__FUNC_SDA3>;
107			mediatek,pull-up-adv = <3>;
108			mediatek,drive-strength-adv = <00>;
109		};
110	};
111
112	i2c_pins_4: i2c4{
113		pins_i2c{
114			pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
115				 <PINMUX_GPIO106__FUNC_SDA4>;
116			mediatek,pull-up-adv = <3>;
117			mediatek,drive-strength-adv = <00>;
118		};
119	};
120
121	i2c_pins_5: i2c5{
122		pins_i2c{
123			pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
124				 <PINMUX_GPIO49__FUNC_SDA5>;
125			mediatek,pull-up-adv = <3>;
126			mediatek,drive-strength-adv = <00>;
127		};
128	};
129
130	spi_pins_0: spi0{
131		pins_spi{
132			pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
133				 <PINMUX_GPIO86__FUNC_SPI0_CSB>,
134				 <PINMUX_GPIO87__FUNC_SPI0_MO>,
135				 <PINMUX_GPIO88__FUNC_SPI0_CLK>;
136			bias-disable;
137		};
138	};
139
140	spi_pins_1: spi1{
141		pins_spi{
142			pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
143				 <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
144				 <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
145				 <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
146			bias-disable;
147		};
148	};
149
150	spi_pins_2: spi2{
151		pins_spi{
152			pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
153				 <PINMUX_GPIO1__FUNC_SPI2_MO>,
154				 <PINMUX_GPIO2__FUNC_SPI2_CLK>,
155				 <PINMUX_GPIO94__FUNC_SPI2_MI>;
156			bias-disable;
157		};
158	};
159
160	spi_pins_3: spi3{
161		pins_spi{
162			pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
163				 <PINMUX_GPIO22__FUNC_SPI3_CSB>,
164				 <PINMUX_GPIO23__FUNC_SPI3_MO>,
165				 <PINMUX_GPIO24__FUNC_SPI3_CLK>;
166			bias-disable;
167		};
168	};
169
170	spi_pins_4: spi4{
171		pins_spi{
172			pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
173				 <PINMUX_GPIO18__FUNC_SPI4_CSB>,
174				 <PINMUX_GPIO19__FUNC_SPI4_MO>,
175				 <PINMUX_GPIO20__FUNC_SPI4_CLK>;
176			bias-disable;
177		};
178	};
179
180	spi_pins_5: spi5{
181		pins_spi{
182			pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
183				 <PINMUX_GPIO14__FUNC_SPI5_CSB>,
184				 <PINMUX_GPIO15__FUNC_SPI5_MO>,
185				 <PINMUX_GPIO16__FUNC_SPI5_CLK>;
186			bias-disable;
187		};
188	};
189};
190
191&spi0 {
192	pinctrl-names = "default";
193	pinctrl-0 = <&spi_pins_0>;
194	mediatek,pad-select = <0>;
195	status = "okay";
196};
197
198&spi1 {
199	pinctrl-names = "default";
200	pinctrl-0 = <&spi_pins_1>;
201	mediatek,pad-select = <0>;
202	status = "okay";
203};
204
205&spi2 {
206	pinctrl-names = "default";
207	pinctrl-0 = <&spi_pins_2>;
208	mediatek,pad-select = <0>;
209	status = "okay";
210};
211
212&spi3 {
213	pinctrl-names = "default";
214	pinctrl-0 = <&spi_pins_3>;
215	mediatek,pad-select = <0>;
216	status = "okay";
217};
218
219&spi4 {
220	pinctrl-names = "default";
221	pinctrl-0 = <&spi_pins_4>;
222	mediatek,pad-select = <0>;
223	status = "okay";
224};
225
226&spi5 {
227	pinctrl-names = "default";
228	pinctrl-0 = <&spi_pins_5>;
229	mediatek,pad-select = <0>;
230	status = "okay";
231
232};
233
234&uart0 {
235	status = "okay";
236};
237