1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2021 MediaTek Inc. 4 * Author: Sam.Shih <sam.shih@mediatek.com> 5 */ 6 7/dts-v1/; 8#include "mt7986b.dtsi" 9 10/ { 11 model = "MediaTek MT7986b RFB"; 12 compatible = "mediatek,mt7986b-rfb", "mediatek,mt7986b"; 13 14 aliases { 15 serial0 = &uart0; 16 }; 17 18 chosen { 19 stdout-path = "serial0:115200n8"; 20 }; 21 22 memory@40000000 { 23 device_type = "memory"; 24 reg = <0 0x40000000 0 0x40000000>; 25 }; 26}; 27 28&crypto { 29 status = "okay"; 30}; 31 32ð { 33 status = "okay"; 34 35 gmac0: mac@0 { 36 compatible = "mediatek,eth-mac"; 37 reg = <0>; 38 phy-mode = "2500base-x"; 39 40 fixed-link { 41 speed = <2500>; 42 full-duplex; 43 pause; 44 }; 45 }; 46 47 mdio: mdio-bus { 48 #address-cells = <1>; 49 #size-cells = <0>; 50 51 switch@0 { 52 compatible = "mediatek,mt7531"; 53 reg = <31>; 54 reset-gpios = <&pio 5 0>; 55 56 ports { 57 #address-cells = <1>; 58 #size-cells = <0>; 59 60 port@0 { 61 reg = <0>; 62 label = "lan0"; 63 }; 64 65 port@1 { 66 reg = <1>; 67 label = "lan1"; 68 }; 69 70 port@2 { 71 reg = <2>; 72 label = "lan2"; 73 }; 74 75 port@3 { 76 reg = <3>; 77 label = "lan3"; 78 }; 79 80 port@4 { 81 reg = <4>; 82 label = "lan4"; 83 }; 84 85 port@6 { 86 reg = <6>; 87 label = "cpu"; 88 ethernet = <&gmac0>; 89 phy-mode = "2500base-x"; 90 91 fixed-link { 92 speed = <2500>; 93 full-duplex; 94 pause; 95 }; 96 }; 97 }; 98 }; 99 }; 100}; 101 102&pio { 103 spi_flash_pins: spi-flash-pins { 104 mux { 105 function = "spi"; 106 groups = "spi0", "spi0_wp_hold"; 107 }; 108 }; 109 110 spic_pins: spic-pins { 111 mux { 112 function = "spi"; 113 groups = "spi1_2"; 114 }; 115 }; 116 117 wf_2g_5g_pins: wf-2g-5g-pins { 118 mux { 119 function = "wifi"; 120 groups = "wf_2g", "wf_5g"; 121 }; 122 conf { 123 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 124 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 125 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 126 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", 127 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", 128 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", 129 "WF1_TOP_CLK", "WF1_TOP_DATA"; 130 drive-strength = <4>; 131 }; 132 }; 133 134 wf_dbdc_pins: wf-dbdc-pins { 135 mux { 136 function = "wifi"; 137 groups = "wf_dbdc"; 138 }; 139 conf { 140 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 141 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 142 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 143 "WF0_TOP_CLK", "WF0_TOP_DATA"; 144 drive-strength = <4>; 145 }; 146 }; 147}; 148 149&spi0 { 150 pinctrl-names = "default"; 151 pinctrl-0 = <&spi_flash_pins>; 152 cs-gpios = <0>, <0>; 153 status = "okay"; 154 spi_nand: spi_nand@0 { 155 compatible = "spi-nand"; 156 reg = <0>; 157 spi-max-frequency = <10000000>; 158 spi-tx-buswidth = <4>; 159 spi-rx-buswidth = <4>; 160 }; 161}; 162 163&spi1 { 164 pinctrl-names = "default"; 165 pinctrl-0 = <&spic_pins>; 166 cs-gpios = <0>, <0>; 167 status = "okay"; 168}; 169 170&ssusb { 171 status = "okay"; 172}; 173 174&uart0 { 175 status = "okay"; 176}; 177 178&usb_phy { 179 status = "okay"; 180}; 181 182&wifi { 183 status = "okay"; 184 pinctrl-names = "default", "dbdc"; 185 pinctrl-0 = <&wf_2g_5g_pins>; 186 pinctrl-1 = <&wf_dbdc_pins>; 187}; 188