xref: /linux/scripts/dtc/include-prefixes/arm64/mediatek/mt7986b-rfb.dts (revision f40c0f800f15e9e3566cb39a9eee2855c634eb5f)
1*f40c0f80SSam Shih// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*f40c0f80SSam Shih/*
3*f40c0f80SSam Shih * Copyright (C) 2021 MediaTek Inc.
4*f40c0f80SSam Shih * Author: Sam.Shih <sam.shih@mediatek.com>
5*f40c0f80SSam Shih */
6*f40c0f80SSam Shih
7*f40c0f80SSam Shih/dts-v1/;
8*f40c0f80SSam Shih#include "mt7986b.dtsi"
9*f40c0f80SSam Shih
10*f40c0f80SSam Shih/ {
11*f40c0f80SSam Shih	model = "MediaTek MT7986b RFB";
12*f40c0f80SSam Shih	compatible = "mediatek,mt7986b-rfb";
13*f40c0f80SSam Shih
14*f40c0f80SSam Shih	aliases {
15*f40c0f80SSam Shih		serial0 = &uart0;
16*f40c0f80SSam Shih	};
17*f40c0f80SSam Shih
18*f40c0f80SSam Shih	chosen {
19*f40c0f80SSam Shih		stdout-path = "serial0:115200n8";
20*f40c0f80SSam Shih	};
21*f40c0f80SSam Shih
22*f40c0f80SSam Shih	memory {
23*f40c0f80SSam Shih		reg = <0 0x40000000 0 0x40000000>;
24*f40c0f80SSam Shih	};
25*f40c0f80SSam Shih};
26*f40c0f80SSam Shih
27*f40c0f80SSam Shih&uart0 {
28*f40c0f80SSam Shih	status = "okay";
29*f40c0f80SSam Shih};
30