1f40c0f80SSam Shih// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2f40c0f80SSam Shih/* 3f40c0f80SSam Shih * Copyright (C) 2021 MediaTek Inc. 4f40c0f80SSam Shih * Author: Sam.Shih <sam.shih@mediatek.com> 5f40c0f80SSam Shih */ 6f40c0f80SSam Shih 7f40c0f80SSam Shih/dts-v1/; 8f40c0f80SSam Shih#include "mt7986b.dtsi" 9f40c0f80SSam Shih 10f40c0f80SSam Shih/ { 11f40c0f80SSam Shih model = "MediaTek MT7986b RFB"; 12380d18fbSAngeloGioacchino Del Regno chassis-type = "embedded"; 1326589630SMatthias Brugger compatible = "mediatek,mt7986b-rfb", "mediatek,mt7986b"; 14f40c0f80SSam Shih 15f40c0f80SSam Shih aliases { 16f40c0f80SSam Shih serial0 = &uart0; 17f40c0f80SSam Shih }; 18f40c0f80SSam Shih 19f40c0f80SSam Shih chosen { 20f40c0f80SSam Shih stdout-path = "serial0:115200n8"; 21f40c0f80SSam Shih }; 22f40c0f80SSam Shih 23809967d7SSam Shih memory@40000000 { 24809967d7SSam Shih device_type = "memory"; 25f40c0f80SSam Shih reg = <0 0x40000000 0 0x40000000>; 26f40c0f80SSam Shih }; 27f40c0f80SSam Shih}; 28f40c0f80SSam Shih 29ecc5287cSSam Shih&crypto { 30ecc5287cSSam Shih status = "okay"; 31ecc5287cSSam Shih}; 32ecc5287cSSam Shih 33082ff36bSLorenzo Bianconið { 34082ff36bSLorenzo Bianconi status = "okay"; 35082ff36bSLorenzo Bianconi 36082ff36bSLorenzo Bianconi gmac0: mac@0 { 37082ff36bSLorenzo Bianconi compatible = "mediatek,eth-mac"; 38082ff36bSLorenzo Bianconi reg = <0>; 39082ff36bSLorenzo Bianconi phy-mode = "2500base-x"; 40082ff36bSLorenzo Bianconi 41082ff36bSLorenzo Bianconi fixed-link { 42082ff36bSLorenzo Bianconi speed = <2500>; 43082ff36bSLorenzo Bianconi full-duplex; 44082ff36bSLorenzo Bianconi pause; 45082ff36bSLorenzo Bianconi }; 46082ff36bSLorenzo Bianconi }; 47082ff36bSLorenzo Bianconi 48082ff36bSLorenzo Bianconi mdio: mdio-bus { 49082ff36bSLorenzo Bianconi #address-cells = <1>; 50082ff36bSLorenzo Bianconi #size-cells = <0>; 51082ff36bSLorenzo Bianconi 52082ff36bSLorenzo Bianconi switch@0 { 53082ff36bSLorenzo Bianconi compatible = "mediatek,mt7531"; 54082ff36bSLorenzo Bianconi reg = <31>; 55082ff36bSLorenzo Bianconi reset-gpios = <&pio 5 0>; 56082ff36bSLorenzo Bianconi 57082ff36bSLorenzo Bianconi ports { 58082ff36bSLorenzo Bianconi #address-cells = <1>; 59082ff36bSLorenzo Bianconi #size-cells = <0>; 60082ff36bSLorenzo Bianconi 61082ff36bSLorenzo Bianconi port@0 { 62082ff36bSLorenzo Bianconi reg = <0>; 63082ff36bSLorenzo Bianconi label = "lan0"; 64082ff36bSLorenzo Bianconi }; 65082ff36bSLorenzo Bianconi 66082ff36bSLorenzo Bianconi port@1 { 67082ff36bSLorenzo Bianconi reg = <1>; 68082ff36bSLorenzo Bianconi label = "lan1"; 69082ff36bSLorenzo Bianconi }; 70082ff36bSLorenzo Bianconi 71082ff36bSLorenzo Bianconi port@2 { 72082ff36bSLorenzo Bianconi reg = <2>; 73082ff36bSLorenzo Bianconi label = "lan2"; 74082ff36bSLorenzo Bianconi }; 75082ff36bSLorenzo Bianconi 76082ff36bSLorenzo Bianconi port@3 { 77082ff36bSLorenzo Bianconi reg = <3>; 78082ff36bSLorenzo Bianconi label = "lan3"; 79082ff36bSLorenzo Bianconi }; 80082ff36bSLorenzo Bianconi 81082ff36bSLorenzo Bianconi port@4 { 82082ff36bSLorenzo Bianconi reg = <4>; 83082ff36bSLorenzo Bianconi label = "lan4"; 84082ff36bSLorenzo Bianconi }; 85082ff36bSLorenzo Bianconi 86082ff36bSLorenzo Bianconi port@6 { 87082ff36bSLorenzo Bianconi reg = <6>; 88082ff36bSLorenzo Bianconi label = "cpu"; 89082ff36bSLorenzo Bianconi ethernet = <&gmac0>; 90082ff36bSLorenzo Bianconi phy-mode = "2500base-x"; 91082ff36bSLorenzo Bianconi 92082ff36bSLorenzo Bianconi fixed-link { 93082ff36bSLorenzo Bianconi speed = <2500>; 94082ff36bSLorenzo Bianconi full-duplex; 95082ff36bSLorenzo Bianconi pause; 96082ff36bSLorenzo Bianconi }; 97082ff36bSLorenzo Bianconi }; 98082ff36bSLorenzo Bianconi }; 99082ff36bSLorenzo Bianconi }; 100082ff36bSLorenzo Bianconi }; 101082ff36bSLorenzo Bianconi}; 102300218b0SPeter Chiu 103300218b0SPeter Chiu&pio { 104885e153eSSam Shih spi_flash_pins: spi-flash-pins { 105885e153eSSam Shih mux { 106885e153eSSam Shih function = "spi"; 107885e153eSSam Shih groups = "spi0", "spi0_wp_hold"; 108885e153eSSam Shih }; 109885e153eSSam Shih }; 110885e153eSSam Shih 111885e153eSSam Shih spic_pins: spic-pins { 112885e153eSSam Shih mux { 113885e153eSSam Shih function = "spi"; 114885e153eSSam Shih groups = "spi1_2"; 115885e153eSSam Shih }; 116885e153eSSam Shih }; 117885e153eSSam Shih 118300218b0SPeter Chiu wf_2g_5g_pins: wf-2g-5g-pins { 119300218b0SPeter Chiu mux { 120300218b0SPeter Chiu function = "wifi"; 121300218b0SPeter Chiu groups = "wf_2g", "wf_5g"; 122300218b0SPeter Chiu }; 123300218b0SPeter Chiu conf { 124300218b0SPeter Chiu pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 125300218b0SPeter Chiu "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 126300218b0SPeter Chiu "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 127300218b0SPeter Chiu "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", 128300218b0SPeter Chiu "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", 129300218b0SPeter Chiu "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", 130300218b0SPeter Chiu "WF1_TOP_CLK", "WF1_TOP_DATA"; 131300218b0SPeter Chiu drive-strength = <4>; 132300218b0SPeter Chiu }; 133300218b0SPeter Chiu }; 134300218b0SPeter Chiu 135300218b0SPeter Chiu wf_dbdc_pins: wf-dbdc-pins { 136300218b0SPeter Chiu mux { 137300218b0SPeter Chiu function = "wifi"; 138300218b0SPeter Chiu groups = "wf_dbdc"; 139300218b0SPeter Chiu }; 140300218b0SPeter Chiu conf { 141300218b0SPeter Chiu pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 142300218b0SPeter Chiu "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 143300218b0SPeter Chiu "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 144300218b0SPeter Chiu "WF0_TOP_CLK", "WF0_TOP_DATA"; 145300218b0SPeter Chiu drive-strength = <4>; 146300218b0SPeter Chiu }; 147300218b0SPeter Chiu }; 148300218b0SPeter Chiu}; 149965f2c04SSam Shih 150885e153eSSam Shih&spi0 { 151885e153eSSam Shih pinctrl-names = "default"; 152885e153eSSam Shih pinctrl-0 = <&spi_flash_pins>; 153885e153eSSam Shih cs-gpios = <0>, <0>; 154885e153eSSam Shih status = "okay"; 155*bbe266c7SRafał Miłecki 156*bbe266c7SRafał Miłecki spi_nand: flash@0 { 157885e153eSSam Shih compatible = "spi-nand"; 158885e153eSSam Shih reg = <0>; 159885e153eSSam Shih spi-max-frequency = <10000000>; 1604e7dc18aSRafał Miłecki spi-tx-bus-width = <4>; 1614e7dc18aSRafał Miłecki spi-rx-bus-width = <4>; 162885e153eSSam Shih }; 163885e153eSSam Shih}; 164885e153eSSam Shih 165885e153eSSam Shih&spi1 { 166885e153eSSam Shih pinctrl-names = "default"; 167885e153eSSam Shih pinctrl-0 = <&spic_pins>; 168885e153eSSam Shih cs-gpios = <0>, <0>; 169885e153eSSam Shih status = "okay"; 170885e153eSSam Shih}; 171885e153eSSam Shih 172e21cbfc3SSam Shih&ssusb { 173e21cbfc3SSam Shih status = "okay"; 174e21cbfc3SSam Shih}; 175e21cbfc3SSam Shih 176965f2c04SSam Shih&uart0 { 177965f2c04SSam Shih status = "okay"; 178965f2c04SSam Shih}; 179965f2c04SSam Shih 180e21cbfc3SSam Shih&usb_phy { 181e21cbfc3SSam Shih status = "okay"; 182e21cbfc3SSam Shih}; 183e21cbfc3SSam Shih 184965f2c04SSam Shih&wifi { 185965f2c04SSam Shih status = "okay"; 186965f2c04SSam Shih pinctrl-names = "default", "dbdc"; 187965f2c04SSam Shih pinctrl-0 = <&wf_2g_5g_pins>; 188965f2c04SSam Shih pinctrl-1 = <&wf_dbdc_pins>; 189965f2c04SSam Shih}; 190