150137c15SSam Shih// SPDX-License-Identifier: (GPL-2.0 OR MIT) 250137c15SSam Shih/* 350137c15SSam Shih * Copyright (C) 2021 MediaTek Inc. 450137c15SSam Shih * Author: Sam.Shih <sam.shih@mediatek.com> 550137c15SSam Shih */ 650137c15SSam Shih 750137c15SSam Shih/dts-v1/; 850137c15SSam Shih#include "mt7986a.dtsi" 950137c15SSam Shih 1050137c15SSam Shih/ { 1150137c15SSam Shih model = "MediaTek MT7986a RFB"; 1226589630SMatthias Brugger compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a"; 1350137c15SSam Shih 1450137c15SSam Shih aliases { 1550137c15SSam Shih serial0 = &uart0; 1650137c15SSam Shih }; 1750137c15SSam Shih 1850137c15SSam Shih chosen { 1950137c15SSam Shih stdout-path = "serial0:115200n8"; 2050137c15SSam Shih }; 2150137c15SSam Shih 22fbaac5b1SSam Shih memory@40000000 { 23fbaac5b1SSam Shih device_type = "memory"; 2450137c15SSam Shih reg = <0 0x40000000 0 0x40000000>; 2550137c15SSam Shih }; 2650137c15SSam Shih}; 2750137c15SSam Shih 28ecc5287cSSam Shih&crypto { 29ecc5287cSSam Shih status = "okay"; 30ecc5287cSSam Shih}; 31ecc5287cSSam Shih 32082ff36bSLorenzo Bianconið { 33082ff36bSLorenzo Bianconi status = "okay"; 34082ff36bSLorenzo Bianconi 35082ff36bSLorenzo Bianconi gmac0: mac@0 { 36082ff36bSLorenzo Bianconi compatible = "mediatek,eth-mac"; 37082ff36bSLorenzo Bianconi reg = <0>; 38082ff36bSLorenzo Bianconi phy-mode = "2500base-x"; 39082ff36bSLorenzo Bianconi 40082ff36bSLorenzo Bianconi fixed-link { 41082ff36bSLorenzo Bianconi speed = <2500>; 42082ff36bSLorenzo Bianconi full-duplex; 43082ff36bSLorenzo Bianconi pause; 44082ff36bSLorenzo Bianconi }; 45082ff36bSLorenzo Bianconi }; 46082ff36bSLorenzo Bianconi 47082ff36bSLorenzo Bianconi mdio: mdio-bus { 48082ff36bSLorenzo Bianconi #address-cells = <1>; 49082ff36bSLorenzo Bianconi #size-cells = <0>; 50082ff36bSLorenzo Bianconi }; 51082ff36bSLorenzo Bianconi}; 52082ff36bSLorenzo Bianconi 53082ff36bSLorenzo Bianconi&mdio { 54082ff36bSLorenzo Bianconi switch: switch@0 { 55082ff36bSLorenzo Bianconi compatible = "mediatek,mt7531"; 56082ff36bSLorenzo Bianconi reg = <31>; 57082ff36bSLorenzo Bianconi reset-gpios = <&pio 5 0>; 58082ff36bSLorenzo Bianconi }; 59082ff36bSLorenzo Bianconi}; 60082ff36bSLorenzo Bianconi 61965f2c04SSam Shih&pio { 62885e153eSSam Shih spi_flash_pins: spi-flash-pins { 63885e153eSSam Shih mux { 64885e153eSSam Shih function = "spi"; 65885e153eSSam Shih groups = "spi0", "spi0_wp_hold"; 66885e153eSSam Shih }; 67885e153eSSam Shih }; 68885e153eSSam Shih 69885e153eSSam Shih spic_pins: spic-pins { 70885e153eSSam Shih mux { 71885e153eSSam Shih function = "spi"; 72885e153eSSam Shih groups = "spi1_2"; 73885e153eSSam Shih }; 74885e153eSSam Shih }; 75885e153eSSam Shih 76965f2c04SSam Shih uart1_pins: uart1-pins { 77965f2c04SSam Shih mux { 78965f2c04SSam Shih function = "uart"; 79965f2c04SSam Shih groups = "uart1"; 80965f2c04SSam Shih }; 81965f2c04SSam Shih }; 82965f2c04SSam Shih 83965f2c04SSam Shih uart2_pins: uart2-pins { 84965f2c04SSam Shih mux { 85965f2c04SSam Shih function = "uart"; 86965f2c04SSam Shih groups = "uart2"; 87965f2c04SSam Shih }; 88965f2c04SSam Shih }; 89965f2c04SSam Shih 90965f2c04SSam Shih wf_2g_5g_pins: wf-2g-5g-pins { 91965f2c04SSam Shih mux { 92965f2c04SSam Shih function = "wifi"; 93965f2c04SSam Shih groups = "wf_2g", "wf_5g"; 94965f2c04SSam Shih }; 95965f2c04SSam Shih conf { 96965f2c04SSam Shih pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 97965f2c04SSam Shih "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 98965f2c04SSam Shih "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 99965f2c04SSam Shih "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", 100965f2c04SSam Shih "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", 101965f2c04SSam Shih "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", 102965f2c04SSam Shih "WF1_TOP_CLK", "WF1_TOP_DATA"; 103965f2c04SSam Shih drive-strength = <4>; 104965f2c04SSam Shih }; 105965f2c04SSam Shih }; 106965f2c04SSam Shih 107965f2c04SSam Shih wf_dbdc_pins: wf-dbdc-pins { 108965f2c04SSam Shih mux { 109965f2c04SSam Shih function = "wifi"; 110965f2c04SSam Shih groups = "wf_dbdc"; 111965f2c04SSam Shih }; 112965f2c04SSam Shih conf { 113965f2c04SSam Shih pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 114965f2c04SSam Shih "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 115965f2c04SSam Shih "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 116965f2c04SSam Shih "WF0_TOP_CLK", "WF0_TOP_DATA"; 117965f2c04SSam Shih drive-strength = <4>; 118965f2c04SSam Shih }; 119965f2c04SSam Shih }; 120965f2c04SSam Shih}; 121965f2c04SSam Shih 122885e153eSSam Shih&spi0 { 123885e153eSSam Shih pinctrl-names = "default"; 124885e153eSSam Shih pinctrl-0 = <&spi_flash_pins>; 125885e153eSSam Shih cs-gpios = <0>, <0>; 126885e153eSSam Shih status = "okay"; 127885e153eSSam Shih spi_nand: spi_nand@0 { 128885e153eSSam Shih compatible = "spi-nand"; 129885e153eSSam Shih reg = <0>; 130885e153eSSam Shih spi-max-frequency = <10000000>; 131885e153eSSam Shih spi-tx-buswidth = <4>; 132885e153eSSam Shih spi-rx-buswidth = <4>; 133885e153eSSam Shih }; 134885e153eSSam Shih}; 135885e153eSSam Shih 136885e153eSSam Shih&spi1 { 137885e153eSSam Shih pinctrl-names = "default"; 138885e153eSSam Shih pinctrl-0 = <&spic_pins>; 139885e153eSSam Shih cs-gpios = <0>, <0>; 140885e153eSSam Shih status = "okay"; 141885e153eSSam Shih}; 142885e153eSSam Shih 143*e21cbfc3SSam Shih&ssusb { 144*e21cbfc3SSam Shih status = "okay"; 145*e21cbfc3SSam Shih}; 146*e21cbfc3SSam Shih 147082ff36bSLorenzo Bianconi&switch { 148082ff36bSLorenzo Bianconi ports { 149082ff36bSLorenzo Bianconi #address-cells = <1>; 150082ff36bSLorenzo Bianconi #size-cells = <0>; 151082ff36bSLorenzo Bianconi 152082ff36bSLorenzo Bianconi port@0 { 153082ff36bSLorenzo Bianconi reg = <0>; 154082ff36bSLorenzo Bianconi label = "lan0"; 155082ff36bSLorenzo Bianconi }; 156082ff36bSLorenzo Bianconi 157082ff36bSLorenzo Bianconi port@1 { 158082ff36bSLorenzo Bianconi reg = <1>; 159082ff36bSLorenzo Bianconi label = "lan1"; 160082ff36bSLorenzo Bianconi }; 161082ff36bSLorenzo Bianconi 162082ff36bSLorenzo Bianconi port@2 { 163082ff36bSLorenzo Bianconi reg = <2>; 164082ff36bSLorenzo Bianconi label = "lan2"; 165082ff36bSLorenzo Bianconi }; 166082ff36bSLorenzo Bianconi 167082ff36bSLorenzo Bianconi port@3 { 168082ff36bSLorenzo Bianconi reg = <3>; 169082ff36bSLorenzo Bianconi label = "lan3"; 170082ff36bSLorenzo Bianconi }; 171082ff36bSLorenzo Bianconi 172082ff36bSLorenzo Bianconi port@4 { 173082ff36bSLorenzo Bianconi reg = <4>; 174082ff36bSLorenzo Bianconi label = "lan4"; 175082ff36bSLorenzo Bianconi }; 176082ff36bSLorenzo Bianconi 177082ff36bSLorenzo Bianconi port@6 { 178082ff36bSLorenzo Bianconi reg = <6>; 179082ff36bSLorenzo Bianconi label = "cpu"; 180082ff36bSLorenzo Bianconi ethernet = <&gmac0>; 181082ff36bSLorenzo Bianconi phy-mode = "2500base-x"; 182082ff36bSLorenzo Bianconi 183082ff36bSLorenzo Bianconi fixed-link { 184082ff36bSLorenzo Bianconi speed = <2500>; 185082ff36bSLorenzo Bianconi full-duplex; 186082ff36bSLorenzo Bianconi pause; 187082ff36bSLorenzo Bianconi }; 188082ff36bSLorenzo Bianconi }; 189082ff36bSLorenzo Bianconi }; 190082ff36bSLorenzo Bianconi}; 191082ff36bSLorenzo Bianconi 19250137c15SSam Shih&uart0 { 19350137c15SSam Shih status = "okay"; 19450137c15SSam Shih}; 19550137c15SSam Shih 19650137c15SSam Shih&uart1 { 197c3a064a3SSam Shih pinctrl-names = "default"; 198c3a064a3SSam Shih pinctrl-0 = <&uart1_pins>; 19950137c15SSam Shih status = "okay"; 20050137c15SSam Shih}; 20150137c15SSam Shih 20250137c15SSam Shih&uart2 { 203c3a064a3SSam Shih pinctrl-names = "default"; 204c3a064a3SSam Shih pinctrl-0 = <&uart2_pins>; 20550137c15SSam Shih status = "okay"; 20650137c15SSam Shih}; 207c3a064a3SSam Shih 208*e21cbfc3SSam Shih&usb_phy { 209*e21cbfc3SSam Shih status = "okay"; 210*e21cbfc3SSam Shih}; 211*e21cbfc3SSam Shih 212300218b0SPeter Chiu&wifi { 213300218b0SPeter Chiu status = "okay"; 214300218b0SPeter Chiu pinctrl-names = "default", "dbdc"; 215300218b0SPeter Chiu pinctrl-0 = <&wf_2g_5g_pins>; 216300218b0SPeter Chiu pinctrl-1 = <&wf_dbdc_pins>; 217300218b0SPeter Chiu}; 218