1*50137c15SSam Shih// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*50137c15SSam Shih/* 3*50137c15SSam Shih * Copyright (C) 2021 MediaTek Inc. 4*50137c15SSam Shih * Author: Sam.Shih <sam.shih@mediatek.com> 5*50137c15SSam Shih */ 6*50137c15SSam Shih 7*50137c15SSam Shih/dts-v1/; 8*50137c15SSam Shih#include "mt7986a.dtsi" 9*50137c15SSam Shih 10*50137c15SSam Shih/ { 11*50137c15SSam Shih model = "MediaTek MT7986a RFB"; 12*50137c15SSam Shih compatible = "mediatek,mt7986a-rfb"; 13*50137c15SSam Shih 14*50137c15SSam Shih aliases { 15*50137c15SSam Shih serial0 = &uart0; 16*50137c15SSam Shih }; 17*50137c15SSam Shih 18*50137c15SSam Shih chosen { 19*50137c15SSam Shih stdout-path = "serial0:115200n8"; 20*50137c15SSam Shih }; 21*50137c15SSam Shih 22*50137c15SSam Shih memory { 23*50137c15SSam Shih reg = <0 0x40000000 0 0x40000000>; 24*50137c15SSam Shih }; 25*50137c15SSam Shih}; 26*50137c15SSam Shih 27*50137c15SSam Shih&uart0 { 28*50137c15SSam Shih status = "okay"; 29*50137c15SSam Shih}; 30*50137c15SSam Shih 31*50137c15SSam Shih&uart1 { 32*50137c15SSam Shih status = "okay"; 33*50137c15SSam Shih}; 34*50137c15SSam Shih 35*50137c15SSam Shih&uart2 { 36*50137c15SSam Shih status = "okay"; 37*50137c15SSam Shih}; 38