xref: /linux/scripts/dtc/include-prefixes/arm64/mediatek/mt7986a-rfb.dts (revision 300218b0503d40f3efc69363ca70b7f75c3ba81f)
150137c15SSam Shih// SPDX-License-Identifier: (GPL-2.0 OR MIT)
250137c15SSam Shih/*
350137c15SSam Shih * Copyright (C) 2021 MediaTek Inc.
450137c15SSam Shih * Author: Sam.Shih <sam.shih@mediatek.com>
550137c15SSam Shih */
650137c15SSam Shih
750137c15SSam Shih/dts-v1/;
850137c15SSam Shih#include "mt7986a.dtsi"
950137c15SSam Shih
1050137c15SSam Shih/ {
1150137c15SSam Shih	model = "MediaTek MT7986a RFB";
1250137c15SSam Shih	compatible = "mediatek,mt7986a-rfb";
1350137c15SSam Shih
1450137c15SSam Shih	aliases {
1550137c15SSam Shih		serial0 = &uart0;
1650137c15SSam Shih	};
1750137c15SSam Shih
1850137c15SSam Shih	chosen {
1950137c15SSam Shih		stdout-path = "serial0:115200n8";
2050137c15SSam Shih	};
2150137c15SSam Shih
22fbaac5b1SSam Shih	memory@40000000 {
23fbaac5b1SSam Shih		device_type = "memory";
2450137c15SSam Shih		reg = <0 0x40000000 0 0x40000000>;
2550137c15SSam Shih	};
2650137c15SSam Shih};
2750137c15SSam Shih
28082ff36bSLorenzo Bianconi&eth {
29082ff36bSLorenzo Bianconi	status = "okay";
30082ff36bSLorenzo Bianconi
31082ff36bSLorenzo Bianconi	gmac0: mac@0 {
32082ff36bSLorenzo Bianconi		compatible = "mediatek,eth-mac";
33082ff36bSLorenzo Bianconi		reg = <0>;
34082ff36bSLorenzo Bianconi		phy-mode = "2500base-x";
35082ff36bSLorenzo Bianconi
36082ff36bSLorenzo Bianconi		fixed-link {
37082ff36bSLorenzo Bianconi			speed = <2500>;
38082ff36bSLorenzo Bianconi			full-duplex;
39082ff36bSLorenzo Bianconi			pause;
40082ff36bSLorenzo Bianconi		};
41082ff36bSLorenzo Bianconi	};
42082ff36bSLorenzo Bianconi
43082ff36bSLorenzo Bianconi	mdio: mdio-bus {
44082ff36bSLorenzo Bianconi		#address-cells = <1>;
45082ff36bSLorenzo Bianconi		#size-cells = <0>;
46082ff36bSLorenzo Bianconi	};
47082ff36bSLorenzo Bianconi};
48082ff36bSLorenzo Bianconi
49082ff36bSLorenzo Bianconi&mdio {
50082ff36bSLorenzo Bianconi	switch: switch@0 {
51082ff36bSLorenzo Bianconi		compatible = "mediatek,mt7531";
52082ff36bSLorenzo Bianconi		reg = <31>;
53082ff36bSLorenzo Bianconi		reset-gpios = <&pio 5 0>;
54082ff36bSLorenzo Bianconi	};
55082ff36bSLorenzo Bianconi};
56082ff36bSLorenzo Bianconi
57082ff36bSLorenzo Bianconi&switch {
58082ff36bSLorenzo Bianconi	ports {
59082ff36bSLorenzo Bianconi		#address-cells = <1>;
60082ff36bSLorenzo Bianconi		#size-cells = <0>;
61082ff36bSLorenzo Bianconi
62082ff36bSLorenzo Bianconi		port@0 {
63082ff36bSLorenzo Bianconi			reg = <0>;
64082ff36bSLorenzo Bianconi			label = "lan0";
65082ff36bSLorenzo Bianconi		};
66082ff36bSLorenzo Bianconi
67082ff36bSLorenzo Bianconi		port@1 {
68082ff36bSLorenzo Bianconi			reg = <1>;
69082ff36bSLorenzo Bianconi			label = "lan1";
70082ff36bSLorenzo Bianconi		};
71082ff36bSLorenzo Bianconi
72082ff36bSLorenzo Bianconi		port@2 {
73082ff36bSLorenzo Bianconi			reg = <2>;
74082ff36bSLorenzo Bianconi			label = "lan2";
75082ff36bSLorenzo Bianconi		};
76082ff36bSLorenzo Bianconi
77082ff36bSLorenzo Bianconi		port@3 {
78082ff36bSLorenzo Bianconi			reg = <3>;
79082ff36bSLorenzo Bianconi			label = "lan3";
80082ff36bSLorenzo Bianconi		};
81082ff36bSLorenzo Bianconi
82082ff36bSLorenzo Bianconi		port@4 {
83082ff36bSLorenzo Bianconi			reg = <4>;
84082ff36bSLorenzo Bianconi			label = "lan4";
85082ff36bSLorenzo Bianconi		};
86082ff36bSLorenzo Bianconi
87082ff36bSLorenzo Bianconi		port@6 {
88082ff36bSLorenzo Bianconi			reg = <6>;
89082ff36bSLorenzo Bianconi			label = "cpu";
90082ff36bSLorenzo Bianconi			ethernet = <&gmac0>;
91082ff36bSLorenzo Bianconi			phy-mode = "2500base-x";
92082ff36bSLorenzo Bianconi
93082ff36bSLorenzo Bianconi			fixed-link {
94082ff36bSLorenzo Bianconi				speed = <2500>;
95082ff36bSLorenzo Bianconi				full-duplex;
96082ff36bSLorenzo Bianconi				pause;
97082ff36bSLorenzo Bianconi			};
98082ff36bSLorenzo Bianconi		};
99082ff36bSLorenzo Bianconi	};
100082ff36bSLorenzo Bianconi};
101082ff36bSLorenzo Bianconi
10250137c15SSam Shih&uart0 {
10350137c15SSam Shih	status = "okay";
10450137c15SSam Shih};
10550137c15SSam Shih
10650137c15SSam Shih&uart1 {
107c3a064a3SSam Shih	pinctrl-names = "default";
108c3a064a3SSam Shih	pinctrl-0 = <&uart1_pins>;
10950137c15SSam Shih	status = "okay";
11050137c15SSam Shih};
11150137c15SSam Shih
11250137c15SSam Shih&uart2 {
113c3a064a3SSam Shih	pinctrl-names = "default";
114c3a064a3SSam Shih	pinctrl-0 = <&uart2_pins>;
11550137c15SSam Shih	status = "okay";
11650137c15SSam Shih};
117c3a064a3SSam Shih
118*300218b0SPeter Chiu&wifi {
119*300218b0SPeter Chiu	status = "okay";
120*300218b0SPeter Chiu	pinctrl-names = "default", "dbdc";
121*300218b0SPeter Chiu	pinctrl-0 = <&wf_2g_5g_pins>;
122*300218b0SPeter Chiu	pinctrl-1 = <&wf_dbdc_pins>;
123*300218b0SPeter Chiu};
124*300218b0SPeter Chiu
125c3a064a3SSam Shih&pio {
126c3a064a3SSam Shih	uart1_pins: uart1-pins {
127c3a064a3SSam Shih		mux {
128c3a064a3SSam Shih			function = "uart";
129c3a064a3SSam Shih			groups = "uart1";
130c3a064a3SSam Shih		};
131c3a064a3SSam Shih	};
132c3a064a3SSam Shih
133c3a064a3SSam Shih	uart2_pins: uart2-pins {
134c3a064a3SSam Shih		mux {
135c3a064a3SSam Shih			function = "uart";
136c3a064a3SSam Shih			groups = "uart2";
137c3a064a3SSam Shih		};
138c3a064a3SSam Shih	};
139*300218b0SPeter Chiu
140*300218b0SPeter Chiu	wf_2g_5g_pins: wf-2g-5g-pins {
141*300218b0SPeter Chiu		mux {
142*300218b0SPeter Chiu			function = "wifi";
143*300218b0SPeter Chiu			groups = "wf_2g", "wf_5g";
144*300218b0SPeter Chiu		};
145*300218b0SPeter Chiu		conf {
146*300218b0SPeter Chiu			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
147*300218b0SPeter Chiu			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
148*300218b0SPeter Chiu			       "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
149*300218b0SPeter Chiu			       "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
150*300218b0SPeter Chiu			       "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
151*300218b0SPeter Chiu			       "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
152*300218b0SPeter Chiu			       "WF1_TOP_CLK", "WF1_TOP_DATA";
153*300218b0SPeter Chiu			drive-strength = <4>;
154*300218b0SPeter Chiu		};
155*300218b0SPeter Chiu	};
156*300218b0SPeter Chiu
157*300218b0SPeter Chiu	wf_dbdc_pins: wf-dbdc-pins {
158*300218b0SPeter Chiu		mux {
159*300218b0SPeter Chiu			function = "wifi";
160*300218b0SPeter Chiu			groups = "wf_dbdc";
161*300218b0SPeter Chiu		};
162*300218b0SPeter Chiu		conf {
163*300218b0SPeter Chiu			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
164*300218b0SPeter Chiu			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
165*300218b0SPeter Chiu			       "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
166*300218b0SPeter Chiu			       "WF0_TOP_CLK", "WF0_TOP_DATA";
167*300218b0SPeter Chiu			drive-strength = <4>;
168*300218b0SPeter Chiu		};
169*300218b0SPeter Chiu	};
170c3a064a3SSam Shih};
171