1*b0a75655SZhiyong Tao // SPDX-License-Identifier: GPL-2.0 2*b0a75655SZhiyong Tao /* 3*b0a75655SZhiyong Tao * Copyright (C) 2018 MediaTek Inc. 4*b0a75655SZhiyong Tao * Author: Zhiyong Tao <zhiyong.tao@mediatek.com> 5*b0a75655SZhiyong Tao * 6*b0a75655SZhiyong Tao */ 7*b0a75655SZhiyong Tao #ifndef __DTS_MT2712_PINFUNC_H 8*b0a75655SZhiyong Tao #define __DTS_MT2712_PINFUNC_H 9*b0a75655SZhiyong Tao 10*b0a75655SZhiyong Tao #include <dt-bindings/pinctrl/mt65xx.h> 11*b0a75655SZhiyong Tao 12*b0a75655SZhiyong Tao #define MT2712_PIN_0_EINT0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0) 13*b0a75655SZhiyong Tao #define MT2712_PIN_0_EINT0__FUNC_EINT0 (MTK_PIN_NO(0) | 1) 14*b0a75655SZhiyong Tao #define MT2712_PIN_0_EINT0__FUNC_MBIST_DIAG_SCANOUT (MTK_PIN_NO(0) | 2) 15*b0a75655SZhiyong Tao #define MT2712_PIN_0_EINT0__FUNC_DSIA_TE (MTK_PIN_NO(0) | 3) 16*b0a75655SZhiyong Tao #define MT2712_PIN_0_EINT0__FUNC_DSIC_TE (MTK_PIN_NO(0) | 4) 17*b0a75655SZhiyong Tao #define MT2712_PIN_0_EINT0__FUNC_DIN_D3 (MTK_PIN_NO(0) | 5) 18*b0a75655SZhiyong Tao #define MT2712_PIN_0_EINT0__FUNC_PURE_HW_PROTECT (MTK_PIN_NO(0) | 6) 19*b0a75655SZhiyong Tao 20*b0a75655SZhiyong Tao #define MT2712_PIN_1_EINT1__FUNC_GPIO1 (MTK_PIN_NO(1) | 0) 21*b0a75655SZhiyong Tao #define MT2712_PIN_1_EINT1__FUNC_EINT1 (MTK_PIN_NO(1) | 1) 22*b0a75655SZhiyong Tao #define MT2712_PIN_1_EINT1__FUNC_IR_IN (MTK_PIN_NO(1) | 2) 23*b0a75655SZhiyong Tao #define MT2712_PIN_1_EINT1__FUNC_DSIB_TE (MTK_PIN_NO(1) | 3) 24*b0a75655SZhiyong Tao #define MT2712_PIN_1_EINT1__FUNC_DSID_TE (MTK_PIN_NO(1) | 4) 25*b0a75655SZhiyong Tao #define MT2712_PIN_1_EINT1__FUNC_DIN_D4 (MTK_PIN_NO(1) | 5) 26*b0a75655SZhiyong Tao 27*b0a75655SZhiyong Tao #define MT2712_PIN_2_EINT2__FUNC_GPIO2 (MTK_PIN_NO(2) | 0) 28*b0a75655SZhiyong Tao #define MT2712_PIN_2_EINT2__FUNC_EINT2 (MTK_PIN_NO(2) | 1) 29*b0a75655SZhiyong Tao #define MT2712_PIN_2_EINT2__FUNC_IR_IN (MTK_PIN_NO(2) | 2) 30*b0a75655SZhiyong Tao #define MT2712_PIN_2_EINT2__FUNC_LCM_RST1 (MTK_PIN_NO(2) | 3) 31*b0a75655SZhiyong Tao #define MT2712_PIN_2_EINT2__FUNC_DIN_D5 (MTK_PIN_NO(2) | 5) 32*b0a75655SZhiyong Tao 33*b0a75655SZhiyong Tao #define MT2712_PIN_3_EINT3__FUNC_GPIO3 (MTK_PIN_NO(3) | 0) 34*b0a75655SZhiyong Tao #define MT2712_PIN_3_EINT3__FUNC_EINT3 (MTK_PIN_NO(3) | 1) 35*b0a75655SZhiyong Tao #define MT2712_PIN_3_EINT3__FUNC_IR_IN (MTK_PIN_NO(3) | 2) 36*b0a75655SZhiyong Tao #define MT2712_PIN_3_EINT3__FUNC_LCM_RST0 (MTK_PIN_NO(3) | 3) 37*b0a75655SZhiyong Tao #define MT2712_PIN_3_EINT3__FUNC_DIN_D6 (MTK_PIN_NO(3) | 5) 38*b0a75655SZhiyong Tao 39*b0a75655SZhiyong Tao #define MT2712_PIN_4_PWM0__FUNC_GPIO4 (MTK_PIN_NO(4) | 0) 40*b0a75655SZhiyong Tao #define MT2712_PIN_4_PWM0__FUNC_PWM0 (MTK_PIN_NO(4) | 1) 41*b0a75655SZhiyong Tao #define MT2712_PIN_4_PWM0__FUNC_DISP0_PWM (MTK_PIN_NO(4) | 2) 42*b0a75655SZhiyong Tao #define MT2712_PIN_4_PWM0__FUNC_DISP1_PWM (MTK_PIN_NO(4) | 3) 43*b0a75655SZhiyong Tao #define MT2712_PIN_4_PWM0__FUNC_DIN_CLK (MTK_PIN_NO(4) | 5) 44*b0a75655SZhiyong Tao 45*b0a75655SZhiyong Tao #define MT2712_PIN_5_PWM1__FUNC_GPIO5 (MTK_PIN_NO(5) | 0) 46*b0a75655SZhiyong Tao #define MT2712_PIN_5_PWM1__FUNC_PWM1 (MTK_PIN_NO(5) | 1) 47*b0a75655SZhiyong Tao #define MT2712_PIN_5_PWM1__FUNC_DISP1_PWM (MTK_PIN_NO(5) | 2) 48*b0a75655SZhiyong Tao #define MT2712_PIN_5_PWM1__FUNC_DISP0_PWM (MTK_PIN_NO(5) | 3) 49*b0a75655SZhiyong Tao #define MT2712_PIN_5_PWM1__FUNC_DIN_VSYNC (MTK_PIN_NO(5) | 5) 50*b0a75655SZhiyong Tao 51*b0a75655SZhiyong Tao #define MT2712_PIN_6_PWM2__FUNC_GPIO6 (MTK_PIN_NO(6) | 0) 52*b0a75655SZhiyong Tao #define MT2712_PIN_6_PWM2__FUNC_PWM2 (MTK_PIN_NO(6) | 1) 53*b0a75655SZhiyong Tao #define MT2712_PIN_6_PWM2__FUNC_DISP0_PWM (MTK_PIN_NO(6) | 2) 54*b0a75655SZhiyong Tao #define MT2712_PIN_6_PWM2__FUNC_DISP1_PWM (MTK_PIN_NO(6) | 3) 55*b0a75655SZhiyong Tao #define MT2712_PIN_6_PWM2__FUNC_DISP2_PWM (MTK_PIN_NO(6) | 4) 56*b0a75655SZhiyong Tao #define MT2712_PIN_6_PWM2__FUNC_DIN_HSYNC (MTK_PIN_NO(6) | 5) 57*b0a75655SZhiyong Tao 58*b0a75655SZhiyong Tao #define MT2712_PIN_7_PWM3__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) 59*b0a75655SZhiyong Tao #define MT2712_PIN_7_PWM3__FUNC_PWM3 (MTK_PIN_NO(7) | 1) 60*b0a75655SZhiyong Tao #define MT2712_PIN_7_PWM3__FUNC_DISP1_PWM (MTK_PIN_NO(7) | 2) 61*b0a75655SZhiyong Tao #define MT2712_PIN_7_PWM3__FUNC_DISP0_PWM (MTK_PIN_NO(7) | 3) 62*b0a75655SZhiyong Tao #define MT2712_PIN_7_PWM3__FUNC_LCM_RST2 (MTK_PIN_NO(7) | 4) 63*b0a75655SZhiyong Tao #define MT2712_PIN_7_PWM3__FUNC_DIN_D0 (MTK_PIN_NO(7) | 5) 64*b0a75655SZhiyong Tao 65*b0a75655SZhiyong Tao #define MT2712_PIN_8_PWM4__FUNC_GPIO8 (MTK_PIN_NO(8) | 0) 66*b0a75655SZhiyong Tao #define MT2712_PIN_8_PWM4__FUNC_PWM4 (MTK_PIN_NO(8) | 1) 67*b0a75655SZhiyong Tao #define MT2712_PIN_8_PWM4__FUNC_DISP0_PWM (MTK_PIN_NO(8) | 2) 68*b0a75655SZhiyong Tao #define MT2712_PIN_8_PWM4__FUNC_DISP1_PWM (MTK_PIN_NO(8) | 3) 69*b0a75655SZhiyong Tao #define MT2712_PIN_8_PWM4__FUNC_DSIA_TE (MTK_PIN_NO(8) | 4) 70*b0a75655SZhiyong Tao #define MT2712_PIN_8_PWM4__FUNC_DIN_D1 (MTK_PIN_NO(8) | 5) 71*b0a75655SZhiyong Tao 72*b0a75655SZhiyong Tao #define MT2712_PIN_9_PWM5__FUNC_GPIO9 (MTK_PIN_NO(9) | 0) 73*b0a75655SZhiyong Tao #define MT2712_PIN_9_PWM5__FUNC_PWM5 (MTK_PIN_NO(9) | 1) 74*b0a75655SZhiyong Tao #define MT2712_PIN_9_PWM5__FUNC_DISP1_PWM (MTK_PIN_NO(9) | 2) 75*b0a75655SZhiyong Tao #define MT2712_PIN_9_PWM5__FUNC_DISP0_PWM (MTK_PIN_NO(9) | 3) 76*b0a75655SZhiyong Tao #define MT2712_PIN_9_PWM5__FUNC_DSIB_TE (MTK_PIN_NO(9) | 4) 77*b0a75655SZhiyong Tao #define MT2712_PIN_9_PWM5__FUNC_DIN_D2 (MTK_PIN_NO(9) | 5) 78*b0a75655SZhiyong Tao 79*b0a75655SZhiyong Tao #define MT2712_PIN_10_PWM6__FUNC_GPIO10 (MTK_PIN_NO(10) | 0) 80*b0a75655SZhiyong Tao #define MT2712_PIN_10_PWM6__FUNC_PWM6 (MTK_PIN_NO(10) | 1) 81*b0a75655SZhiyong Tao #define MT2712_PIN_10_PWM6__FUNC_DISP0_PWM (MTK_PIN_NO(10) | 2) 82*b0a75655SZhiyong Tao #define MT2712_PIN_10_PWM6__FUNC_DISP1_PWM (MTK_PIN_NO(10) | 3) 83*b0a75655SZhiyong Tao #define MT2712_PIN_10_PWM6__FUNC_LCM_RST0 (MTK_PIN_NO(10) | 4) 84*b0a75655SZhiyong Tao 85*b0a75655SZhiyong Tao #define MT2712_PIN_11_PWM7__FUNC_GPIO11 (MTK_PIN_NO(11) | 0) 86*b0a75655SZhiyong Tao #define MT2712_PIN_11_PWM7__FUNC_PWM7 (MTK_PIN_NO(11) | 1) 87*b0a75655SZhiyong Tao #define MT2712_PIN_11_PWM7__FUNC_DISP1_PWM (MTK_PIN_NO(11) | 2) 88*b0a75655SZhiyong Tao #define MT2712_PIN_11_PWM7__FUNC_DISP0_PWM (MTK_PIN_NO(11) | 3) 89*b0a75655SZhiyong Tao #define MT2712_PIN_11_PWM7__FUNC_LCM_RST1 (MTK_PIN_NO(11) | 4) 90*b0a75655SZhiyong Tao 91*b0a75655SZhiyong Tao #define MT2712_PIN_12_IDDIG_P0__FUNC_GPIO12 (MTK_PIN_NO(12) | 0) 92*b0a75655SZhiyong Tao #define MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A (MTK_PIN_NO(12) | 1) 93*b0a75655SZhiyong Tao #define MT2712_PIN_12_IDDIG_P0__FUNC_DIN_D7 (MTK_PIN_NO(12) | 5) 94*b0a75655SZhiyong Tao 95*b0a75655SZhiyong Tao #define MT2712_PIN_13_DRV_VBUS_P0__FUNC_GPIO13 (MTK_PIN_NO(13) | 0) 96*b0a75655SZhiyong Tao #define MT2712_PIN_13_DRV_VBUS_P0__FUNC_DRV_VBUS_A (MTK_PIN_NO(13) | 1) 97*b0a75655SZhiyong Tao 98*b0a75655SZhiyong Tao #define MT2712_PIN_14_IDDIG_P1__FUNC_GPIO14 (MTK_PIN_NO(14) | 0) 99*b0a75655SZhiyong Tao #define MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B (MTK_PIN_NO(14) | 1) 100*b0a75655SZhiyong Tao 101*b0a75655SZhiyong Tao #define MT2712_PIN_15_DRV_VBUS_P1__FUNC_GPIO15 (MTK_PIN_NO(15) | 0) 102*b0a75655SZhiyong Tao #define MT2712_PIN_15_DRV_VBUS_P1__FUNC_DRV_VBUS_B (MTK_PIN_NO(15) | 1) 103*b0a75655SZhiyong Tao 104*b0a75655SZhiyong Tao #define MT2712_PIN_16_DRV_VBUS_P2__FUNC_GPIO16 (MTK_PIN_NO(16) | 0) 105*b0a75655SZhiyong Tao #define MT2712_PIN_16_DRV_VBUS_P2__FUNC_DRV_VBUS_C (MTK_PIN_NO(16) | 1) 106*b0a75655SZhiyong Tao 107*b0a75655SZhiyong Tao #define MT2712_PIN_17_DRV_VBUS_P3__FUNC_GPIO17 (MTK_PIN_NO(17) | 0) 108*b0a75655SZhiyong Tao #define MT2712_PIN_17_DRV_VBUS_P3__FUNC_DRV_VBUS_D (MTK_PIN_NO(17) | 1) 109*b0a75655SZhiyong Tao 110*b0a75655SZhiyong Tao #define MT2712_PIN_18_KPROW0__FUNC_GPIO18 (MTK_PIN_NO(18) | 0) 111*b0a75655SZhiyong Tao #define MT2712_PIN_18_KPROW0__FUNC_KROW0 (MTK_PIN_NO(18) | 1) 112*b0a75655SZhiyong Tao 113*b0a75655SZhiyong Tao #define MT2712_PIN_19_KPCOL0__FUNC_GPIO19 (MTK_PIN_NO(19) | 0) 114*b0a75655SZhiyong Tao #define MT2712_PIN_19_KPCOL0__FUNC_KCOL0 (MTK_PIN_NO(19) | 1) 115*b0a75655SZhiyong Tao 116*b0a75655SZhiyong Tao #define MT2712_PIN_20_KPROW1__FUNC_GPIO20 (MTK_PIN_NO(20) | 0) 117*b0a75655SZhiyong Tao #define MT2712_PIN_20_KPROW1__FUNC_KROW1 (MTK_PIN_NO(20) | 1) 118*b0a75655SZhiyong Tao 119*b0a75655SZhiyong Tao #define MT2712_PIN_21_KPCOL1__FUNC_GPIO21 (MTK_PIN_NO(21) | 0) 120*b0a75655SZhiyong Tao #define MT2712_PIN_21_KPCOL1__FUNC_KCOL1 (MTK_PIN_NO(21) | 1) 121*b0a75655SZhiyong Tao 122*b0a75655SZhiyong Tao #define MT2712_PIN_22_KPROW2__FUNC_GPIO22 (MTK_PIN_NO(22) | 0) 123*b0a75655SZhiyong Tao #define MT2712_PIN_22_KPROW2__FUNC_KROW2 (MTK_PIN_NO(22) | 1) 124*b0a75655SZhiyong Tao #define MT2712_PIN_22_KPROW2__FUNC_DISP1_PWM (MTK_PIN_NO(22) | 2) 125*b0a75655SZhiyong Tao 126*b0a75655SZhiyong Tao #define MT2712_PIN_23_KPCOL2__FUNC_GPIO23 (MTK_PIN_NO(23) | 0) 127*b0a75655SZhiyong Tao #define MT2712_PIN_23_KPCOL2__FUNC_KCOL2 (MTK_PIN_NO(23) | 1) 128*b0a75655SZhiyong Tao #define MT2712_PIN_23_KPCOL2__FUNC_DISP0_PWM (MTK_PIN_NO(23) | 2) 129*b0a75655SZhiyong Tao 130*b0a75655SZhiyong Tao #define MT2712_PIN_24_CMMCLK__FUNC_GPIO24 (MTK_PIN_NO(24) | 0) 131*b0a75655SZhiyong Tao #define MT2712_PIN_24_CMMCLK__FUNC_CMMCLK (MTK_PIN_NO(24) | 1) 132*b0a75655SZhiyong Tao #define MT2712_PIN_24_CMMCLK__FUNC_DBG_MON_A_1_ (MTK_PIN_NO(24) | 7) 133*b0a75655SZhiyong Tao 134*b0a75655SZhiyong Tao #define MT2712_PIN_25_CM2MCLK__FUNC_GPIO25 (MTK_PIN_NO(25) | 0) 135*b0a75655SZhiyong Tao #define MT2712_PIN_25_CM2MCLK__FUNC_CM2MCLK (MTK_PIN_NO(25) | 1) 136*b0a75655SZhiyong Tao #define MT2712_PIN_25_CM2MCLK__FUNC_DBG_MON_A_2_ (MTK_PIN_NO(25) | 7) 137*b0a75655SZhiyong Tao 138*b0a75655SZhiyong Tao #define MT2712_PIN_26_PCM_TX__FUNC_GPIO26 (MTK_PIN_NO(26) | 0) 139*b0a75655SZhiyong Tao #define MT2712_PIN_26_PCM_TX__FUNC_PCM1_DO (MTK_PIN_NO(26) | 1) 140*b0a75655SZhiyong Tao #define MT2712_PIN_26_PCM_TX__FUNC_MRG_TX (MTK_PIN_NO(26) | 2) 141*b0a75655SZhiyong Tao #define MT2712_PIN_26_PCM_TX__FUNC_DAI_TX (MTK_PIN_NO(26) | 3) 142*b0a75655SZhiyong Tao #define MT2712_PIN_26_PCM_TX__FUNC_MRG_RX (MTK_PIN_NO(26) | 4) 143*b0a75655SZhiyong Tao #define MT2712_PIN_26_PCM_TX__FUNC_DAI_RX (MTK_PIN_NO(26) | 5) 144*b0a75655SZhiyong Tao #define MT2712_PIN_26_PCM_TX__FUNC_PCM1_DI (MTK_PIN_NO(26) | 6) 145*b0a75655SZhiyong Tao #define MT2712_PIN_26_PCM_TX__FUNC_DBG_MON_A_3_ (MTK_PIN_NO(26) | 7) 146*b0a75655SZhiyong Tao 147*b0a75655SZhiyong Tao #define MT2712_PIN_27_PCM_CLK__FUNC_GPIO27 (MTK_PIN_NO(27) | 0) 148*b0a75655SZhiyong Tao #define MT2712_PIN_27_PCM_CLK__FUNC_PCM1_CLK (MTK_PIN_NO(27) | 1) 149*b0a75655SZhiyong Tao #define MT2712_PIN_27_PCM_CLK__FUNC_MRG_CLK (MTK_PIN_NO(27) | 2) 150*b0a75655SZhiyong Tao #define MT2712_PIN_27_PCM_CLK__FUNC_DAI_CLK (MTK_PIN_NO(27) | 3) 151*b0a75655SZhiyong Tao #define MT2712_PIN_27_PCM_CLK__FUNC_DBG_MON_A_4_ (MTK_PIN_NO(27) | 7) 152*b0a75655SZhiyong Tao 153*b0a75655SZhiyong Tao #define MT2712_PIN_28_PCM_RX__FUNC_GPIO28 (MTK_PIN_NO(28) | 0) 154*b0a75655SZhiyong Tao #define MT2712_PIN_28_PCM_RX__FUNC_PCM1_DI (MTK_PIN_NO(28) | 1) 155*b0a75655SZhiyong Tao #define MT2712_PIN_28_PCM_RX__FUNC_MRG_RX (MTK_PIN_NO(28) | 2) 156*b0a75655SZhiyong Tao #define MT2712_PIN_28_PCM_RX__FUNC_DAI_RX (MTK_PIN_NO(28) | 3) 157*b0a75655SZhiyong Tao #define MT2712_PIN_28_PCM_RX__FUNC_MRG_TX (MTK_PIN_NO(28) | 4) 158*b0a75655SZhiyong Tao #define MT2712_PIN_28_PCM_RX__FUNC_DAI_TX (MTK_PIN_NO(28) | 5) 159*b0a75655SZhiyong Tao #define MT2712_PIN_28_PCM_RX__FUNC_PCM1_DO (MTK_PIN_NO(28) | 6) 160*b0a75655SZhiyong Tao #define MT2712_PIN_28_PCM_RX__FUNC_DBG_MON_A_5_ (MTK_PIN_NO(28) | 7) 161*b0a75655SZhiyong Tao 162*b0a75655SZhiyong Tao #define MT2712_PIN_29_PCM_SYNC__FUNC_GPIO29 (MTK_PIN_NO(29) | 0) 163*b0a75655SZhiyong Tao #define MT2712_PIN_29_PCM_SYNC__FUNC_PCM1_SYNC (MTK_PIN_NO(29) | 1) 164*b0a75655SZhiyong Tao #define MT2712_PIN_29_PCM_SYNC__FUNC_MRG_SYNC (MTK_PIN_NO(29) | 2) 165*b0a75655SZhiyong Tao #define MT2712_PIN_29_PCM_SYNC__FUNC_DAI_SYNC (MTK_PIN_NO(29) | 3) 166*b0a75655SZhiyong Tao #define MT2712_PIN_29_PCM_SYNC__FUNC_DBG_MON_A_6_ (MTK_PIN_NO(29) | 7) 167*b0a75655SZhiyong Tao 168*b0a75655SZhiyong Tao #define MT2712_PIN_30_NCEB0__FUNC_GPIO30 (MTK_PIN_NO(30) | 0) 169*b0a75655SZhiyong Tao #define MT2712_PIN_30_NCEB0__FUNC_NCEB0 (MTK_PIN_NO(30) | 1) 170*b0a75655SZhiyong Tao #define MT2712_PIN_30_NCEB0__FUNC_USB0_FT_SDA (MTK_PIN_NO(30) | 2) 171*b0a75655SZhiyong Tao #define MT2712_PIN_30_NCEB0__FUNC_DBG_MON_A_7_ (MTK_PIN_NO(30) | 7) 172*b0a75655SZhiyong Tao 173*b0a75655SZhiyong Tao #define MT2712_PIN_31_NCEB1__FUNC_GPIO31 (MTK_PIN_NO(31) | 0) 174*b0a75655SZhiyong Tao #define MT2712_PIN_31_NCEB1__FUNC_NCEB1 (MTK_PIN_NO(31) | 1) 175*b0a75655SZhiyong Tao #define MT2712_PIN_31_NCEB1__FUNC_USB1_FT_SCL (MTK_PIN_NO(31) | 2) 176*b0a75655SZhiyong Tao #define MT2712_PIN_31_NCEB1__FUNC_DBG_MON_A_8_ (MTK_PIN_NO(31) | 7) 177*b0a75655SZhiyong Tao 178*b0a75655SZhiyong Tao #define MT2712_PIN_32_NF_DQS__FUNC_GPIO32 (MTK_PIN_NO(32) | 0) 179*b0a75655SZhiyong Tao #define MT2712_PIN_32_NF_DQS__FUNC_NF_DQS (MTK_PIN_NO(32) | 1) 180*b0a75655SZhiyong Tao #define MT2712_PIN_32_NF_DQS__FUNC_USB1_FT_SDA (MTK_PIN_NO(32) | 2) 181*b0a75655SZhiyong Tao #define MT2712_PIN_32_NF_DQS__FUNC_DBG_MON_A_9_ (MTK_PIN_NO(32) | 7) 182*b0a75655SZhiyong Tao 183*b0a75655SZhiyong Tao #define MT2712_PIN_33_NWEB__FUNC_GPIO33 (MTK_PIN_NO(33) | 0) 184*b0a75655SZhiyong Tao #define MT2712_PIN_33_NWEB__FUNC_NWEB (MTK_PIN_NO(33) | 1) 185*b0a75655SZhiyong Tao #define MT2712_PIN_33_NWEB__FUNC_USB2_FT_SCL (MTK_PIN_NO(33) | 2) 186*b0a75655SZhiyong Tao #define MT2712_PIN_33_NWEB__FUNC_DBG_MON_A_10_ (MTK_PIN_NO(33) | 7) 187*b0a75655SZhiyong Tao 188*b0a75655SZhiyong Tao #define MT2712_PIN_34_NREB__FUNC_GPIO34 (MTK_PIN_NO(34) | 0) 189*b0a75655SZhiyong Tao #define MT2712_PIN_34_NREB__FUNC_NREB (MTK_PIN_NO(34) | 1) 190*b0a75655SZhiyong Tao #define MT2712_PIN_34_NREB__FUNC_USB2_FT_SDA (MTK_PIN_NO(34) | 2) 191*b0a75655SZhiyong Tao #define MT2712_PIN_34_NREB__FUNC_DBG_MON_A_11_ (MTK_PIN_NO(34) | 7) 192*b0a75655SZhiyong Tao 193*b0a75655SZhiyong Tao #define MT2712_PIN_35_NCLE__FUNC_GPIO35 (MTK_PIN_NO(35) | 0) 194*b0a75655SZhiyong Tao #define MT2712_PIN_35_NCLE__FUNC_NCLE (MTK_PIN_NO(35) | 1) 195*b0a75655SZhiyong Tao #define MT2712_PIN_35_NCLE__FUNC_USB3_FT_SCL (MTK_PIN_NO(35) | 2) 196*b0a75655SZhiyong Tao #define MT2712_PIN_35_NCLE__FUNC_DBG_MON_A_12_ (MTK_PIN_NO(35) | 7) 197*b0a75655SZhiyong Tao 198*b0a75655SZhiyong Tao #define MT2712_PIN_36_NALE__FUNC_GPIO36 (MTK_PIN_NO(36) | 0) 199*b0a75655SZhiyong Tao #define MT2712_PIN_36_NALE__FUNC_NALE (MTK_PIN_NO(36) | 1) 200*b0a75655SZhiyong Tao #define MT2712_PIN_36_NALE__FUNC_USB3_FT_SDA (MTK_PIN_NO(36) | 2) 201*b0a75655SZhiyong Tao #define MT2712_PIN_36_NALE__FUNC_DBG_MON_A_13_ (MTK_PIN_NO(36) | 7) 202*b0a75655SZhiyong Tao 203*b0a75655SZhiyong Tao #define MT2712_PIN_37_MSDC0E_CLK__FUNC_GPIO37 (MTK_PIN_NO(37) | 0) 204*b0a75655SZhiyong Tao #define MT2712_PIN_37_MSDC0E_CLK__FUNC_MSDC0_CLK (MTK_PIN_NO(37) | 1) 205*b0a75655SZhiyong Tao #define MT2712_PIN_37_MSDC0E_CLK__FUNC_USB0_FT_SCL (MTK_PIN_NO(37) | 2) 206*b0a75655SZhiyong Tao #define MT2712_PIN_37_MSDC0E_CLK__FUNC_DBG_MON_A_0_ (MTK_PIN_NO(37) | 7) 207*b0a75655SZhiyong Tao 208*b0a75655SZhiyong Tao #define MT2712_PIN_38_MSDC0E_DAT7__FUNC_GPIO38 (MTK_PIN_NO(38) | 0) 209*b0a75655SZhiyong Tao #define MT2712_PIN_38_MSDC0E_DAT7__FUNC_MSDC0_DAT7 (MTK_PIN_NO(38) | 1) 210*b0a75655SZhiyong Tao #define MT2712_PIN_38_MSDC0E_DAT7__FUNC_NAND_ND7 (MTK_PIN_NO(38) | 2) 211*b0a75655SZhiyong Tao #define MT2712_PIN_38_MSDC0E_DAT7__FUNC_DBG_MON_A_14_ (MTK_PIN_NO(38) | 7) 212*b0a75655SZhiyong Tao 213*b0a75655SZhiyong Tao #define MT2712_PIN_39_MSDC0E_DAT6__FUNC_GPIO39 (MTK_PIN_NO(39) | 0) 214*b0a75655SZhiyong Tao #define MT2712_PIN_39_MSDC0E_DAT6__FUNC_MSDC0_DAT6 (MTK_PIN_NO(39) | 1) 215*b0a75655SZhiyong Tao #define MT2712_PIN_39_MSDC0E_DAT6__FUNC_NAND_ND6 (MTK_PIN_NO(39) | 2) 216*b0a75655SZhiyong Tao #define MT2712_PIN_39_MSDC0E_DAT6__FUNC_DBG_MON_A_15_ (MTK_PIN_NO(39) | 7) 217*b0a75655SZhiyong Tao 218*b0a75655SZhiyong Tao #define MT2712_PIN_40_MSDC0E_DAT5__FUNC_GPIO40 (MTK_PIN_NO(40) | 0) 219*b0a75655SZhiyong Tao #define MT2712_PIN_40_MSDC0E_DAT5__FUNC_MSDC0_DAT5 (MTK_PIN_NO(40) | 1) 220*b0a75655SZhiyong Tao #define MT2712_PIN_40_MSDC0E_DAT5__FUNC_NAND_ND5 (MTK_PIN_NO(40) | 2) 221*b0a75655SZhiyong Tao #define MT2712_PIN_40_MSDC0E_DAT5__FUNC_DBG_MON_A_16_ (MTK_PIN_NO(40) | 7) 222*b0a75655SZhiyong Tao 223*b0a75655SZhiyong Tao #define MT2712_PIN_41_MSDC0E_DAT4__FUNC_GPIO41 (MTK_PIN_NO(41) | 0) 224*b0a75655SZhiyong Tao #define MT2712_PIN_41_MSDC0E_DAT4__FUNC_MSDC0_DAT4 (MTK_PIN_NO(41) | 1) 225*b0a75655SZhiyong Tao #define MT2712_PIN_41_MSDC0E_DAT4__FUNC_NAND_ND4 (MTK_PIN_NO(41) | 2) 226*b0a75655SZhiyong Tao #define MT2712_PIN_41_MSDC0E_DAT4__FUNC_DBG_MON_A_17_ (MTK_PIN_NO(41) | 7) 227*b0a75655SZhiyong Tao 228*b0a75655SZhiyong Tao #define MT2712_PIN_42_MSDC0E_DAT3__FUNC_GPIO42 (MTK_PIN_NO(42) | 0) 229*b0a75655SZhiyong Tao #define MT2712_PIN_42_MSDC0E_DAT3__FUNC_MSDC0_DAT3 (MTK_PIN_NO(42) | 1) 230*b0a75655SZhiyong Tao #define MT2712_PIN_42_MSDC0E_DAT3__FUNC_NAND_ND3 (MTK_PIN_NO(42) | 2) 231*b0a75655SZhiyong Tao #define MT2712_PIN_42_MSDC0E_DAT3__FUNC_DBG_MON_A_18_ (MTK_PIN_NO(42) | 7) 232*b0a75655SZhiyong Tao 233*b0a75655SZhiyong Tao #define MT2712_PIN_43_MSDC0E_DAT2__FUNC_GPIO43 (MTK_PIN_NO(43) | 0) 234*b0a75655SZhiyong Tao #define MT2712_PIN_43_MSDC0E_DAT2__FUNC_MSDC0_DAT2 (MTK_PIN_NO(43) | 1) 235*b0a75655SZhiyong Tao #define MT2712_PIN_43_MSDC0E_DAT2__FUNC_NAND_ND2 (MTK_PIN_NO(43) | 2) 236*b0a75655SZhiyong Tao #define MT2712_PIN_43_MSDC0E_DAT2__FUNC_DBG_MON_A_19_ (MTK_PIN_NO(43) | 7) 237*b0a75655SZhiyong Tao 238*b0a75655SZhiyong Tao #define MT2712_PIN_44_MSDC0E_DAT1__FUNC_GPIO44 (MTK_PIN_NO(44) | 0) 239*b0a75655SZhiyong Tao #define MT2712_PIN_44_MSDC0E_DAT1__FUNC_MSDC0_DAT1 (MTK_PIN_NO(44) | 1) 240*b0a75655SZhiyong Tao #define MT2712_PIN_44_MSDC0E_DAT1__FUNC_NAND_ND1 (MTK_PIN_NO(44) | 2) 241*b0a75655SZhiyong Tao #define MT2712_PIN_44_MSDC0E_DAT1__FUNC_DBG_MON_A_20_ (MTK_PIN_NO(44) | 7) 242*b0a75655SZhiyong Tao 243*b0a75655SZhiyong Tao #define MT2712_PIN_45_MSDC0E_DAT0__FUNC_GPIO45 (MTK_PIN_NO(45) | 0) 244*b0a75655SZhiyong Tao #define MT2712_PIN_45_MSDC0E_DAT0__FUNC_MSDC0_DAT0 (MTK_PIN_NO(45) | 1) 245*b0a75655SZhiyong Tao #define MT2712_PIN_45_MSDC0E_DAT0__FUNC_NAND_ND0 (MTK_PIN_NO(45) | 2) 246*b0a75655SZhiyong Tao #define MT2712_PIN_45_MSDC0E_DAT0__FUNC_DBG_MON_A_21_ (MTK_PIN_NO(45) | 7) 247*b0a75655SZhiyong Tao 248*b0a75655SZhiyong Tao #define MT2712_PIN_46_MSDC0E_CMD__FUNC_GPIO46 (MTK_PIN_NO(46) | 0) 249*b0a75655SZhiyong Tao #define MT2712_PIN_46_MSDC0E_CMD__FUNC_MSDC0_CMD (MTK_PIN_NO(46) | 1) 250*b0a75655SZhiyong Tao #define MT2712_PIN_46_MSDC0E_CMD__FUNC_NAND_NRNB (MTK_PIN_NO(46) | 2) 251*b0a75655SZhiyong Tao #define MT2712_PIN_46_MSDC0E_CMD__FUNC_DBG_MON_A_22_ (MTK_PIN_NO(46) | 7) 252*b0a75655SZhiyong Tao 253*b0a75655SZhiyong Tao #define MT2712_PIN_47_MSDC0E_DSL__FUNC_GPIO47 (MTK_PIN_NO(47) | 0) 254*b0a75655SZhiyong Tao #define MT2712_PIN_47_MSDC0E_DSL__FUNC_MSDC0_DSL (MTK_PIN_NO(47) | 1) 255*b0a75655SZhiyong Tao #define MT2712_PIN_47_MSDC0E_DSL__FUNC_DBG_MON_A_23_ (MTK_PIN_NO(47) | 7) 256*b0a75655SZhiyong Tao 257*b0a75655SZhiyong Tao #define MT2712_PIN_48_MSDC0E_RSTB__FUNC_GPIO48 (MTK_PIN_NO(48) | 0) 258*b0a75655SZhiyong Tao #define MT2712_PIN_48_MSDC0E_RSTB__FUNC_MSDC0_RSTB (MTK_PIN_NO(48) | 1) 259*b0a75655SZhiyong Tao #define MT2712_PIN_48_MSDC0E_RSTB__FUNC_DBG_MON_A_24_ (MTK_PIN_NO(48) | 7) 260*b0a75655SZhiyong Tao 261*b0a75655SZhiyong Tao #define MT2712_PIN_49_MSDC3_DAT3__FUNC_GPIO49 (MTK_PIN_NO(49) | 0) 262*b0a75655SZhiyong Tao #define MT2712_PIN_49_MSDC3_DAT3__FUNC_MSDC3_DAT3 (MTK_PIN_NO(49) | 1) 263*b0a75655SZhiyong Tao #define MT2712_PIN_49_MSDC3_DAT3__FUNC_DBG_MON_A_25_ (MTK_PIN_NO(49) | 7) 264*b0a75655SZhiyong Tao 265*b0a75655SZhiyong Tao #define MT2712_PIN_50_MSDC3_DAT2__FUNC_GPIO50 (MTK_PIN_NO(50) | 0) 266*b0a75655SZhiyong Tao #define MT2712_PIN_50_MSDC3_DAT2__FUNC_MSDC3_DAT2 (MTK_PIN_NO(50) | 1) 267*b0a75655SZhiyong Tao #define MT2712_PIN_50_MSDC3_DAT2__FUNC_DBG_MON_A_26_ (MTK_PIN_NO(50) | 7) 268*b0a75655SZhiyong Tao 269*b0a75655SZhiyong Tao #define MT2712_PIN_51_MSDC3_DAT1__FUNC_GPIO51 (MTK_PIN_NO(51) | 0) 270*b0a75655SZhiyong Tao #define MT2712_PIN_51_MSDC3_DAT1__FUNC_MSDC3_DAT1 (MTK_PIN_NO(51) | 1) 271*b0a75655SZhiyong Tao #define MT2712_PIN_51_MSDC3_DAT1__FUNC_DBG_MON_A_27_ (MTK_PIN_NO(51) | 7) 272*b0a75655SZhiyong Tao 273*b0a75655SZhiyong Tao #define MT2712_PIN_52_MSDC3_DAT0__FUNC_GPIO52 (MTK_PIN_NO(52) | 0) 274*b0a75655SZhiyong Tao #define MT2712_PIN_52_MSDC3_DAT0__FUNC_MSDC3_DAT0 (MTK_PIN_NO(52) | 1) 275*b0a75655SZhiyong Tao #define MT2712_PIN_52_MSDC3_DAT0__FUNC_DBG_MON_A_28_ (MTK_PIN_NO(52) | 7) 276*b0a75655SZhiyong Tao 277*b0a75655SZhiyong Tao #define MT2712_PIN_53_MSDC3_CMD__FUNC_GPIO53 (MTK_PIN_NO(53) | 0) 278*b0a75655SZhiyong Tao #define MT2712_PIN_53_MSDC3_CMD__FUNC_MSDC3_CMD (MTK_PIN_NO(53) | 1) 279*b0a75655SZhiyong Tao #define MT2712_PIN_53_MSDC3_CMD__FUNC_DBG_MON_A_29_ (MTK_PIN_NO(53) | 7) 280*b0a75655SZhiyong Tao 281*b0a75655SZhiyong Tao #define MT2712_PIN_54_MSDC3_INS__FUNC_GPIO54 (MTK_PIN_NO(54) | 0) 282*b0a75655SZhiyong Tao #define MT2712_PIN_54_MSDC3_INS__FUNC_MSDC3_INS (MTK_PIN_NO(54) | 1) 283*b0a75655SZhiyong Tao #define MT2712_PIN_54_MSDC3_INS__FUNC_DBG_MON_A_30_ (MTK_PIN_NO(54) | 7) 284*b0a75655SZhiyong Tao 285*b0a75655SZhiyong Tao #define MT2712_PIN_55_MSDC3_DSL__FUNC_GPIO55 (MTK_PIN_NO(55) | 0) 286*b0a75655SZhiyong Tao #define MT2712_PIN_55_MSDC3_DSL__FUNC_MSDC3_DSL (MTK_PIN_NO(55) | 1) 287*b0a75655SZhiyong Tao #define MT2712_PIN_55_MSDC3_DSL__FUNC_DBG_MON_A_31_ (MTK_PIN_NO(55) | 7) 288*b0a75655SZhiyong Tao 289*b0a75655SZhiyong Tao #define MT2712_PIN_56_MSDC3_CLK__FUNC_GPIO56 (MTK_PIN_NO(56) | 0) 290*b0a75655SZhiyong Tao #define MT2712_PIN_56_MSDC3_CLK__FUNC_MSDC3_CLK (MTK_PIN_NO(56) | 1) 291*b0a75655SZhiyong Tao #define MT2712_PIN_56_MSDC3_CLK__FUNC_DBG_MON_A_32_ (MTK_PIN_NO(56) | 7) 292*b0a75655SZhiyong Tao 293*b0a75655SZhiyong Tao #define MT2712_PIN_57_NOR_CS__FUNC_GPIO57 (MTK_PIN_NO(57) | 0) 294*b0a75655SZhiyong Tao #define MT2712_PIN_57_NOR_CS__FUNC_NOR_CS (MTK_PIN_NO(57) | 1) 295*b0a75655SZhiyong Tao 296*b0a75655SZhiyong Tao #define MT2712_PIN_58_NOR_CK__FUNC_GPIO58 (MTK_PIN_NO(58) | 0) 297*b0a75655SZhiyong Tao #define MT2712_PIN_58_NOR_CK__FUNC_NOR_CK (MTK_PIN_NO(58) | 1) 298*b0a75655SZhiyong Tao 299*b0a75655SZhiyong Tao #define MT2712_PIN_59_NOR_IO0__FUNC_GPIO59 (MTK_PIN_NO(59) | 0) 300*b0a75655SZhiyong Tao #define MT2712_PIN_59_NOR_IO0__FUNC_NOR_IO0 (MTK_PIN_NO(59) | 1) 301*b0a75655SZhiyong Tao 302*b0a75655SZhiyong Tao #define MT2712_PIN_60_NOR_IO1__FUNC_GPIO60 (MTK_PIN_NO(60) | 0) 303*b0a75655SZhiyong Tao #define MT2712_PIN_60_NOR_IO1__FUNC_NOR_IO1 (MTK_PIN_NO(60) | 1) 304*b0a75655SZhiyong Tao 305*b0a75655SZhiyong Tao #define MT2712_PIN_61_NOR_IO2__FUNC_GPIO61 (MTK_PIN_NO(61) | 0) 306*b0a75655SZhiyong Tao #define MT2712_PIN_61_NOR_IO2__FUNC_NOR_IO2 (MTK_PIN_NO(61) | 1) 307*b0a75655SZhiyong Tao 308*b0a75655SZhiyong Tao #define MT2712_PIN_62_NOR_IO3__FUNC_GPIO62 (MTK_PIN_NO(62) | 0) 309*b0a75655SZhiyong Tao #define MT2712_PIN_62_NOR_IO3__FUNC_NOR_IO3 (MTK_PIN_NO(62) | 1) 310*b0a75655SZhiyong Tao 311*b0a75655SZhiyong Tao #define MT2712_PIN_63_MSDC1_CLK__FUNC_GPIO63 (MTK_PIN_NO(63) | 0) 312*b0a75655SZhiyong Tao #define MT2712_PIN_63_MSDC1_CLK__FUNC_MSDC1_CLK (MTK_PIN_NO(63) | 1) 313*b0a75655SZhiyong Tao #define MT2712_PIN_63_MSDC1_CLK__FUNC_UDI_TCK (MTK_PIN_NO(63) | 2) 314*b0a75655SZhiyong Tao 315*b0a75655SZhiyong Tao #define MT2712_PIN_64_MSDC1_DAT3__FUNC_GPIO64 (MTK_PIN_NO(64) | 0) 316*b0a75655SZhiyong Tao #define MT2712_PIN_64_MSDC1_DAT3__FUNC_MSDC1_DAT3 (MTK_PIN_NO(64) | 1) 317*b0a75655SZhiyong Tao #define MT2712_PIN_64_MSDC1_DAT3__FUNC_UDI_TDI (MTK_PIN_NO(64) | 2) 318*b0a75655SZhiyong Tao 319*b0a75655SZhiyong Tao #define MT2712_PIN_65_MSDC1_DAT1__FUNC_GPIO65 (MTK_PIN_NO(65) | 0) 320*b0a75655SZhiyong Tao #define MT2712_PIN_65_MSDC1_DAT1__FUNC_MSDC1_DAT1 (MTK_PIN_NO(65) | 1) 321*b0a75655SZhiyong Tao #define MT2712_PIN_65_MSDC1_DAT1__FUNC_UDI_TMS (MTK_PIN_NO(65) | 2) 322*b0a75655SZhiyong Tao 323*b0a75655SZhiyong Tao #define MT2712_PIN_66_MSDC1_DAT2__FUNC_GPIO66 (MTK_PIN_NO(66) | 0) 324*b0a75655SZhiyong Tao #define MT2712_PIN_66_MSDC1_DAT2__FUNC_MSDC1_DAT2 (MTK_PIN_NO(66) | 1) 325*b0a75655SZhiyong Tao #define MT2712_PIN_66_MSDC1_DAT2__FUNC_UDI_TDO (MTK_PIN_NO(66) | 2) 326*b0a75655SZhiyong Tao 327*b0a75655SZhiyong Tao #define MT2712_PIN_67_MSDC1_PSW__FUNC_GPIO67 (MTK_PIN_NO(67) | 0) 328*b0a75655SZhiyong Tao #define MT2712_PIN_67_MSDC1_PSW__FUNC_UDI_NTRST (MTK_PIN_NO(67) | 2) 329*b0a75655SZhiyong Tao 330*b0a75655SZhiyong Tao #define MT2712_PIN_68_MSDC1_DAT0__FUNC_GPIO68 (MTK_PIN_NO(68) | 0) 331*b0a75655SZhiyong Tao #define MT2712_PIN_68_MSDC1_DAT0__FUNC_MSDC1_DAT0 (MTK_PIN_NO(68) | 1) 332*b0a75655SZhiyong Tao 333*b0a75655SZhiyong Tao #define MT2712_PIN_69_MSDC1_CMD__FUNC_GPIO69 (MTK_PIN_NO(69) | 0) 334*b0a75655SZhiyong Tao #define MT2712_PIN_69_MSDC1_CMD__FUNC_MSDC1_CMD (MTK_PIN_NO(69) | 1) 335*b0a75655SZhiyong Tao 336*b0a75655SZhiyong Tao #define MT2712_PIN_70_MSDC1_INS__FUNC_GPIO70 (MTK_PIN_NO(70) | 0) 337*b0a75655SZhiyong Tao 338*b0a75655SZhiyong Tao #define MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71 (MTK_PIN_NO(71) | 0) 339*b0a75655SZhiyong Tao #define MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3 (MTK_PIN_NO(71) | 1) 340*b0a75655SZhiyong Tao #define MT2712_PIN_71_GBE_TXD3__FUNC_DBG_MON_B_0_ (MTK_PIN_NO(71) | 7) 341*b0a75655SZhiyong Tao 342*b0a75655SZhiyong Tao #define MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72 (MTK_PIN_NO(72) | 0) 343*b0a75655SZhiyong Tao #define MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2 (MTK_PIN_NO(72) | 1) 344*b0a75655SZhiyong Tao #define MT2712_PIN_72_GBE_TXD2__FUNC_DBG_MON_B_1_ (MTK_PIN_NO(72) | 7) 345*b0a75655SZhiyong Tao 346*b0a75655SZhiyong Tao #define MT2712_PIN_73_GBE_TXD1__FUNC_GPIO73 (MTK_PIN_NO(73) | 0) 347*b0a75655SZhiyong Tao #define MT2712_PIN_73_GBE_TXD1__FUNC_GBE_TXD1 (MTK_PIN_NO(73) | 1) 348*b0a75655SZhiyong Tao #define MT2712_PIN_73_GBE_TXD1__FUNC_DBG_MON_B_2_ (MTK_PIN_NO(73) | 7) 349*b0a75655SZhiyong Tao 350*b0a75655SZhiyong Tao #define MT2712_PIN_74_GBE_TXD0__FUNC_GPIO74 (MTK_PIN_NO(74) | 0) 351*b0a75655SZhiyong Tao #define MT2712_PIN_74_GBE_TXD0__FUNC_GBE_TXD0 (MTK_PIN_NO(74) | 1) 352*b0a75655SZhiyong Tao #define MT2712_PIN_74_GBE_TXD0__FUNC_DBG_MON_B_3_ (MTK_PIN_NO(74) | 7) 353*b0a75655SZhiyong Tao 354*b0a75655SZhiyong Tao #define MT2712_PIN_75_GBE_TXC__FUNC_GPIO75 (MTK_PIN_NO(75) | 0) 355*b0a75655SZhiyong Tao #define MT2712_PIN_75_GBE_TXC__FUNC_GBE_TXC (MTK_PIN_NO(75) | 1) 356*b0a75655SZhiyong Tao #define MT2712_PIN_75_GBE_TXC__FUNC_DBG_MON_B_4_ (MTK_PIN_NO(75) | 7) 357*b0a75655SZhiyong Tao 358*b0a75655SZhiyong Tao #define MT2712_PIN_76_GBE_TXEN__FUNC_GPIO76 (MTK_PIN_NO(76) | 0) 359*b0a75655SZhiyong Tao #define MT2712_PIN_76_GBE_TXEN__FUNC_GBE_TXEN (MTK_PIN_NO(76) | 1) 360*b0a75655SZhiyong Tao #define MT2712_PIN_76_GBE_TXEN__FUNC_DBG_MON_B_5_ (MTK_PIN_NO(76) | 7) 361*b0a75655SZhiyong Tao 362*b0a75655SZhiyong Tao #define MT2712_PIN_77_GBE_TXER__FUNC_GPIO77 (MTK_PIN_NO(77) | 0) 363*b0a75655SZhiyong Tao #define MT2712_PIN_77_GBE_TXER__FUNC_GBE_TXER (MTK_PIN_NO(77) | 1) 364*b0a75655SZhiyong Tao #define MT2712_PIN_77_GBE_TXER__FUNC_DBG_MON_B_6_ (MTK_PIN_NO(77) | 7) 365*b0a75655SZhiyong Tao 366*b0a75655SZhiyong Tao #define MT2712_PIN_78_GBE_RXD3__FUNC_GPIO78 (MTK_PIN_NO(78) | 0) 367*b0a75655SZhiyong Tao #define MT2712_PIN_78_GBE_RXD3__FUNC_GBE_RXD3 (MTK_PIN_NO(78) | 1) 368*b0a75655SZhiyong Tao #define MT2712_PIN_78_GBE_RXD3__FUNC_DBG_MON_B_7_ (MTK_PIN_NO(78) | 7) 369*b0a75655SZhiyong Tao 370*b0a75655SZhiyong Tao #define MT2712_PIN_79_GBE_RXD2__FUNC_GPIO79 (MTK_PIN_NO(79) | 0) 371*b0a75655SZhiyong Tao #define MT2712_PIN_79_GBE_RXD2__FUNC_GBE_RXD2 (MTK_PIN_NO(79) | 1) 372*b0a75655SZhiyong Tao #define MT2712_PIN_79_GBE_RXD2__FUNC_DBG_MON_B_8_ (MTK_PIN_NO(79) | 7) 373*b0a75655SZhiyong Tao 374*b0a75655SZhiyong Tao #define MT2712_PIN_80_GBE_RXD1__FUNC_GPIO80 (MTK_PIN_NO(80) | 0) 375*b0a75655SZhiyong Tao #define MT2712_PIN_80_GBE_RXD1__FUNC_GBE_RXD1 (MTK_PIN_NO(80) | 1) 376*b0a75655SZhiyong Tao #define MT2712_PIN_80_GBE_RXD1__FUNC_DBG_MON_B_9_ (MTK_PIN_NO(80) | 7) 377*b0a75655SZhiyong Tao 378*b0a75655SZhiyong Tao #define MT2712_PIN_81_GBE_RXD0__FUNC_GPIO81 (MTK_PIN_NO(81) | 0) 379*b0a75655SZhiyong Tao #define MT2712_PIN_81_GBE_RXD0__FUNC_GBE_RXD0 (MTK_PIN_NO(81) | 1) 380*b0a75655SZhiyong Tao #define MT2712_PIN_81_GBE_RXD0__FUNC_DBG_MON_B_10_ (MTK_PIN_NO(81) | 7) 381*b0a75655SZhiyong Tao 382*b0a75655SZhiyong Tao #define MT2712_PIN_82_GBE_RXDV__FUNC_GPIO82 (MTK_PIN_NO(82) | 0) 383*b0a75655SZhiyong Tao #define MT2712_PIN_82_GBE_RXDV__FUNC_GBE_RXDV (MTK_PIN_NO(82) | 1) 384*b0a75655SZhiyong Tao #define MT2712_PIN_82_GBE_RXDV__FUNC_DBG_MON_B_11_ (MTK_PIN_NO(82) | 7) 385*b0a75655SZhiyong Tao 386*b0a75655SZhiyong Tao #define MT2712_PIN_83_GBE_RXER__FUNC_GPIO83 (MTK_PIN_NO(83) | 0) 387*b0a75655SZhiyong Tao #define MT2712_PIN_83_GBE_RXER__FUNC_GBE_RXER (MTK_PIN_NO(83) | 1) 388*b0a75655SZhiyong Tao #define MT2712_PIN_83_GBE_RXER__FUNC_DBG_MON_B_12_ (MTK_PIN_NO(83) | 7) 389*b0a75655SZhiyong Tao 390*b0a75655SZhiyong Tao #define MT2712_PIN_84_GBE_RXC__FUNC_GPIO84 (MTK_PIN_NO(84) | 0) 391*b0a75655SZhiyong Tao #define MT2712_PIN_84_GBE_RXC__FUNC_GBE_RXC (MTK_PIN_NO(84) | 1) 392*b0a75655SZhiyong Tao #define MT2712_PIN_84_GBE_RXC__FUNC_DBG_MON_B_13_ (MTK_PIN_NO(84) | 7) 393*b0a75655SZhiyong Tao 394*b0a75655SZhiyong Tao #define MT2712_PIN_85_GBE_MDC__FUNC_GPIO85 (MTK_PIN_NO(85) | 0) 395*b0a75655SZhiyong Tao #define MT2712_PIN_85_GBE_MDC__FUNC_GBE_MDC (MTK_PIN_NO(85) | 1) 396*b0a75655SZhiyong Tao #define MT2712_PIN_85_GBE_MDC__FUNC_DBG_MON_B_14_ (MTK_PIN_NO(85) | 7) 397*b0a75655SZhiyong Tao 398*b0a75655SZhiyong Tao #define MT2712_PIN_86_GBE_MDIO__FUNC_GPIO86 (MTK_PIN_NO(86) | 0) 399*b0a75655SZhiyong Tao #define MT2712_PIN_86_GBE_MDIO__FUNC_GBE_MDIO (MTK_PIN_NO(86) | 1) 400*b0a75655SZhiyong Tao #define MT2712_PIN_86_GBE_MDIO__FUNC_DBG_MON_B_15_ (MTK_PIN_NO(86) | 7) 401*b0a75655SZhiyong Tao 402*b0a75655SZhiyong Tao #define MT2712_PIN_87_GBE_COL__FUNC_GPIO87 (MTK_PIN_NO(87) | 0) 403*b0a75655SZhiyong Tao #define MT2712_PIN_87_GBE_COL__FUNC_GBE_COL (MTK_PIN_NO(87) | 1) 404*b0a75655SZhiyong Tao #define MT2712_PIN_87_GBE_COL__FUNC_DBG_MON_B_16_ (MTK_PIN_NO(87) | 7) 405*b0a75655SZhiyong Tao 406*b0a75655SZhiyong Tao #define MT2712_PIN_88_GBE_INTR__FUNC_GPIO88 (MTK_PIN_NO(88) | 0) 407*b0a75655SZhiyong Tao #define MT2712_PIN_88_GBE_INTR__FUNC_GBE_INTR (MTK_PIN_NO(88) | 1) 408*b0a75655SZhiyong Tao #define MT2712_PIN_88_GBE_INTR__FUNC_GBE_CRS (MTK_PIN_NO(88) | 2) 409*b0a75655SZhiyong Tao #define MT2712_PIN_88_GBE_INTR__FUNC_DBG_MON_B_17_ (MTK_PIN_NO(88) | 7) 410*b0a75655SZhiyong Tao 411*b0a75655SZhiyong Tao #define MT2712_PIN_89_MSDC2_CLK__FUNC_GPIO89 (MTK_PIN_NO(89) | 0) 412*b0a75655SZhiyong Tao #define MT2712_PIN_89_MSDC2_CLK__FUNC_MSDC2_CLK (MTK_PIN_NO(89) | 1) 413*b0a75655SZhiyong Tao #define MT2712_PIN_89_MSDC2_CLK__FUNC_DBG_MON_B_18_ (MTK_PIN_NO(89) | 7) 414*b0a75655SZhiyong Tao 415*b0a75655SZhiyong Tao #define MT2712_PIN_90_MSDC2_DAT3__FUNC_GPIO90 (MTK_PIN_NO(90) | 0) 416*b0a75655SZhiyong Tao #define MT2712_PIN_90_MSDC2_DAT3__FUNC_MSDC2_DAT3 (MTK_PIN_NO(90) | 1) 417*b0a75655SZhiyong Tao #define MT2712_PIN_90_MSDC2_DAT3__FUNC_DBG_MON_B_19_ (MTK_PIN_NO(90) | 7) 418*b0a75655SZhiyong Tao 419*b0a75655SZhiyong Tao #define MT2712_PIN_91_MSDC2_DAT2__FUNC_GPIO91 (MTK_PIN_NO(91) | 0) 420*b0a75655SZhiyong Tao #define MT2712_PIN_91_MSDC2_DAT2__FUNC_MSDC2_DAT2 (MTK_PIN_NO(91) | 1) 421*b0a75655SZhiyong Tao #define MT2712_PIN_91_MSDC2_DAT2__FUNC_DBG_MON_B_20_ (MTK_PIN_NO(91) | 7) 422*b0a75655SZhiyong Tao 423*b0a75655SZhiyong Tao #define MT2712_PIN_92_MSDC2_DAT1__FUNC_GPIO92 (MTK_PIN_NO(92) | 0) 424*b0a75655SZhiyong Tao #define MT2712_PIN_92_MSDC2_DAT1__FUNC_MSDC2_DAT1 (MTK_PIN_NO(92) | 1) 425*b0a75655SZhiyong Tao #define MT2712_PIN_92_MSDC2_DAT1__FUNC_DBG_MON_B_21_ (MTK_PIN_NO(92) | 7) 426*b0a75655SZhiyong Tao 427*b0a75655SZhiyong Tao #define MT2712_PIN_93_MSDC2_DAT0__FUNC_GPIO93 (MTK_PIN_NO(93) | 0) 428*b0a75655SZhiyong Tao #define MT2712_PIN_93_MSDC2_DAT0__FUNC_MSDC2_DAT0 (MTK_PIN_NO(93) | 1) 429*b0a75655SZhiyong Tao #define MT2712_PIN_93_MSDC2_DAT0__FUNC_DBG_MON_B_22_ (MTK_PIN_NO(93) | 7) 430*b0a75655SZhiyong Tao 431*b0a75655SZhiyong Tao #define MT2712_PIN_94_MSDC2_INS__FUNC_GPIO94 (MTK_PIN_NO(94) | 0) 432*b0a75655SZhiyong Tao #define MT2712_PIN_94_MSDC2_INS__FUNC_DBG_MON_B_23_ (MTK_PIN_NO(94) | 7) 433*b0a75655SZhiyong Tao 434*b0a75655SZhiyong Tao #define MT2712_PIN_95_MSDC2_CMD__FUNC_GPIO95 (MTK_PIN_NO(95) | 0) 435*b0a75655SZhiyong Tao #define MT2712_PIN_95_MSDC2_CMD__FUNC_MSDC2_CMD (MTK_PIN_NO(95) | 1) 436*b0a75655SZhiyong Tao #define MT2712_PIN_95_MSDC2_CMD__FUNC_DBG_MON_B_24_ (MTK_PIN_NO(95) | 7) 437*b0a75655SZhiyong Tao 438*b0a75655SZhiyong Tao #define MT2712_PIN_96_MSDC2_PSW__FUNC_GPIO96 (MTK_PIN_NO(96) | 0) 439*b0a75655SZhiyong Tao #define MT2712_PIN_96_MSDC2_PSW__FUNC_DBG_MON_B_25_ (MTK_PIN_NO(96) | 7) 440*b0a75655SZhiyong Tao 441*b0a75655SZhiyong Tao #define MT2712_PIN_97_URXD4__FUNC_GPIO97 (MTK_PIN_NO(97) | 0) 442*b0a75655SZhiyong Tao #define MT2712_PIN_97_URXD4__FUNC_URXD4 (MTK_PIN_NO(97) | 1) 443*b0a75655SZhiyong Tao #define MT2712_PIN_97_URXD4__FUNC_UTXD4 (MTK_PIN_NO(97) | 2) 444*b0a75655SZhiyong Tao #define MT2712_PIN_97_URXD4__FUNC_MRG_CLK (MTK_PIN_NO(97) | 3) 445*b0a75655SZhiyong Tao #define MT2712_PIN_97_URXD4__FUNC_PCM1_CLK (MTK_PIN_NO(97) | 4) 446*b0a75655SZhiyong Tao #define MT2712_PIN_97_URXD4__FUNC_I2S_IQ2_SDQB (MTK_PIN_NO(97) | 5) 447*b0a75655SZhiyong Tao #define MT2712_PIN_97_URXD4__FUNC_I2SO1_WS (MTK_PIN_NO(97) | 6) 448*b0a75655SZhiyong Tao #define MT2712_PIN_97_URXD4__FUNC_DBG_MON_B_26_ (MTK_PIN_NO(97) | 7) 449*b0a75655SZhiyong Tao 450*b0a75655SZhiyong Tao #define MT2712_PIN_98_URTS4__FUNC_GPIO98 (MTK_PIN_NO(98) | 0) 451*b0a75655SZhiyong Tao #define MT2712_PIN_98_URTS4__FUNC_URTS4 (MTK_PIN_NO(98) | 1) 452*b0a75655SZhiyong Tao #define MT2712_PIN_98_URTS4__FUNC_UCTS4 (MTK_PIN_NO(98) | 2) 453*b0a75655SZhiyong Tao #define MT2712_PIN_98_URTS4__FUNC_MRG_RX (MTK_PIN_NO(98) | 3) 454*b0a75655SZhiyong Tao #define MT2712_PIN_98_URTS4__FUNC_PCM1_DI (MTK_PIN_NO(98) | 4) 455*b0a75655SZhiyong Tao #define MT2712_PIN_98_URTS4__FUNC_I2S_IQ1_SDIB (MTK_PIN_NO(98) | 5) 456*b0a75655SZhiyong Tao #define MT2712_PIN_98_URTS4__FUNC_I2SO1_MCK (MTK_PIN_NO(98) | 6) 457*b0a75655SZhiyong Tao #define MT2712_PIN_98_URTS4__FUNC_DBG_MON_B_27_ (MTK_PIN_NO(98) | 7) 458*b0a75655SZhiyong Tao 459*b0a75655SZhiyong Tao #define MT2712_PIN_99_UTXD4__FUNC_GPIO99 (MTK_PIN_NO(99) | 0) 460*b0a75655SZhiyong Tao #define MT2712_PIN_99_UTXD4__FUNC_UTXD4 (MTK_PIN_NO(99) | 1) 461*b0a75655SZhiyong Tao #define MT2712_PIN_99_UTXD4__FUNC_URXD4 (MTK_PIN_NO(99) | 2) 462*b0a75655SZhiyong Tao #define MT2712_PIN_99_UTXD4__FUNC_MRG_SYNC (MTK_PIN_NO(99) | 3) 463*b0a75655SZhiyong Tao #define MT2712_PIN_99_UTXD4__FUNC_PCM1_SYNC (MTK_PIN_NO(99) | 4) 464*b0a75655SZhiyong Tao #define MT2712_PIN_99_UTXD4__FUNC_I2S_IQ0_SDQB (MTK_PIN_NO(99) | 5) 465*b0a75655SZhiyong Tao #define MT2712_PIN_99_UTXD4__FUNC_I2SO1_BCK (MTK_PIN_NO(99) | 6) 466*b0a75655SZhiyong Tao #define MT2712_PIN_99_UTXD4__FUNC_DBG_MON_B_28_ (MTK_PIN_NO(99) | 7) 467*b0a75655SZhiyong Tao 468*b0a75655SZhiyong Tao #define MT2712_PIN_100_UCTS4__FUNC_GPIO100 (MTK_PIN_NO(100) | 0) 469*b0a75655SZhiyong Tao #define MT2712_PIN_100_UCTS4__FUNC_UCTS4 (MTK_PIN_NO(100) | 1) 470*b0a75655SZhiyong Tao #define MT2712_PIN_100_UCTS4__FUNC_URTS4 (MTK_PIN_NO(100) | 2) 471*b0a75655SZhiyong Tao #define MT2712_PIN_100_UCTS4__FUNC_MRG_TX (MTK_PIN_NO(100) | 3) 472*b0a75655SZhiyong Tao #define MT2712_PIN_100_UCTS4__FUNC_PCM1_DO (MTK_PIN_NO(100) | 4) 473*b0a75655SZhiyong Tao #define MT2712_PIN_100_UCTS4__FUNC_I2S_IQ0_SDIB (MTK_PIN_NO(100) | 5) 474*b0a75655SZhiyong Tao #define MT2712_PIN_100_UCTS4__FUNC_I2SO1_DO (MTK_PIN_NO(100) | 6) 475*b0a75655SZhiyong Tao #define MT2712_PIN_100_UCTS4__FUNC_DBG_MON_B_29_ (MTK_PIN_NO(100) | 7) 476*b0a75655SZhiyong Tao 477*b0a75655SZhiyong Tao #define MT2712_PIN_101_URXD5__FUNC_GPIO101 (MTK_PIN_NO(101) | 0) 478*b0a75655SZhiyong Tao #define MT2712_PIN_101_URXD5__FUNC_URXD5 (MTK_PIN_NO(101) | 1) 479*b0a75655SZhiyong Tao #define MT2712_PIN_101_URXD5__FUNC_UTXD5 (MTK_PIN_NO(101) | 2) 480*b0a75655SZhiyong Tao #define MT2712_PIN_101_URXD5__FUNC_I2SO3_WS (MTK_PIN_NO(101) | 3) 481*b0a75655SZhiyong Tao #define MT2712_PIN_101_URXD5__FUNC_TDMIN_LRCK (MTK_PIN_NO(101) | 4) 482*b0a75655SZhiyong Tao #define MT2712_PIN_101_URXD5__FUNC_I2SO0_WS (MTK_PIN_NO(101) | 6) 483*b0a75655SZhiyong Tao #define MT2712_PIN_101_URXD5__FUNC_DBG_MON_B_30_ (MTK_PIN_NO(101) | 7) 484*b0a75655SZhiyong Tao 485*b0a75655SZhiyong Tao #define MT2712_PIN_102_URTS5__FUNC_GPIO102 (MTK_PIN_NO(102) | 0) 486*b0a75655SZhiyong Tao #define MT2712_PIN_102_URTS5__FUNC_URTS5 (MTK_PIN_NO(102) | 1) 487*b0a75655SZhiyong Tao #define MT2712_PIN_102_URTS5__FUNC_UCTS5 (MTK_PIN_NO(102) | 2) 488*b0a75655SZhiyong Tao #define MT2712_PIN_102_URTS5__FUNC_I2SO3_MCK (MTK_PIN_NO(102) | 3) 489*b0a75655SZhiyong Tao #define MT2712_PIN_102_URTS5__FUNC_TDMIN_MCLK (MTK_PIN_NO(102) | 4) 490*b0a75655SZhiyong Tao #define MT2712_PIN_102_URTS5__FUNC_IR_IN (MTK_PIN_NO(102) | 5) 491*b0a75655SZhiyong Tao #define MT2712_PIN_102_URTS5__FUNC_I2SO0_MCK (MTK_PIN_NO(102) | 6) 492*b0a75655SZhiyong Tao #define MT2712_PIN_102_URTS5__FUNC_DBG_MON_B_31_ (MTK_PIN_NO(102) | 7) 493*b0a75655SZhiyong Tao 494*b0a75655SZhiyong Tao #define MT2712_PIN_103_UTXD5__FUNC_GPIO103 (MTK_PIN_NO(103) | 0) 495*b0a75655SZhiyong Tao #define MT2712_PIN_103_UTXD5__FUNC_UTXD5 (MTK_PIN_NO(103) | 1) 496*b0a75655SZhiyong Tao #define MT2712_PIN_103_UTXD5__FUNC_URXD5 (MTK_PIN_NO(103) | 2) 497*b0a75655SZhiyong Tao #define MT2712_PIN_103_UTXD5__FUNC_I2SO3_BCK (MTK_PIN_NO(103) | 3) 498*b0a75655SZhiyong Tao #define MT2712_PIN_103_UTXD5__FUNC_TDMIN_BCK (MTK_PIN_NO(103) | 4) 499*b0a75655SZhiyong Tao #define MT2712_PIN_103_UTXD5__FUNC_I2SO0_BCK (MTK_PIN_NO(103) | 6) 500*b0a75655SZhiyong Tao #define MT2712_PIN_103_UTXD5__FUNC_DBG_MON_B_32_ (MTK_PIN_NO(103) | 7) 501*b0a75655SZhiyong Tao 502*b0a75655SZhiyong Tao #define MT2712_PIN_104_UCTS5__FUNC_GPIO104 (MTK_PIN_NO(104) | 0) 503*b0a75655SZhiyong Tao #define MT2712_PIN_104_UCTS5__FUNC_UCTS5 (MTK_PIN_NO(104) | 1) 504*b0a75655SZhiyong Tao #define MT2712_PIN_104_UCTS5__FUNC_URTS5 (MTK_PIN_NO(104) | 2) 505*b0a75655SZhiyong Tao #define MT2712_PIN_104_UCTS5__FUNC_I2SO0_DO1 (MTK_PIN_NO(104) | 3) 506*b0a75655SZhiyong Tao #define MT2712_PIN_104_UCTS5__FUNC_TDMIN_DI (MTK_PIN_NO(104) | 4) 507*b0a75655SZhiyong Tao #define MT2712_PIN_104_UCTS5__FUNC_IR_IN (MTK_PIN_NO(104) | 5) 508*b0a75655SZhiyong Tao #define MT2712_PIN_104_UCTS5__FUNC_I2SO0_DO0 (MTK_PIN_NO(104) | 6) 509*b0a75655SZhiyong Tao 510*b0a75655SZhiyong Tao #define MT2712_PIN_105_I2C_SDA0__FUNC_GPIO105 (MTK_PIN_NO(105) | 0) 511*b0a75655SZhiyong Tao #define MT2712_PIN_105_I2C_SDA0__FUNC_SDA0 (MTK_PIN_NO(105) | 1) 512*b0a75655SZhiyong Tao 513*b0a75655SZhiyong Tao #define MT2712_PIN_106_I2C_SDA1__FUNC_GPIO106 (MTK_PIN_NO(106) | 0) 514*b0a75655SZhiyong Tao #define MT2712_PIN_106_I2C_SDA1__FUNC_SDA1 (MTK_PIN_NO(106) | 1) 515*b0a75655SZhiyong Tao 516*b0a75655SZhiyong Tao #define MT2712_PIN_107_I2C_SDA2__FUNC_GPIO107 (MTK_PIN_NO(107) | 0) 517*b0a75655SZhiyong Tao #define MT2712_PIN_107_I2C_SDA2__FUNC_SDA2 (MTK_PIN_NO(107) | 1) 518*b0a75655SZhiyong Tao 519*b0a75655SZhiyong Tao #define MT2712_PIN_108_I2C_SDA3__FUNC_GPIO108 (MTK_PIN_NO(108) | 0) 520*b0a75655SZhiyong Tao #define MT2712_PIN_108_I2C_SDA3__FUNC_SDA3 (MTK_PIN_NO(108) | 1) 521*b0a75655SZhiyong Tao 522*b0a75655SZhiyong Tao #define MT2712_PIN_109_I2C_SDA4__FUNC_GPIO109 (MTK_PIN_NO(109) | 0) 523*b0a75655SZhiyong Tao #define MT2712_PIN_109_I2C_SDA4__FUNC_SDA4 (MTK_PIN_NO(109) | 1) 524*b0a75655SZhiyong Tao 525*b0a75655SZhiyong Tao #define MT2712_PIN_110_I2C_SDA5__FUNC_GPIO110 (MTK_PIN_NO(110) | 0) 526*b0a75655SZhiyong Tao #define MT2712_PIN_110_I2C_SDA5__FUNC_SDA5 (MTK_PIN_NO(110) | 1) 527*b0a75655SZhiyong Tao 528*b0a75655SZhiyong Tao #define MT2712_PIN_111_I2C_SCL0__FUNC_GPIO111 (MTK_PIN_NO(111) | 0) 529*b0a75655SZhiyong Tao #define MT2712_PIN_111_I2C_SCL0__FUNC_SCL0 (MTK_PIN_NO(111) | 1) 530*b0a75655SZhiyong Tao 531*b0a75655SZhiyong Tao #define MT2712_PIN_112_I2C_SCL1__FUNC_GPIO112 (MTK_PIN_NO(112) | 0) 532*b0a75655SZhiyong Tao #define MT2712_PIN_112_I2C_SCL1__FUNC_SCL1 (MTK_PIN_NO(112) | 1) 533*b0a75655SZhiyong Tao 534*b0a75655SZhiyong Tao #define MT2712_PIN_113_I2C_SCL2__FUNC_GPIO113 (MTK_PIN_NO(113) | 0) 535*b0a75655SZhiyong Tao #define MT2712_PIN_113_I2C_SCL2__FUNC_SCL2 (MTK_PIN_NO(113) | 1) 536*b0a75655SZhiyong Tao 537*b0a75655SZhiyong Tao #define MT2712_PIN_114_I2C_SCL3__FUNC_GPIO114 (MTK_PIN_NO(114) | 0) 538*b0a75655SZhiyong Tao #define MT2712_PIN_114_I2C_SCL3__FUNC_SCL3 (MTK_PIN_NO(114) | 1) 539*b0a75655SZhiyong Tao 540*b0a75655SZhiyong Tao #define MT2712_PIN_115_I2C_SCL4__FUNC_GPIO115 (MTK_PIN_NO(115) | 0) 541*b0a75655SZhiyong Tao #define MT2712_PIN_115_I2C_SCL4__FUNC_SCL4 (MTK_PIN_NO(115) | 1) 542*b0a75655SZhiyong Tao 543*b0a75655SZhiyong Tao #define MT2712_PIN_116_I2C_SCL5__FUNC_GPIO116 (MTK_PIN_NO(116) | 0) 544*b0a75655SZhiyong Tao #define MT2712_PIN_116_I2C_SCL5__FUNC_SCL5 (MTK_PIN_NO(116) | 1) 545*b0a75655SZhiyong Tao 546*b0a75655SZhiyong Tao #define MT2712_PIN_117_URXD0__FUNC_GPIO117 (MTK_PIN_NO(117) | 0) 547*b0a75655SZhiyong Tao #define MT2712_PIN_117_URXD0__FUNC_URXD0 (MTK_PIN_NO(117) | 1) 548*b0a75655SZhiyong Tao #define MT2712_PIN_117_URXD0__FUNC_UTXD0 (MTK_PIN_NO(117) | 2) 549*b0a75655SZhiyong Tao 550*b0a75655SZhiyong Tao #define MT2712_PIN_118_URXD1__FUNC_GPIO118 (MTK_PIN_NO(118) | 0) 551*b0a75655SZhiyong Tao #define MT2712_PIN_118_URXD1__FUNC_URXD1 (MTK_PIN_NO(118) | 1) 552*b0a75655SZhiyong Tao #define MT2712_PIN_118_URXD1__FUNC_UTXD1 (MTK_PIN_NO(118) | 2) 553*b0a75655SZhiyong Tao 554*b0a75655SZhiyong Tao #define MT2712_PIN_119_URXD2__FUNC_GPIO119 (MTK_PIN_NO(119) | 0) 555*b0a75655SZhiyong Tao #define MT2712_PIN_119_URXD2__FUNC_URXD2 (MTK_PIN_NO(119) | 1) 556*b0a75655SZhiyong Tao #define MT2712_PIN_119_URXD2__FUNC_UTXD2 (MTK_PIN_NO(119) | 2) 557*b0a75655SZhiyong Tao 558*b0a75655SZhiyong Tao #define MT2712_PIN_120_UTXD0__FUNC_GPIO120 (MTK_PIN_NO(120) | 0) 559*b0a75655SZhiyong Tao #define MT2712_PIN_120_UTXD0__FUNC_UTXD0 (MTK_PIN_NO(120) | 1) 560*b0a75655SZhiyong Tao #define MT2712_PIN_120_UTXD0__FUNC_URXD0 (MTK_PIN_NO(120) | 2) 561*b0a75655SZhiyong Tao 562*b0a75655SZhiyong Tao #define MT2712_PIN_121_UTXD1__FUNC_GPIO121 (MTK_PIN_NO(121) | 0) 563*b0a75655SZhiyong Tao #define MT2712_PIN_121_UTXD1__FUNC_UTXD1 (MTK_PIN_NO(121) | 1) 564*b0a75655SZhiyong Tao #define MT2712_PIN_121_UTXD1__FUNC_URXD1 (MTK_PIN_NO(121) | 2) 565*b0a75655SZhiyong Tao 566*b0a75655SZhiyong Tao #define MT2712_PIN_122_UTXD2__FUNC_GPIO122 (MTK_PIN_NO(122) | 0) 567*b0a75655SZhiyong Tao #define MT2712_PIN_122_UTXD2__FUNC_UTXD2 (MTK_PIN_NO(122) | 1) 568*b0a75655SZhiyong Tao #define MT2712_PIN_122_UTXD2__FUNC_URXD2 (MTK_PIN_NO(122) | 2) 569*b0a75655SZhiyong Tao 570*b0a75655SZhiyong Tao #define MT2712_PIN_123_URXD3__FUNC_GPIO123 (MTK_PIN_NO(123) | 0) 571*b0a75655SZhiyong Tao #define MT2712_PIN_123_URXD3__FUNC_URXD3 (MTK_PIN_NO(123) | 1) 572*b0a75655SZhiyong Tao #define MT2712_PIN_123_URXD3__FUNC_UTXD3 (MTK_PIN_NO(123) | 2) 573*b0a75655SZhiyong Tao #define MT2712_PIN_123_URXD3__FUNC_PURE_HW_PROTECT (MTK_PIN_NO(123) | 3) 574*b0a75655SZhiyong Tao 575*b0a75655SZhiyong Tao #define MT2712_PIN_124_UTXD3__FUNC_GPIO124 (MTK_PIN_NO(124) | 0) 576*b0a75655SZhiyong Tao #define MT2712_PIN_124_UTXD3__FUNC_UTXD3 (MTK_PIN_NO(124) | 1) 577*b0a75655SZhiyong Tao #define MT2712_PIN_124_UTXD3__FUNC_URXD3 (MTK_PIN_NO(124) | 2) 578*b0a75655SZhiyong Tao #define MT2712_PIN_124_UTXD3__FUNC_PURE_HW_PROTECT (MTK_PIN_NO(124) | 3) 579*b0a75655SZhiyong Tao 580*b0a75655SZhiyong Tao #define MT2712_PIN_125_URTS3__FUNC_GPIO125 (MTK_PIN_NO(125) | 0) 581*b0a75655SZhiyong Tao #define MT2712_PIN_125_URTS3__FUNC_URTS3 (MTK_PIN_NO(125) | 1) 582*b0a75655SZhiyong Tao #define MT2712_PIN_125_URTS3__FUNC_UCTS3 (MTK_PIN_NO(125) | 2) 583*b0a75655SZhiyong Tao #define MT2712_PIN_125_URTS3__FUNC_WATCH_DOG (MTK_PIN_NO(125) | 3) 584*b0a75655SZhiyong Tao 585*b0a75655SZhiyong Tao #define MT2712_PIN_126_UCTS3__FUNC_GPIO126 (MTK_PIN_NO(126) | 0) 586*b0a75655SZhiyong Tao #define MT2712_PIN_126_UCTS3__FUNC_UCTS3 (MTK_PIN_NO(126) | 1) 587*b0a75655SZhiyong Tao #define MT2712_PIN_126_UCTS3__FUNC_URTS3 (MTK_PIN_NO(126) | 2) 588*b0a75655SZhiyong Tao #define MT2712_PIN_126_UCTS3__FUNC_SRCLKENA0 (MTK_PIN_NO(126) | 3) 589*b0a75655SZhiyong Tao 590*b0a75655SZhiyong Tao #define MT2712_PIN_127_SPI2_CSN__FUNC_GPIO127 (MTK_PIN_NO(127) | 0) 591*b0a75655SZhiyong Tao #define MT2712_PIN_127_SPI2_CSN__FUNC_SPI_CS_2_ (MTK_PIN_NO(127) | 1) 592*b0a75655SZhiyong Tao #define MT2712_PIN_127_SPI2_CSN__FUNC_SPI_CS_1_ (MTK_PIN_NO(127) | 2) 593*b0a75655SZhiyong Tao 594*b0a75655SZhiyong Tao #define MT2712_PIN_128_SPI2_MO__FUNC_GPIO128 (MTK_PIN_NO(128) | 0) 595*b0a75655SZhiyong Tao #define MT2712_PIN_128_SPI2_MO__FUNC_SPI_MO_2_ (MTK_PIN_NO(128) | 1) 596*b0a75655SZhiyong Tao #define MT2712_PIN_128_SPI2_MO__FUNC_SPI_SO_1_ (MTK_PIN_NO(128) | 2) 597*b0a75655SZhiyong Tao 598*b0a75655SZhiyong Tao #define MT2712_PIN_129_SPI2_MI__FUNC_GPIO129 (MTK_PIN_NO(129) | 0) 599*b0a75655SZhiyong Tao #define MT2712_PIN_129_SPI2_MI__FUNC_SPI_MI_2_ (MTK_PIN_NO(129) | 1) 600*b0a75655SZhiyong Tao #define MT2712_PIN_129_SPI2_MI__FUNC_SPI_SI_1_ (MTK_PIN_NO(129) | 2) 601*b0a75655SZhiyong Tao 602*b0a75655SZhiyong Tao #define MT2712_PIN_130_SPI2_CK__FUNC_GPIO130 (MTK_PIN_NO(130) | 0) 603*b0a75655SZhiyong Tao #define MT2712_PIN_130_SPI2_CK__FUNC_SPI_CK_2_ (MTK_PIN_NO(130) | 1) 604*b0a75655SZhiyong Tao #define MT2712_PIN_130_SPI2_CK__FUNC_SPI_CK_1_ (MTK_PIN_NO(130) | 2) 605*b0a75655SZhiyong Tao 606*b0a75655SZhiyong Tao #define MT2712_PIN_131_SPI3_CSN__FUNC_GPIO131 (MTK_PIN_NO(131) | 0) 607*b0a75655SZhiyong Tao #define MT2712_PIN_131_SPI3_CSN__FUNC_SPI_CS_3_ (MTK_PIN_NO(131) | 1) 608*b0a75655SZhiyong Tao 609*b0a75655SZhiyong Tao #define MT2712_PIN_132_SPI3_MO__FUNC_GPIO132 (MTK_PIN_NO(132) | 0) 610*b0a75655SZhiyong Tao #define MT2712_PIN_132_SPI3_MO__FUNC_SPI_MO_3_ (MTK_PIN_NO(132) | 1) 611*b0a75655SZhiyong Tao 612*b0a75655SZhiyong Tao #define MT2712_PIN_133_SPI3_MI__FUNC_GPIO133 (MTK_PIN_NO(133) | 0) 613*b0a75655SZhiyong Tao #define MT2712_PIN_133_SPI3_MI__FUNC_SPI_MI_3_ (MTK_PIN_NO(133) | 1) 614*b0a75655SZhiyong Tao 615*b0a75655SZhiyong Tao #define MT2712_PIN_134_SPI3_CK__FUNC_GPIO134 (MTK_PIN_NO(134) | 0) 616*b0a75655SZhiyong Tao #define MT2712_PIN_134_SPI3_CK__FUNC_SPI_CK_3_ (MTK_PIN_NO(134) | 1) 617*b0a75655SZhiyong Tao 618*b0a75655SZhiyong Tao #define MT2712_PIN_135_KPROW3__FUNC_GPIO135 (MTK_PIN_NO(135) | 0) 619*b0a75655SZhiyong Tao #define MT2712_PIN_135_KPROW3__FUNC_KROW3 (MTK_PIN_NO(135) | 1) 620*b0a75655SZhiyong Tao #define MT2712_PIN_135_KPROW3__FUNC_DSIC_TE (MTK_PIN_NO(135) | 2) 621*b0a75655SZhiyong Tao 622*b0a75655SZhiyong Tao #define MT2712_PIN_136_KPROW4__FUNC_GPIO136 (MTK_PIN_NO(136) | 0) 623*b0a75655SZhiyong Tao #define MT2712_PIN_136_KPROW4__FUNC_KROW4 (MTK_PIN_NO(136) | 1) 624*b0a75655SZhiyong Tao #define MT2712_PIN_136_KPROW4__FUNC_DSID_TE (MTK_PIN_NO(136) | 2) 625*b0a75655SZhiyong Tao 626*b0a75655SZhiyong Tao #define MT2712_PIN_137_KPCOL3__FUNC_GPIO137 (MTK_PIN_NO(137) | 0) 627*b0a75655SZhiyong Tao #define MT2712_PIN_137_KPCOL3__FUNC_KCOL3 (MTK_PIN_NO(137) | 1) 628*b0a75655SZhiyong Tao #define MT2712_PIN_137_KPCOL3__FUNC_DISP2_PWM (MTK_PIN_NO(137) | 2) 629*b0a75655SZhiyong Tao 630*b0a75655SZhiyong Tao #define MT2712_PIN_138_KPCOL4__FUNC_GPIO138 (MTK_PIN_NO(138) | 0) 631*b0a75655SZhiyong Tao #define MT2712_PIN_138_KPCOL4__FUNC_KCOL4 (MTK_PIN_NO(138) | 1) 632*b0a75655SZhiyong Tao #define MT2712_PIN_138_KPCOL4__FUNC_LCM_RST2 (MTK_PIN_NO(138) | 2) 633*b0a75655SZhiyong Tao 634*b0a75655SZhiyong Tao #define MT2712_PIN_139_KPCOL5__FUNC_GPIO139 (MTK_PIN_NO(139) | 0) 635*b0a75655SZhiyong Tao #define MT2712_PIN_139_KPCOL5__FUNC_KCOL5 (MTK_PIN_NO(139) | 1) 636*b0a75655SZhiyong Tao #define MT2712_PIN_139_KPCOL5__FUNC_DSIA_TE (MTK_PIN_NO(139) | 3) 637*b0a75655SZhiyong Tao #define MT2712_PIN_139_KPCOL5__FUNC_PURE_HW_PROTECT (MTK_PIN_NO(139) | 4) 638*b0a75655SZhiyong Tao 639*b0a75655SZhiyong Tao #define MT2712_PIN_140_KPCOL6__FUNC_GPIO140 (MTK_PIN_NO(140) | 0) 640*b0a75655SZhiyong Tao #define MT2712_PIN_140_KPCOL6__FUNC_KCOL6 (MTK_PIN_NO(140) | 1) 641*b0a75655SZhiyong Tao #define MT2712_PIN_140_KPCOL6__FUNC_WATCH_DOG (MTK_PIN_NO(140) | 2) 642*b0a75655SZhiyong Tao #define MT2712_PIN_140_KPCOL6__FUNC_LCM_RST1 (MTK_PIN_NO(140) | 3) 643*b0a75655SZhiyong Tao 644*b0a75655SZhiyong Tao #define MT2712_PIN_141_KPROW5__FUNC_GPIO141 (MTK_PIN_NO(141) | 0) 645*b0a75655SZhiyong Tao #define MT2712_PIN_141_KPROW5__FUNC_KROW5 (MTK_PIN_NO(141) | 1) 646*b0a75655SZhiyong Tao #define MT2712_PIN_141_KPROW5__FUNC_LCM_RST0 (MTK_PIN_NO(141) | 3) 647*b0a75655SZhiyong Tao #define MT2712_PIN_141_KPROW5__FUNC_PURE_HW_PROTECT (MTK_PIN_NO(141) | 4) 648*b0a75655SZhiyong Tao 649*b0a75655SZhiyong Tao #define MT2712_PIN_142_KPROW6__FUNC_GPIO142 (MTK_PIN_NO(142) | 0) 650*b0a75655SZhiyong Tao #define MT2712_PIN_142_KPROW6__FUNC_KROW6 (MTK_PIN_NO(142) | 1) 651*b0a75655SZhiyong Tao #define MT2712_PIN_142_KPROW6__FUNC_SRCLKENA0 (MTK_PIN_NO(142) | 2) 652*b0a75655SZhiyong Tao #define MT2712_PIN_142_KPROW6__FUNC_DSIB_TE (MTK_PIN_NO(142) | 3) 653*b0a75655SZhiyong Tao 654*b0a75655SZhiyong Tao #define MT2712_PIN_143_JTDO_ICE__FUNC_GPIO143 (MTK_PIN_NO(143) | 0) 655*b0a75655SZhiyong Tao #define MT2712_PIN_143_JTDO_ICE__FUNC_JTDO_ICE (MTK_PIN_NO(143) | 1) 656*b0a75655SZhiyong Tao #define MT2712_PIN_143_JTDO_ICE__FUNC_DFD_TDO (MTK_PIN_NO(143) | 3) 657*b0a75655SZhiyong Tao 658*b0a75655SZhiyong Tao #define MT2712_PIN_144_JTCK_ICE__FUNC_GPIO144 (MTK_PIN_NO(144) | 0) 659*b0a75655SZhiyong Tao #define MT2712_PIN_144_JTCK_ICE__FUNC_JTCK_ICE (MTK_PIN_NO(144) | 1) 660*b0a75655SZhiyong Tao #define MT2712_PIN_144_JTCK_ICE__FUNC_DFD_TCK (MTK_PIN_NO(144) | 3) 661*b0a75655SZhiyong Tao 662*b0a75655SZhiyong Tao #define MT2712_PIN_145_JTDI_ICE__FUNC_GPIO145 (MTK_PIN_NO(145) | 0) 663*b0a75655SZhiyong Tao #define MT2712_PIN_145_JTDI_ICE__FUNC_JTDI_ICE (MTK_PIN_NO(145) | 1) 664*b0a75655SZhiyong Tao #define MT2712_PIN_145_JTDI_ICE__FUNC_DFD_TDI (MTK_PIN_NO(145) | 3) 665*b0a75655SZhiyong Tao 666*b0a75655SZhiyong Tao #define MT2712_PIN_146_JTMS_ICE__FUNC_GPIO146 (MTK_PIN_NO(146) | 0) 667*b0a75655SZhiyong Tao #define MT2712_PIN_146_JTMS_ICE__FUNC_JTMS_ICE (MTK_PIN_NO(146) | 1) 668*b0a75655SZhiyong Tao #define MT2712_PIN_146_JTMS_ICE__FUNC_DFD_TMS (MTK_PIN_NO(146) | 3) 669*b0a75655SZhiyong Tao 670*b0a75655SZhiyong Tao #define MT2712_PIN_147_JTRSTB_ICE__FUNC_GPIO147 (MTK_PIN_NO(147) | 0) 671*b0a75655SZhiyong Tao #define MT2712_PIN_147_JTRSTB_ICE__FUNC_JTRST_B_ICE (MTK_PIN_NO(147) | 1) 672*b0a75655SZhiyong Tao #define MT2712_PIN_147_JTRSTB_ICE__FUNC_DFD_NTRST (MTK_PIN_NO(147) | 3) 673*b0a75655SZhiyong Tao 674*b0a75655SZhiyong Tao #define MT2712_PIN_148_GPIO148__FUNC_GPIO148 (MTK_PIN_NO(148) | 0) 675*b0a75655SZhiyong Tao #define MT2712_PIN_148_GPIO148__FUNC_JTRSTB_CM4 (MTK_PIN_NO(148) | 1) 676*b0a75655SZhiyong Tao #define MT2712_PIN_148_GPIO148__FUNC_DFD_NTRST (MTK_PIN_NO(148) | 3) 677*b0a75655SZhiyong Tao 678*b0a75655SZhiyong Tao #define MT2712_PIN_149_GPIO149__FUNC_GPIO149 (MTK_PIN_NO(149) | 0) 679*b0a75655SZhiyong Tao #define MT2712_PIN_149_GPIO149__FUNC_JTCK_CM4 (MTK_PIN_NO(149) | 1) 680*b0a75655SZhiyong Tao #define MT2712_PIN_149_GPIO149__FUNC_DFD_TCK (MTK_PIN_NO(149) | 3) 681*b0a75655SZhiyong Tao 682*b0a75655SZhiyong Tao #define MT2712_PIN_150_GPIO150__FUNC_GPIO150 (MTK_PIN_NO(150) | 0) 683*b0a75655SZhiyong Tao #define MT2712_PIN_150_GPIO150__FUNC_JTMS_CM4 (MTK_PIN_NO(150) | 1) 684*b0a75655SZhiyong Tao #define MT2712_PIN_150_GPIO150__FUNC_DFD_TMS (MTK_PIN_NO(150) | 3) 685*b0a75655SZhiyong Tao 686*b0a75655SZhiyong Tao #define MT2712_PIN_151_GPIO151__FUNC_GPIO151 (MTK_PIN_NO(151) | 0) 687*b0a75655SZhiyong Tao #define MT2712_PIN_151_GPIO151__FUNC_JTDI_CM4 (MTK_PIN_NO(151) | 1) 688*b0a75655SZhiyong Tao #define MT2712_PIN_151_GPIO151__FUNC_DFD_TDI (MTK_PIN_NO(151) | 3) 689*b0a75655SZhiyong Tao 690*b0a75655SZhiyong Tao #define MT2712_PIN_152_GPIO152__FUNC_GPIO152 (MTK_PIN_NO(152) | 0) 691*b0a75655SZhiyong Tao #define MT2712_PIN_152_GPIO152__FUNC_JTDO_CM4 (MTK_PIN_NO(152) | 1) 692*b0a75655SZhiyong Tao #define MT2712_PIN_152_GPIO152__FUNC_DFD_TDO (MTK_PIN_NO(152) | 3) 693*b0a75655SZhiyong Tao 694*b0a75655SZhiyong Tao #define MT2712_PIN_153_SPI0_CSN__FUNC_GPIO153 (MTK_PIN_NO(153) | 0) 695*b0a75655SZhiyong Tao #define MT2712_PIN_153_SPI0_CSN__FUNC_SPI_CS_0_ (MTK_PIN_NO(153) | 1) 696*b0a75655SZhiyong Tao #define MT2712_PIN_153_SPI0_CSN__FUNC_SRCLKENA0 (MTK_PIN_NO(153) | 2) 697*b0a75655SZhiyong Tao #define MT2712_PIN_153_SPI0_CSN__FUNC_UTXD0 (MTK_PIN_NO(153) | 3) 698*b0a75655SZhiyong Tao #define MT2712_PIN_153_SPI0_CSN__FUNC_I2SO0_DO1 (MTK_PIN_NO(153) | 4) 699*b0a75655SZhiyong Tao #define MT2712_PIN_153_SPI0_CSN__FUNC_TDMO0_DATA1 (MTK_PIN_NO(153) | 6) 700*b0a75655SZhiyong Tao #define MT2712_PIN_153_SPI0_CSN__FUNC_I2S_IQ2_SDQB (MTK_PIN_NO(153) | 7) 701*b0a75655SZhiyong Tao 702*b0a75655SZhiyong Tao #define MT2712_PIN_154_SPI0_MI__FUNC_GPIO154 (MTK_PIN_NO(154) | 0) 703*b0a75655SZhiyong Tao #define MT2712_PIN_154_SPI0_MI__FUNC_SPI_MI_0_ (MTK_PIN_NO(154) | 1) 704*b0a75655SZhiyong Tao #define MT2712_PIN_154_SPI0_MI__FUNC_SRCLKENA0 (MTK_PIN_NO(154) | 2) 705*b0a75655SZhiyong Tao #define MT2712_PIN_154_SPI0_MI__FUNC_URXD0 (MTK_PIN_NO(154) | 3) 706*b0a75655SZhiyong Tao #define MT2712_PIN_154_SPI0_MI__FUNC_I2SO0_DO0 (MTK_PIN_NO(154) | 4) 707*b0a75655SZhiyong Tao #define MT2712_PIN_154_SPI0_MI__FUNC_I2SO1_DO (MTK_PIN_NO(154) | 5) 708*b0a75655SZhiyong Tao #define MT2712_PIN_154_SPI0_MI__FUNC_TDMO0_DATA (MTK_PIN_NO(154) | 6) 709*b0a75655SZhiyong Tao #define MT2712_PIN_154_SPI0_MI__FUNC_I2S_IQ1_SDIB (MTK_PIN_NO(154) | 7) 710*b0a75655SZhiyong Tao 711*b0a75655SZhiyong Tao #define MT2712_PIN_155_SPI0_CK__FUNC_GPIO155 (MTK_PIN_NO(155) | 0) 712*b0a75655SZhiyong Tao #define MT2712_PIN_155_SPI0_CK__FUNC_SPI_CK_0_ (MTK_PIN_NO(155) | 1) 713*b0a75655SZhiyong Tao #define MT2712_PIN_155_SPI0_CK__FUNC_SC_APBIAS_OFF (MTK_PIN_NO(155) | 2) 714*b0a75655SZhiyong Tao #define MT2712_PIN_155_SPI0_CK__FUNC_UTXD1 (MTK_PIN_NO(155) | 3) 715*b0a75655SZhiyong Tao #define MT2712_PIN_155_SPI0_CK__FUNC_I2SO0_BCK (MTK_PIN_NO(155) | 4) 716*b0a75655SZhiyong Tao #define MT2712_PIN_155_SPI0_CK__FUNC_I2SO1_BCK (MTK_PIN_NO(155) | 5) 717*b0a75655SZhiyong Tao #define MT2712_PIN_155_SPI0_CK__FUNC_TDMO0_BCK (MTK_PIN_NO(155) | 6) 718*b0a75655SZhiyong Tao #define MT2712_PIN_155_SPI0_CK__FUNC_I2S_IQ0_SDQB (MTK_PIN_NO(155) | 7) 719*b0a75655SZhiyong Tao 720*b0a75655SZhiyong Tao #define MT2712_PIN_156_SPI0_MO__FUNC_GPIO156 (MTK_PIN_NO(156) | 0) 721*b0a75655SZhiyong Tao #define MT2712_PIN_156_SPI0_MO__FUNC_SPI_MO_0_ (MTK_PIN_NO(156) | 1) 722*b0a75655SZhiyong Tao #define MT2712_PIN_156_SPI0_MO__FUNC_SC_APBIAS_OFF (MTK_PIN_NO(156) | 2) 723*b0a75655SZhiyong Tao #define MT2712_PIN_156_SPI0_MO__FUNC_URXD1 (MTK_PIN_NO(156) | 3) 724*b0a75655SZhiyong Tao #define MT2712_PIN_156_SPI0_MO__FUNC_I2SO0_WS (MTK_PIN_NO(156) | 4) 725*b0a75655SZhiyong Tao #define MT2712_PIN_156_SPI0_MO__FUNC_I2SO1_WS (MTK_PIN_NO(156) | 5) 726*b0a75655SZhiyong Tao #define MT2712_PIN_156_SPI0_MO__FUNC_TDMO0_LRCK (MTK_PIN_NO(156) | 6) 727*b0a75655SZhiyong Tao #define MT2712_PIN_156_SPI0_MO__FUNC_I2S_IQ0_SDIB (MTK_PIN_NO(156) | 7) 728*b0a75655SZhiyong Tao 729*b0a75655SZhiyong Tao #define MT2712_PIN_157_SPI5_CSN__FUNC_GPIO157 (MTK_PIN_NO(157) | 0) 730*b0a75655SZhiyong Tao #define MT2712_PIN_157_SPI5_CSN__FUNC_SPI_CS_5_ (MTK_PIN_NO(157) | 1) 731*b0a75655SZhiyong Tao #define MT2712_PIN_157_SPI5_CSN__FUNC_LCM_RST0 (MTK_PIN_NO(157) | 2) 732*b0a75655SZhiyong Tao #define MT2712_PIN_157_SPI5_CSN__FUNC_UTXD2 (MTK_PIN_NO(157) | 3) 733*b0a75655SZhiyong Tao #define MT2712_PIN_157_SPI5_CSN__FUNC_I2SO0_MCK (MTK_PIN_NO(157) | 4) 734*b0a75655SZhiyong Tao #define MT2712_PIN_157_SPI5_CSN__FUNC_I2SO1_MCK (MTK_PIN_NO(157) | 5) 735*b0a75655SZhiyong Tao #define MT2712_PIN_157_SPI5_CSN__FUNC_TDMO0_MCLK (MTK_PIN_NO(157) | 6) 736*b0a75655SZhiyong Tao 737*b0a75655SZhiyong Tao #define MT2712_PIN_158_SPI5_MI__FUNC_GPIO158 (MTK_PIN_NO(158) | 0) 738*b0a75655SZhiyong Tao #define MT2712_PIN_158_SPI5_MI__FUNC_SPI_MI_5_ (MTK_PIN_NO(158) | 1) 739*b0a75655SZhiyong Tao #define MT2712_PIN_158_SPI5_MI__FUNC_DSIA_TE (MTK_PIN_NO(158) | 2) 740*b0a75655SZhiyong Tao #define MT2712_PIN_158_SPI5_MI__FUNC_URXD2 (MTK_PIN_NO(158) | 3) 741*b0a75655SZhiyong Tao 742*b0a75655SZhiyong Tao #define MT2712_PIN_159_SPI5_MO__FUNC_GPIO159 (MTK_PIN_NO(159) | 0) 743*b0a75655SZhiyong Tao #define MT2712_PIN_159_SPI5_MO__FUNC_SPI_MO_5_ (MTK_PIN_NO(159) | 1) 744*b0a75655SZhiyong Tao #define MT2712_PIN_159_SPI5_MO__FUNC_DSIB_TE (MTK_PIN_NO(159) | 2) 745*b0a75655SZhiyong Tao #define MT2712_PIN_159_SPI5_MO__FUNC_UTXD3 (MTK_PIN_NO(159) | 3) 746*b0a75655SZhiyong Tao 747*b0a75655SZhiyong Tao #define MT2712_PIN_160_SPI5_CK__FUNC_GPIO160 (MTK_PIN_NO(160) | 0) 748*b0a75655SZhiyong Tao #define MT2712_PIN_160_SPI5_CK__FUNC_SPI_CK_5_ (MTK_PIN_NO(160) | 1) 749*b0a75655SZhiyong Tao #define MT2712_PIN_160_SPI5_CK__FUNC_LCM_RST1 (MTK_PIN_NO(160) | 2) 750*b0a75655SZhiyong Tao #define MT2712_PIN_160_SPI5_CK__FUNC_URXD3 (MTK_PIN_NO(160) | 3) 751*b0a75655SZhiyong Tao 752*b0a75655SZhiyong Tao #define MT2712_PIN_161_SPI1_CSN__FUNC_GPIO161 (MTK_PIN_NO(161) | 0) 753*b0a75655SZhiyong Tao #define MT2712_PIN_161_SPI1_CSN__FUNC_SPI_CS_1_ (MTK_PIN_NO(161) | 1) 754*b0a75655SZhiyong Tao #define MT2712_PIN_161_SPI1_CSN__FUNC_SPI_CS_4_ (MTK_PIN_NO(161) | 2) 755*b0a75655SZhiyong Tao #define MT2712_PIN_161_SPI1_CSN__FUNC_I2S_IQ2_SDQB (MTK_PIN_NO(161) | 4) 756*b0a75655SZhiyong Tao #define MT2712_PIN_161_SPI1_CSN__FUNC_I2SO2_DO (MTK_PIN_NO(161) | 5) 757*b0a75655SZhiyong Tao #define MT2712_PIN_161_SPI1_CSN__FUNC_TDMO0_DATA1 (MTK_PIN_NO(161) | 6) 758*b0a75655SZhiyong Tao #define MT2712_PIN_161_SPI1_CSN__FUNC_I2SO0_DO1 (MTK_PIN_NO(161) | 7) 759*b0a75655SZhiyong Tao 760*b0a75655SZhiyong Tao #define MT2712_PIN_162_SPI1_SI__FUNC_GPIO162 (MTK_PIN_NO(162) | 0) 761*b0a75655SZhiyong Tao #define MT2712_PIN_162_SPI1_SI__FUNC_SPI_SI_1_ (MTK_PIN_NO(162) | 1) 762*b0a75655SZhiyong Tao #define MT2712_PIN_162_SPI1_SI__FUNC_SPI_MI_4_ (MTK_PIN_NO(162) | 2) 763*b0a75655SZhiyong Tao #define MT2712_PIN_162_SPI1_SI__FUNC_I2S_IQ1_SDIB (MTK_PIN_NO(162) | 4) 764*b0a75655SZhiyong Tao #define MT2712_PIN_162_SPI1_SI__FUNC_I2SO2_BCK (MTK_PIN_NO(162) | 5) 765*b0a75655SZhiyong Tao #define MT2712_PIN_162_SPI1_SI__FUNC_TDMO0_DATA (MTK_PIN_NO(162) | 6) 766*b0a75655SZhiyong Tao #define MT2712_PIN_162_SPI1_SI__FUNC_I2SO0_DO0 (MTK_PIN_NO(162) | 7) 767*b0a75655SZhiyong Tao 768*b0a75655SZhiyong Tao #define MT2712_PIN_163_SPI1_CK__FUNC_GPIO163 (MTK_PIN_NO(163) | 0) 769*b0a75655SZhiyong Tao #define MT2712_PIN_163_SPI1_CK__FUNC_SPI_CK_1_ (MTK_PIN_NO(163) | 1) 770*b0a75655SZhiyong Tao #define MT2712_PIN_163_SPI1_CK__FUNC_SPI_CK_4_ (MTK_PIN_NO(163) | 2) 771*b0a75655SZhiyong Tao #define MT2712_PIN_163_SPI1_CK__FUNC_I2S_IQ0_SDQB (MTK_PIN_NO(163) | 4) 772*b0a75655SZhiyong Tao #define MT2712_PIN_163_SPI1_CK__FUNC_I2SO2_WS (MTK_PIN_NO(163) | 5) 773*b0a75655SZhiyong Tao #define MT2712_PIN_163_SPI1_CK__FUNC_TDMO0_BCK (MTK_PIN_NO(163) | 6) 774*b0a75655SZhiyong Tao #define MT2712_PIN_163_SPI1_CK__FUNC_I2SO0_BCK (MTK_PIN_NO(163) | 7) 775*b0a75655SZhiyong Tao 776*b0a75655SZhiyong Tao #define MT2712_PIN_164_SPI1_SO__FUNC_GPIO164 (MTK_PIN_NO(164) | 0) 777*b0a75655SZhiyong Tao #define MT2712_PIN_164_SPI1_SO__FUNC_SPI_SO_1_ (MTK_PIN_NO(164) | 1) 778*b0a75655SZhiyong Tao #define MT2712_PIN_164_SPI1_SO__FUNC_SPI_MO_4_ (MTK_PIN_NO(164) | 2) 779*b0a75655SZhiyong Tao #define MT2712_PIN_164_SPI1_SO__FUNC_I2S_IQ0_SDIB (MTK_PIN_NO(164) | 4) 780*b0a75655SZhiyong Tao #define MT2712_PIN_164_SPI1_SO__FUNC_I2SO2_MCK (MTK_PIN_NO(164) | 5) 781*b0a75655SZhiyong Tao #define MT2712_PIN_164_SPI1_SO__FUNC_TDMO0_LRCK (MTK_PIN_NO(164) | 6) 782*b0a75655SZhiyong Tao #define MT2712_PIN_164_SPI1_SO__FUNC_I2SO0_WS (MTK_PIN_NO(164) | 7) 783*b0a75655SZhiyong Tao 784*b0a75655SZhiyong Tao #define MT2712_PIN_165_SPI4_CSN__FUNC_GPIO165 (MTK_PIN_NO(165) | 0) 785*b0a75655SZhiyong Tao #define MT2712_PIN_165_SPI4_CSN__FUNC_SPI_CS_4_ (MTK_PIN_NO(165) | 1) 786*b0a75655SZhiyong Tao #define MT2712_PIN_165_SPI4_CSN__FUNC_LCM_RST0 (MTK_PIN_NO(165) | 2) 787*b0a75655SZhiyong Tao #define MT2712_PIN_165_SPI4_CSN__FUNC_SPI_CS_1_ (MTK_PIN_NO(165) | 3) 788*b0a75655SZhiyong Tao #define MT2712_PIN_165_SPI4_CSN__FUNC_UTXD4 (MTK_PIN_NO(165) | 4) 789*b0a75655SZhiyong Tao #define MT2712_PIN_165_SPI4_CSN__FUNC_I2SO1_DO (MTK_PIN_NO(165) | 5) 790*b0a75655SZhiyong Tao #define MT2712_PIN_165_SPI4_CSN__FUNC_TDMO0_MCLK (MTK_PIN_NO(165) | 6) 791*b0a75655SZhiyong Tao #define MT2712_PIN_165_SPI4_CSN__FUNC_I2SO0_MCK (MTK_PIN_NO(165) | 7) 792*b0a75655SZhiyong Tao 793*b0a75655SZhiyong Tao #define MT2712_PIN_166_SPI4_MI__FUNC_GPIO166 (MTK_PIN_NO(166) | 0) 794*b0a75655SZhiyong Tao #define MT2712_PIN_166_SPI4_MI__FUNC_SPI_MI_4_ (MTK_PIN_NO(166) | 1) 795*b0a75655SZhiyong Tao #define MT2712_PIN_166_SPI4_MI__FUNC_DSIA_TE (MTK_PIN_NO(166) | 2) 796*b0a75655SZhiyong Tao #define MT2712_PIN_166_SPI4_MI__FUNC_SPI_SI_1_ (MTK_PIN_NO(166) | 3) 797*b0a75655SZhiyong Tao #define MT2712_PIN_166_SPI4_MI__FUNC_URXD4 (MTK_PIN_NO(166) | 4) 798*b0a75655SZhiyong Tao #define MT2712_PIN_166_SPI4_MI__FUNC_I2SO1_BCK (MTK_PIN_NO(166) | 5) 799*b0a75655SZhiyong Tao 800*b0a75655SZhiyong Tao #define MT2712_PIN_167_SPI4_MO__FUNC_GPIO167 (MTK_PIN_NO(167) | 0) 801*b0a75655SZhiyong Tao #define MT2712_PIN_167_SPI4_MO__FUNC_SPI_MO_4_ (MTK_PIN_NO(167) | 1) 802*b0a75655SZhiyong Tao #define MT2712_PIN_167_SPI4_MO__FUNC_DSIB_TE (MTK_PIN_NO(167) | 2) 803*b0a75655SZhiyong Tao #define MT2712_PIN_167_SPI4_MO__FUNC_SPI_SO_1_ (MTK_PIN_NO(167) | 3) 804*b0a75655SZhiyong Tao #define MT2712_PIN_167_SPI4_MO__FUNC_UTXD5 (MTK_PIN_NO(167) | 4) 805*b0a75655SZhiyong Tao #define MT2712_PIN_167_SPI4_MO__FUNC_I2SO1_WS (MTK_PIN_NO(167) | 5) 806*b0a75655SZhiyong Tao 807*b0a75655SZhiyong Tao #define MT2712_PIN_168_SPI4_CK__FUNC_GPIO168 (MTK_PIN_NO(168) | 0) 808*b0a75655SZhiyong Tao #define MT2712_PIN_168_SPI4_CK__FUNC_SPI_CK_4_ (MTK_PIN_NO(168) | 1) 809*b0a75655SZhiyong Tao #define MT2712_PIN_168_SPI4_CK__FUNC_LCM_RST1 (MTK_PIN_NO(168) | 2) 810*b0a75655SZhiyong Tao #define MT2712_PIN_168_SPI4_CK__FUNC_SPI_CK_1_ (MTK_PIN_NO(168) | 3) 811*b0a75655SZhiyong Tao #define MT2712_PIN_168_SPI4_CK__FUNC_URXD5 (MTK_PIN_NO(168) | 4) 812*b0a75655SZhiyong Tao #define MT2712_PIN_168_SPI4_CK__FUNC_I2SO1_MCK (MTK_PIN_NO(168) | 5) 813*b0a75655SZhiyong Tao 814*b0a75655SZhiyong Tao #define MT2712_PIN_169_I2SI0_DATA__FUNC_GPIO169 (MTK_PIN_NO(169) | 0) 815*b0a75655SZhiyong Tao #define MT2712_PIN_169_I2SI0_DATA__FUNC_I2SI0_DI (MTK_PIN_NO(169) | 1) 816*b0a75655SZhiyong Tao #define MT2712_PIN_169_I2SI0_DATA__FUNC_I2SI1_DI (MTK_PIN_NO(169) | 2) 817*b0a75655SZhiyong Tao #define MT2712_PIN_169_I2SI0_DATA__FUNC_I2SI2_DI (MTK_PIN_NO(169) | 3) 818*b0a75655SZhiyong Tao #define MT2712_PIN_169_I2SI0_DATA__FUNC_TDMIN_DI (MTK_PIN_NO(169) | 4) 819*b0a75655SZhiyong Tao 820*b0a75655SZhiyong Tao #define MT2712_PIN_170_I2SI0_LRCK__FUNC_GPIO170 (MTK_PIN_NO(170) | 0) 821*b0a75655SZhiyong Tao #define MT2712_PIN_170_I2SI0_LRCK__FUNC_I2SI0_WS (MTK_PIN_NO(170) | 1) 822*b0a75655SZhiyong Tao #define MT2712_PIN_170_I2SI0_LRCK__FUNC_I2SI1_WS (MTK_PIN_NO(170) | 2) 823*b0a75655SZhiyong Tao #define MT2712_PIN_170_I2SI0_LRCK__FUNC_I2SI2_WS (MTK_PIN_NO(170) | 3) 824*b0a75655SZhiyong Tao #define MT2712_PIN_170_I2SI0_LRCK__FUNC_TDMIN_LRCK (MTK_PIN_NO(170) | 4) 825*b0a75655SZhiyong Tao #define MT2712_PIN_170_I2SI0_LRCK__FUNC_TDMO0_DATA3 (MTK_PIN_NO(170) | 5) 826*b0a75655SZhiyong Tao #define MT2712_PIN_170_I2SI0_LRCK__FUNC_TDMO1_DATA3 (MTK_PIN_NO(170) | 6) 827*b0a75655SZhiyong Tao 828*b0a75655SZhiyong Tao #define MT2712_PIN_171_I2SI0_MCLK__FUNC_GPIO171 (MTK_PIN_NO(171) | 0) 829*b0a75655SZhiyong Tao #define MT2712_PIN_171_I2SI0_MCLK__FUNC_I2SI0_MCK (MTK_PIN_NO(171) | 1) 830*b0a75655SZhiyong Tao #define MT2712_PIN_171_I2SI0_MCLK__FUNC_I2SI1_MCK (MTK_PIN_NO(171) | 2) 831*b0a75655SZhiyong Tao #define MT2712_PIN_171_I2SI0_MCLK__FUNC_I2SI2_MCK (MTK_PIN_NO(171) | 3) 832*b0a75655SZhiyong Tao #define MT2712_PIN_171_I2SI0_MCLK__FUNC_TDMIN_MCLK (MTK_PIN_NO(171) | 4) 833*b0a75655SZhiyong Tao #define MT2712_PIN_171_I2SI0_MCLK__FUNC_TDMO0_DATA2 (MTK_PIN_NO(171) | 5) 834*b0a75655SZhiyong Tao #define MT2712_PIN_171_I2SI0_MCLK__FUNC_TDMO1_DATA2 (MTK_PIN_NO(171) | 6) 835*b0a75655SZhiyong Tao 836*b0a75655SZhiyong Tao #define MT2712_PIN_172_I2SI0_BCK__FUNC_GPIO172 (MTK_PIN_NO(172) | 0) 837*b0a75655SZhiyong Tao #define MT2712_PIN_172_I2SI0_BCK__FUNC_I2SI0_BCK (MTK_PIN_NO(172) | 1) 838*b0a75655SZhiyong Tao #define MT2712_PIN_172_I2SI0_BCK__FUNC_I2SI1_BCK (MTK_PIN_NO(172) | 2) 839*b0a75655SZhiyong Tao #define MT2712_PIN_172_I2SI0_BCK__FUNC_I2SI2_BCK (MTK_PIN_NO(172) | 3) 840*b0a75655SZhiyong Tao #define MT2712_PIN_172_I2SI0_BCK__FUNC_TDMIN_BCK (MTK_PIN_NO(172) | 4) 841*b0a75655SZhiyong Tao #define MT2712_PIN_172_I2SI0_BCK__FUNC_TDMO0_DATA1 (MTK_PIN_NO(172) | 5) 842*b0a75655SZhiyong Tao #define MT2712_PIN_172_I2SI0_BCK__FUNC_TDMO1_DATA1 (MTK_PIN_NO(172) | 6) 843*b0a75655SZhiyong Tao 844*b0a75655SZhiyong Tao #define MT2712_PIN_173_I2SI2_DATA__FUNC_GPIO173 (MTK_PIN_NO(173) | 0) 845*b0a75655SZhiyong Tao #define MT2712_PIN_173_I2SI2_DATA__FUNC_I2SI2_DI (MTK_PIN_NO(173) | 1) 846*b0a75655SZhiyong Tao #define MT2712_PIN_173_I2SI2_DATA__FUNC_I2SI0_DI (MTK_PIN_NO(173) | 2) 847*b0a75655SZhiyong Tao #define MT2712_PIN_173_I2SI2_DATA__FUNC_I2SI1_DI (MTK_PIN_NO(173) | 3) 848*b0a75655SZhiyong Tao #define MT2712_PIN_173_I2SI2_DATA__FUNC_PCM1_DI (MTK_PIN_NO(173) | 4) 849*b0a75655SZhiyong Tao #define MT2712_PIN_173_I2SI2_DATA__FUNC_TDMIN_DI (MTK_PIN_NO(173) | 5) 850*b0a75655SZhiyong Tao #define MT2712_PIN_173_I2SI2_DATA__FUNC_PCM1_DO (MTK_PIN_NO(173) | 6) 851*b0a75655SZhiyong Tao 852*b0a75655SZhiyong Tao #define MT2712_PIN_174_I2SI2_MCLK__FUNC_GPIO174 (MTK_PIN_NO(174) | 0) 853*b0a75655SZhiyong Tao #define MT2712_PIN_174_I2SI2_MCLK__FUNC_I2SI2_MCK (MTK_PIN_NO(174) | 1) 854*b0a75655SZhiyong Tao #define MT2712_PIN_174_I2SI2_MCLK__FUNC_I2SI0_MCK (MTK_PIN_NO(174) | 2) 855*b0a75655SZhiyong Tao #define MT2712_PIN_174_I2SI2_MCLK__FUNC_I2SI1_MCK (MTK_PIN_NO(174) | 3) 856*b0a75655SZhiyong Tao #define MT2712_PIN_174_I2SI2_MCLK__FUNC_PCM1_DO (MTK_PIN_NO(174) | 4) 857*b0a75655SZhiyong Tao #define MT2712_PIN_174_I2SI2_MCLK__FUNC_TDMIN_MCLK (MTK_PIN_NO(174) | 5) 858*b0a75655SZhiyong Tao #define MT2712_PIN_174_I2SI2_MCLK__FUNC_PCM1_DI (MTK_PIN_NO(174) | 6) 859*b0a75655SZhiyong Tao #define MT2712_PIN_174_I2SI2_MCLK__FUNC_I2S_IQ2_SDQB (MTK_PIN_NO(174) | 7) 860*b0a75655SZhiyong Tao 861*b0a75655SZhiyong Tao #define MT2712_PIN_175_I2SI2_BCK__FUNC_GPIO175 (MTK_PIN_NO(175) | 0) 862*b0a75655SZhiyong Tao #define MT2712_PIN_175_I2SI2_BCK__FUNC_I2SI2_BCK (MTK_PIN_NO(175) | 1) 863*b0a75655SZhiyong Tao #define MT2712_PIN_175_I2SI2_BCK__FUNC_I2SI0_BCK (MTK_PIN_NO(175) | 2) 864*b0a75655SZhiyong Tao #define MT2712_PIN_175_I2SI2_BCK__FUNC_I2SI1_BCK (MTK_PIN_NO(175) | 3) 865*b0a75655SZhiyong Tao #define MT2712_PIN_175_I2SI2_BCK__FUNC_PCM1_CLK (MTK_PIN_NO(175) | 4) 866*b0a75655SZhiyong Tao #define MT2712_PIN_175_I2SI2_BCK__FUNC_TDMIN_BCK (MTK_PIN_NO(175) | 5) 867*b0a75655SZhiyong Tao 868*b0a75655SZhiyong Tao #define MT2712_PIN_176_I2SI2_LRCK__FUNC_GPIO176 (MTK_PIN_NO(176) | 0) 869*b0a75655SZhiyong Tao #define MT2712_PIN_176_I2SI2_LRCK__FUNC_I2SI2_WS (MTK_PIN_NO(176) | 1) 870*b0a75655SZhiyong Tao #define MT2712_PIN_176_I2SI2_LRCK__FUNC_I2SI0_WS (MTK_PIN_NO(176) | 2) 871*b0a75655SZhiyong Tao #define MT2712_PIN_176_I2SI2_LRCK__FUNC_I2SI1_WS (MTK_PIN_NO(176) | 3) 872*b0a75655SZhiyong Tao #define MT2712_PIN_176_I2SI2_LRCK__FUNC_PCM1_SYNC (MTK_PIN_NO(176) | 4) 873*b0a75655SZhiyong Tao #define MT2712_PIN_176_I2SI2_LRCK__FUNC_TDMIN_LRCK (MTK_PIN_NO(176) | 5) 874*b0a75655SZhiyong Tao 875*b0a75655SZhiyong Tao #define MT2712_PIN_177_I2SI1_DATA__FUNC_GPIO177 (MTK_PIN_NO(177) | 0) 876*b0a75655SZhiyong Tao #define MT2712_PIN_177_I2SI1_DATA__FUNC_I2SI1_DI (MTK_PIN_NO(177) | 1) 877*b0a75655SZhiyong Tao #define MT2712_PIN_177_I2SI1_DATA__FUNC_I2SI0_DI (MTK_PIN_NO(177) | 2) 878*b0a75655SZhiyong Tao #define MT2712_PIN_177_I2SI1_DATA__FUNC_I2SI2_DI (MTK_PIN_NO(177) | 3) 879*b0a75655SZhiyong Tao #define MT2712_PIN_177_I2SI1_DATA__FUNC_TDMIN_DI (MTK_PIN_NO(177) | 4) 880*b0a75655SZhiyong Tao 881*b0a75655SZhiyong Tao #define MT2712_PIN_178_I2SI1_BCK__FUNC_GPIO178 (MTK_PIN_NO(178) | 0) 882*b0a75655SZhiyong Tao #define MT2712_PIN_178_I2SI1_BCK__FUNC_I2SI1_BCK (MTK_PIN_NO(178) | 1) 883*b0a75655SZhiyong Tao #define MT2712_PIN_178_I2SI1_BCK__FUNC_I2SI0_BCK (MTK_PIN_NO(178) | 2) 884*b0a75655SZhiyong Tao #define MT2712_PIN_178_I2SI1_BCK__FUNC_I2SI2_BCK (MTK_PIN_NO(178) | 3) 885*b0a75655SZhiyong Tao #define MT2712_PIN_178_I2SI1_BCK__FUNC_TDMIN_BCK (MTK_PIN_NO(178) | 4) 886*b0a75655SZhiyong Tao #define MT2712_PIN_178_I2SI1_BCK__FUNC_TDMO0_DATA3 (MTK_PIN_NO(178) | 5) 887*b0a75655SZhiyong Tao #define MT2712_PIN_178_I2SI1_BCK__FUNC_TDMO1_DATA3 (MTK_PIN_NO(178) | 6) 888*b0a75655SZhiyong Tao 889*b0a75655SZhiyong Tao #define MT2712_PIN_179_I2SI1_LRCK__FUNC_GPIO179 (MTK_PIN_NO(179) | 0) 890*b0a75655SZhiyong Tao #define MT2712_PIN_179_I2SI1_LRCK__FUNC_I2SI1_WS (MTK_PIN_NO(179) | 1) 891*b0a75655SZhiyong Tao #define MT2712_PIN_179_I2SI1_LRCK__FUNC_I2SI0_WS (MTK_PIN_NO(179) | 2) 892*b0a75655SZhiyong Tao #define MT2712_PIN_179_I2SI1_LRCK__FUNC_I2SI2_WS (MTK_PIN_NO(179) | 3) 893*b0a75655SZhiyong Tao #define MT2712_PIN_179_I2SI1_LRCK__FUNC_TDMIN_LRCK (MTK_PIN_NO(179) | 4) 894*b0a75655SZhiyong Tao #define MT2712_PIN_179_I2SI1_LRCK__FUNC_TDMO0_DATA2 (MTK_PIN_NO(179) | 5) 895*b0a75655SZhiyong Tao #define MT2712_PIN_179_I2SI1_LRCK__FUNC_TDMO1_DATA2 (MTK_PIN_NO(179) | 6) 896*b0a75655SZhiyong Tao 897*b0a75655SZhiyong Tao #define MT2712_PIN_180_I2SI1_MCLK__FUNC_GPIO180 (MTK_PIN_NO(180) | 0) 898*b0a75655SZhiyong Tao #define MT2712_PIN_180_I2SI1_MCLK__FUNC_I2SI1_MCK (MTK_PIN_NO(180) | 1) 899*b0a75655SZhiyong Tao #define MT2712_PIN_180_I2SI1_MCLK__FUNC_I2SI0_MCK (MTK_PIN_NO(180) | 2) 900*b0a75655SZhiyong Tao #define MT2712_PIN_180_I2SI1_MCLK__FUNC_I2SI2_MCK (MTK_PIN_NO(180) | 3) 901*b0a75655SZhiyong Tao #define MT2712_PIN_180_I2SI1_MCLK__FUNC_TDMIN_MCLK (MTK_PIN_NO(180) | 4) 902*b0a75655SZhiyong Tao #define MT2712_PIN_180_I2SI1_MCLK__FUNC_TDMO0_DATA1 (MTK_PIN_NO(180) | 5) 903*b0a75655SZhiyong Tao #define MT2712_PIN_180_I2SI1_MCLK__FUNC_TDMO1_DATA1 (MTK_PIN_NO(180) | 6) 904*b0a75655SZhiyong Tao #define MT2712_PIN_180_I2SI1_MCLK__FUNC_I2S_IQ2_SDIB (MTK_PIN_NO(180) | 7) 905*b0a75655SZhiyong Tao 906*b0a75655SZhiyong Tao #define MT2712_PIN_181_I2SO1_DATA0__FUNC_GPIO181 (MTK_PIN_NO(181) | 0) 907*b0a75655SZhiyong Tao #define MT2712_PIN_181_I2SO1_DATA0__FUNC_I2SO1_DO (MTK_PIN_NO(181) | 1) 908*b0a75655SZhiyong Tao #define MT2712_PIN_181_I2SO1_DATA0__FUNC_I2SO0_DO0 (MTK_PIN_NO(181) | 2) 909*b0a75655SZhiyong Tao #define MT2712_PIN_181_I2SO1_DATA0__FUNC_I2SO2_DO (MTK_PIN_NO(181) | 3) 910*b0a75655SZhiyong Tao #define MT2712_PIN_181_I2SO1_DATA0__FUNC_DAI_TX (MTK_PIN_NO(181) | 4) 911*b0a75655SZhiyong Tao #define MT2712_PIN_181_I2SO1_DATA0__FUNC_TDMIN_MCLK (MTK_PIN_NO(181) | 5) 912*b0a75655SZhiyong Tao #define MT2712_PIN_181_I2SO1_DATA0__FUNC_I2S_IQ2_SDIA (MTK_PIN_NO(181) | 7) 913*b0a75655SZhiyong Tao 914*b0a75655SZhiyong Tao #define MT2712_PIN_182_I2SO1_BCK__FUNC_GPIO182 (MTK_PIN_NO(182) | 0) 915*b0a75655SZhiyong Tao #define MT2712_PIN_182_I2SO1_BCK__FUNC_I2SO1_BCK (MTK_PIN_NO(182) | 1) 916*b0a75655SZhiyong Tao #define MT2712_PIN_182_I2SO1_BCK__FUNC_I2SO0_BCK (MTK_PIN_NO(182) | 2) 917*b0a75655SZhiyong Tao #define MT2712_PIN_182_I2SO1_BCK__FUNC_I2SO2_BCK (MTK_PIN_NO(182) | 3) 918*b0a75655SZhiyong Tao #define MT2712_PIN_182_I2SO1_BCK__FUNC_DAI_SYNC (MTK_PIN_NO(182) | 4) 919*b0a75655SZhiyong Tao #define MT2712_PIN_182_I2SO1_BCK__FUNC_TDMIN_BCK (MTK_PIN_NO(182) | 5) 920*b0a75655SZhiyong Tao #define MT2712_PIN_182_I2SO1_BCK__FUNC_TDMO0_DATA3 (MTK_PIN_NO(182) | 6) 921*b0a75655SZhiyong Tao #define MT2712_PIN_182_I2SO1_BCK__FUNC_I2S_IQ2_BCK (MTK_PIN_NO(182) | 7) 922*b0a75655SZhiyong Tao 923*b0a75655SZhiyong Tao #define MT2712_PIN_183_I2SO1_LRCK__FUNC_GPIO183 (MTK_PIN_NO(183) | 0) 924*b0a75655SZhiyong Tao #define MT2712_PIN_183_I2SO1_LRCK__FUNC_I2SO1_WS (MTK_PIN_NO(183) | 1) 925*b0a75655SZhiyong Tao #define MT2712_PIN_183_I2SO1_LRCK__FUNC_I2SO0_WS (MTK_PIN_NO(183) | 2) 926*b0a75655SZhiyong Tao #define MT2712_PIN_183_I2SO1_LRCK__FUNC_I2SO2_WS (MTK_PIN_NO(183) | 3) 927*b0a75655SZhiyong Tao #define MT2712_PIN_183_I2SO1_LRCK__FUNC_DAI_CLK (MTK_PIN_NO(183) | 4) 928*b0a75655SZhiyong Tao #define MT2712_PIN_183_I2SO1_LRCK__FUNC_TDMIN_DI (MTK_PIN_NO(183) | 5) 929*b0a75655SZhiyong Tao #define MT2712_PIN_183_I2SO1_LRCK__FUNC_TDMO0_DATA2 (MTK_PIN_NO(183) | 6) 930*b0a75655SZhiyong Tao #define MT2712_PIN_183_I2SO1_LRCK__FUNC_I2S_IQ2_WS (MTK_PIN_NO(183) | 7) 931*b0a75655SZhiyong Tao 932*b0a75655SZhiyong Tao #define MT2712_PIN_184_I2SO1_MCLK__FUNC_GPIO184 (MTK_PIN_NO(184) | 0) 933*b0a75655SZhiyong Tao #define MT2712_PIN_184_I2SO1_MCLK__FUNC_I2SO1_MCK (MTK_PIN_NO(184) | 1) 934*b0a75655SZhiyong Tao #define MT2712_PIN_184_I2SO1_MCLK__FUNC_I2SO0_MCK (MTK_PIN_NO(184) | 2) 935*b0a75655SZhiyong Tao #define MT2712_PIN_184_I2SO1_MCLK__FUNC_I2SO2_MCK (MTK_PIN_NO(184) | 3) 936*b0a75655SZhiyong Tao #define MT2712_PIN_184_I2SO1_MCLK__FUNC_DAI_RX (MTK_PIN_NO(184) | 4) 937*b0a75655SZhiyong Tao #define MT2712_PIN_184_I2SO1_MCLK__FUNC_TDMIN_LRCK (MTK_PIN_NO(184) | 5) 938*b0a75655SZhiyong Tao #define MT2712_PIN_184_I2SO1_MCLK__FUNC_TDMO0_DATA1 (MTK_PIN_NO(184) | 6) 939*b0a75655SZhiyong Tao #define MT2712_PIN_184_I2SO1_MCLK__FUNC_I2S_IQ2_SDQA (MTK_PIN_NO(184) | 7) 940*b0a75655SZhiyong Tao 941*b0a75655SZhiyong Tao #define MT2712_PIN_185_AUD_EXT_CK2__FUNC_GPIO185 (MTK_PIN_NO(185) | 0) 942*b0a75655SZhiyong Tao #define MT2712_PIN_185_AUD_EXT_CK2__FUNC_AUD_EXT_CK2 (MTK_PIN_NO(185) | 1) 943*b0a75655SZhiyong Tao #define MT2712_PIN_185_AUD_EXT_CK2__FUNC_AUD_EXT_CK1 (MTK_PIN_NO(185) | 2) 944*b0a75655SZhiyong Tao #define MT2712_PIN_185_AUD_EXT_CK2__FUNC_I2SO1_DO (MTK_PIN_NO(185) | 3) 945*b0a75655SZhiyong Tao #define MT2712_PIN_185_AUD_EXT_CK2__FUNC_I2SI2_DI (MTK_PIN_NO(185) | 4) 946*b0a75655SZhiyong Tao #define MT2712_PIN_185_AUD_EXT_CK2__FUNC_MRG_RX (MTK_PIN_NO(185) | 5) 947*b0a75655SZhiyong Tao #define MT2712_PIN_185_AUD_EXT_CK2__FUNC_PCM1_DI (MTK_PIN_NO(185) | 6) 948*b0a75655SZhiyong Tao #define MT2712_PIN_185_AUD_EXT_CK2__FUNC_I2S_IQ0_SDQB (MTK_PIN_NO(185) | 7) 949*b0a75655SZhiyong Tao 950*b0a75655SZhiyong Tao #define MT2712_PIN_186_AUD_EXT_CK1__FUNC_GPIO186 (MTK_PIN_NO(186) | 0) 951*b0a75655SZhiyong Tao #define MT2712_PIN_186_AUD_EXT_CK1__FUNC_AUD_EXT_CK1 (MTK_PIN_NO(186) | 1) 952*b0a75655SZhiyong Tao #define MT2712_PIN_186_AUD_EXT_CK1__FUNC_AUD_EXT_CK2 (MTK_PIN_NO(186) | 2) 953*b0a75655SZhiyong Tao #define MT2712_PIN_186_AUD_EXT_CK1__FUNC_I2SO0_DO1 (MTK_PIN_NO(186) | 3) 954*b0a75655SZhiyong Tao #define MT2712_PIN_186_AUD_EXT_CK1__FUNC_I2SI1_DI (MTK_PIN_NO(186) | 4) 955*b0a75655SZhiyong Tao #define MT2712_PIN_186_AUD_EXT_CK1__FUNC_MRG_TX (MTK_PIN_NO(186) | 5) 956*b0a75655SZhiyong Tao #define MT2712_PIN_186_AUD_EXT_CK1__FUNC_PCM1_DO (MTK_PIN_NO(186) | 6) 957*b0a75655SZhiyong Tao #define MT2712_PIN_186_AUD_EXT_CK1__FUNC_I2S_IQ0_SDIB (MTK_PIN_NO(186) | 7) 958*b0a75655SZhiyong Tao 959*b0a75655SZhiyong Tao #define MT2712_PIN_187_I2SO2_BCK__FUNC_GPIO187 (MTK_PIN_NO(187) | 0) 960*b0a75655SZhiyong Tao #define MT2712_PIN_187_I2SO2_BCK__FUNC_I2SO2_BCK (MTK_PIN_NO(187) | 1) 961*b0a75655SZhiyong Tao #define MT2712_PIN_187_I2SO2_BCK__FUNC_I2SO0_BCK (MTK_PIN_NO(187) | 2) 962*b0a75655SZhiyong Tao #define MT2712_PIN_187_I2SO2_BCK__FUNC_I2SO1_BCK (MTK_PIN_NO(187) | 3) 963*b0a75655SZhiyong Tao #define MT2712_PIN_187_I2SO2_BCK__FUNC_PCM1_CLK (MTK_PIN_NO(187) | 4) 964*b0a75655SZhiyong Tao #define MT2712_PIN_187_I2SO2_BCK__FUNC_MRG_SYNC (MTK_PIN_NO(187) | 5) 965*b0a75655SZhiyong Tao #define MT2712_PIN_187_I2SO2_BCK__FUNC_TDMO1_DATA3 (MTK_PIN_NO(187) | 6) 966*b0a75655SZhiyong Tao #define MT2712_PIN_187_I2SO2_BCK__FUNC_I2S_IQ0_BCK (MTK_PIN_NO(187) | 7) 967*b0a75655SZhiyong Tao 968*b0a75655SZhiyong Tao #define MT2712_PIN_188_I2SO2_LRCK__FUNC_GPIO188 (MTK_PIN_NO(188) | 0) 969*b0a75655SZhiyong Tao #define MT2712_PIN_188_I2SO2_LRCK__FUNC_I2SO2_WS (MTK_PIN_NO(188) | 1) 970*b0a75655SZhiyong Tao #define MT2712_PIN_188_I2SO2_LRCK__FUNC_I2SO0_WS (MTK_PIN_NO(188) | 2) 971*b0a75655SZhiyong Tao #define MT2712_PIN_188_I2SO2_LRCK__FUNC_I2SO1_WS (MTK_PIN_NO(188) | 3) 972*b0a75655SZhiyong Tao #define MT2712_PIN_188_I2SO2_LRCK__FUNC_PCM1_SYNC (MTK_PIN_NO(188) | 4) 973*b0a75655SZhiyong Tao #define MT2712_PIN_188_I2SO2_LRCK__FUNC_MRG_CLK (MTK_PIN_NO(188) | 5) 974*b0a75655SZhiyong Tao #define MT2712_PIN_188_I2SO2_LRCK__FUNC_TDMO1_DATA2 (MTK_PIN_NO(188) | 6) 975*b0a75655SZhiyong Tao #define MT2712_PIN_188_I2SO2_LRCK__FUNC_I2S_IQ0_WS (MTK_PIN_NO(188) | 7) 976*b0a75655SZhiyong Tao 977*b0a75655SZhiyong Tao #define MT2712_PIN_189_I2SO2_MCLK__FUNC_GPIO189 (MTK_PIN_NO(189) | 0) 978*b0a75655SZhiyong Tao #define MT2712_PIN_189_I2SO2_MCLK__FUNC_I2SO2_MCK (MTK_PIN_NO(189) | 1) 979*b0a75655SZhiyong Tao #define MT2712_PIN_189_I2SO2_MCLK__FUNC_I2SO0_MCK (MTK_PIN_NO(189) | 2) 980*b0a75655SZhiyong Tao #define MT2712_PIN_189_I2SO2_MCLK__FUNC_I2SO1_MCK (MTK_PIN_NO(189) | 3) 981*b0a75655SZhiyong Tao #define MT2712_PIN_189_I2SO2_MCLK__FUNC_PCM1_DO (MTK_PIN_NO(189) | 4) 982*b0a75655SZhiyong Tao #define MT2712_PIN_189_I2SO2_MCLK__FUNC_MRG_RX (MTK_PIN_NO(189) | 5) 983*b0a75655SZhiyong Tao #define MT2712_PIN_189_I2SO2_MCLK__FUNC_TDMO1_DATA1 (MTK_PIN_NO(189) | 6) 984*b0a75655SZhiyong Tao #define MT2712_PIN_189_I2SO2_MCLK__FUNC_I2S_IQ0_SDQA (MTK_PIN_NO(189) | 7) 985*b0a75655SZhiyong Tao 986*b0a75655SZhiyong Tao #define MT2712_PIN_190_I2SO2_DATA0__FUNC_GPIO190 (MTK_PIN_NO(190) | 0) 987*b0a75655SZhiyong Tao #define MT2712_PIN_190_I2SO2_DATA0__FUNC_I2SO2_DO (MTK_PIN_NO(190) | 1) 988*b0a75655SZhiyong Tao #define MT2712_PIN_190_I2SO2_DATA0__FUNC_I2SO0_DO0 (MTK_PIN_NO(190) | 2) 989*b0a75655SZhiyong Tao #define MT2712_PIN_190_I2SO2_DATA0__FUNC_I2SO1_DO (MTK_PIN_NO(190) | 3) 990*b0a75655SZhiyong Tao #define MT2712_PIN_190_I2SO2_DATA0__FUNC_PCM1_DI (MTK_PIN_NO(190) | 4) 991*b0a75655SZhiyong Tao #define MT2712_PIN_190_I2SO2_DATA0__FUNC_MRG_TX (MTK_PIN_NO(190) | 5) 992*b0a75655SZhiyong Tao #define MT2712_PIN_190_I2SO2_DATA0__FUNC_PCM1_DO (MTK_PIN_NO(190) | 6) 993*b0a75655SZhiyong Tao #define MT2712_PIN_190_I2SO2_DATA0__FUNC_I2S_IQ0_SDIA (MTK_PIN_NO(190) | 7) 994*b0a75655SZhiyong Tao 995*b0a75655SZhiyong Tao #define MT2712_PIN_191_I2SO0_DATA1__FUNC_GPIO191 (MTK_PIN_NO(191) | 0) 996*b0a75655SZhiyong Tao #define MT2712_PIN_191_I2SO0_DATA1__FUNC_I2SO0_DO1 (MTK_PIN_NO(191) | 1) 997*b0a75655SZhiyong Tao #define MT2712_PIN_191_I2SO0_DATA1__FUNC_I2SI0_DI (MTK_PIN_NO(191) | 2) 998*b0a75655SZhiyong Tao #define MT2712_PIN_191_I2SO0_DATA1__FUNC_I2SI1_DI (MTK_PIN_NO(191) | 3) 999*b0a75655SZhiyong Tao #define MT2712_PIN_191_I2SO0_DATA1__FUNC_I2SI2_DI (MTK_PIN_NO(191) | 4) 1000*b0a75655SZhiyong Tao #define MT2712_PIN_191_I2SO0_DATA1__FUNC_DAI_TX (MTK_PIN_NO(191) | 5) 1001*b0a75655SZhiyong Tao #define MT2712_PIN_191_I2SO0_DATA1__FUNC_I2S_IQ0_SDQB (MTK_PIN_NO(191) | 6) 1002*b0a75655SZhiyong Tao #define MT2712_PIN_191_I2SO0_DATA1__FUNC_I2S_IQ1_SDQB (MTK_PIN_NO(191) | 7) 1003*b0a75655SZhiyong Tao 1004*b0a75655SZhiyong Tao #define MT2712_PIN_192_I2SO0_MCLK__FUNC_GPIO192 (MTK_PIN_NO(192) | 0) 1005*b0a75655SZhiyong Tao #define MT2712_PIN_192_I2SO0_MCLK__FUNC_I2SO0_MCK (MTK_PIN_NO(192) | 1) 1006*b0a75655SZhiyong Tao #define MT2712_PIN_192_I2SO0_MCLK__FUNC_I2SO1_MCK (MTK_PIN_NO(192) | 2) 1007*b0a75655SZhiyong Tao #define MT2712_PIN_192_I2SO0_MCLK__FUNC_I2SO2_MCK (MTK_PIN_NO(192) | 3) 1008*b0a75655SZhiyong Tao #define MT2712_PIN_192_I2SO0_MCLK__FUNC_USB4_FT_SCL (MTK_PIN_NO(192) | 4) 1009*b0a75655SZhiyong Tao #define MT2712_PIN_192_I2SO0_MCLK__FUNC_TDMO1_DATA3 (MTK_PIN_NO(192) | 5) 1010*b0a75655SZhiyong Tao #define MT2712_PIN_192_I2SO0_MCLK__FUNC_I2S_IQ0_SDIB (MTK_PIN_NO(192) | 6) 1011*b0a75655SZhiyong Tao #define MT2712_PIN_192_I2SO0_MCLK__FUNC_I2S_IQ1_SDQA (MTK_PIN_NO(192) | 7) 1012*b0a75655SZhiyong Tao 1013*b0a75655SZhiyong Tao #define MT2712_PIN_193_I2SO0_DATA0__FUNC_GPIO193 (MTK_PIN_NO(193) | 0) 1014*b0a75655SZhiyong Tao #define MT2712_PIN_193_I2SO0_DATA0__FUNC_I2SO0_DO0 (MTK_PIN_NO(193) | 1) 1015*b0a75655SZhiyong Tao #define MT2712_PIN_193_I2SO0_DATA0__FUNC_I2SO1_DO (MTK_PIN_NO(193) | 2) 1016*b0a75655SZhiyong Tao #define MT2712_PIN_193_I2SO0_DATA0__FUNC_I2SO2_DO (MTK_PIN_NO(193) | 3) 1017*b0a75655SZhiyong Tao #define MT2712_PIN_193_I2SO0_DATA0__FUNC_USB4_FT_SDA (MTK_PIN_NO(193) | 4) 1018*b0a75655SZhiyong Tao #define MT2712_PIN_193_I2SO0_DATA0__FUNC_I2S_IQ1_SDIA (MTK_PIN_NO(193) | 7) 1019*b0a75655SZhiyong Tao 1020*b0a75655SZhiyong Tao #define MT2712_PIN_194_I2SO0_LRCK__FUNC_GPIO194 (MTK_PIN_NO(194) | 0) 1021*b0a75655SZhiyong Tao #define MT2712_PIN_194_I2SO0_LRCK__FUNC_I2SO0_WS (MTK_PIN_NO(194) | 1) 1022*b0a75655SZhiyong Tao #define MT2712_PIN_194_I2SO0_LRCK__FUNC_I2SO1_WS (MTK_PIN_NO(194) | 2) 1023*b0a75655SZhiyong Tao #define MT2712_PIN_194_I2SO0_LRCK__FUNC_I2SO2_WS (MTK_PIN_NO(194) | 3) 1024*b0a75655SZhiyong Tao #define MT2712_PIN_194_I2SO0_LRCK__FUNC_USB5_FT_SCL (MTK_PIN_NO(194) | 4) 1025*b0a75655SZhiyong Tao #define MT2712_PIN_194_I2SO0_LRCK__FUNC_TDMO1_DATA2 (MTK_PIN_NO(194) | 5) 1026*b0a75655SZhiyong Tao #define MT2712_PIN_194_I2SO0_LRCK__FUNC_I2S_IQ1_WS (MTK_PIN_NO(194) | 7) 1027*b0a75655SZhiyong Tao 1028*b0a75655SZhiyong Tao #define MT2712_PIN_195_I2SO0_BCK__FUNC_GPIO195 (MTK_PIN_NO(195) | 0) 1029*b0a75655SZhiyong Tao #define MT2712_PIN_195_I2SO0_BCK__FUNC_I2SO0_BCK (MTK_PIN_NO(195) | 1) 1030*b0a75655SZhiyong Tao #define MT2712_PIN_195_I2SO0_BCK__FUNC_I2SO1_BCK (MTK_PIN_NO(195) | 2) 1031*b0a75655SZhiyong Tao #define MT2712_PIN_195_I2SO0_BCK__FUNC_I2SO2_BCK (MTK_PIN_NO(195) | 3) 1032*b0a75655SZhiyong Tao #define MT2712_PIN_195_I2SO0_BCK__FUNC_USB5_FT_SDA (MTK_PIN_NO(195) | 4) 1033*b0a75655SZhiyong Tao #define MT2712_PIN_195_I2SO0_BCK__FUNC_TDMO1_DATA1 (MTK_PIN_NO(195) | 5) 1034*b0a75655SZhiyong Tao #define MT2712_PIN_195_I2SO0_BCK__FUNC_I2S_IQ1_BCK (MTK_PIN_NO(195) | 7) 1035*b0a75655SZhiyong Tao 1036*b0a75655SZhiyong Tao #define MT2712_PIN_196_TDMO1_MCLK__FUNC_GPIO196 (MTK_PIN_NO(196) | 0) 1037*b0a75655SZhiyong Tao #define MT2712_PIN_196_TDMO1_MCLK__FUNC_TDMO1_MCLK (MTK_PIN_NO(196) | 1) 1038*b0a75655SZhiyong Tao #define MT2712_PIN_196_TDMO1_MCLK__FUNC_TDMO0_MCLK (MTK_PIN_NO(196) | 2) 1039*b0a75655SZhiyong Tao #define MT2712_PIN_196_TDMO1_MCLK__FUNC_TDMIN_MCLK (MTK_PIN_NO(196) | 3) 1040*b0a75655SZhiyong Tao #define MT2712_PIN_196_TDMO1_MCLK__FUNC_I2SO0_DO1 (MTK_PIN_NO(196) | 6) 1041*b0a75655SZhiyong Tao #define MT2712_PIN_196_TDMO1_MCLK__FUNC_I2S_IQ1_SDIB (MTK_PIN_NO(196) | 7) 1042*b0a75655SZhiyong Tao 1043*b0a75655SZhiyong Tao #define MT2712_PIN_197_TDMO1_LRCK__FUNC_GPIO197 (MTK_PIN_NO(197) | 0) 1044*b0a75655SZhiyong Tao #define MT2712_PIN_197_TDMO1_LRCK__FUNC_TDMO1_LRCK (MTK_PIN_NO(197) | 1) 1045*b0a75655SZhiyong Tao #define MT2712_PIN_197_TDMO1_LRCK__FUNC_TDMO0_LRCK (MTK_PIN_NO(197) | 2) 1046*b0a75655SZhiyong Tao #define MT2712_PIN_197_TDMO1_LRCK__FUNC_TDMIN_LRCK (MTK_PIN_NO(197) | 3) 1047*b0a75655SZhiyong Tao #define MT2712_PIN_197_TDMO1_LRCK__FUNC_TDMO0_DATA3 (MTK_PIN_NO(197) | 4) 1048*b0a75655SZhiyong Tao #define MT2712_PIN_197_TDMO1_LRCK__FUNC_TDMO1_DATA3 (MTK_PIN_NO(197) | 5) 1049*b0a75655SZhiyong Tao #define MT2712_PIN_197_TDMO1_LRCK__FUNC_I2SO3_MCK (MTK_PIN_NO(197) | 6) 1050*b0a75655SZhiyong Tao #define MT2712_PIN_197_TDMO1_LRCK__FUNC_TDMO1_DATA2 (MTK_PIN_NO(197) | 7) 1051*b0a75655SZhiyong Tao 1052*b0a75655SZhiyong Tao #define MT2712_PIN_198_TDMO1_BCK__FUNC_GPIO198 (MTK_PIN_NO(198) | 0) 1053*b0a75655SZhiyong Tao #define MT2712_PIN_198_TDMO1_BCK__FUNC_TDMO1_BCK (MTK_PIN_NO(198) | 1) 1054*b0a75655SZhiyong Tao #define MT2712_PIN_198_TDMO1_BCK__FUNC_TDMO0_BCK (MTK_PIN_NO(198) | 2) 1055*b0a75655SZhiyong Tao #define MT2712_PIN_198_TDMO1_BCK__FUNC_TDMIN_BCK (MTK_PIN_NO(198) | 3) 1056*b0a75655SZhiyong Tao #define MT2712_PIN_198_TDMO1_BCK__FUNC_TDMO0_DATA2 (MTK_PIN_NO(198) | 4) 1057*b0a75655SZhiyong Tao #define MT2712_PIN_198_TDMO1_BCK__FUNC_TDMO1_DATA2 (MTK_PIN_NO(198) | 5) 1058*b0a75655SZhiyong Tao #define MT2712_PIN_198_TDMO1_BCK__FUNC_I2SO3_BCK (MTK_PIN_NO(198) | 6) 1059*b0a75655SZhiyong Tao #define MT2712_PIN_198_TDMO1_BCK__FUNC_TDMO1_DATA1 (MTK_PIN_NO(198) | 7) 1060*b0a75655SZhiyong Tao 1061*b0a75655SZhiyong Tao #define MT2712_PIN_199_TDMO1_DATA__FUNC_GPIO199 (MTK_PIN_NO(199) | 0) 1062*b0a75655SZhiyong Tao #define MT2712_PIN_199_TDMO1_DATA__FUNC_TDMO1_DATA (MTK_PIN_NO(199) | 1) 1063*b0a75655SZhiyong Tao #define MT2712_PIN_199_TDMO1_DATA__FUNC_TDMO0_DATA (MTK_PIN_NO(199) | 2) 1064*b0a75655SZhiyong Tao #define MT2712_PIN_199_TDMO1_DATA__FUNC_TDMIN_DI (MTK_PIN_NO(199) | 3) 1065*b0a75655SZhiyong Tao #define MT2712_PIN_199_TDMO1_DATA__FUNC_TDMO0_DATA1 (MTK_PIN_NO(199) | 4) 1066*b0a75655SZhiyong Tao #define MT2712_PIN_199_TDMO1_DATA__FUNC_TDMO1_DATA1 (MTK_PIN_NO(199) | 5) 1067*b0a75655SZhiyong Tao #define MT2712_PIN_199_TDMO1_DATA__FUNC_I2SO3_WS (MTK_PIN_NO(199) | 6) 1068*b0a75655SZhiyong Tao 1069*b0a75655SZhiyong Tao #define MT2712_PIN_200_TDMO0_MCLK__FUNC_GPIO200 (MTK_PIN_NO(200) | 0) 1070*b0a75655SZhiyong Tao #define MT2712_PIN_200_TDMO0_MCLK__FUNC_TDMO0_MCLK0 (MTK_PIN_NO(200) | 1) 1071*b0a75655SZhiyong Tao #define MT2712_PIN_200_TDMO0_MCLK__FUNC_TDMO1_MCLK0 (MTK_PIN_NO(200) | 2) 1072*b0a75655SZhiyong Tao #define MT2712_PIN_200_TDMO0_MCLK__FUNC_PCM1_DI (MTK_PIN_NO(200) | 3) 1073*b0a75655SZhiyong Tao #define MT2712_PIN_200_TDMO0_MCLK__FUNC_TDMO0_MCLK1 (MTK_PIN_NO(200) | 4) 1074*b0a75655SZhiyong Tao #define MT2712_PIN_200_TDMO0_MCLK__FUNC_TDMO1_MCLK1 (MTK_PIN_NO(200) | 5) 1075*b0a75655SZhiyong Tao #define MT2712_PIN_200_TDMO0_MCLK__FUNC_MRG_TX (MTK_PIN_NO(200) | 6) 1076*b0a75655SZhiyong Tao #define MT2712_PIN_200_TDMO0_MCLK__FUNC_I2SO2_MCK (MTK_PIN_NO(200) | 7) 1077*b0a75655SZhiyong Tao 1078*b0a75655SZhiyong Tao #define MT2712_PIN_201_TDMO0_LRCK__FUNC_GPIO201 (MTK_PIN_NO(201) | 0) 1079*b0a75655SZhiyong Tao #define MT2712_PIN_201_TDMO0_LRCK__FUNC_TDMO0_LRCK0 (MTK_PIN_NO(201) | 1) 1080*b0a75655SZhiyong Tao #define MT2712_PIN_201_TDMO0_LRCK__FUNC_TDMO1_LRCK0 (MTK_PIN_NO(201) | 2) 1081*b0a75655SZhiyong Tao #define MT2712_PIN_201_TDMO0_LRCK__FUNC_PCM1_SYNC (MTK_PIN_NO(201) | 3) 1082*b0a75655SZhiyong Tao #define MT2712_PIN_201_TDMO0_LRCK__FUNC_TDMO0_LRCK1 (MTK_PIN_NO(201) | 4) 1083*b0a75655SZhiyong Tao #define MT2712_PIN_201_TDMO0_LRCK__FUNC_TDMO1_LRCK1 (MTK_PIN_NO(201) | 5) 1084*b0a75655SZhiyong Tao #define MT2712_PIN_201_TDMO0_LRCK__FUNC_MRG_RX (MTK_PIN_NO(201) | 6) 1085*b0a75655SZhiyong Tao #define MT2712_PIN_201_TDMO0_LRCK__FUNC_I2SO2_WS (MTK_PIN_NO(201) | 7) 1086*b0a75655SZhiyong Tao 1087*b0a75655SZhiyong Tao #define MT2712_PIN_202_TDMO0_BCK__FUNC_GPIO202 (MTK_PIN_NO(202) | 0) 1088*b0a75655SZhiyong Tao #define MT2712_PIN_202_TDMO0_BCK__FUNC_TDMO0_BCK0 (MTK_PIN_NO(202) | 1) 1089*b0a75655SZhiyong Tao #define MT2712_PIN_202_TDMO0_BCK__FUNC_TDMO1_BCK0 (MTK_PIN_NO(202) | 2) 1090*b0a75655SZhiyong Tao #define MT2712_PIN_202_TDMO0_BCK__FUNC_PCM1_CLK (MTK_PIN_NO(202) | 3) 1091*b0a75655SZhiyong Tao #define MT2712_PIN_202_TDMO0_BCK__FUNC_TDMO0_BCK1 (MTK_PIN_NO(202) | 4) 1092*b0a75655SZhiyong Tao #define MT2712_PIN_202_TDMO0_BCK__FUNC_TDMO1_BCK1 (MTK_PIN_NO(202) | 5) 1093*b0a75655SZhiyong Tao #define MT2712_PIN_202_TDMO0_BCK__FUNC_MRG_SYNC (MTK_PIN_NO(202) | 6) 1094*b0a75655SZhiyong Tao #define MT2712_PIN_202_TDMO0_BCK__FUNC_I2SO2_BCK (MTK_PIN_NO(202) | 7) 1095*b0a75655SZhiyong Tao 1096*b0a75655SZhiyong Tao #define MT2712_PIN_203_TDMO0_DATA__FUNC_GPIO203 (MTK_PIN_NO(203) | 0) 1097*b0a75655SZhiyong Tao #define MT2712_PIN_203_TDMO0_DATA__FUNC_TDMO0_DATA0 (MTK_PIN_NO(203) | 1) 1098*b0a75655SZhiyong Tao #define MT2712_PIN_203_TDMO0_DATA__FUNC_TDMO1_DATA0 (MTK_PIN_NO(203) | 2) 1099*b0a75655SZhiyong Tao #define MT2712_PIN_203_TDMO0_DATA__FUNC_PCM1_DO (MTK_PIN_NO(203) | 3) 1100*b0a75655SZhiyong Tao #define MT2712_PIN_203_TDMO0_DATA__FUNC_TDMO0_DATA1 (MTK_PIN_NO(203) | 4) 1101*b0a75655SZhiyong Tao #define MT2712_PIN_203_TDMO0_DATA__FUNC_TDMO1_DATA1 (MTK_PIN_NO(203) | 5) 1102*b0a75655SZhiyong Tao #define MT2712_PIN_203_TDMO0_DATA__FUNC_MRG_CLK (MTK_PIN_NO(203) | 6) 1103*b0a75655SZhiyong Tao #define MT2712_PIN_203_TDMO0_DATA__FUNC_I2SO2_DO (MTK_PIN_NO(203) | 7) 1104*b0a75655SZhiyong Tao 1105*b0a75655SZhiyong Tao #define MT2712_PIN_204_PERSTB_P0__FUNC_GPIO204 (MTK_PIN_NO(204) | 0) 1106*b0a75655SZhiyong Tao #define MT2712_PIN_204_PERSTB_P0__FUNC_PERST_B_P0 (MTK_PIN_NO(204) | 1) 1107*b0a75655SZhiyong Tao 1108*b0a75655SZhiyong Tao #define MT2712_PIN_205_CLKREQN_P0__FUNC_GPIO205 (MTK_PIN_NO(205) | 0) 1109*b0a75655SZhiyong Tao #define MT2712_PIN_205_CLKREQN_P0__FUNC_CLKREQ_N_P0 (MTK_PIN_NO(205) | 1) 1110*b0a75655SZhiyong Tao 1111*b0a75655SZhiyong Tao #define MT2712_PIN_206_WAKEEN_P0__FUNC_GPIO206 (MTK_PIN_NO(206) | 0) 1112*b0a75655SZhiyong Tao #define MT2712_PIN_206_WAKEEN_P0__FUNC_WAKE_EN_P0 (MTK_PIN_NO(206) | 1) 1113*b0a75655SZhiyong Tao 1114*b0a75655SZhiyong Tao #define MT2712_PIN_207_PERSTB_P1__FUNC_GPIO207 (MTK_PIN_NO(207) | 0) 1115*b0a75655SZhiyong Tao #define MT2712_PIN_207_PERSTB_P1__FUNC_PERST_B_P1 (MTK_PIN_NO(207) | 1) 1116*b0a75655SZhiyong Tao 1117*b0a75655SZhiyong Tao #define MT2712_PIN_208_CLKREQN_P1__FUNC_GPIO208 (MTK_PIN_NO(208) | 0) 1118*b0a75655SZhiyong Tao #define MT2712_PIN_208_CLKREQN_P1__FUNC_CLKREQ_N_P1 (MTK_PIN_NO(208) | 1) 1119*b0a75655SZhiyong Tao 1120*b0a75655SZhiyong Tao #define MT2712_PIN_209_WAKEEN_P1__FUNC_GPIO209 (MTK_PIN_NO(209) | 0) 1121*b0a75655SZhiyong Tao #define MT2712_PIN_209_WAKEEN_P1__FUNC_WAKE_EN_P1 (MTK_PIN_NO(209) | 1) 1122*b0a75655SZhiyong Tao 1123*b0a75655SZhiyong Tao #endif /* __DTS_MT2712_PINFUNC_H */ 1124