xref: /linux/scripts/dtc/include-prefixes/arm64/intel/socfpga_agilex72_socdk.dts (revision cbe8aadf1551f3f4a853f24b3b96d9f0eea49c53) 
1*5eb1916eSNazim Amirul// SPDX-License-Identifier: GPL-2.0-only
2*5eb1916eSNazim Amirul/*
3*5eb1916eSNazim Amirul * Copyright (C) 2026, Altera Corporation
4*5eb1916eSNazim Amirul */
5*5eb1916eSNazim Amirul#include "socfpga_agilex72.dtsi"
6*5eb1916eSNazim Amirul
7*5eb1916eSNazim Amirul/ {
8*5eb1916eSNazim Amirul	model = "Altera SoCFPGA Agilex72 SoCDK";
9*5eb1916eSNazim Amirul	compatible = "intel,socfpga-agilex72-socdk", "intel,socfpga-agilex72";
10*5eb1916eSNazim Amirul
11*5eb1916eSNazim Amirul	aliases {
12*5eb1916eSNazim Amirul		serial0 = &uart0;
13*5eb1916eSNazim Amirul	};
14*5eb1916eSNazim Amirul
15*5eb1916eSNazim Amirul	chosen {
16*5eb1916eSNazim Amirul		stdout-path = "serial0:115200n8";
17*5eb1916eSNazim Amirul	};
18*5eb1916eSNazim Amirul
19*5eb1916eSNazim Amirul	memory@80000000 {
20*5eb1916eSNazim Amirul		device_type = "memory";
21*5eb1916eSNazim Amirul		reg = <0x0 0x80000000 0x0 0x80000000>;
22*5eb1916eSNazim Amirul	};
23*5eb1916eSNazim Amirul};
24*5eb1916eSNazim Amirul
25*5eb1916eSNazim Amirul&uart0 {
26*5eb1916eSNazim Amirul	status = "okay";
27*5eb1916eSNazim Amirul};
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