xref: /linux/scripts/dtc/include-prefixes/arm64/hisilicon/hip07.dtsi (revision 47a6ca1172cb516b2a99f4b84ee1491859807390)
11d0ea069SThomas Gleixner// SPDX-License-Identifier: GPL-2.0-only
24f357f94SKefeng Wang/**
34f357f94SKefeng Wang * dts file for Hisilicon D05 Development Board
44f357f94SKefeng Wang *
54f357f94SKefeng Wang * Copyright (C) 2016 Hisilicon Ltd.
64f357f94SKefeng Wang */
74f357f94SKefeng Wang
84f357f94SKefeng Wang#include <dt-bindings/interrupt-controller/arm-gic.h>
94f357f94SKefeng Wang
104f357f94SKefeng Wang/ {
114f357f94SKefeng Wang	compatible = "hisilicon,hip07-d05";
124f357f94SKefeng Wang	interrupt-parent = <&gic>;
134f357f94SKefeng Wang	#address-cells = <2>;
144f357f94SKefeng Wang	#size-cells = <2>;
154f357f94SKefeng Wang
164f357f94SKefeng Wang	psci {
174f357f94SKefeng Wang		compatible = "arm,psci-0.2";
184f357f94SKefeng Wang		method = "smc";
194f357f94SKefeng Wang	};
204f357f94SKefeng Wang
214f357f94SKefeng Wang	cpus {
224f357f94SKefeng Wang		#address-cells = <1>;
234f357f94SKefeng Wang		#size-cells = <0>;
244f357f94SKefeng Wang
254f357f94SKefeng Wang		cpu-map {
264f357f94SKefeng Wang			cluster0 {
274f357f94SKefeng Wang				core0 {
284f357f94SKefeng Wang					cpu = <&cpu0>;
294f357f94SKefeng Wang				};
304f357f94SKefeng Wang				core1 {
314f357f94SKefeng Wang					cpu = <&cpu1>;
324f357f94SKefeng Wang				};
334f357f94SKefeng Wang				core2 {
344f357f94SKefeng Wang					cpu = <&cpu2>;
354f357f94SKefeng Wang				};
364f357f94SKefeng Wang				core3 {
374f357f94SKefeng Wang					cpu = <&cpu3>;
384f357f94SKefeng Wang				};
394f357f94SKefeng Wang			};
404f357f94SKefeng Wang
414f357f94SKefeng Wang			cluster1 {
424f357f94SKefeng Wang				core0 {
434f357f94SKefeng Wang					cpu = <&cpu4>;
444f357f94SKefeng Wang				};
454f357f94SKefeng Wang				core1 {
464f357f94SKefeng Wang					cpu = <&cpu5>;
474f357f94SKefeng Wang				};
484f357f94SKefeng Wang				core2 {
494f357f94SKefeng Wang					cpu = <&cpu6>;
504f357f94SKefeng Wang				};
514f357f94SKefeng Wang				core3 {
524f357f94SKefeng Wang					cpu = <&cpu7>;
534f357f94SKefeng Wang				};
544f357f94SKefeng Wang			};
554f357f94SKefeng Wang
564f357f94SKefeng Wang			cluster2 {
574f357f94SKefeng Wang				core0 {
584f357f94SKefeng Wang					cpu = <&cpu8>;
594f357f94SKefeng Wang				};
604f357f94SKefeng Wang				core1 {
614f357f94SKefeng Wang					cpu = <&cpu9>;
624f357f94SKefeng Wang				};
634f357f94SKefeng Wang				core2 {
644f357f94SKefeng Wang					cpu = <&cpu10>;
654f357f94SKefeng Wang				};
664f357f94SKefeng Wang				core3 {
674f357f94SKefeng Wang					cpu = <&cpu11>;
684f357f94SKefeng Wang				};
694f357f94SKefeng Wang			};
704f357f94SKefeng Wang
714f357f94SKefeng Wang			cluster3 {
724f357f94SKefeng Wang				core0 {
734f357f94SKefeng Wang					cpu = <&cpu12>;
744f357f94SKefeng Wang				};
754f357f94SKefeng Wang				core1 {
764f357f94SKefeng Wang					cpu = <&cpu13>;
774f357f94SKefeng Wang				};
784f357f94SKefeng Wang				core2 {
794f357f94SKefeng Wang					cpu = <&cpu14>;
804f357f94SKefeng Wang				};
814f357f94SKefeng Wang				core3 {
824f357f94SKefeng Wang					cpu = <&cpu15>;
834f357f94SKefeng Wang				};
844f357f94SKefeng Wang			};
854f357f94SKefeng Wang
864f357f94SKefeng Wang			cluster4 {
874f357f94SKefeng Wang				core0 {
884f357f94SKefeng Wang					cpu = <&cpu16>;
894f357f94SKefeng Wang				};
904f357f94SKefeng Wang				core1 {
914f357f94SKefeng Wang					cpu = <&cpu17>;
924f357f94SKefeng Wang				};
934f357f94SKefeng Wang				core2 {
944f357f94SKefeng Wang					cpu = <&cpu18>;
954f357f94SKefeng Wang				};
964f357f94SKefeng Wang				core3 {
974f357f94SKefeng Wang					cpu = <&cpu19>;
984f357f94SKefeng Wang				};
994f357f94SKefeng Wang			};
1004f357f94SKefeng Wang
1014f357f94SKefeng Wang			cluster5 {
1024f357f94SKefeng Wang				core0 {
1034f357f94SKefeng Wang					cpu = <&cpu20>;
1044f357f94SKefeng Wang				};
1054f357f94SKefeng Wang				core1 {
1064f357f94SKefeng Wang					cpu = <&cpu21>;
1074f357f94SKefeng Wang				};
1084f357f94SKefeng Wang				core2 {
1094f357f94SKefeng Wang					cpu = <&cpu22>;
1104f357f94SKefeng Wang				};
1114f357f94SKefeng Wang				core3 {
1124f357f94SKefeng Wang					cpu = <&cpu23>;
1134f357f94SKefeng Wang				};
1144f357f94SKefeng Wang			};
1154f357f94SKefeng Wang
1164f357f94SKefeng Wang			cluster6 {
1174f357f94SKefeng Wang				core0 {
1184f357f94SKefeng Wang					cpu = <&cpu24>;
1194f357f94SKefeng Wang				};
1204f357f94SKefeng Wang				core1 {
1214f357f94SKefeng Wang					cpu = <&cpu25>;
1224f357f94SKefeng Wang				};
1234f357f94SKefeng Wang				core2 {
1244f357f94SKefeng Wang					cpu = <&cpu26>;
1254f357f94SKefeng Wang				};
1264f357f94SKefeng Wang				core3 {
1274f357f94SKefeng Wang					cpu = <&cpu27>;
1284f357f94SKefeng Wang				};
1294f357f94SKefeng Wang			};
1304f357f94SKefeng Wang
1314f357f94SKefeng Wang			cluster7 {
1324f357f94SKefeng Wang				core0 {
1334f357f94SKefeng Wang					cpu = <&cpu28>;
1344f357f94SKefeng Wang				};
1354f357f94SKefeng Wang				core1 {
1364f357f94SKefeng Wang					cpu = <&cpu29>;
1374f357f94SKefeng Wang				};
1384f357f94SKefeng Wang				core2 {
1394f357f94SKefeng Wang					cpu = <&cpu30>;
1404f357f94SKefeng Wang				};
1414f357f94SKefeng Wang				core3 {
1424f357f94SKefeng Wang					cpu = <&cpu31>;
1434f357f94SKefeng Wang				};
1444f357f94SKefeng Wang			};
1454f357f94SKefeng Wang
1464f357f94SKefeng Wang			cluster8 {
1474f357f94SKefeng Wang				core0 {
1484f357f94SKefeng Wang					cpu = <&cpu32>;
1494f357f94SKefeng Wang				};
1504f357f94SKefeng Wang				core1 {
1514f357f94SKefeng Wang					cpu = <&cpu33>;
1524f357f94SKefeng Wang				};
1534f357f94SKefeng Wang				core2 {
1544f357f94SKefeng Wang					cpu = <&cpu34>;
1554f357f94SKefeng Wang				};
1564f357f94SKefeng Wang				core3 {
1574f357f94SKefeng Wang					cpu = <&cpu35>;
1584f357f94SKefeng Wang				};
1594f357f94SKefeng Wang			};
1604f357f94SKefeng Wang
1614f357f94SKefeng Wang			cluster9 {
1624f357f94SKefeng Wang				core0 {
1634f357f94SKefeng Wang					cpu = <&cpu36>;
1644f357f94SKefeng Wang				};
1654f357f94SKefeng Wang				core1 {
1664f357f94SKefeng Wang					cpu = <&cpu37>;
1674f357f94SKefeng Wang				};
1684f357f94SKefeng Wang				core2 {
1694f357f94SKefeng Wang					cpu = <&cpu38>;
1704f357f94SKefeng Wang				};
1714f357f94SKefeng Wang				core3 {
1724f357f94SKefeng Wang					cpu = <&cpu39>;
1734f357f94SKefeng Wang				};
1744f357f94SKefeng Wang			};
1754f357f94SKefeng Wang
1764f357f94SKefeng Wang			cluster10 {
1774f357f94SKefeng Wang				core0 {
1784f357f94SKefeng Wang					cpu = <&cpu40>;
1794f357f94SKefeng Wang				};
1804f357f94SKefeng Wang				core1 {
1814f357f94SKefeng Wang					cpu = <&cpu41>;
1824f357f94SKefeng Wang				};
1834f357f94SKefeng Wang				core2 {
1844f357f94SKefeng Wang					cpu = <&cpu42>;
1854f357f94SKefeng Wang				};
1864f357f94SKefeng Wang				core3 {
1874f357f94SKefeng Wang					cpu = <&cpu43>;
1884f357f94SKefeng Wang				};
1894f357f94SKefeng Wang			};
1904f357f94SKefeng Wang
1914f357f94SKefeng Wang			cluster11 {
1924f357f94SKefeng Wang				core0 {
1934f357f94SKefeng Wang					cpu = <&cpu44>;
1944f357f94SKefeng Wang				};
1954f357f94SKefeng Wang				core1 {
1964f357f94SKefeng Wang					cpu = <&cpu45>;
1974f357f94SKefeng Wang				};
1984f357f94SKefeng Wang				core2 {
1994f357f94SKefeng Wang					cpu = <&cpu46>;
2004f357f94SKefeng Wang				};
2014f357f94SKefeng Wang				core3 {
2024f357f94SKefeng Wang					cpu = <&cpu47>;
2034f357f94SKefeng Wang				};
2044f357f94SKefeng Wang			};
2054f357f94SKefeng Wang
2064f357f94SKefeng Wang			cluster12 {
2074f357f94SKefeng Wang				core0 {
2084f357f94SKefeng Wang					cpu = <&cpu48>;
2094f357f94SKefeng Wang				};
2104f357f94SKefeng Wang				core1 {
2114f357f94SKefeng Wang					cpu = <&cpu49>;
2124f357f94SKefeng Wang				};
2134f357f94SKefeng Wang				core2 {
2144f357f94SKefeng Wang					cpu = <&cpu50>;
2154f357f94SKefeng Wang				};
2164f357f94SKefeng Wang				core3 {
2174f357f94SKefeng Wang					cpu = <&cpu51>;
2184f357f94SKefeng Wang				};
2194f357f94SKefeng Wang			};
2204f357f94SKefeng Wang
2214f357f94SKefeng Wang			cluster13 {
2224f357f94SKefeng Wang				core0 {
2234f357f94SKefeng Wang					cpu = <&cpu52>;
2244f357f94SKefeng Wang				};
2254f357f94SKefeng Wang				core1 {
2264f357f94SKefeng Wang					cpu = <&cpu53>;
2274f357f94SKefeng Wang				};
2284f357f94SKefeng Wang				core2 {
2294f357f94SKefeng Wang					cpu = <&cpu54>;
2304f357f94SKefeng Wang				};
2314f357f94SKefeng Wang				core3 {
2324f357f94SKefeng Wang					cpu = <&cpu55>;
2334f357f94SKefeng Wang				};
2344f357f94SKefeng Wang			};
2354f357f94SKefeng Wang
2364f357f94SKefeng Wang			cluster14 {
2374f357f94SKefeng Wang				core0 {
2384f357f94SKefeng Wang					cpu = <&cpu56>;
2394f357f94SKefeng Wang				};
2404f357f94SKefeng Wang				core1 {
2414f357f94SKefeng Wang					cpu = <&cpu57>;
2424f357f94SKefeng Wang				};
2434f357f94SKefeng Wang				core2 {
2444f357f94SKefeng Wang					cpu = <&cpu58>;
2454f357f94SKefeng Wang				};
2464f357f94SKefeng Wang				core3 {
2474f357f94SKefeng Wang					cpu = <&cpu59>;
2484f357f94SKefeng Wang				};
2494f357f94SKefeng Wang			};
2504f357f94SKefeng Wang
2514f357f94SKefeng Wang			cluster15 {
2524f357f94SKefeng Wang				core0 {
2534f357f94SKefeng Wang					cpu = <&cpu60>;
2544f357f94SKefeng Wang				};
2554f357f94SKefeng Wang				core1 {
2564f357f94SKefeng Wang					cpu = <&cpu61>;
2574f357f94SKefeng Wang				};
2584f357f94SKefeng Wang				core2 {
2594f357f94SKefeng Wang					cpu = <&cpu62>;
2604f357f94SKefeng Wang				};
2614f357f94SKefeng Wang				core3 {
2624f357f94SKefeng Wang					cpu = <&cpu63>;
2634f357f94SKefeng Wang				};
2644f357f94SKefeng Wang			};
2654f357f94SKefeng Wang		};
2664f357f94SKefeng Wang
2674f357f94SKefeng Wang		cpu0: cpu@10000 {
2684f357f94SKefeng Wang			device_type = "cpu";
26931af04cdSRob Herring			compatible = "arm,cortex-a72";
2704f357f94SKefeng Wang			reg = <0x10000>;
2714f357f94SKefeng Wang			enable-method = "psci";
2724f357f94SKefeng Wang			next-level-cache = <&cluster0_l2>;
2734f357f94SKefeng Wang			numa-node-id = <0>;
2744f357f94SKefeng Wang		};
2754f357f94SKefeng Wang
2764f357f94SKefeng Wang		cpu1: cpu@10001 {
2774f357f94SKefeng Wang			device_type = "cpu";
27831af04cdSRob Herring			compatible = "arm,cortex-a72";
2794f357f94SKefeng Wang			reg = <0x10001>;
2804f357f94SKefeng Wang			enable-method = "psci";
2814f357f94SKefeng Wang			next-level-cache = <&cluster0_l2>;
2824f357f94SKefeng Wang			numa-node-id = <0>;
2834f357f94SKefeng Wang		};
2844f357f94SKefeng Wang
2854f357f94SKefeng Wang		cpu2: cpu@10002 {
2864f357f94SKefeng Wang			device_type = "cpu";
28731af04cdSRob Herring			compatible = "arm,cortex-a72";
2884f357f94SKefeng Wang			reg = <0x10002>;
2894f357f94SKefeng Wang			enable-method = "psci";
2904f357f94SKefeng Wang			next-level-cache = <&cluster0_l2>;
2914f357f94SKefeng Wang			numa-node-id = <0>;
2924f357f94SKefeng Wang		};
2934f357f94SKefeng Wang
2944f357f94SKefeng Wang		cpu3: cpu@10003 {
2954f357f94SKefeng Wang			device_type = "cpu";
29631af04cdSRob Herring			compatible = "arm,cortex-a72";
2974f357f94SKefeng Wang			reg = <0x10003>;
2984f357f94SKefeng Wang			enable-method = "psci";
2994f357f94SKefeng Wang			next-level-cache = <&cluster0_l2>;
3004f357f94SKefeng Wang			numa-node-id = <0>;
3014f357f94SKefeng Wang		};
3024f357f94SKefeng Wang
3034f357f94SKefeng Wang		cpu4: cpu@10100 {
3044f357f94SKefeng Wang			device_type = "cpu";
30531af04cdSRob Herring			compatible = "arm,cortex-a72";
3064f357f94SKefeng Wang			reg = <0x10100>;
3074f357f94SKefeng Wang			enable-method = "psci";
3084f357f94SKefeng Wang			next-level-cache = <&cluster1_l2>;
3094f357f94SKefeng Wang			numa-node-id = <0>;
3104f357f94SKefeng Wang		};
3114f357f94SKefeng Wang
3124f357f94SKefeng Wang		cpu5: cpu@10101 {
3134f357f94SKefeng Wang			device_type = "cpu";
31431af04cdSRob Herring			compatible = "arm,cortex-a72";
3154f357f94SKefeng Wang			reg = <0x10101>;
3164f357f94SKefeng Wang			enable-method = "psci";
3174f357f94SKefeng Wang			next-level-cache = <&cluster1_l2>;
3184f357f94SKefeng Wang			numa-node-id = <0>;
3194f357f94SKefeng Wang		};
3204f357f94SKefeng Wang
3214f357f94SKefeng Wang		cpu6: cpu@10102 {
3224f357f94SKefeng Wang			device_type = "cpu";
32331af04cdSRob Herring			compatible = "arm,cortex-a72";
3244f357f94SKefeng Wang			reg = <0x10102>;
3254f357f94SKefeng Wang			enable-method = "psci";
3264f357f94SKefeng Wang			next-level-cache = <&cluster1_l2>;
3274f357f94SKefeng Wang			numa-node-id = <0>;
3284f357f94SKefeng Wang		};
3294f357f94SKefeng Wang
3304f357f94SKefeng Wang		cpu7: cpu@10103 {
3314f357f94SKefeng Wang			device_type = "cpu";
33231af04cdSRob Herring			compatible = "arm,cortex-a72";
3334f357f94SKefeng Wang			reg = <0x10103>;
3344f357f94SKefeng Wang			enable-method = "psci";
3354f357f94SKefeng Wang			next-level-cache = <&cluster1_l2>;
3364f357f94SKefeng Wang			numa-node-id = <0>;
3374f357f94SKefeng Wang		};
3384f357f94SKefeng Wang
3394f357f94SKefeng Wang		cpu8: cpu@10200 {
3404f357f94SKefeng Wang			device_type = "cpu";
34131af04cdSRob Herring			compatible = "arm,cortex-a72";
3424f357f94SKefeng Wang			reg = <0x10200>;
3434f357f94SKefeng Wang			enable-method = "psci";
3444f357f94SKefeng Wang			next-level-cache = <&cluster2_l2>;
3454f357f94SKefeng Wang			numa-node-id = <0>;
3464f357f94SKefeng Wang		};
3474f357f94SKefeng Wang
3484f357f94SKefeng Wang		cpu9: cpu@10201 {
3494f357f94SKefeng Wang			device_type = "cpu";
35031af04cdSRob Herring			compatible = "arm,cortex-a72";
3514f357f94SKefeng Wang			reg = <0x10201>;
3524f357f94SKefeng Wang			enable-method = "psci";
3534f357f94SKefeng Wang			next-level-cache = <&cluster2_l2>;
3544f357f94SKefeng Wang			numa-node-id = <0>;
3554f357f94SKefeng Wang		};
3564f357f94SKefeng Wang
3574f357f94SKefeng Wang		cpu10: cpu@10202 {
3584f357f94SKefeng Wang			device_type = "cpu";
35931af04cdSRob Herring			compatible = "arm,cortex-a72";
3604f357f94SKefeng Wang			reg = <0x10202>;
3614f357f94SKefeng Wang			enable-method = "psci";
3624f357f94SKefeng Wang			next-level-cache = <&cluster2_l2>;
3634f357f94SKefeng Wang			numa-node-id = <0>;
3644f357f94SKefeng Wang		};
3654f357f94SKefeng Wang
3664f357f94SKefeng Wang		cpu11: cpu@10203 {
3674f357f94SKefeng Wang			device_type = "cpu";
36831af04cdSRob Herring			compatible = "arm,cortex-a72";
3694f357f94SKefeng Wang			reg = <0x10203>;
3704f357f94SKefeng Wang			enable-method = "psci";
3714f357f94SKefeng Wang			next-level-cache = <&cluster2_l2>;
3724f357f94SKefeng Wang			numa-node-id = <0>;
3734f357f94SKefeng Wang		};
3744f357f94SKefeng Wang
3754f357f94SKefeng Wang		cpu12: cpu@10300 {
3764f357f94SKefeng Wang			device_type = "cpu";
37731af04cdSRob Herring			compatible = "arm,cortex-a72";
3784f357f94SKefeng Wang			reg = <0x10300>;
3794f357f94SKefeng Wang			enable-method = "psci";
3804f357f94SKefeng Wang			next-level-cache = <&cluster3_l2>;
3814f357f94SKefeng Wang			numa-node-id = <0>;
3824f357f94SKefeng Wang		};
3834f357f94SKefeng Wang
3844f357f94SKefeng Wang		cpu13: cpu@10301 {
3854f357f94SKefeng Wang			device_type = "cpu";
38631af04cdSRob Herring			compatible = "arm,cortex-a72";
3874f357f94SKefeng Wang			reg = <0x10301>;
3884f357f94SKefeng Wang			enable-method = "psci";
3894f357f94SKefeng Wang			next-level-cache = <&cluster3_l2>;
3904f357f94SKefeng Wang			numa-node-id = <0>;
3914f357f94SKefeng Wang		};
3924f357f94SKefeng Wang
3934f357f94SKefeng Wang		cpu14: cpu@10302 {
3944f357f94SKefeng Wang			device_type = "cpu";
39531af04cdSRob Herring			compatible = "arm,cortex-a72";
3964f357f94SKefeng Wang			reg = <0x10302>;
3974f357f94SKefeng Wang			enable-method = "psci";
3984f357f94SKefeng Wang			next-level-cache = <&cluster3_l2>;
3994f357f94SKefeng Wang			numa-node-id = <0>;
4004f357f94SKefeng Wang		};
4014f357f94SKefeng Wang
4024f357f94SKefeng Wang		cpu15: cpu@10303 {
4034f357f94SKefeng Wang			device_type = "cpu";
40431af04cdSRob Herring			compatible = "arm,cortex-a72";
4054f357f94SKefeng Wang			reg = <0x10303>;
4064f357f94SKefeng Wang			enable-method = "psci";
4074f357f94SKefeng Wang			next-level-cache = <&cluster3_l2>;
4084f357f94SKefeng Wang			numa-node-id = <0>;
4094f357f94SKefeng Wang		};
4104f357f94SKefeng Wang
4114f357f94SKefeng Wang		cpu16: cpu@30000 {
4124f357f94SKefeng Wang			device_type = "cpu";
41331af04cdSRob Herring			compatible = "arm,cortex-a72";
4144f357f94SKefeng Wang			reg = <0x30000>;
4154f357f94SKefeng Wang			enable-method = "psci";
4164f357f94SKefeng Wang			next-level-cache = <&cluster4_l2>;
4174f357f94SKefeng Wang			numa-node-id = <1>;
4184f357f94SKefeng Wang		};
4194f357f94SKefeng Wang
4204f357f94SKefeng Wang		cpu17: cpu@30001 {
4214f357f94SKefeng Wang			device_type = "cpu";
42231af04cdSRob Herring			compatible = "arm,cortex-a72";
4234f357f94SKefeng Wang			reg = <0x30001>;
4244f357f94SKefeng Wang			enable-method = "psci";
4254f357f94SKefeng Wang			next-level-cache = <&cluster4_l2>;
4264f357f94SKefeng Wang			numa-node-id = <1>;
4274f357f94SKefeng Wang		};
4284f357f94SKefeng Wang
4294f357f94SKefeng Wang		cpu18: cpu@30002 {
4304f357f94SKefeng Wang			device_type = "cpu";
43131af04cdSRob Herring			compatible = "arm,cortex-a72";
4324f357f94SKefeng Wang			reg = <0x30002>;
4334f357f94SKefeng Wang			enable-method = "psci";
4344f357f94SKefeng Wang			next-level-cache = <&cluster4_l2>;
4354f357f94SKefeng Wang			numa-node-id = <1>;
4364f357f94SKefeng Wang		};
4374f357f94SKefeng Wang
4384f357f94SKefeng Wang		cpu19: cpu@30003 {
4394f357f94SKefeng Wang			device_type = "cpu";
44031af04cdSRob Herring			compatible = "arm,cortex-a72";
4414f357f94SKefeng Wang			reg = <0x30003>;
4424f357f94SKefeng Wang			enable-method = "psci";
4434f357f94SKefeng Wang			next-level-cache = <&cluster4_l2>;
4444f357f94SKefeng Wang			numa-node-id = <1>;
4454f357f94SKefeng Wang		};
4464f357f94SKefeng Wang
4474f357f94SKefeng Wang		cpu20: cpu@30100 {
4484f357f94SKefeng Wang			device_type = "cpu";
44931af04cdSRob Herring			compatible = "arm,cortex-a72";
4504f357f94SKefeng Wang			reg = <0x30100>;
4514f357f94SKefeng Wang			enable-method = "psci";
4524f357f94SKefeng Wang			next-level-cache = <&cluster5_l2>;
4534f357f94SKefeng Wang			numa-node-id = <1>;
4544f357f94SKefeng Wang		};
4554f357f94SKefeng Wang
4564f357f94SKefeng Wang		cpu21: cpu@30101 {
4574f357f94SKefeng Wang			device_type = "cpu";
45831af04cdSRob Herring			compatible = "arm,cortex-a72";
4594f357f94SKefeng Wang			reg = <0x30101>;
4604f357f94SKefeng Wang			enable-method = "psci";
4614f357f94SKefeng Wang			next-level-cache = <&cluster5_l2>;
4624f357f94SKefeng Wang			numa-node-id = <1>;
4634f357f94SKefeng Wang		};
4644f357f94SKefeng Wang
4654f357f94SKefeng Wang		cpu22: cpu@30102 {
4664f357f94SKefeng Wang			device_type = "cpu";
46731af04cdSRob Herring			compatible = "arm,cortex-a72";
4684f357f94SKefeng Wang			reg = <0x30102>;
4694f357f94SKefeng Wang			enable-method = "psci";
4704f357f94SKefeng Wang			next-level-cache = <&cluster5_l2>;
4714f357f94SKefeng Wang			numa-node-id = <1>;
4724f357f94SKefeng Wang		};
4734f357f94SKefeng Wang
4744f357f94SKefeng Wang		cpu23: cpu@30103 {
4754f357f94SKefeng Wang			device_type = "cpu";
47631af04cdSRob Herring			compatible = "arm,cortex-a72";
4774f357f94SKefeng Wang			reg = <0x30103>;
4784f357f94SKefeng Wang			enable-method = "psci";
4794f357f94SKefeng Wang			next-level-cache = <&cluster5_l2>;
4804f357f94SKefeng Wang			numa-node-id = <1>;
4814f357f94SKefeng Wang		};
4824f357f94SKefeng Wang
4834f357f94SKefeng Wang		cpu24: cpu@30200 {
4844f357f94SKefeng Wang			device_type = "cpu";
48531af04cdSRob Herring			compatible = "arm,cortex-a72";
4864f357f94SKefeng Wang			reg = <0x30200>;
4874f357f94SKefeng Wang			enable-method = "psci";
4884f357f94SKefeng Wang			next-level-cache = <&cluster6_l2>;
4894f357f94SKefeng Wang			numa-node-id = <1>;
4904f357f94SKefeng Wang		};
4914f357f94SKefeng Wang
4924f357f94SKefeng Wang		cpu25: cpu@30201 {
4934f357f94SKefeng Wang			device_type = "cpu";
49431af04cdSRob Herring			compatible = "arm,cortex-a72";
4954f357f94SKefeng Wang			reg = <0x30201>;
4964f357f94SKefeng Wang			enable-method = "psci";
4974f357f94SKefeng Wang			next-level-cache = <&cluster6_l2>;
4984f357f94SKefeng Wang			numa-node-id = <1>;
4994f357f94SKefeng Wang		};
5004f357f94SKefeng Wang
5014f357f94SKefeng Wang		cpu26: cpu@30202 {
5024f357f94SKefeng Wang			device_type = "cpu";
50331af04cdSRob Herring			compatible = "arm,cortex-a72";
5044f357f94SKefeng Wang			reg = <0x30202>;
5054f357f94SKefeng Wang			enable-method = "psci";
5064f357f94SKefeng Wang			next-level-cache = <&cluster6_l2>;
5074f357f94SKefeng Wang			numa-node-id = <1>;
5084f357f94SKefeng Wang		};
5094f357f94SKefeng Wang
5104f357f94SKefeng Wang		cpu27: cpu@30203 {
5114f357f94SKefeng Wang			device_type = "cpu";
51231af04cdSRob Herring			compatible = "arm,cortex-a72";
5134f357f94SKefeng Wang			reg = <0x30203>;
5144f357f94SKefeng Wang			enable-method = "psci";
5154f357f94SKefeng Wang			next-level-cache = <&cluster6_l2>;
5164f357f94SKefeng Wang			numa-node-id = <1>;
5174f357f94SKefeng Wang		};
5184f357f94SKefeng Wang
5194f357f94SKefeng Wang		cpu28: cpu@30300 {
5204f357f94SKefeng Wang			device_type = "cpu";
52131af04cdSRob Herring			compatible = "arm,cortex-a72";
5224f357f94SKefeng Wang			reg = <0x30300>;
5234f357f94SKefeng Wang			enable-method = "psci";
5244f357f94SKefeng Wang			next-level-cache = <&cluster7_l2>;
5254f357f94SKefeng Wang			numa-node-id = <1>;
5264f357f94SKefeng Wang		};
5274f357f94SKefeng Wang
5284f357f94SKefeng Wang		cpu29: cpu@30301 {
5294f357f94SKefeng Wang			device_type = "cpu";
53031af04cdSRob Herring			compatible = "arm,cortex-a72";
5314f357f94SKefeng Wang			reg = <0x30301>;
5324f357f94SKefeng Wang			enable-method = "psci";
5334f357f94SKefeng Wang			next-level-cache = <&cluster7_l2>;
5344f357f94SKefeng Wang			numa-node-id = <1>;
5354f357f94SKefeng Wang		};
5364f357f94SKefeng Wang
5374f357f94SKefeng Wang		cpu30: cpu@30302 {
5384f357f94SKefeng Wang			device_type = "cpu";
53931af04cdSRob Herring			compatible = "arm,cortex-a72";
5404f357f94SKefeng Wang			reg = <0x30302>;
5414f357f94SKefeng Wang			enable-method = "psci";
5424f357f94SKefeng Wang			next-level-cache = <&cluster7_l2>;
5434f357f94SKefeng Wang			numa-node-id = <1>;
5444f357f94SKefeng Wang		};
5454f357f94SKefeng Wang
5464f357f94SKefeng Wang		cpu31: cpu@30303 {
5474f357f94SKefeng Wang			device_type = "cpu";
54831af04cdSRob Herring			compatible = "arm,cortex-a72";
5494f357f94SKefeng Wang			reg = <0x30303>;
5504f357f94SKefeng Wang			enable-method = "psci";
5514f357f94SKefeng Wang			next-level-cache = <&cluster7_l2>;
5524f357f94SKefeng Wang			numa-node-id = <1>;
5534f357f94SKefeng Wang		};
5544f357f94SKefeng Wang
5554f357f94SKefeng Wang		cpu32: cpu@50000 {
5564f357f94SKefeng Wang			device_type = "cpu";
55731af04cdSRob Herring			compatible = "arm,cortex-a72";
5584f357f94SKefeng Wang			reg = <0x50000>;
5594f357f94SKefeng Wang			enable-method = "psci";
5604f357f94SKefeng Wang			next-level-cache = <&cluster8_l2>;
5614f357f94SKefeng Wang			numa-node-id = <2>;
5624f357f94SKefeng Wang		};
5634f357f94SKefeng Wang
5644f357f94SKefeng Wang		cpu33: cpu@50001 {
5654f357f94SKefeng Wang			device_type = "cpu";
56631af04cdSRob Herring			compatible = "arm,cortex-a72";
5674f357f94SKefeng Wang			reg = <0x50001>;
5684f357f94SKefeng Wang			enable-method = "psci";
5694f357f94SKefeng Wang			next-level-cache = <&cluster8_l2>;
5704f357f94SKefeng Wang			numa-node-id = <2>;
5714f357f94SKefeng Wang		};
5724f357f94SKefeng Wang
5734f357f94SKefeng Wang		cpu34: cpu@50002 {
5744f357f94SKefeng Wang			device_type = "cpu";
57531af04cdSRob Herring			compatible = "arm,cortex-a72";
5764f357f94SKefeng Wang			reg = <0x50002>;
5774f357f94SKefeng Wang			enable-method = "psci";
5784f357f94SKefeng Wang			next-level-cache = <&cluster8_l2>;
5794f357f94SKefeng Wang			numa-node-id = <2>;
5804f357f94SKefeng Wang		};
5814f357f94SKefeng Wang
5824f357f94SKefeng Wang		cpu35: cpu@50003 {
5834f357f94SKefeng Wang			device_type = "cpu";
58431af04cdSRob Herring			compatible = "arm,cortex-a72";
5854f357f94SKefeng Wang			reg = <0x50003>;
5864f357f94SKefeng Wang			enable-method = "psci";
5874f357f94SKefeng Wang			next-level-cache = <&cluster8_l2>;
5884f357f94SKefeng Wang			numa-node-id = <2>;
5894f357f94SKefeng Wang		};
5904f357f94SKefeng Wang
5914f357f94SKefeng Wang		cpu36: cpu@50100 {
5924f357f94SKefeng Wang			device_type = "cpu";
59331af04cdSRob Herring			compatible = "arm,cortex-a72";
5944f357f94SKefeng Wang			reg = <0x50100>;
5954f357f94SKefeng Wang			enable-method = "psci";
5964f357f94SKefeng Wang			next-level-cache = <&cluster9_l2>;
5974f357f94SKefeng Wang			numa-node-id = <2>;
5984f357f94SKefeng Wang		};
5994f357f94SKefeng Wang
6004f357f94SKefeng Wang		cpu37: cpu@50101 {
6014f357f94SKefeng Wang			device_type = "cpu";
60231af04cdSRob Herring			compatible = "arm,cortex-a72";
6034f357f94SKefeng Wang			reg = <0x50101>;
6044f357f94SKefeng Wang			enable-method = "psci";
6054f357f94SKefeng Wang			next-level-cache = <&cluster9_l2>;
6064f357f94SKefeng Wang			numa-node-id = <2>;
6074f357f94SKefeng Wang		};
6084f357f94SKefeng Wang
6094f357f94SKefeng Wang		cpu38: cpu@50102 {
6104f357f94SKefeng Wang			device_type = "cpu";
61131af04cdSRob Herring			compatible = "arm,cortex-a72";
6124f357f94SKefeng Wang			reg = <0x50102>;
6134f357f94SKefeng Wang			enable-method = "psci";
6144f357f94SKefeng Wang			next-level-cache = <&cluster9_l2>;
6154f357f94SKefeng Wang			numa-node-id = <2>;
6164f357f94SKefeng Wang		};
6174f357f94SKefeng Wang
6184f357f94SKefeng Wang		cpu39: cpu@50103 {
6194f357f94SKefeng Wang			device_type = "cpu";
62031af04cdSRob Herring			compatible = "arm,cortex-a72";
6214f357f94SKefeng Wang			reg = <0x50103>;
6224f357f94SKefeng Wang			enable-method = "psci";
6234f357f94SKefeng Wang			next-level-cache = <&cluster9_l2>;
6244f357f94SKefeng Wang			numa-node-id = <2>;
6254f357f94SKefeng Wang		};
6264f357f94SKefeng Wang
6274f357f94SKefeng Wang		cpu40: cpu@50200 {
6284f357f94SKefeng Wang			device_type = "cpu";
62931af04cdSRob Herring			compatible = "arm,cortex-a72";
6304f357f94SKefeng Wang			reg = <0x50200>;
6314f357f94SKefeng Wang			enable-method = "psci";
6324f357f94SKefeng Wang			next-level-cache = <&cluster10_l2>;
6334f357f94SKefeng Wang			numa-node-id = <2>;
6344f357f94SKefeng Wang		};
6354f357f94SKefeng Wang
6364f357f94SKefeng Wang		cpu41: cpu@50201 {
6374f357f94SKefeng Wang			device_type = "cpu";
63831af04cdSRob Herring			compatible = "arm,cortex-a72";
6394f357f94SKefeng Wang			reg = <0x50201>;
6404f357f94SKefeng Wang			enable-method = "psci";
6414f357f94SKefeng Wang			next-level-cache = <&cluster10_l2>;
6424f357f94SKefeng Wang			numa-node-id = <2>;
6434f357f94SKefeng Wang		};
6444f357f94SKefeng Wang
6454f357f94SKefeng Wang		cpu42: cpu@50202 {
6464f357f94SKefeng Wang			device_type = "cpu";
64731af04cdSRob Herring			compatible = "arm,cortex-a72";
6484f357f94SKefeng Wang			reg = <0x50202>;
6494f357f94SKefeng Wang			enable-method = "psci";
6504f357f94SKefeng Wang			next-level-cache = <&cluster10_l2>;
6514f357f94SKefeng Wang			numa-node-id = <2>;
6524f357f94SKefeng Wang		};
6534f357f94SKefeng Wang
6544f357f94SKefeng Wang		cpu43: cpu@50203 {
6554f357f94SKefeng Wang			device_type = "cpu";
65631af04cdSRob Herring			compatible = "arm,cortex-a72";
6574f357f94SKefeng Wang			reg = <0x50203>;
6584f357f94SKefeng Wang			enable-method = "psci";
6594f357f94SKefeng Wang			next-level-cache = <&cluster10_l2>;
6604f357f94SKefeng Wang			numa-node-id = <2>;
6614f357f94SKefeng Wang		};
6624f357f94SKefeng Wang
6634f357f94SKefeng Wang		cpu44: cpu@50300 {
6644f357f94SKefeng Wang			device_type = "cpu";
66531af04cdSRob Herring			compatible = "arm,cortex-a72";
6664f357f94SKefeng Wang			reg = <0x50300>;
6674f357f94SKefeng Wang			enable-method = "psci";
6684f357f94SKefeng Wang			next-level-cache = <&cluster11_l2>;
6694f357f94SKefeng Wang			numa-node-id = <2>;
6704f357f94SKefeng Wang		};
6714f357f94SKefeng Wang
6724f357f94SKefeng Wang		cpu45: cpu@50301 {
6734f357f94SKefeng Wang			device_type = "cpu";
67431af04cdSRob Herring			compatible = "arm,cortex-a72";
6754f357f94SKefeng Wang			reg = <0x50301>;
6764f357f94SKefeng Wang			enable-method = "psci";
6774f357f94SKefeng Wang			next-level-cache = <&cluster11_l2>;
6784f357f94SKefeng Wang			numa-node-id = <2>;
6794f357f94SKefeng Wang		};
6804f357f94SKefeng Wang
6814f357f94SKefeng Wang		cpu46: cpu@50302 {
6824f357f94SKefeng Wang			device_type = "cpu";
68331af04cdSRob Herring			compatible = "arm,cortex-a72";
6844f357f94SKefeng Wang			reg = <0x50302>;
6854f357f94SKefeng Wang			enable-method = "psci";
6864f357f94SKefeng Wang			next-level-cache = <&cluster11_l2>;
6874f357f94SKefeng Wang			numa-node-id = <2>;
6884f357f94SKefeng Wang		};
6894f357f94SKefeng Wang
6904f357f94SKefeng Wang		cpu47: cpu@50303 {
6914f357f94SKefeng Wang			device_type = "cpu";
69231af04cdSRob Herring			compatible = "arm,cortex-a72";
6934f357f94SKefeng Wang			reg = <0x50303>;
6944f357f94SKefeng Wang			enable-method = "psci";
6954f357f94SKefeng Wang			next-level-cache = <&cluster11_l2>;
6964f357f94SKefeng Wang			numa-node-id = <2>;
6974f357f94SKefeng Wang		};
6984f357f94SKefeng Wang
6994f357f94SKefeng Wang		cpu48: cpu@70000 {
7004f357f94SKefeng Wang			device_type = "cpu";
70131af04cdSRob Herring			compatible = "arm,cortex-a72";
7024f357f94SKefeng Wang			reg = <0x70000>;
7034f357f94SKefeng Wang			enable-method = "psci";
7044f357f94SKefeng Wang			next-level-cache = <&cluster12_l2>;
7054f357f94SKefeng Wang			numa-node-id = <3>;
7064f357f94SKefeng Wang		};
7074f357f94SKefeng Wang
7084f357f94SKefeng Wang		cpu49: cpu@70001 {
7094f357f94SKefeng Wang			device_type = "cpu";
71031af04cdSRob Herring			compatible = "arm,cortex-a72";
7114f357f94SKefeng Wang			reg = <0x70001>;
7124f357f94SKefeng Wang			enable-method = "psci";
7134f357f94SKefeng Wang			next-level-cache = <&cluster12_l2>;
7144f357f94SKefeng Wang			numa-node-id = <3>;
7154f357f94SKefeng Wang		};
7164f357f94SKefeng Wang
7174f357f94SKefeng Wang		cpu50: cpu@70002 {
7184f357f94SKefeng Wang			device_type = "cpu";
71931af04cdSRob Herring			compatible = "arm,cortex-a72";
7204f357f94SKefeng Wang			reg = <0x70002>;
7214f357f94SKefeng Wang			enable-method = "psci";
7224f357f94SKefeng Wang			next-level-cache = <&cluster12_l2>;
7234f357f94SKefeng Wang			numa-node-id = <3>;
7244f357f94SKefeng Wang		};
7254f357f94SKefeng Wang
7264f357f94SKefeng Wang		cpu51: cpu@70003 {
7274f357f94SKefeng Wang			device_type = "cpu";
72831af04cdSRob Herring			compatible = "arm,cortex-a72";
7294f357f94SKefeng Wang			reg = <0x70003>;
7304f357f94SKefeng Wang			enable-method = "psci";
7314f357f94SKefeng Wang			next-level-cache = <&cluster12_l2>;
7324f357f94SKefeng Wang			numa-node-id = <3>;
7334f357f94SKefeng Wang		};
7344f357f94SKefeng Wang
7354f357f94SKefeng Wang		cpu52: cpu@70100 {
7364f357f94SKefeng Wang			device_type = "cpu";
73731af04cdSRob Herring			compatible = "arm,cortex-a72";
7384f357f94SKefeng Wang			reg = <0x70100>;
7394f357f94SKefeng Wang			enable-method = "psci";
7404f357f94SKefeng Wang			next-level-cache = <&cluster13_l2>;
7414f357f94SKefeng Wang			numa-node-id = <3>;
7424f357f94SKefeng Wang		};
7434f357f94SKefeng Wang
7444f357f94SKefeng Wang		cpu53: cpu@70101 {
7454f357f94SKefeng Wang			device_type = "cpu";
74631af04cdSRob Herring			compatible = "arm,cortex-a72";
7474f357f94SKefeng Wang			reg = <0x70101>;
7484f357f94SKefeng Wang			enable-method = "psci";
7494f357f94SKefeng Wang			next-level-cache = <&cluster13_l2>;
7504f357f94SKefeng Wang			numa-node-id = <3>;
7514f357f94SKefeng Wang		};
7524f357f94SKefeng Wang
7534f357f94SKefeng Wang		cpu54: cpu@70102 {
7544f357f94SKefeng Wang			device_type = "cpu";
75531af04cdSRob Herring			compatible = "arm,cortex-a72";
7564f357f94SKefeng Wang			reg = <0x70102>;
7574f357f94SKefeng Wang			enable-method = "psci";
7584f357f94SKefeng Wang			next-level-cache = <&cluster13_l2>;
7594f357f94SKefeng Wang			numa-node-id = <3>;
7604f357f94SKefeng Wang		};
7614f357f94SKefeng Wang
7624f357f94SKefeng Wang		cpu55: cpu@70103 {
7634f357f94SKefeng Wang			device_type = "cpu";
76431af04cdSRob Herring			compatible = "arm,cortex-a72";
7654f357f94SKefeng Wang			reg = <0x70103>;
7664f357f94SKefeng Wang			enable-method = "psci";
7674f357f94SKefeng Wang			next-level-cache = <&cluster13_l2>;
7684f357f94SKefeng Wang			numa-node-id = <3>;
7694f357f94SKefeng Wang		};
7704f357f94SKefeng Wang
7714f357f94SKefeng Wang		cpu56: cpu@70200 {
7724f357f94SKefeng Wang			device_type = "cpu";
77331af04cdSRob Herring			compatible = "arm,cortex-a72";
7744f357f94SKefeng Wang			reg = <0x70200>;
7754f357f94SKefeng Wang			enable-method = "psci";
7764f357f94SKefeng Wang			next-level-cache = <&cluster14_l2>;
7774f357f94SKefeng Wang			numa-node-id = <3>;
7784f357f94SKefeng Wang		};
7794f357f94SKefeng Wang
7804f357f94SKefeng Wang		cpu57: cpu@70201 {
7814f357f94SKefeng Wang			device_type = "cpu";
78231af04cdSRob Herring			compatible = "arm,cortex-a72";
7834f357f94SKefeng Wang			reg = <0x70201>;
7844f357f94SKefeng Wang			enable-method = "psci";
7854f357f94SKefeng Wang			next-level-cache = <&cluster14_l2>;
7864f357f94SKefeng Wang			numa-node-id = <3>;
7874f357f94SKefeng Wang		};
7884f357f94SKefeng Wang
7894f357f94SKefeng Wang		cpu58: cpu@70202 {
7904f357f94SKefeng Wang			device_type = "cpu";
79131af04cdSRob Herring			compatible = "arm,cortex-a72";
7924f357f94SKefeng Wang			reg = <0x70202>;
7934f357f94SKefeng Wang			enable-method = "psci";
7944f357f94SKefeng Wang			next-level-cache = <&cluster14_l2>;
7954f357f94SKefeng Wang			numa-node-id = <3>;
7964f357f94SKefeng Wang		};
7974f357f94SKefeng Wang
7984f357f94SKefeng Wang		cpu59: cpu@70203 {
7994f357f94SKefeng Wang			device_type = "cpu";
80031af04cdSRob Herring			compatible = "arm,cortex-a72";
8014f357f94SKefeng Wang			reg = <0x70203>;
8024f357f94SKefeng Wang			enable-method = "psci";
8034f357f94SKefeng Wang			next-level-cache = <&cluster14_l2>;
8044f357f94SKefeng Wang			numa-node-id = <3>;
8054f357f94SKefeng Wang		};
8064f357f94SKefeng Wang
8074f357f94SKefeng Wang		cpu60: cpu@70300 {
8084f357f94SKefeng Wang			device_type = "cpu";
80931af04cdSRob Herring			compatible = "arm,cortex-a72";
8104f357f94SKefeng Wang			reg = <0x70300>;
8114f357f94SKefeng Wang			enable-method = "psci";
8124f357f94SKefeng Wang			next-level-cache = <&cluster15_l2>;
8134f357f94SKefeng Wang			numa-node-id = <3>;
8144f357f94SKefeng Wang		};
8154f357f94SKefeng Wang
8164f357f94SKefeng Wang		cpu61: cpu@70301 {
8174f357f94SKefeng Wang			device_type = "cpu";
81831af04cdSRob Herring			compatible = "arm,cortex-a72";
8194f357f94SKefeng Wang			reg = <0x70301>;
8204f357f94SKefeng Wang			enable-method = "psci";
8214f357f94SKefeng Wang			next-level-cache = <&cluster15_l2>;
8224f357f94SKefeng Wang			numa-node-id = <3>;
8234f357f94SKefeng Wang		};
8244f357f94SKefeng Wang
8254f357f94SKefeng Wang		cpu62: cpu@70302 {
8264f357f94SKefeng Wang			device_type = "cpu";
82731af04cdSRob Herring			compatible = "arm,cortex-a72";
8284f357f94SKefeng Wang			reg = <0x70302>;
8294f357f94SKefeng Wang			enable-method = "psci";
8304f357f94SKefeng Wang			next-level-cache = <&cluster15_l2>;
8314f357f94SKefeng Wang			numa-node-id = <3>;
8324f357f94SKefeng Wang		};
8334f357f94SKefeng Wang
8344f357f94SKefeng Wang		cpu63: cpu@70303 {
8354f357f94SKefeng Wang			device_type = "cpu";
83631af04cdSRob Herring			compatible = "arm,cortex-a72";
8374f357f94SKefeng Wang			reg = <0x70303>;
8384f357f94SKefeng Wang			enable-method = "psci";
8394f357f94SKefeng Wang			next-level-cache = <&cluster15_l2>;
8404f357f94SKefeng Wang			numa-node-id = <3>;
8414f357f94SKefeng Wang		};
8424f357f94SKefeng Wang
8434f357f94SKefeng Wang		cluster0_l2: l2-cache0 {
8444f357f94SKefeng Wang			compatible = "cache";
8454f357f94SKefeng Wang		};
8464f357f94SKefeng Wang
8474f357f94SKefeng Wang		cluster1_l2: l2-cache1 {
8484f357f94SKefeng Wang			compatible = "cache";
8494f357f94SKefeng Wang		};
8504f357f94SKefeng Wang
8514f357f94SKefeng Wang		cluster2_l2: l2-cache2 {
8524f357f94SKefeng Wang			compatible = "cache";
8534f357f94SKefeng Wang		};
8544f357f94SKefeng Wang
8554f357f94SKefeng Wang		cluster3_l2: l2-cache3 {
8564f357f94SKefeng Wang			compatible = "cache";
8574f357f94SKefeng Wang		};
8584f357f94SKefeng Wang
8594f357f94SKefeng Wang		cluster4_l2: l2-cache4 {
8604f357f94SKefeng Wang			compatible = "cache";
8614f357f94SKefeng Wang		};
8624f357f94SKefeng Wang
8634f357f94SKefeng Wang		cluster5_l2: l2-cache5 {
8644f357f94SKefeng Wang			compatible = "cache";
8654f357f94SKefeng Wang		};
8664f357f94SKefeng Wang
8674f357f94SKefeng Wang		cluster6_l2: l2-cache6 {
8684f357f94SKefeng Wang			compatible = "cache";
8694f357f94SKefeng Wang		};
8704f357f94SKefeng Wang
8714f357f94SKefeng Wang		cluster7_l2: l2-cache7 {
8724f357f94SKefeng Wang			compatible = "cache";
8734f357f94SKefeng Wang		};
8744f357f94SKefeng Wang
8754f357f94SKefeng Wang		cluster8_l2: l2-cache8 {
8764f357f94SKefeng Wang			compatible = "cache";
8774f357f94SKefeng Wang		};
8784f357f94SKefeng Wang
8794f357f94SKefeng Wang		cluster9_l2: l2-cache9 {
8804f357f94SKefeng Wang			compatible = "cache";
8814f357f94SKefeng Wang		};
8824f357f94SKefeng Wang
8834f357f94SKefeng Wang		cluster10_l2: l2-cache10 {
8844f357f94SKefeng Wang			compatible = "cache";
8854f357f94SKefeng Wang		};
8864f357f94SKefeng Wang
8874f357f94SKefeng Wang		cluster11_l2: l2-cache11 {
8884f357f94SKefeng Wang			compatible = "cache";
8894f357f94SKefeng Wang		};
8904f357f94SKefeng Wang
8914f357f94SKefeng Wang		cluster12_l2: l2-cache12 {
8924f357f94SKefeng Wang			compatible = "cache";
8934f357f94SKefeng Wang		};
8944f357f94SKefeng Wang
8954f357f94SKefeng Wang		cluster13_l2: l2-cache13 {
8964f357f94SKefeng Wang			compatible = "cache";
8974f357f94SKefeng Wang		};
8984f357f94SKefeng Wang
8994f357f94SKefeng Wang		cluster14_l2: l2-cache14 {
9004f357f94SKefeng Wang			compatible = "cache";
9014f357f94SKefeng Wang		};
9024f357f94SKefeng Wang
9034f357f94SKefeng Wang		cluster15_l2: l2-cache15 {
9044f357f94SKefeng Wang			compatible = "cache";
9054f357f94SKefeng Wang		};
9064f357f94SKefeng Wang	};
9074f357f94SKefeng Wang
9084f357f94SKefeng Wang	gic: interrupt-controller@4d000000 {
9094f357f94SKefeng Wang		compatible = "arm,gic-v3";
9104f357f94SKefeng Wang		#interrupt-cells = <3>;
9114f357f94SKefeng Wang		#address-cells = <2>;
9124f357f94SKefeng Wang		#size-cells = <2>;
9134f357f94SKefeng Wang		ranges;
9144f357f94SKefeng Wang		interrupt-controller;
9154f357f94SKefeng Wang		#redistributor-regions = <4>;
9164f357f94SKefeng Wang		redistributor-stride = <0x0 0x40000>;
9174f357f94SKefeng Wang		reg = <0x0 0x4d000000 0x0 0x10000>,	/* GICD */
9184f357f94SKefeng Wang		      <0x0 0x4d100000 0x0 0x400000>,	/* p0 GICR node 0 */
9194f357f94SKefeng Wang		      <0x0 0x6d100000 0x0 0x400000>,	/* p0 GICR node 1 */
9204f357f94SKefeng Wang		      <0x400 0x4d100000 0x0 0x400000>,	/* p1 GICR node 2 */
9214f357f94SKefeng Wang		      <0x400 0x6d100000 0x0 0x400000>,	/* p1 GICR node 3 */
9224f357f94SKefeng Wang		      <0x0 0xfe000000 0x0 0x10000>,	/* GICC */
9234f357f94SKefeng Wang		      <0x0 0xfe010000 0x0 0x10000>,	/* GICH */
9244f357f94SKefeng Wang		      <0x0 0xfe020000 0x0 0x10000>;	/* GICV */
9254f357f94SKefeng Wang		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
9264f357f94SKefeng Wang
927c25b8464SZhen Lei		p0_its_peri_a: msi-controller@4c000000 {
9284f357f94SKefeng Wang			compatible = "arm,gic-v3-its";
9294f357f94SKefeng Wang			msi-controller;
9304f357f94SKefeng Wang			#msi-cells = <1>;
9314f357f94SKefeng Wang			reg = <0x0 0x4c000000 0x0 0x40000>;
9324f357f94SKefeng Wang		};
9334f357f94SKefeng Wang
934c25b8464SZhen Lei		p0_its_peri_b: msi-controller@6c000000 {
9354f357f94SKefeng Wang			compatible = "arm,gic-v3-its";
9364f357f94SKefeng Wang			msi-controller;
9374f357f94SKefeng Wang			#msi-cells = <1>;
9384f357f94SKefeng Wang			reg = <0x0 0x6c000000 0x0 0x40000>;
9394f357f94SKefeng Wang		};
9404f357f94SKefeng Wang
941c25b8464SZhen Lei		p0_its_dsa_a: msi-controller@c6000000 {
9424f357f94SKefeng Wang			compatible = "arm,gic-v3-its";
9434f357f94SKefeng Wang			msi-controller;
9444f357f94SKefeng Wang			#msi-cells = <1>;
9454f357f94SKefeng Wang			reg = <0x0 0xc6000000 0x0 0x40000>;
9464f357f94SKefeng Wang		};
9474f357f94SKefeng Wang
948c25b8464SZhen Lei		p0_its_dsa_b: msi-controller@8c6000000 {
9494f357f94SKefeng Wang			compatible = "arm,gic-v3-its";
9504f357f94SKefeng Wang			msi-controller;
9514f357f94SKefeng Wang			#msi-cells = <1>;
9524f357f94SKefeng Wang			reg = <0x8 0xc6000000 0x0 0x40000>;
9534f357f94SKefeng Wang		};
9544f357f94SKefeng Wang
955c25b8464SZhen Lei		p1_its_peri_a: msi-controller@4004c000000 {
9564f357f94SKefeng Wang			compatible = "arm,gic-v3-its";
9574f357f94SKefeng Wang			msi-controller;
9584f357f94SKefeng Wang			#msi-cells = <1>;
9594f357f94SKefeng Wang			reg = <0x400 0x4c000000 0x0 0x40000>;
9604f357f94SKefeng Wang		};
9614f357f94SKefeng Wang
962c25b8464SZhen Lei		p1_its_peri_b: msi-controller@4006c000000 {
9634f357f94SKefeng Wang			compatible = "arm,gic-v3-its";
9644f357f94SKefeng Wang			msi-controller;
9654f357f94SKefeng Wang			#msi-cells = <1>;
9664f357f94SKefeng Wang			reg = <0x400 0x6c000000 0x0 0x40000>;
9674f357f94SKefeng Wang		};
9684f357f94SKefeng Wang
969c25b8464SZhen Lei		p1_its_dsa_a: msi-controller@400c6000000 {
9704f357f94SKefeng Wang			compatible = "arm,gic-v3-its";
9714f357f94SKefeng Wang			msi-controller;
9724f357f94SKefeng Wang			#msi-cells = <1>;
9734f357f94SKefeng Wang			reg = <0x400 0xc6000000 0x0 0x40000>;
9744f357f94SKefeng Wang		};
9754f357f94SKefeng Wang
976c25b8464SZhen Lei		p1_its_dsa_b: msi-controller@408c6000000 {
9774f357f94SKefeng Wang			compatible = "arm,gic-v3-its";
9784f357f94SKefeng Wang			msi-controller;
9794f357f94SKefeng Wang			#msi-cells = <1>;
9804f357f94SKefeng Wang			reg = <0x408 0xc6000000 0x0 0x40000>;
9814f357f94SKefeng Wang		};
9824f357f94SKefeng Wang	};
9834f357f94SKefeng Wang
9844f357f94SKefeng Wang	timer {
9854f357f94SKefeng Wang		compatible = "arm,armv8-timer";
9864f357f94SKefeng Wang		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
9874f357f94SKefeng Wang			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
9884f357f94SKefeng Wang			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
9894f357f94SKefeng Wang			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
9904f357f94SKefeng Wang	};
9914f357f94SKefeng Wang
9924f357f94SKefeng Wang	pmu {
9934f357f94SKefeng Wang		compatible = "arm,cortex-a72-pmu";
9944f357f94SKefeng Wang		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
9954f357f94SKefeng Wang	};
9964f357f94SKefeng Wang
9974f357f94SKefeng Wang	p0_mbigen_peri_b: interrupt-controller@60080000 {
9984f357f94SKefeng Wang		compatible = "hisilicon,mbigen-v2";
9994f357f94SKefeng Wang		reg = <0x0 0x60080000 0x0 0x10000>;
10004f357f94SKefeng Wang
10014f357f94SKefeng Wang		mbigen_uart: uart_intc {
10024f357f94SKefeng Wang			msi-parent = <&p0_its_peri_b 0x120c7>;
10034f357f94SKefeng Wang			interrupt-controller;
10044f357f94SKefeng Wang			#interrupt-cells = <2>;
10054f357f94SKefeng Wang			num-pins = <1>;
10064f357f94SKefeng Wang		};
10074f357f94SKefeng Wang	};
10084f357f94SKefeng Wang
10094f357f94SKefeng Wang	p0_mbigen_pcie_a: interrupt-controller@a0080000 {
10104f357f94SKefeng Wang		compatible = "hisilicon,mbigen-v2";
10114f357f94SKefeng Wang		reg = <0x0 0xa0080000 0x0 0x10000>;
10124f357f94SKefeng Wang
1013bbeca45fSWei Xu		mbigen_pcie2_a: intc_pcie2_a {
1014bbeca45fSWei Xu			msi-parent = <&p0_its_dsa_a 0x40087>;
1015bbeca45fSWei Xu			interrupt-controller;
1016bbeca45fSWei Xu			#interrupt-cells = <2>;
1017bbeca45fSWei Xu			num-pins = <10>;
1018bbeca45fSWei Xu		};
1019bbeca45fSWei Xu
1020bbeca45fSWei Xu		mbigen_sas1: intc_sas1 {
1021bbeca45fSWei Xu			msi-parent = <&p0_its_dsa_a 0x40000>;
1022bbeca45fSWei Xu			interrupt-controller;
1023bbeca45fSWei Xu			#interrupt-cells = <2>;
1024bbeca45fSWei Xu			num-pins = <128>;
1025bbeca45fSWei Xu		};
1026bbeca45fSWei Xu
1027bbeca45fSWei Xu		mbigen_sas2: intc_sas2 {
1028bbeca45fSWei Xu			msi-parent = <&p0_its_dsa_a 0x40040>;
1029bbeca45fSWei Xu			interrupt-controller;
1030bbeca45fSWei Xu			#interrupt-cells = <2>;
1031bbeca45fSWei Xu			num-pins = <128>;
1032bbeca45fSWei Xu		};
1033bbeca45fSWei Xu
1034bbeca45fSWei Xu		mbigen_smmu_pcie: intc_smmu_pcie {
1035bbeca45fSWei Xu			msi-parent = <&p0_its_dsa_a 0x40b0c>;
1036bbeca45fSWei Xu			interrupt-controller;
1037bbeca45fSWei Xu			#interrupt-cells = <2>;
1038bbeca45fSWei Xu			num-pins = <3>;
1039bbeca45fSWei Xu		};
1040bbeca45fSWei Xu
10414f357f94SKefeng Wang		mbigen_usb: intc_usb {
10424f357f94SKefeng Wang			msi-parent = <&p0_its_dsa_a 0x40080>;
10434f357f94SKefeng Wang			interrupt-controller;
10444f357f94SKefeng Wang			#interrupt-cells = <2>;
10454f357f94SKefeng Wang			num-pins = <2>;
10464f357f94SKefeng Wang		};
10474f357f94SKefeng Wang	};
1048e4a1f785SJonathan Cameron	p0_mbigen_alg_a:interrupt-controller@d0080000 {
1049e4a1f785SJonathan Cameron		compatible = "hisilicon,mbigen-v2";
1050e4a1f785SJonathan Cameron		reg = <0x0 0xd0080000 0x0 0x10000>;
10514f357f94SKefeng Wang
1052e4a1f785SJonathan Cameron		p0_mbigen_sec_a: intc_sec {
1053e4a1f785SJonathan Cameron			msi-parent = <&p0_its_dsa_a 0x40400>;
1054e4a1f785SJonathan Cameron			interrupt-controller;
1055e4a1f785SJonathan Cameron			#interrupt-cells = <2>;
1056e4a1f785SJonathan Cameron			num-pins = <33>;
1057e4a1f785SJonathan Cameron		};
1058e4a1f785SJonathan Cameron		p0_mbigen_smmu_alg_a: intc_smmu_alg {
1059e4a1f785SJonathan Cameron			msi-parent = <&p0_its_dsa_a 0x40b1b>;
1060e4a1f785SJonathan Cameron			interrupt-controller;
1061e4a1f785SJonathan Cameron			#interrupt-cells = <2>;
1062e4a1f785SJonathan Cameron			num-pins = <3>;
1063e4a1f785SJonathan Cameron		};
1064e4a1f785SJonathan Cameron	};
1065e4a1f785SJonathan Cameron	p0_mbigen_alg_b:interrupt-controller@8,d0080000 {
1066e4a1f785SJonathan Cameron		compatible = "hisilicon,mbigen-v2";
1067e4a1f785SJonathan Cameron		reg = <0x8 0xd0080000 0x0 0x10000>;
1068e4a1f785SJonathan Cameron
1069e4a1f785SJonathan Cameron		p0_mbigen_sec_b: intc_sec {
1070e4a1f785SJonathan Cameron			msi-parent = <&p0_its_dsa_b 0x42400>;
1071e4a1f785SJonathan Cameron			interrupt-controller;
1072e4a1f785SJonathan Cameron			#interrupt-cells = <2>;
1073e4a1f785SJonathan Cameron			num-pins = <33>;
1074e4a1f785SJonathan Cameron		};
1075e4a1f785SJonathan Cameron		p0_mbigen_smmu_alg_b: intc_smmu_alg {
1076e4a1f785SJonathan Cameron			msi-parent = <&p0_its_dsa_b 0x42b1b>;
1077e4a1f785SJonathan Cameron			interrupt-controller;
1078e4a1f785SJonathan Cameron			#interrupt-cells = <2>;
1079e4a1f785SJonathan Cameron			num-pins = <3>;
1080e4a1f785SJonathan Cameron		};
1081e4a1f785SJonathan Cameron	};
1082e4a1f785SJonathan Cameron	p1_mbigen_alg_a:interrupt-controller@400,d0080000 {
1083e4a1f785SJonathan Cameron		compatible = "hisilicon,mbigen-v2";
1084e4a1f785SJonathan Cameron		reg = <0x400 0xd0080000 0x0 0x10000>;
1085e4a1f785SJonathan Cameron
1086e4a1f785SJonathan Cameron		p1_mbigen_sec_a: intc_sec {
1087e4a1f785SJonathan Cameron			msi-parent = <&p1_its_dsa_a 0x44400>;
1088e4a1f785SJonathan Cameron			interrupt-controller;
1089e4a1f785SJonathan Cameron			#interrupt-cells = <2>;
1090e4a1f785SJonathan Cameron			num-pins = <33>;
1091e4a1f785SJonathan Cameron		};
1092e4a1f785SJonathan Cameron		p1_mbigen_smmu_alg_a: intc_smmu_alg {
1093e4a1f785SJonathan Cameron			msi-parent = <&p1_its_dsa_a 0x44b1b>;
1094e4a1f785SJonathan Cameron			interrupt-controller;
1095e4a1f785SJonathan Cameron			#interrupt-cells = <2>;
1096e4a1f785SJonathan Cameron			num-pins = <3>;
1097e4a1f785SJonathan Cameron		};
1098e4a1f785SJonathan Cameron	};
1099e4a1f785SJonathan Cameron	p1_mbigen_alg_b:interrupt-controller@408,d0080000 {
1100e4a1f785SJonathan Cameron		compatible = "hisilicon,mbigen-v2";
1101e4a1f785SJonathan Cameron		reg = <0x408 0xd0080000 0x0 0x10000>;
1102e4a1f785SJonathan Cameron
1103e4a1f785SJonathan Cameron		p1_mbigen_sec_b: intc_sec {
1104e4a1f785SJonathan Cameron			msi-parent = <&p1_its_dsa_b 0x46400>;
1105e4a1f785SJonathan Cameron			interrupt-controller;
1106e4a1f785SJonathan Cameron			#interrupt-cells = <2>;
1107e4a1f785SJonathan Cameron			num-pins = <33>;
1108e4a1f785SJonathan Cameron		};
1109e4a1f785SJonathan Cameron		p1_mbigen_smmu_alg_b: intc_smmu_alg {
1110e4a1f785SJonathan Cameron			msi-parent = <&p1_its_dsa_b 0x46b1b>;
1111e4a1f785SJonathan Cameron			interrupt-controller;
1112e4a1f785SJonathan Cameron			#interrupt-cells = <2>;
1113e4a1f785SJonathan Cameron			num-pins = <3>;
1114e4a1f785SJonathan Cameron		};
1115e4a1f785SJonathan Cameron	};
1116bbeca45fSWei Xu	p0_mbigen_dsa_a: interrupt-controller@c0080000 {
1117bbeca45fSWei Xu		compatible = "hisilicon,mbigen-v2";
1118bbeca45fSWei Xu		reg = <0x0 0xc0080000 0x0 0x10000>;
1119bbeca45fSWei Xu
1120bbeca45fSWei Xu		mbigen_dsaf0: intc_dsaf0 {
1121bbeca45fSWei Xu			msi-parent = <&p0_its_dsa_a 0x40800>;
1122bbeca45fSWei Xu			interrupt-controller;
1123bbeca45fSWei Xu			#interrupt-cells = <2>;
1124bbeca45fSWei Xu			num-pins = <409>;
1125bbeca45fSWei Xu		};
1126bbeca45fSWei Xu
1127bbeca45fSWei Xu		mbigen_dsa_roce: intc-roce {
1128bbeca45fSWei Xu			msi-parent = <&p0_its_dsa_a 0x40B1E>;
1129bbeca45fSWei Xu			interrupt-controller;
1130bbeca45fSWei Xu			#interrupt-cells = <2>;
1131bbeca45fSWei Xu			num-pins = <34>;
1132bbeca45fSWei Xu		};
1133bbeca45fSWei Xu
1134bbeca45fSWei Xu		mbigen_sas0: intc-sas0 {
1135bbeca45fSWei Xu			msi-parent = <&p0_its_dsa_a 0x40900>;
1136bbeca45fSWei Xu			interrupt-controller;
1137bbeca45fSWei Xu			#interrupt-cells = <2>;
1138bbeca45fSWei Xu			num-pins = <128>;
1139bbeca45fSWei Xu		};
1140bbeca45fSWei Xu
1141bbeca45fSWei Xu		mbigen_smmu_dsa: intc_smmu_dsa {
1142bbeca45fSWei Xu			msi-parent = <&p0_its_dsa_a 0x40b20>;
1143bbeca45fSWei Xu			interrupt-controller;
1144bbeca45fSWei Xu			#interrupt-cells = <2>;
1145bbeca45fSWei Xu			num-pins = <3>;
1146bbeca45fSWei Xu		};
1147bbeca45fSWei Xu	};
1148bbeca45fSWei Xu
114917f21343SShameerali Kolothum Thodi	/**
115017f21343SShameerali Kolothum Thodi	 *  HiSilicon erratum 161010801: This describes the limitation
115117f21343SShameerali Kolothum Thodi	 *  of HiSilicon platforms hip06/hip07 to support the SMMUv3
115217f21343SShameerali Kolothum Thodi	 *  mappings for PCIe MSI transactions.
115317f21343SShameerali Kolothum Thodi	 *  PCIe controller on these platforms has to differentiate the
115417f21343SShameerali Kolothum Thodi	 *  MSI payload against other DMA payload and has to modify the
115517f21343SShameerali Kolothum Thodi	 *  MSI payload. This makes it difficult for these platforms to
115617f21343SShameerali Kolothum Thodi	 *  have a SMMU translation for MSI. In order to workaround this,
115717f21343SShameerali Kolothum Thodi	 *  ARM SMMUv3 driver requires a quirk to treat the MSI regions
115817f21343SShameerali Kolothum Thodi	 *  separately. Such a quirk is currently missing for DT based
115917f21343SShameerali Kolothum Thodi	 *  systems. Hence please make sure that the smmu pcie node on
116017f21343SShameerali Kolothum Thodi	 *  hip07 is disabled as this will break the PCIe functionality
116117f21343SShameerali Kolothum Thodi	 *  when iommu-map entry is used along with the PCIe node.
116217f21343SShameerali Kolothum Thodi	 *  Refer:https://www.spinics.net/lists/arm-kernel/msg602812.html
116317f21343SShameerali Kolothum Thodi	 */
1164d7d45d5dSZhen Lei	smmu0: iommu@a0040000 {
116517f21343SShameerali Kolothum Thodi		compatible = "arm,smmu-v3";
116617f21343SShameerali Kolothum Thodi		reg = <0x0 0xa0040000 0x0 0x20000>;
116717f21343SShameerali Kolothum Thodi		#iommu-cells = <1>;
116817f21343SShameerali Kolothum Thodi		dma-coherent;
116917f21343SShameerali Kolothum Thodi		smmu-cb-memtype = <0x0 0x1>;
117017f21343SShameerali Kolothum Thodi		hisilicon,broken-prefetch-cmd;
117117f21343SShameerali Kolothum Thodi		status = "disabled";
117217f21343SShameerali Kolothum Thodi	};
1173d7d45d5dSZhen Lei	p0_smmu_alg_a: iommu@d0040000 {
1174e4a1f785SJonathan Cameron		compatible = "arm,smmu-v3";
1175e4a1f785SJonathan Cameron		reg = <0x0 0xd0040000 0x0 0x20000>;
1176e4a1f785SJonathan Cameron		interrupt-parent = <&p0_mbigen_smmu_alg_a>;
1177e4a1f785SJonathan Cameron		interrupts = <733 1>,
1178e4a1f785SJonathan Cameron		<734 1>,
1179e4a1f785SJonathan Cameron		<735 1>;
1180e4a1f785SJonathan Cameron		interrupt-names = "eventq", "gerror", "priq";
1181e4a1f785SJonathan Cameron		#iommu-cells = <1>;
1182e4a1f785SJonathan Cameron		dma-coherent;
1183e4a1f785SJonathan Cameron		hisilicon,broken-prefetch-cmd;
1184e4a1f785SJonathan Cameron		/* smmu-cb-memtype = <0x0 0x1>;*/
1185e4a1f785SJonathan Cameron	};
1186d7d45d5dSZhen Lei	p0_smmu_alg_b: iommu@8d0040000 {
1187e4a1f785SJonathan Cameron		compatible = "arm,smmu-v3";
1188e4a1f785SJonathan Cameron		reg = <0x8 0xd0040000 0x0 0x20000>;
1189e4a1f785SJonathan Cameron		interrupt-parent = <&p0_mbigen_smmu_alg_b>;
1190e4a1f785SJonathan Cameron		interrupts = <733 1>,
1191e4a1f785SJonathan Cameron		<734 1>,
1192e4a1f785SJonathan Cameron		<735 1>;
1193e4a1f785SJonathan Cameron		interrupt-names = "eventq", "gerror", "priq";
1194e4a1f785SJonathan Cameron		#iommu-cells = <1>;
1195e4a1f785SJonathan Cameron		dma-coherent;
1196e4a1f785SJonathan Cameron		hisilicon,broken-prefetch-cmd;
1197e4a1f785SJonathan Cameron		/* smmu-cb-memtype = <0x0 0x1>;*/
1198e4a1f785SJonathan Cameron	};
1199d7d45d5dSZhen Lei	p1_smmu_alg_a: iommu@400d0040000 {
1200e4a1f785SJonathan Cameron		compatible = "arm,smmu-v3";
1201e4a1f785SJonathan Cameron		reg = <0x400 0xd0040000 0x0 0x20000>;
1202e4a1f785SJonathan Cameron		interrupt-parent = <&p1_mbigen_smmu_alg_a>;
1203e4a1f785SJonathan Cameron		interrupts = <733 1>,
1204e4a1f785SJonathan Cameron		<734 1>,
1205e4a1f785SJonathan Cameron		<735 1>;
1206e4a1f785SJonathan Cameron		interrupt-names = "eventq", "gerror", "priq";
1207e4a1f785SJonathan Cameron		#iommu-cells = <1>;
1208e4a1f785SJonathan Cameron		dma-coherent;
1209e4a1f785SJonathan Cameron		hisilicon,broken-prefetch-cmd;
1210e4a1f785SJonathan Cameron		/* smmu-cb-memtype = <0x0 0x1>;*/
1211e4a1f785SJonathan Cameron	};
1212d7d45d5dSZhen Lei	p1_smmu_alg_b: iommu@408d0040000 {
1213e4a1f785SJonathan Cameron		compatible = "arm,smmu-v3";
1214e4a1f785SJonathan Cameron		reg = <0x408 0xd0040000 0x0 0x20000>;
1215e4a1f785SJonathan Cameron		interrupt-parent = <&p1_mbigen_smmu_alg_b>;
1216e4a1f785SJonathan Cameron		interrupts = <733 1>,
1217e4a1f785SJonathan Cameron		<734 1>,
1218e4a1f785SJonathan Cameron		<735 1>;
1219e4a1f785SJonathan Cameron		interrupt-names = "eventq", "gerror", "priq";
1220e4a1f785SJonathan Cameron		#iommu-cells = <1>;
1221e4a1f785SJonathan Cameron		dma-coherent;
1222e4a1f785SJonathan Cameron		hisilicon,broken-prefetch-cmd;
1223e4a1f785SJonathan Cameron		/* smmu-cb-memtype = <0x0 0x1>;*/
1224e4a1f785SJonathan Cameron	};
122517f21343SShameerali Kolothum Thodi
12264f357f94SKefeng Wang	soc {
12274f357f94SKefeng Wang		compatible = "simple-bus";
12284f357f94SKefeng Wang		#address-cells = <2>;
12294f357f94SKefeng Wang		#size-cells = <2>;
12304f357f94SKefeng Wang		ranges;
12314f357f94SKefeng Wang
1232d2a1606cSJohn Garry		isa@a01b0000 {
1233d2a1606cSJohn Garry			compatible = "hisilicon,hip07-lpc";
1234d2a1606cSJohn Garry			#size-cells = <1>;
1235d2a1606cSJohn Garry			#address-cells = <2>;
1236d2a1606cSJohn Garry			reg = <0x0 0xa01b0000 0x0 0x1000>;
1237d2a1606cSJohn Garry
1238d2a1606cSJohn Garry			ipmi0: bt@e4 {
1239d2a1606cSJohn Garry				compatible = "ipmi-bt";
1240d2a1606cSJohn Garry				device_type = "ipmi";
1241d2a1606cSJohn Garry				reg = <0x01 0xe4 0x04>;
1242d2a1606cSJohn Garry				status = "disabled";
1243d2a1606cSJohn Garry			};
1244d2a1606cSJohn Garry		};
1245d2a1606cSJohn Garry
12464f357f94SKefeng Wang		uart0: uart@602b0000 {
12474f357f94SKefeng Wang			compatible = "arm,sbsa-uart";
12484f357f94SKefeng Wang			reg = <0x0 0x602b0000 0x0 0x1000>;
12494f357f94SKefeng Wang			interrupt-parent = <&mbigen_uart>;
12504f357f94SKefeng Wang			interrupts = <807 4>;
12514f357f94SKefeng Wang			current-speed = <115200>;
12524f357f94SKefeng Wang			reg-io-width = <4>;
12534f357f94SKefeng Wang			status = "disabled";
12544f357f94SKefeng Wang		};
12554f357f94SKefeng Wang
12564d2b9b98SZhen Lei		usb_ohci: usb@a7030000 {
12574f357f94SKefeng Wang			compatible = "generic-ohci";
12584f357f94SKefeng Wang			reg = <0x0 0xa7030000 0x0 0x10000>;
12594f357f94SKefeng Wang			interrupt-parent = <&mbigen_usb>;
12604f357f94SKefeng Wang			interrupts = <640 4>;
12614f357f94SKefeng Wang			dma-coherent;
12624f357f94SKefeng Wang			status = "disabled";
12634f357f94SKefeng Wang		};
12644f357f94SKefeng Wang
12654d2b9b98SZhen Lei		usb_ehci: usb@a7020000 {
12664f357f94SKefeng Wang			compatible = "generic-ehci";
12674f357f94SKefeng Wang			reg = <0x0 0xa7020000 0x0 0x10000>;
12684f357f94SKefeng Wang			interrupt-parent = <&mbigen_usb>;
12694f357f94SKefeng Wang			interrupts = <641 4>;
12704f357f94SKefeng Wang			dma-coherent;
12714f357f94SKefeng Wang			status = "disabled";
12724f357f94SKefeng Wang		};
127338de5b56SWei Xu
127438de5b56SWei Xu		peri_c_subctrl: sub_ctrl_c@60000000 {
127538de5b56SWei Xu			compatible = "hisilicon,peri-subctrl","syscon";
127638de5b56SWei Xu			reg = <0 0x60000000 0x0 0x10000>;
127738de5b56SWei Xu		};
127838de5b56SWei Xu
127938de5b56SWei Xu		dsa_subctrl: dsa_subctrl@c0000000 {
128038de5b56SWei Xu			compatible = "hisilicon,dsa-subctrl", "syscon";
128138de5b56SWei Xu			reg = <0x0 0xc0000000 0x0 0x10000>;
128238de5b56SWei Xu		};
128338de5b56SWei Xu
128445cc842dSHuazhong Tan		dsa_cpld: dsa_cpld@78000010 {
128545cc842dSHuazhong Tan			compatible = "syscon";
128645cc842dSHuazhong Tan			reg = <0x0 0x78000010 0x0 0x100>;
128745cc842dSHuazhong Tan			reg-io-width = <2>;
128845cc842dSHuazhong Tan		};
128945cc842dSHuazhong Tan
129086d67897SWei Xu		pcie_subctl: pcie_subctl@a0000000 {
129186d67897SWei Xu			compatible = "hisilicon,pcie-sas-subctrl", "syscon";
129286d67897SWei Xu			reg = <0x0 0xa0000000 0x0 0x10000>;
129386d67897SWei Xu		};
129486d67897SWei Xu
129538de5b56SWei Xu		serdes_ctrl: sds_ctrl@c2200000 {
129638de5b56SWei Xu			compatible = "syscon";
129738de5b56SWei Xu			reg = <0 0xc2200000 0x0 0x80000>;
129838de5b56SWei Xu		};
129938de5b56SWei Xu
130038de5b56SWei Xu		mdio@603c0000 {
130138de5b56SWei Xu			compatible = "hisilicon,hns-mdio";
130238de5b56SWei Xu			reg = <0x0 0x603c0000 0x0 0x1000>;
130338de5b56SWei Xu			subctrl-vbase = <&peri_c_subctrl 0x338 0xa38
130438de5b56SWei Xu					 0x531c 0x5a1c>;
130538de5b56SWei Xu			#address-cells = <1>;
130638de5b56SWei Xu			#size-cells = <0>;
130738de5b56SWei Xu
130838de5b56SWei Xu			phy0: ethernet-phy@0 {
130938de5b56SWei Xu				compatible = "ethernet-phy-ieee802.3-c22";
131038de5b56SWei Xu				reg = <0>;
131138de5b56SWei Xu			};
131238de5b56SWei Xu
131338de5b56SWei Xu			phy1: ethernet-phy@1 {
131438de5b56SWei Xu				compatible = "ethernet-phy-ieee802.3-c22";
131538de5b56SWei Xu				reg = <1>;
131638de5b56SWei Xu			};
131738de5b56SWei Xu		};
131838de5b56SWei Xu
131938de5b56SWei Xu		dsaf0: dsa@c7000000 {
132038de5b56SWei Xu			#address-cells = <1>;
132138de5b56SWei Xu			#size-cells = <0>;
132238de5b56SWei Xu			compatible = "hisilicon,hns-dsaf-v2";
132338de5b56SWei Xu			mode = "6port-16rss";
132424402ce1SZhen Lei			reg = <0x0 0xc5000000 0x0 0x890000>,
132524402ce1SZhen Lei			      <0x0 0xc7000000 0x0 0x600000>;
132638de5b56SWei Xu			reg-names = "ppe-base", "dsaf-base";
132738de5b56SWei Xu			interrupt-parent = <&mbigen_dsaf0>;
132838de5b56SWei Xu			subctrl-syscon = <&dsa_subctrl>;
132938de5b56SWei Xu			reset-field-offset = <0>;
133038de5b56SWei Xu			interrupts =
133138de5b56SWei Xu			<576 1>, <577 1>, <578 1>, <579 1>, <580 1>,
133238de5b56SWei Xu			<581 1>, <582 1>, <583 1>, <584 1>, <585 1>,
133338de5b56SWei Xu			<586 1>, <587 1>, <588 1>, <589 1>, <590 1>,
133438de5b56SWei Xu			<591 1>, <592 1>, <593 1>, <594 1>, <595 1>,
133538de5b56SWei Xu			<596 1>, <597 1>, <598 1>, <599 1>, <600 1>,
133638de5b56SWei Xu			<960 1>, <961 1>, <962 1>, <963 1>, <964 1>,
133738de5b56SWei Xu			<965 1>, <966 1>, <967 1>, <968 1>, <969 1>,
133838de5b56SWei Xu			<970 1>, <971 1>, <972 1>, <973 1>, <974 1>,
133938de5b56SWei Xu			<975 1>, <976 1>, <977 1>, <978 1>, <979 1>,
134038de5b56SWei Xu			<980 1>, <981 1>, <982 1>, <983 1>, <984 1>,
134138de5b56SWei Xu			<985 1>, <986 1>, <987 1>, <988 1>, <989 1>,
134238de5b56SWei Xu			<990 1>, <991 1>, <992 1>, <993 1>, <994 1>,
134338de5b56SWei Xu			<995 1>, <996 1>, <997 1>, <998 1>, <999 1>,
134438de5b56SWei Xu			<1000 1>, <1001 1>, <1002 1>, <1003 1>, <1004 1>,
134538de5b56SWei Xu			<1005 1>, <1006 1>, <1007 1>, <1008 1>, <1009 1>,
134638de5b56SWei Xu			<1010 1>, <1011 1>, <1012 1>, <1013 1>, <1014 1>,
134738de5b56SWei Xu			<1015 1>, <1016 1>, <1017 1>, <1018 1>, <1019 1>,
134838de5b56SWei Xu			<1020 1>, <1021 1>, <1022 1>, <1023 1>, <1024 1>,
134938de5b56SWei Xu			<1025 1>, <1026 1>, <1027 1>, <1028 1>, <1029 1>,
135038de5b56SWei Xu			<1030 1>, <1031 1>, <1032 1>, <1033 1>, <1034 1>,
135138de5b56SWei Xu			<1035 1>, <1036 1>, <1037 1>, <1038 1>, <1039 1>,
135238de5b56SWei Xu			<1040 1>, <1041 1>, <1042 1>, <1043 1>, <1044 1>,
135338de5b56SWei Xu			<1045 1>, <1046 1>, <1047 1>, <1048 1>, <1049 1>,
135438de5b56SWei Xu			<1050 1>, <1051 1>, <1052 1>, <1053 1>, <1054 1>,
135538de5b56SWei Xu			<1055 1>, <1056 1>, <1057 1>, <1058 1>, <1059 1>,
135638de5b56SWei Xu			<1060 1>, <1061 1>, <1062 1>, <1063 1>, <1064 1>,
135738de5b56SWei Xu			<1065 1>, <1066 1>, <1067 1>, <1068 1>, <1069 1>,
135838de5b56SWei Xu			<1070 1>, <1071 1>, <1072 1>, <1073 1>, <1074 1>,
135938de5b56SWei Xu			<1075 1>, <1076 1>, <1077 1>, <1078 1>, <1079 1>,
136038de5b56SWei Xu			<1080 1>, <1081 1>, <1082 1>, <1083 1>, <1084 1>,
136138de5b56SWei Xu			<1085 1>, <1086 1>, <1087 1>, <1088 1>, <1089 1>,
136238de5b56SWei Xu			<1090 1>, <1091 1>, <1092 1>, <1093 1>, <1094 1>,
136338de5b56SWei Xu			<1095 1>, <1096 1>, <1097 1>, <1098 1>, <1099 1>,
136438de5b56SWei Xu			<1100 1>, <1101 1>, <1102 1>, <1103 1>, <1104 1>,
136538de5b56SWei Xu			<1105 1>, <1106 1>, <1107 1>, <1108 1>, <1109 1>,
136638de5b56SWei Xu			<1110 1>, <1111 1>, <1112 1>, <1113 1>, <1114 1>,
136738de5b56SWei Xu			<1115 1>, <1116 1>, <1117 1>, <1118 1>, <1119 1>,
136838de5b56SWei Xu			<1120 1>, <1121 1>, <1122 1>, <1123 1>, <1124 1>,
136938de5b56SWei Xu			<1125 1>, <1126 1>, <1127 1>, <1128 1>, <1129 1>,
137038de5b56SWei Xu			<1130 1>, <1131 1>, <1132 1>, <1133 1>, <1134 1>,
137138de5b56SWei Xu			<1135 1>, <1136 1>, <1137 1>, <1138 1>, <1139 1>,
137238de5b56SWei Xu			<1140 1>, <1141 1>, <1142 1>, <1143 1>, <1144 1>,
137338de5b56SWei Xu			<1145 1>, <1146 1>, <1147 1>, <1148 1>, <1149 1>,
137438de5b56SWei Xu			<1150 1>, <1151 1>, <1152 1>, <1153 1>, <1154 1>,
137538de5b56SWei Xu			<1155 1>, <1156 1>, <1157 1>, <1158 1>, <1159 1>,
137638de5b56SWei Xu			<1160 1>, <1161 1>, <1162 1>, <1163 1>, <1164 1>,
137738de5b56SWei Xu			<1165 1>, <1166 1>, <1167 1>, <1168 1>, <1169 1>,
137838de5b56SWei Xu			<1170 1>, <1171 1>, <1172 1>, <1173 1>, <1174 1>,
137938de5b56SWei Xu			<1175 1>, <1176 1>, <1177 1>, <1178 1>, <1179 1>,
138038de5b56SWei Xu			<1180 1>, <1181 1>, <1182 1>, <1183 1>, <1184 1>,
138138de5b56SWei Xu			<1185 1>, <1186 1>, <1187 1>, <1188 1>, <1189 1>,
138238de5b56SWei Xu			<1190 1>, <1191 1>, <1192 1>, <1193 1>, <1194 1>,
138338de5b56SWei Xu			<1195 1>, <1196 1>, <1197 1>, <1198 1>, <1199 1>,
138438de5b56SWei Xu			<1200 1>, <1201 1>, <1202 1>, <1203 1>, <1204 1>,
138538de5b56SWei Xu			<1205 1>, <1206 1>, <1207 1>, <1208 1>, <1209 1>,
138638de5b56SWei Xu			<1210 1>, <1211 1>, <1212 1>, <1213 1>, <1214 1>,
138738de5b56SWei Xu			<1215 1>, <1216 1>, <1217 1>, <1218 1>, <1219 1>,
138838de5b56SWei Xu			<1220 1>, <1221 1>, <1222 1>, <1223 1>, <1224 1>,
138938de5b56SWei Xu			<1225 1>, <1226 1>, <1227 1>, <1228 1>, <1229 1>,
139038de5b56SWei Xu			<1230 1>, <1231 1>, <1232 1>, <1233 1>, <1234 1>,
139138de5b56SWei Xu			<1235 1>, <1236 1>, <1237 1>, <1238 1>, <1239 1>,
139238de5b56SWei Xu			<1240 1>, <1241 1>, <1242 1>, <1243 1>, <1244 1>,
139338de5b56SWei Xu			<1245 1>, <1246 1>, <1247 1>, <1248 1>, <1249 1>,
139438de5b56SWei Xu			<1250 1>, <1251 1>, <1252 1>, <1253 1>, <1254 1>,
139538de5b56SWei Xu			<1255 1>, <1256 1>, <1257 1>, <1258 1>, <1259 1>,
139638de5b56SWei Xu			<1260 1>, <1261 1>, <1262 1>, <1263 1>, <1264 1>,
139738de5b56SWei Xu			<1265 1>, <1266 1>, <1267 1>, <1268 1>, <1269 1>,
139838de5b56SWei Xu			<1270 1>, <1271 1>, <1272 1>, <1273 1>, <1274 1>,
139938de5b56SWei Xu			<1275 1>, <1276 1>, <1277 1>, <1278 1>, <1279 1>,
140038de5b56SWei Xu			<1280 1>, <1281 1>, <1282 1>, <1283 1>, <1284 1>,
140138de5b56SWei Xu			<1285 1>, <1286 1>, <1287 1>, <1288 1>, <1289 1>,
140238de5b56SWei Xu			<1290 1>, <1291 1>, <1292 1>, <1293 1>, <1294 1>,
140338de5b56SWei Xu			<1295 1>, <1296 1>, <1297 1>, <1298 1>, <1299 1>,
140438de5b56SWei Xu			<1300 1>, <1301 1>, <1302 1>, <1303 1>, <1304 1>,
140538de5b56SWei Xu			<1305 1>, <1306 1>, <1307 1>, <1308 1>, <1309 1>,
140638de5b56SWei Xu			<1310 1>, <1311 1>, <1312 1>, <1313 1>, <1314 1>,
140738de5b56SWei Xu			<1315 1>, <1316 1>, <1317 1>, <1318 1>, <1319 1>,
140838de5b56SWei Xu			<1320 1>, <1321 1>, <1322 1>, <1323 1>, <1324 1>,
140938de5b56SWei Xu			<1325 1>, <1326 1>, <1327 1>, <1328 1>, <1329 1>,
141038de5b56SWei Xu			<1330 1>, <1331 1>, <1332 1>, <1333 1>, <1334 1>,
141138de5b56SWei Xu			<1335 1>, <1336 1>, <1337 1>, <1338 1>, <1339 1>,
141238de5b56SWei Xu			<1340 1>, <1341 1>, <1342 1>, <1343 1>;
141338de5b56SWei Xu
141438de5b56SWei Xu			desc-num = <0x400>;
141538de5b56SWei Xu			buf-size = <0x1000>;
141638de5b56SWei Xu			dma-coherent;
141738de5b56SWei Xu
141838de5b56SWei Xu			port@0 {
141938de5b56SWei Xu				reg = <0>;
142038de5b56SWei Xu				serdes-syscon = <&serdes_ctrl>;
142145cc842dSHuazhong Tan				cpld-syscon = <&dsa_cpld 0x0>;
142238de5b56SWei Xu				port-rst-offset = <0>;
142338de5b56SWei Xu				port-mode-offset = <0>;
142438de5b56SWei Xu				mc-mac-mask = [ff f0 00 00 00 00];
142538de5b56SWei Xu				media-type = "fiber";
142638de5b56SWei Xu			};
142738de5b56SWei Xu
142838de5b56SWei Xu			port@1 {
142938de5b56SWei Xu				reg = <1>;
143038de5b56SWei Xu				serdes-syscon= <&serdes_ctrl>;
143145cc842dSHuazhong Tan				cpld-syscon = <&dsa_cpld 0x4>;
143238de5b56SWei Xu				port-rst-offset = <1>;
143338de5b56SWei Xu				port-mode-offset = <1>;
143438de5b56SWei Xu				mc-mac-mask = [ff f0 00 00 00 00];
143538de5b56SWei Xu				media-type = "fiber";
143638de5b56SWei Xu			};
143738de5b56SWei Xu
143838de5b56SWei Xu			port@4 {
143938de5b56SWei Xu				reg = <4>;
144038de5b56SWei Xu				phy-handle = <&phy0>;
144138de5b56SWei Xu				serdes-syscon= <&serdes_ctrl>;
144238de5b56SWei Xu				port-rst-offset = <4>;
144338de5b56SWei Xu				port-mode-offset = <2>;
144438de5b56SWei Xu				mc-mac-mask = [ff f0 00 00 00 00];
144538de5b56SWei Xu				media-type = "copper";
144638de5b56SWei Xu			};
144738de5b56SWei Xu
144838de5b56SWei Xu			port@5 {
144938de5b56SWei Xu				reg = <5>;
145038de5b56SWei Xu				phy-handle = <&phy1>;
145138de5b56SWei Xu				serdes-syscon= <&serdes_ctrl>;
145238de5b56SWei Xu				port-rst-offset = <5>;
145338de5b56SWei Xu				port-mode-offset = <3>;
145438de5b56SWei Xu				mc-mac-mask = [ff f0 00 00 00 00];
145538de5b56SWei Xu				media-type = "copper";
145638de5b56SWei Xu			};
145738de5b56SWei Xu		};
145838de5b56SWei Xu
145938de5b56SWei Xu		eth0: ethernet@4{
146038de5b56SWei Xu			compatible = "hisilicon,hns-nic-v2";
146138de5b56SWei Xu			ae-handle = <&dsaf0>;
146238de5b56SWei Xu			port-idx-in-ae = <4>;
146338de5b56SWei Xu			local-mac-address = [00 00 00 00 00 00];
146438de5b56SWei Xu			status = "disabled";
146538de5b56SWei Xu			dma-coherent;
146638de5b56SWei Xu		};
146738de5b56SWei Xu
146838de5b56SWei Xu		eth1: ethernet@5{
146938de5b56SWei Xu			compatible = "hisilicon,hns-nic-v2";
147038de5b56SWei Xu			ae-handle = <&dsaf0>;
147138de5b56SWei Xu			port-idx-in-ae = <5>;
147238de5b56SWei Xu			local-mac-address = [00 00 00 00 00 00];
147338de5b56SWei Xu			status = "disabled";
147438de5b56SWei Xu			dma-coherent;
147538de5b56SWei Xu		};
147638de5b56SWei Xu
147738de5b56SWei Xu		eth2: ethernet@0{
147838de5b56SWei Xu			compatible = "hisilicon,hns-nic-v2";
147938de5b56SWei Xu			ae-handle = <&dsaf0>;
148038de5b56SWei Xu			port-idx-in-ae = <0>;
148138de5b56SWei Xu			local-mac-address = [00 00 00 00 00 00];
148238de5b56SWei Xu			status = "disabled";
148338de5b56SWei Xu			dma-coherent;
148438de5b56SWei Xu		};
148538de5b56SWei Xu
148638de5b56SWei Xu		eth3: ethernet@1{
148738de5b56SWei Xu			compatible = "hisilicon,hns-nic-v2";
148838de5b56SWei Xu			ae-handle = <&dsaf0>;
148938de5b56SWei Xu			port-idx-in-ae = <1>;
149038de5b56SWei Xu			local-mac-address = [00 00 00 00 00 00];
149138de5b56SWei Xu			status = "disabled";
149238de5b56SWei Xu			dma-coherent;
149338de5b56SWei Xu		};
14940f57c6c9SWei Xu
14950f57c6c9SWei Xu		infiniband@c4000000 {
14960f57c6c9SWei Xu			compatible = "hisilicon,hns-roce-v1";
14970f57c6c9SWei Xu			reg = <0x0 0xc4000000 0x0 0x100000>;
14980f57c6c9SWei Xu			dma-coherent;
14990f57c6c9SWei Xu			eth-handle = <&eth2 &eth3 0 0 &eth0 &eth1>;
15000f57c6c9SWei Xu			dsaf-handle = <&dsaf0>;
15010f57c6c9SWei Xu			node-guid = [00 9A CD 00 00 01 02 03];
15020f57c6c9SWei Xu			#address-cells = <2>;
15030f57c6c9SWei Xu			#size-cells = <2>;
15040f57c6c9SWei Xu			interrupt-parent = <&mbigen_dsa_roce>;
15050f57c6c9SWei Xu			interrupts = <722 1>,
15060f57c6c9SWei Xu				     <723 1>,
15070f57c6c9SWei Xu				     <724 1>,
15080f57c6c9SWei Xu				     <725 1>,
15090f57c6c9SWei Xu				     <726 1>,
15100f57c6c9SWei Xu				     <727 1>,
15110f57c6c9SWei Xu				     <728 1>,
15120f57c6c9SWei Xu				     <729 1>,
15130f57c6c9SWei Xu				     <730 1>,
15140f57c6c9SWei Xu				     <731 1>,
15150f57c6c9SWei Xu				     <732 1>,
15160f57c6c9SWei Xu				     <733 1>,
15170f57c6c9SWei Xu				     <734 1>,
15180f57c6c9SWei Xu				     <735 1>,
15190f57c6c9SWei Xu				     <736 1>,
15200f57c6c9SWei Xu				     <737 1>,
15210f57c6c9SWei Xu				     <738 1>,
15220f57c6c9SWei Xu				     <739 1>,
15230f57c6c9SWei Xu				     <740 1>,
15240f57c6c9SWei Xu				     <741 1>,
15250f57c6c9SWei Xu				     <742 1>,
15260f57c6c9SWei Xu				     <743 1>,
15270f57c6c9SWei Xu				     <744 1>,
15280f57c6c9SWei Xu				     <745 1>,
15290f57c6c9SWei Xu				     <746 1>,
15300f57c6c9SWei Xu				     <747 1>,
15310f57c6c9SWei Xu				     <748 1>,
15320f57c6c9SWei Xu				     <749 1>,
15330f57c6c9SWei Xu				     <750 1>,
15340f57c6c9SWei Xu				     <751 1>,
15350f57c6c9SWei Xu				     <752 1>,
15360f57c6c9SWei Xu				     <753 1>,
15370f57c6c9SWei Xu				     <785 1>,
15380f57c6c9SWei Xu				     <754 4>;
15390f57c6c9SWei Xu
15400f57c6c9SWei Xu			interrupt-names = "hns-roce-comp-0",
15410f57c6c9SWei Xu					  "hns-roce-comp-1",
15420f57c6c9SWei Xu					  "hns-roce-comp-2",
15430f57c6c9SWei Xu					  "hns-roce-comp-3",
15440f57c6c9SWei Xu					  "hns-roce-comp-4",
15450f57c6c9SWei Xu					  "hns-roce-comp-5",
15460f57c6c9SWei Xu					  "hns-roce-comp-6",
15470f57c6c9SWei Xu					  "hns-roce-comp-7",
15480f57c6c9SWei Xu					  "hns-roce-comp-8",
15490f57c6c9SWei Xu					  "hns-roce-comp-9",
15500f57c6c9SWei Xu					  "hns-roce-comp-10",
15510f57c6c9SWei Xu					  "hns-roce-comp-11",
15520f57c6c9SWei Xu					  "hns-roce-comp-12",
15530f57c6c9SWei Xu					  "hns-roce-comp-13",
15540f57c6c9SWei Xu					  "hns-roce-comp-14",
15550f57c6c9SWei Xu					  "hns-roce-comp-15",
15560f57c6c9SWei Xu					  "hns-roce-comp-16",
15570f57c6c9SWei Xu					  "hns-roce-comp-17",
15580f57c6c9SWei Xu					  "hns-roce-comp-18",
15590f57c6c9SWei Xu					  "hns-roce-comp-19",
15600f57c6c9SWei Xu					  "hns-roce-comp-20",
15610f57c6c9SWei Xu					  "hns-roce-comp-21",
15620f57c6c9SWei Xu					  "hns-roce-comp-22",
15630f57c6c9SWei Xu					  "hns-roce-comp-23",
15640f57c6c9SWei Xu					  "hns-roce-comp-24",
15650f57c6c9SWei Xu					  "hns-roce-comp-25",
15660f57c6c9SWei Xu					  "hns-roce-comp-26",
15670f57c6c9SWei Xu					  "hns-roce-comp-27",
15680f57c6c9SWei Xu					  "hns-roce-comp-28",
15690f57c6c9SWei Xu					  "hns-roce-comp-29",
15700f57c6c9SWei Xu					  "hns-roce-comp-30",
15710f57c6c9SWei Xu					  "hns-roce-comp-31",
15720f57c6c9SWei Xu					  "hns-roce-async",
15730f57c6c9SWei Xu					  "hns-roce-common";
15740f57c6c9SWei Xu		};
157586d67897SWei Xu
157686d67897SWei Xu		sas0: sas@c3000000 {
157786d67897SWei Xu			compatible = "hisilicon,hip07-sas-v2";
157886d67897SWei Xu			reg = <0 0xc3000000 0 0x10000>;
157986d67897SWei Xu			sas-addr = [50 01 88 20 16 00 00 00];
158086d67897SWei Xu			hisilicon,sas-syscon = <&dsa_subctrl>;
158186d67897SWei Xu			ctrl-reset-reg = <0xa60>;
158286d67897SWei Xu			ctrl-reset-sts-reg = <0x5a30>;
158386d67897SWei Xu			ctrl-clock-ena-reg = <0x338>;
158486d67897SWei Xu			queue-count = <16>;
158586d67897SWei Xu			phy-count = <8>;
158686d67897SWei Xu			dma-coherent;
158786d67897SWei Xu			interrupt-parent = <&mbigen_sas0>;
158886d67897SWei Xu			interrupts = <64 4>,<65 4>,<66 4>,<67 4>,<68 4>,
158986d67897SWei Xu				     <69 4>,<70 4>,<71 4>,<72 4>,<73 4>,
159086d67897SWei Xu				     <74 4>,<75 4>,<76 4>,<77 4>,<78 4>,
159186d67897SWei Xu				     <79 4>,<80 4>,<81 4>,<82 4>,<83 4>,
159286d67897SWei Xu				     <84 4>,<85 4>,<86 4>,<87 4>,<88 4>,
159386d67897SWei Xu				     <89 4>,<90 4>,<91 4>,<92 4>,<93 4>,
159486d67897SWei Xu				     <94 4>,<95 4>,<96 4>,<97 4>,<98 4>,
159586d67897SWei Xu				     <99 4>,<100 4>,<101 4>,<102 4>,<103 4>,
159686d67897SWei Xu				     <104 4>,<105 4>,<106 4>,<107 4>,<108 4>,
159786d67897SWei Xu				     <109 4>,<110 4>,<111 4>,<112 4>,<113 4>,
159886d67897SWei Xu				     <114 4>,<115 4>,<116 4>,<117 4>,<118 4>,
159986d67897SWei Xu				     <119 4>,<120 4>,<121 4>,<122 4>,<123 4>,
160086d67897SWei Xu				     <124 4>,<125 4>,<126 4>,<127 4>,<128 4>,
160186d67897SWei Xu				     <129 4>,<130 4>,<131 4>,<132 4>,<133 4>,
160286d67897SWei Xu				     <134 4>,<135 4>,<136 4>,<137 4>,<138 4>,
160386d67897SWei Xu				     <139 4>,<140 4>,<141 4>,<142 4>,<143 4>,
160486d67897SWei Xu				     <144 4>,<145 4>,<146 4>,<147 4>,<148 4>,
160586d67897SWei Xu				     <149 4>,<150 4>,<151 4>,<152 4>,<153 4>,
160686d67897SWei Xu				     <154 4>,<155 4>,<156 4>,<157 4>,<158 4>,
160786d67897SWei Xu				     <159 4>,<601 1>,<602 1>,<603 1>,<604 1>,
160886d67897SWei Xu				     <605 1>,<606 1>,<607 1>,<608 1>,<609 1>,
160986d67897SWei Xu				     <610 1>,<611 1>,<612 1>,<613 1>,<614 1>,
161086d67897SWei Xu				     <615 1>,<616 1>,<617 1>,<618 1>,<619 1>,
161186d67897SWei Xu				     <620 1>,<621 1>,<622 1>,<623 1>,<624 1>,
161286d67897SWei Xu				     <625 1>,<626 1>,<627 1>,<628 1>,<629 1>,
161386d67897SWei Xu				     <630 1>,<631 1>,<632 1>;
161486d67897SWei Xu			status = "disabled";
161586d67897SWei Xu		};
161686d67897SWei Xu
161786d67897SWei Xu		sas1: sas@a2000000 {
161886d67897SWei Xu			compatible = "hisilicon,hip07-sas-v2";
161986d67897SWei Xu			reg = <0 0xa2000000 0 0x10000>;
162086d67897SWei Xu			sas-addr = [50 01 88 20 16 00 00 00];
162186d67897SWei Xu			hisilicon,sas-syscon = <&pcie_subctl>;
162286d67897SWei Xu			hip06-sas-v2-quirk-amt;
162386d67897SWei Xu			ctrl-reset-reg = <0xa18>;
162486d67897SWei Xu			ctrl-reset-sts-reg = <0x5a0c>;
162586d67897SWei Xu			ctrl-clock-ena-reg = <0x318>;
162686d67897SWei Xu			queue-count = <16>;
162786d67897SWei Xu			phy-count = <8>;
162886d67897SWei Xu			dma-coherent;
162986d67897SWei Xu			interrupt-parent = <&mbigen_sas1>;
163086d67897SWei Xu			interrupts = <64 4>,<65 4>,<66 4>,<67 4>,<68 4>,
163186d67897SWei Xu				     <69 4>,<70 4>,<71 4>,<72 4>,<73 4>,
163286d67897SWei Xu				     <74 4>,<75 4>,<76 4>,<77 4>,<78 4>,
163386d67897SWei Xu				     <79 4>,<80 4>,<81 4>,<82 4>,<83 4>,
163486d67897SWei Xu				     <84 4>,<85 4>,<86 4>,<87 4>,<88 4>,
163586d67897SWei Xu				     <89 4>,<90 4>,<91 4>,<92 4>,<93 4>,
163686d67897SWei Xu				     <94 4>,<95 4>,<96 4>,<97 4>,<98 4>,
163786d67897SWei Xu				     <99 4>,<100 4>,<101 4>,<102 4>,<103 4>,
163886d67897SWei Xu				     <104 4>,<105 4>,<106 4>,<107 4>,<108 4>,
163986d67897SWei Xu				     <109 4>,<110 4>,<111 4>,<112 4>,<113 4>,
164086d67897SWei Xu				     <114 4>,<115 4>,<116 4>,<117 4>,<118 4>,
164186d67897SWei Xu				     <119 4>,<120 4>,<121 4>,<122 4>,<123 4>,
164286d67897SWei Xu				     <124 4>,<125 4>,<126 4>,<127 4>,<128 4>,
164386d67897SWei Xu				     <129 4>,<130 4>,<131 4>,<132 4>,<133 4>,
164486d67897SWei Xu				     <134 4>,<135 4>,<136 4>,<137 4>,<138 4>,
164586d67897SWei Xu				     <139 4>,<140 4>,<141 4>,<142 4>,<143 4>,
164686d67897SWei Xu				     <144 4>,<145 4>,<146 4>,<147 4>,<148 4>,
164786d67897SWei Xu				     <149 4>,<150 4>,<151 4>,<152 4>,<153 4>,
164886d67897SWei Xu				     <154 4>,<155 4>,<156 4>,<157 4>,<158 4>,
164986d67897SWei Xu				     <159 4>,<576 1>,<577 1>,<578 1>,<579 1>,
165086d67897SWei Xu				     <580 1>,<581 1>,<582 1>,<583 1>,<584 1>,
165186d67897SWei Xu				     <585 1>,<586 1>,<587 1>,<588 1>,<589 1>,
165286d67897SWei Xu				     <590 1>,<591 1>,<592 1>,<593 1>,<594 1>,
165386d67897SWei Xu				     <595 1>,<596 1>,<597 1>,<598 1>,<599 1>,
165486d67897SWei Xu				     <600 1>,<601 1>,<602 1>,<603 1>,<604 1>,
165586d67897SWei Xu				     <605 1>,<606 1>,<607 1>;
165686d67897SWei Xu			status = "disabled";
165786d67897SWei Xu		};
165886d67897SWei Xu
165986d67897SWei Xu		sas2: sas@a3000000 {
166086d67897SWei Xu			compatible = "hisilicon,hip07-sas-v2";
166186d67897SWei Xu			reg = <0 0xa3000000 0 0x10000>;
166286d67897SWei Xu			sas-addr = [50 01 88 20 16 00 00 00];
166386d67897SWei Xu			hisilicon,sas-syscon = <&pcie_subctl>;
166486d67897SWei Xu			ctrl-reset-reg = <0xae0>;
166586d67897SWei Xu			ctrl-reset-sts-reg = <0x5a70>;
166686d67897SWei Xu			ctrl-clock-ena-reg = <0x3a8>;
166786d67897SWei Xu			queue-count = <16>;
166886d67897SWei Xu			phy-count = <9>;
166986d67897SWei Xu			dma-coherent;
167086d67897SWei Xu			interrupt-parent = <&mbigen_sas2>;
167186d67897SWei Xu			interrupts = <192 4>,<193 4>,<194 4>,<195 4>,<196 4>,
167286d67897SWei Xu				     <197 4>,<198 4>,<199 4>,<200 4>,<201 4>,
167386d67897SWei Xu				     <202 4>,<203 4>,<204 4>,<205 4>,<206 4>,
167486d67897SWei Xu				     <207 4>,<208 4>,<209 4>,<210 4>,<211 4>,
167586d67897SWei Xu				     <212 4>,<213 4>,<214 4>,<215 4>,<216 4>,
167686d67897SWei Xu				     <217 4>,<218 4>,<219 4>,<220 4>,<221 4>,
167786d67897SWei Xu				     <222 4>,<223 4>,<224 4>,<225 4>,<226 4>,
167886d67897SWei Xu				     <227 4>,<228 4>,<229 4>,<230 4>,<231 4>,
167986d67897SWei Xu				     <232 4>,<233 4>,<234 4>,<235 4>,<236 4>,
168086d67897SWei Xu				     <237 4>,<238 4>,<239 4>,<240 4>,<241 4>,
168186d67897SWei Xu				     <242 4>,<243 4>,<244 4>,<245 4>,<246 4>,
168286d67897SWei Xu				     <247 4>,<248 4>,<249 4>,<250 4>,<251 4>,
168386d67897SWei Xu				     <252 4>,<253 4>,<254 4>,<255 4>,<256 4>,
168486d67897SWei Xu				     <257 4>,<258 4>,<259 4>,<260 4>,<261 4>,
168586d67897SWei Xu				     <262 4>,<263 4>,<264 4>,<265 4>,<266 4>,
168686d67897SWei Xu				     <267 4>,<268 4>,<269 4>,<270 4>,<271 4>,
168786d67897SWei Xu				     <272 4>,<273 4>,<274 4>,<275 4>,<276 4>,
168886d67897SWei Xu				     <277 4>,<278 4>,<279 4>,<280 4>,<281 4>,
168986d67897SWei Xu				     <282 4>,<283 4>,<284 4>,<285 4>,<286 4>,
169086d67897SWei Xu				     <287 4>,<608 1>,<609 1>,<610 1>,<611 1>,
169186d67897SWei Xu				     <612 1>,<613 1>,<614 1>,<615 1>,<616 1>,
169286d67897SWei Xu				     <617 1>,<618 1>,<619 1>,<620 1>,<621 1>,
169386d67897SWei Xu				     <622 1>,<623 1>,<624 1>,<625 1>,<626 1>,
169486d67897SWei Xu				     <627 1>,<628 1>,<629 1>,<630 1>,<631 1>,
169586d67897SWei Xu				     <632 1>,<633 1>,<634 1>,<635 1>,<636 1>,
169686d67897SWei Xu				     <637 1>,<638 1>,<639 1>;
169786d67897SWei Xu			status = "disabled";
169886d67897SWei Xu		};
16999f5ce88dSZhou Wang
17009f5ce88dSZhou Wang		p0_pcie2_a: pcie@a00a0000 {
17019f5ce88dSZhou Wang			compatible = "hisilicon,hip07-pcie-ecam";
17029f5ce88dSZhou Wang			reg = <0 0xaf800000 0 0x800000>,
17039f5ce88dSZhou Wang			      <0 0xa00a0000 0 0x10000>;
17049f5ce88dSZhou Wang			bus-range = <0xf8 0xff>;
17059f5ce88dSZhou Wang			msi-map = <0xf800 &p0_its_dsa_a 0xf800 0x800>;
17069f5ce88dSZhou Wang			msi-map-mask = <0xffff>;
17079f5ce88dSZhou Wang			#address-cells = <3>;
17089f5ce88dSZhou Wang			#size-cells = <2>;
17099f5ce88dSZhou Wang			device_type = "pci";
17109f5ce88dSZhou Wang			dma-coherent;
1711*47a6ca11SZhen Lei			ranges = <0x02000000 0 0xa8000000 0 0xa8000000 0 0x77f0000>,
1712*47a6ca11SZhen Lei				 <0x01000000 0 0 0 0xaf7f0000 0 0x10000>;
17139f5ce88dSZhou Wang			#interrupt-cells = <1>;
17149f5ce88dSZhou Wang			interrupt-map-mask = <0xf800 0 0 7>;
17159f5ce88dSZhou Wang			interrupt-map = <0x0 0 0 1 &mbigen_pcie2_a 671 4
17169f5ce88dSZhou Wang					 0x0 0 0 2 &mbigen_pcie2_a 671 4
17179f5ce88dSZhou Wang					 0x0 0 0 3 &mbigen_pcie2_a 671 4
17189f5ce88dSZhou Wang					 0x0 0 0 4 &mbigen_pcie2_a 671 4>;
17199f5ce88dSZhou Wang			status = "disabled";
17209f5ce88dSZhou Wang		};
1721e4a1f785SJonathan Cameron		p0_sec_a: crypto@d2000000 {
1722e4a1f785SJonathan Cameron			compatible = "hisilicon,hip07-sec";
172324402ce1SZhen Lei			reg = <0x0 0xd0000000 0x0 0x10000>,
172424402ce1SZhen Lei			      <0x0 0xd2000000 0x0 0x10000>,
172524402ce1SZhen Lei			      <0x0 0xd2010000 0x0 0x10000>,
172624402ce1SZhen Lei			      <0x0 0xd2020000 0x0 0x10000>,
172724402ce1SZhen Lei			      <0x0 0xd2030000 0x0 0x10000>,
172824402ce1SZhen Lei			      <0x0 0xd2040000 0x0 0x10000>,
172924402ce1SZhen Lei			      <0x0 0xd2050000 0x0 0x10000>,
173024402ce1SZhen Lei			      <0x0 0xd2060000 0x0 0x10000>,
173124402ce1SZhen Lei			      <0x0 0xd2070000 0x0 0x10000>,
173224402ce1SZhen Lei			      <0x0 0xd2080000 0x0 0x10000>,
173324402ce1SZhen Lei			      <0x0 0xd2090000 0x0 0x10000>,
173424402ce1SZhen Lei			      <0x0 0xd20a0000 0x0 0x10000>,
173524402ce1SZhen Lei			      <0x0 0xd20b0000 0x0 0x10000>,
173624402ce1SZhen Lei			      <0x0 0xd20c0000 0x0 0x10000>,
173724402ce1SZhen Lei			      <0x0 0xd20d0000 0x0 0x10000>,
173824402ce1SZhen Lei			      <0x0 0xd20e0000 0x0 0x10000>,
173924402ce1SZhen Lei			      <0x0 0xd20f0000 0x0 0x10000>,
174024402ce1SZhen Lei			      <0x0 0xd2100000 0x0 0x10000>;
1741e4a1f785SJonathan Cameron			interrupt-parent = <&p0_mbigen_sec_a>;
1742e4a1f785SJonathan Cameron			iommus = <&p0_smmu_alg_a 0x600>;
1743e4a1f785SJonathan Cameron			dma-coherent;
1744e4a1f785SJonathan Cameron			interrupts = <576 4>,
1745e4a1f785SJonathan Cameron				     <577 1>, <578 4>,
1746e4a1f785SJonathan Cameron				     <579 1>, <580 4>,
1747e4a1f785SJonathan Cameron				     <581 1>, <582 4>,
1748e4a1f785SJonathan Cameron				     <583 1>, <584 4>,
1749e4a1f785SJonathan Cameron				     <585 1>, <586 4>,
1750e4a1f785SJonathan Cameron				     <587 1>, <588 4>,
1751e4a1f785SJonathan Cameron				     <589 1>, <590 4>,
1752e4a1f785SJonathan Cameron				     <591 1>, <592 4>,
1753e4a1f785SJonathan Cameron				     <593 1>, <594 4>,
1754e4a1f785SJonathan Cameron				     <595 1>, <596 4>,
1755e4a1f785SJonathan Cameron				     <597 1>, <598 4>,
1756e4a1f785SJonathan Cameron				     <599 1>, <600 4>,
1757e4a1f785SJonathan Cameron				     <601 1>, <602 4>,
1758e4a1f785SJonathan Cameron				     <603 1>, <604 4>,
1759e4a1f785SJonathan Cameron				     <605 1>, <606 4>,
1760e4a1f785SJonathan Cameron				     <607 1>, <608 4>;
1761e4a1f785SJonathan Cameron		};
1762e4a1f785SJonathan Cameron		p0_sec_b: crypto@8,d2000000 {
1763e4a1f785SJonathan Cameron			compatible = "hisilicon,hip07-sec";
176424402ce1SZhen Lei			reg = <0x8 0xd0000000 0x0 0x10000>,
176524402ce1SZhen Lei			      <0x8 0xd2000000 0x0 0x10000>,
176624402ce1SZhen Lei			      <0x8 0xd2010000 0x0 0x10000>,
176724402ce1SZhen Lei			      <0x8 0xd2020000 0x0 0x10000>,
176824402ce1SZhen Lei			      <0x8 0xd2030000 0x0 0x10000>,
176924402ce1SZhen Lei			      <0x8 0xd2040000 0x0 0x10000>,
177024402ce1SZhen Lei			      <0x8 0xd2050000 0x0 0x10000>,
177124402ce1SZhen Lei			      <0x8 0xd2060000 0x0 0x10000>,
177224402ce1SZhen Lei			      <0x8 0xd2070000 0x0 0x10000>,
177324402ce1SZhen Lei			      <0x8 0xd2080000 0x0 0x10000>,
177424402ce1SZhen Lei			      <0x8 0xd2090000 0x0 0x10000>,
177524402ce1SZhen Lei			      <0x8 0xd20a0000 0x0 0x10000>,
177624402ce1SZhen Lei			      <0x8 0xd20b0000 0x0 0x10000>,
177724402ce1SZhen Lei			      <0x8 0xd20c0000 0x0 0x10000>,
177824402ce1SZhen Lei			      <0x8 0xd20d0000 0x0 0x10000>,
177924402ce1SZhen Lei			      <0x8 0xd20e0000 0x0 0x10000>,
178024402ce1SZhen Lei			      <0x8 0xd20f0000 0x0 0x10000>,
178124402ce1SZhen Lei			      <0x8 0xd2100000 0x0 0x10000>;
1782e4a1f785SJonathan Cameron			interrupt-parent = <&p0_mbigen_sec_b>;
1783e4a1f785SJonathan Cameron			iommus = <&p0_smmu_alg_b 0x600>;
1784e4a1f785SJonathan Cameron			dma-coherent;
1785e4a1f785SJonathan Cameron			interrupts = <576 4>,
1786e4a1f785SJonathan Cameron				     <577 1>, <578 4>,
1787e4a1f785SJonathan Cameron				     <579 1>, <580 4>,
1788e4a1f785SJonathan Cameron				     <581 1>, <582 4>,
1789e4a1f785SJonathan Cameron				     <583 1>, <584 4>,
1790e4a1f785SJonathan Cameron				     <585 1>, <586 4>,
1791e4a1f785SJonathan Cameron				     <587 1>, <588 4>,
1792e4a1f785SJonathan Cameron				     <589 1>, <590 4>,
1793e4a1f785SJonathan Cameron				     <591 1>, <592 4>,
1794e4a1f785SJonathan Cameron				     <593 1>, <594 4>,
1795e4a1f785SJonathan Cameron				     <595 1>, <596 4>,
1796e4a1f785SJonathan Cameron				     <597 1>, <598 4>,
1797e4a1f785SJonathan Cameron				     <599 1>, <600 4>,
1798e4a1f785SJonathan Cameron				     <601 1>, <602 4>,
1799e4a1f785SJonathan Cameron				     <603 1>, <604 4>,
1800e4a1f785SJonathan Cameron				     <605 1>, <606 4>,
1801e4a1f785SJonathan Cameron				     <607 1>, <608 4>;
1802e4a1f785SJonathan Cameron		};
1803e4a1f785SJonathan Cameron		p1_sec_a: crypto@400,d2000000 {
1804e4a1f785SJonathan Cameron			compatible = "hisilicon,hip07-sec";
180524402ce1SZhen Lei			reg = <0x400 0xd0000000 0x0 0x10000>,
180624402ce1SZhen Lei			      <0x400 0xd2000000 0x0 0x10000>,
180724402ce1SZhen Lei			      <0x400 0xd2010000 0x0 0x10000>,
180824402ce1SZhen Lei			      <0x400 0xd2020000 0x0 0x10000>,
180924402ce1SZhen Lei			      <0x400 0xd2030000 0x0 0x10000>,
181024402ce1SZhen Lei			      <0x400 0xd2040000 0x0 0x10000>,
181124402ce1SZhen Lei			      <0x400 0xd2050000 0x0 0x10000>,
181224402ce1SZhen Lei			      <0x400 0xd2060000 0x0 0x10000>,
181324402ce1SZhen Lei			      <0x400 0xd2070000 0x0 0x10000>,
181424402ce1SZhen Lei			      <0x400 0xd2080000 0x0 0x10000>,
181524402ce1SZhen Lei			      <0x400 0xd2090000 0x0 0x10000>,
181624402ce1SZhen Lei			      <0x400 0xd20a0000 0x0 0x10000>,
181724402ce1SZhen Lei			      <0x400 0xd20b0000 0x0 0x10000>,
181824402ce1SZhen Lei			      <0x400 0xd20c0000 0x0 0x10000>,
181924402ce1SZhen Lei			      <0x400 0xd20d0000 0x0 0x10000>,
182024402ce1SZhen Lei			      <0x400 0xd20e0000 0x0 0x10000>,
182124402ce1SZhen Lei			      <0x400 0xd20f0000 0x0 0x10000>,
182224402ce1SZhen Lei			      <0x400 0xd2100000 0x0 0x10000>;
1823e4a1f785SJonathan Cameron			interrupt-parent = <&p1_mbigen_sec_a>;
1824e4a1f785SJonathan Cameron			iommus = <&p1_smmu_alg_a 0x600>;
1825e4a1f785SJonathan Cameron			dma-coherent;
1826e4a1f785SJonathan Cameron			interrupts = <576 4>,
1827e4a1f785SJonathan Cameron				     <577 1>, <578 4>,
1828e4a1f785SJonathan Cameron				     <579 1>, <580 4>,
1829e4a1f785SJonathan Cameron				     <581 1>, <582 4>,
1830e4a1f785SJonathan Cameron				     <583 1>, <584 4>,
1831e4a1f785SJonathan Cameron				     <585 1>, <586 4>,
1832e4a1f785SJonathan Cameron				     <587 1>, <588 4>,
1833e4a1f785SJonathan Cameron				     <589 1>, <590 4>,
1834e4a1f785SJonathan Cameron				     <591 1>, <592 4>,
1835e4a1f785SJonathan Cameron				     <593 1>, <594 4>,
1836e4a1f785SJonathan Cameron				     <595 1>, <596 4>,
1837e4a1f785SJonathan Cameron				     <597 1>, <598 4>,
1838e4a1f785SJonathan Cameron				     <599 1>, <600 4>,
1839e4a1f785SJonathan Cameron				     <601 1>, <602 4>,
1840e4a1f785SJonathan Cameron				     <603 1>, <604 4>,
1841e4a1f785SJonathan Cameron				     <605 1>, <606 4>,
1842e4a1f785SJonathan Cameron				     <607 1>, <608 4>;
1843e4a1f785SJonathan Cameron		};
1844e4a1f785SJonathan Cameron		p1_sec_b: crypto@408,d2000000 {
1845e4a1f785SJonathan Cameron			compatible = "hisilicon,hip07-sec";
184624402ce1SZhen Lei			reg = <0x408 0xd0000000 0x0 0x10000>,
184724402ce1SZhen Lei			      <0x408 0xd2000000 0x0 0x10000>,
184824402ce1SZhen Lei			      <0x408 0xd2010000 0x0 0x10000>,
184924402ce1SZhen Lei			      <0x408 0xd2020000 0x0 0x10000>,
185024402ce1SZhen Lei			      <0x408 0xd2030000 0x0 0x10000>,
185124402ce1SZhen Lei			      <0x408 0xd2040000 0x0 0x10000>,
185224402ce1SZhen Lei			      <0x408 0xd2050000 0x0 0x10000>,
185324402ce1SZhen Lei			      <0x408 0xd2060000 0x0 0x10000>,
185424402ce1SZhen Lei			      <0x408 0xd2070000 0x0 0x10000>,
185524402ce1SZhen Lei			      <0x408 0xd2080000 0x0 0x10000>,
185624402ce1SZhen Lei			      <0x408 0xd2090000 0x0 0x10000>,
185724402ce1SZhen Lei			      <0x408 0xd20a0000 0x0 0x10000>,
185824402ce1SZhen Lei			      <0x408 0xd20b0000 0x0 0x10000>,
185924402ce1SZhen Lei			      <0x408 0xd20c0000 0x0 0x10000>,
186024402ce1SZhen Lei			      <0x408 0xd20d0000 0x0 0x10000>,
186124402ce1SZhen Lei			      <0x408 0xd20e0000 0x0 0x10000>,
186224402ce1SZhen Lei			      <0x408 0xd20f0000 0x0 0x10000>,
186324402ce1SZhen Lei			      <0x408 0xd2100000 0x0 0x10000>;
1864e4a1f785SJonathan Cameron			interrupt-parent = <&p1_mbigen_sec_b>;
1865e4a1f785SJonathan Cameron			iommus = <&p1_smmu_alg_b 0x600>;
1866e4a1f785SJonathan Cameron			dma-coherent;
1867e4a1f785SJonathan Cameron			interrupts = <576 4>,
1868e4a1f785SJonathan Cameron				     <577 1>, <578 4>,
1869e4a1f785SJonathan Cameron				     <579 1>, <580 4>,
1870e4a1f785SJonathan Cameron				     <581 1>, <582 4>,
1871e4a1f785SJonathan Cameron				     <583 1>, <584 4>,
1872e4a1f785SJonathan Cameron				     <585 1>, <586 4>,
1873e4a1f785SJonathan Cameron				     <587 1>, <588 4>,
1874e4a1f785SJonathan Cameron				     <589 1>, <590 4>,
1875e4a1f785SJonathan Cameron				     <591 1>, <592 4>,
1876e4a1f785SJonathan Cameron				     <593 1>, <594 4>,
1877e4a1f785SJonathan Cameron				     <595 1>, <596 4>,
1878e4a1f785SJonathan Cameron				     <597 1>, <598 4>,
1879e4a1f785SJonathan Cameron				     <599 1>, <600 4>,
1880e4a1f785SJonathan Cameron				     <601 1>, <602 4>,
1881e4a1f785SJonathan Cameron				     <603 1>, <604 4>,
1882e4a1f785SJonathan Cameron				     <605 1>, <606 4>,
1883e4a1f785SJonathan Cameron				     <607 1>, <608 4>;
1884e4a1f785SJonathan Cameron		};
1885e4a1f785SJonathan Cameron
18864f357f94SKefeng Wang	};
18874f357f94SKefeng Wang};
1888