1// SPDX-License-Identifier: GPL-2.0 2 3/* 4 * dtsi for Hisilicon Hi3660 Coresight 5 * 6 * Copyright (C) 2016-2018 Hisilicon Ltd. 7 * 8 * Author: Wanglai Shi <shiwanglai@hisilicon.com> 9 * 10 */ 11/ { 12 soc { 13 /* A53 cluster internals */ 14 etm@ecc40000 { 15 compatible = "arm,coresight-etm4x", "arm,primecell"; 16 reg = <0 0xecc40000 0 0x1000>; 17 clocks = <&crg_ctrl HI3660_PCLK>; 18 clock-names = "apb_pclk"; 19 cpu = <&cpu0>; 20 21 out-ports { 22 port { 23 etm0_out: endpoint { 24 remote-endpoint = 25 <&cluster0_funnel_in0>; 26 }; 27 }; 28 }; 29 }; 30 31 etm@ecd40000 { 32 compatible = "arm,coresight-etm4x", "arm,primecell"; 33 reg = <0 0xecd40000 0 0x1000>; 34 clocks = <&crg_ctrl HI3660_PCLK>; 35 clock-names = "apb_pclk"; 36 cpu = <&cpu1>; 37 38 out-ports { 39 port { 40 etm1_out: endpoint { 41 remote-endpoint = 42 <&cluster0_funnel_in1>; 43 }; 44 }; 45 }; 46 }; 47 48 etm@ece40000 { 49 compatible = "arm,coresight-etm4x", "arm,primecell"; 50 reg = <0 0xece40000 0 0x1000>; 51 clocks = <&crg_ctrl HI3660_PCLK>; 52 clock-names = "apb_pclk"; 53 cpu = <&cpu2>; 54 55 out-ports { 56 port { 57 etm2_out: endpoint { 58 remote-endpoint = 59 <&cluster0_funnel_in2>; 60 }; 61 }; 62 }; 63 }; 64 65 etm@ecf40000 { 66 compatible = "arm,coresight-etm4x", "arm,primecell"; 67 reg = <0 0xecf40000 0 0x1000>; 68 clocks = <&crg_ctrl HI3660_PCLK>; 69 clock-names = "apb_pclk"; 70 cpu = <&cpu3>; 71 72 out-ports { 73 port { 74 etm3_out: endpoint { 75 remote-endpoint = 76 <&cluster0_funnel_in3>; 77 }; 78 }; 79 }; 80 }; 81 82 funnel@ec801000 { 83 compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 84 reg = <0 0xec801000 0 0x1000>; 85 clocks = <&crg_ctrl HI3660_PCLK>; 86 clock-names = "apb_pclk"; 87 88 out-ports { 89 port { 90 cluster0_funnel_out: endpoint { 91 remote-endpoint = 92 <&cluster0_etf_in>; 93 }; 94 }; 95 }; 96 97 in-ports { 98 #address-cells = <1>; 99 #size-cells = <0>; 100 101 port@0 { 102 reg = <0>; 103 cluster0_funnel_in0: endpoint { 104 remote-endpoint = <&etm0_out>; 105 }; 106 }; 107 108 port@1 { 109 reg = <1>; 110 cluster0_funnel_in1: endpoint { 111 remote-endpoint = <&etm1_out>; 112 }; 113 }; 114 115 port@2 { 116 reg = <2>; 117 cluster0_funnel_in2: endpoint { 118 remote-endpoint = <&etm2_out>; 119 }; 120 }; 121 122 port@3 { 123 reg = <3>; 124 cluster0_funnel_in3: endpoint { 125 remote-endpoint = <&etm3_out>; 126 }; 127 }; 128 }; 129 }; 130 131 etf@ec802000 { 132 compatible = "arm,coresight-tmc", "arm,primecell"; 133 reg = <0 0xec802000 0 0x1000>; 134 clocks = <&crg_ctrl HI3660_PCLK>; 135 clock-names = "apb_pclk"; 136 137 in-ports { 138 port { 139 cluster0_etf_in: endpoint { 140 remote-endpoint = 141 <&cluster0_funnel_out>; 142 }; 143 }; 144 }; 145 146 out-ports { 147 port { 148 cluster0_etf_out: endpoint { 149 remote-endpoint = 150 <&combo_funnel_in0>; 151 }; 152 }; 153 }; 154 }; 155 156 /* A73 cluster internals */ 157 etm@ed440000 { 158 compatible = "arm,coresight-etm4x", "arm,primecell"; 159 reg = <0 0xed440000 0 0x1000>; 160 clocks = <&crg_ctrl HI3660_PCLK>; 161 clock-names = "apb_pclk"; 162 cpu = <&cpu4>; 163 164 out-ports { 165 port { 166 etm4_out: endpoint { 167 remote-endpoint = 168 <&cluster1_funnel_in0>; 169 }; 170 }; 171 }; 172 }; 173 174 etm@ed540000 { 175 compatible = "arm,coresight-etm4x", "arm,primecell"; 176 reg = <0 0xed540000 0 0x1000>; 177 clocks = <&crg_ctrl HI3660_PCLK>; 178 clock-names = "apb_pclk"; 179 cpu = <&cpu5>; 180 181 out-ports { 182 port { 183 etm5_out: endpoint { 184 remote-endpoint = 185 <&cluster1_funnel_in1>; 186 }; 187 }; 188 }; 189 }; 190 191 etm@ed640000 { 192 compatible = "arm,coresight-etm4x", "arm,primecell"; 193 reg = <0 0xed640000 0 0x1000>; 194 clocks = <&crg_ctrl HI3660_PCLK>; 195 clock-names = "apb_pclk"; 196 cpu = <&cpu6>; 197 198 out-ports { 199 port { 200 etm6_out: endpoint { 201 remote-endpoint = 202 <&cluster1_funnel_in2>; 203 }; 204 }; 205 }; 206 }; 207 208 etm@ed740000 { 209 compatible = "arm,coresight-etm4x", "arm,primecell"; 210 reg = <0 0xed740000 0 0x1000>; 211 clocks = <&crg_ctrl HI3660_PCLK>; 212 clock-names = "apb_pclk"; 213 cpu = <&cpu7>; 214 215 out-ports { 216 port { 217 etm7_out: endpoint { 218 remote-endpoint = 219 <&cluster1_funnel_in3>; 220 }; 221 }; 222 }; 223 }; 224 225 funnel@ed001000 { 226 compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 227 reg = <0 0xed001000 0 0x1000>; 228 clocks = <&crg_ctrl HI3660_PCLK>; 229 clock-names = "apb_pclk"; 230 out-ports { 231 port { 232 cluster1_funnel_out: endpoint { 233 remote-endpoint = 234 <&cluster1_etf_in>; 235 }; 236 }; 237 }; 238 239 in-ports { 240 #address-cells = <1>; 241 #size-cells = <0>; 242 243 port@0 { 244 reg = <0>; 245 cluster1_funnel_in0: endpoint { 246 remote-endpoint = <&etm4_out>; 247 }; 248 }; 249 250 port@1 { 251 reg = <1>; 252 cluster1_funnel_in1: endpoint { 253 remote-endpoint = <&etm5_out>; 254 }; 255 }; 256 257 port@2 { 258 reg = <2>; 259 cluster1_funnel_in2: endpoint { 260 remote-endpoint = <&etm6_out>; 261 }; 262 }; 263 264 port@3 { 265 reg = <3>; 266 cluster1_funnel_in3: endpoint { 267 remote-endpoint = <&etm7_out>; 268 }; 269 }; 270 }; 271 }; 272 273 etf@ed002000 { 274 compatible = "arm,coresight-tmc", "arm,primecell"; 275 reg = <0 0xed002000 0 0x1000>; 276 clocks = <&crg_ctrl HI3660_PCLK>; 277 clock-names = "apb_pclk"; 278 279 in-ports { 280 port { 281 cluster1_etf_in: endpoint { 282 remote-endpoint = 283 <&cluster1_funnel_out>; 284 }; 285 }; 286 }; 287 288 out-ports { 289 port { 290 cluster1_etf_out: endpoint { 291 remote-endpoint = 292 <&combo_funnel_in1>; 293 }; 294 }; 295 }; 296 }; 297 298 /* An invisible combo funnel between clusters and top funnel */ 299 funnel { 300 compatible = "arm,coresight-static-funnel"; 301 clocks = <&crg_ctrl HI3660_PCLK>; 302 clock-names = "apb_pclk"; 303 304 out-ports { 305 port { 306 combo_funnel_out: endpoint { 307 remote-endpoint = 308 <&top_funnel_in>; 309 }; 310 }; 311 }; 312 313 in-ports { 314 #address-cells = <1>; 315 #size-cells = <0>; 316 317 port@0 { 318 reg = <0>; 319 combo_funnel_in0: endpoint { 320 remote-endpoint = 321 <&cluster0_etf_out>; 322 }; 323 }; 324 325 port@1 { 326 reg = <1>; 327 combo_funnel_in1: endpoint { 328 remote-endpoint = 329 <&cluster1_etf_out>; 330 }; 331 }; 332 }; 333 }; 334 335 /* Top internals */ 336 funnel@ec031000 { 337 compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 338 reg = <0 0xec031000 0 0x1000>; 339 clocks = <&crg_ctrl HI3660_PCLK>; 340 clock-names = "apb_pclk"; 341 342 out-ports { 343 port { 344 top_funnel_out: endpoint { 345 remote-endpoint = 346 <&top_etf_in>; 347 }; 348 }; 349 }; 350 351 in-ports { 352 #address-cells = <1>; 353 #size-cells = <0>; 354 355 port@0 { 356 reg = <0>; 357 top_funnel_in: endpoint { 358 remote-endpoint = 359 <&combo_funnel_out>; 360 }; 361 }; 362 }; 363 }; 364 365 etf@ec036000 { 366 compatible = "arm,coresight-tmc", "arm,primecell"; 367 reg = <0 0xec036000 0 0x1000>; 368 clocks = <&crg_ctrl HI3660_PCLK>; 369 clock-names = "apb_pclk"; 370 371 in-ports { 372 port { 373 top_etf_in: endpoint { 374 remote-endpoint = 375 <&top_funnel_out>; 376 }; 377 }; 378 }; 379 380 out-ports { 381 port { 382 top_etf_out: endpoint { 383 remote-endpoint = 384 <&replicator_in>; 385 }; 386 }; 387 }; 388 }; 389 390 replicator { 391 compatible = "arm,coresight-static-replicator"; 392 clocks = <&crg_ctrl HI3660_PCLK>; 393 clock-names = "apb_pclk"; 394 395 in-ports { 396 port { 397 replicator_in: endpoint { 398 remote-endpoint = 399 <&top_etf_out>; 400 }; 401 }; 402 }; 403 404 out-ports { 405 #address-cells = <1>; 406 #size-cells = <0>; 407 408 port@0 { 409 reg = <0>; 410 replicator0_out0: endpoint { 411 remote-endpoint = <&etr_in>; 412 }; 413 }; 414 415 port@1 { 416 reg = <1>; 417 replicator0_out1: endpoint { 418 remote-endpoint = <&tpiu_in>; 419 }; 420 }; 421 }; 422 }; 423 424 etr@ec033000 { 425 compatible = "arm,coresight-tmc", "arm,primecell"; 426 reg = <0 0xec033000 0 0x1000>; 427 clocks = <&crg_ctrl HI3660_PCLK>; 428 clock-names = "apb_pclk"; 429 430 in-ports { 431 port { 432 etr_in: endpoint { 433 remote-endpoint = 434 <&replicator0_out0>; 435 }; 436 }; 437 }; 438 }; 439 440 tpiu@ec032000 { 441 compatible = "arm,coresight-tpiu", "arm,primecell"; 442 reg = <0 0xec032000 0 0x1000>; 443 clocks = <&crg_ctrl HI3660_PCLK>; 444 clock-names = "apb_pclk"; 445 446 in-ports { 447 port { 448 tpiu_in: endpoint { 449 remote-endpoint = 450 <&replicator0_out1>; 451 }; 452 }; 453 }; 454 }; 455 }; 456}; 457