xref: /linux/scripts/dtc/include-prefixes/arm64/freescale/imx95-verdin-ivy.dtsi (revision 0fc8f6200d2313278fbf4539bbab74677c685531)
1*f33a1f9aSErnest Van Hoecke// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2*f33a1f9aSErnest Van Hoecke/*
3*f33a1f9aSErnest Van Hoecke * Copyright (c) Toradex
4*f33a1f9aSErnest Van Hoecke *
5*f33a1f9aSErnest Van Hoecke * Common dtsi for Verdin iMX95 SoM on Ivy carrier board
6*f33a1f9aSErnest Van Hoecke *
7*f33a1f9aSErnest Van Hoecke * https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx95
8*f33a1f9aSErnest Van Hoecke * https://www.toradex.com/products/carrier-board/ivy-carrier-board
9*f33a1f9aSErnest Van Hoecke */
10*f33a1f9aSErnest Van Hoecke
11*f33a1f9aSErnest Van Hoecke#include <dt-bindings/mux/mux.h>
12*f33a1f9aSErnest Van Hoecke#include <dt-bindings/leds/common.h>
13*f33a1f9aSErnest Van Hoecke#include <dt-bindings/net/ti-dp83867.h>
14*f33a1f9aSErnest Van Hoecke
15*f33a1f9aSErnest Van Hoecke/ {
16*f33a1f9aSErnest Van Hoecke	aliases {
17*f33a1f9aSErnest Van Hoecke		eeprom1 = &carrier_eeprom;
18*f33a1f9aSErnest Van Hoecke	};
19*f33a1f9aSErnest Van Hoecke
20*f33a1f9aSErnest Van Hoecke	ain1-current {
21*f33a1f9aSErnest Van Hoecke		compatible = "io-channel-mux";
22*f33a1f9aSErnest Van Hoecke		channels = "", "ain1_current";
23*f33a1f9aSErnest Van Hoecke		io-channels = <&ain1_current_unmanaged>;
24*f33a1f9aSErnest Van Hoecke		io-channel-names = "parent";
25*f33a1f9aSErnest Van Hoecke		mux-controls = <&ain1_mode_mux_ctrl>;
26*f33a1f9aSErnest Van Hoecke		settle-time-us = <1000>;
27*f33a1f9aSErnest Van Hoecke	};
28*f33a1f9aSErnest Van Hoecke
29*f33a1f9aSErnest Van Hoecke	ain1-voltage {
30*f33a1f9aSErnest Van Hoecke		compatible = "io-channel-mux";
31*f33a1f9aSErnest Van Hoecke		channels = "ain1_voltage", "";
32*f33a1f9aSErnest Van Hoecke		io-channels = <&ain1_voltage_unmanaged 0>;
33*f33a1f9aSErnest Van Hoecke		io-channel-names = "parent";
34*f33a1f9aSErnest Van Hoecke		mux-controls = <&ain1_mode_mux_ctrl>;
35*f33a1f9aSErnest Van Hoecke		settle-time-us = <1000>;
36*f33a1f9aSErnest Van Hoecke	};
37*f33a1f9aSErnest Van Hoecke
38*f33a1f9aSErnest Van Hoecke	ain2-current {
39*f33a1f9aSErnest Van Hoecke		compatible = "io-channel-mux";
40*f33a1f9aSErnest Van Hoecke		channels = "", "ain2_current";
41*f33a1f9aSErnest Van Hoecke		io-channels = <&ain2_current_unmanaged>;
42*f33a1f9aSErnest Van Hoecke		io-channel-names = "parent";
43*f33a1f9aSErnest Van Hoecke		mux-controls = <&ain2_mode_mux_ctrl>;
44*f33a1f9aSErnest Van Hoecke		settle-time-us = <1000>;
45*f33a1f9aSErnest Van Hoecke	};
46*f33a1f9aSErnest Van Hoecke
47*f33a1f9aSErnest Van Hoecke	ain2-voltage {
48*f33a1f9aSErnest Van Hoecke		compatible = "io-channel-mux";
49*f33a1f9aSErnest Van Hoecke		channels = "ain2_voltage", "";
50*f33a1f9aSErnest Van Hoecke		io-channels = <&ain2_voltage_unmanaged 0>;
51*f33a1f9aSErnest Van Hoecke		io-channel-names = "parent";
52*f33a1f9aSErnest Van Hoecke		mux-controls = <&ain2_mode_mux_ctrl>;
53*f33a1f9aSErnest Van Hoecke		settle-time-us = <1000>;
54*f33a1f9aSErnest Van Hoecke	};
55*f33a1f9aSErnest Van Hoecke
56*f33a1f9aSErnest Van Hoecke	/* AIN1 Current w/o AIN1_MODE gpio control */
57*f33a1f9aSErnest Van Hoecke	ain1_current_unmanaged: current-sense-shunt-ain1 {
58*f33a1f9aSErnest Van Hoecke		compatible = "current-sense-shunt";
59*f33a1f9aSErnest Van Hoecke		#io-channel-cells = <0>;
60*f33a1f9aSErnest Van Hoecke		io-channels = <&ivy_adc1 1>;
61*f33a1f9aSErnest Van Hoecke		shunt-resistor-micro-ohms = <100000000>;
62*f33a1f9aSErnest Van Hoecke	};
63*f33a1f9aSErnest Van Hoecke
64*f33a1f9aSErnest Van Hoecke	/* AIN2 Current w/o AIN2_MODE gpio control */
65*f33a1f9aSErnest Van Hoecke	ain2_current_unmanaged: current-sense-shunt-ain2 {
66*f33a1f9aSErnest Van Hoecke		compatible = "current-sense-shunt";
67*f33a1f9aSErnest Van Hoecke		#io-channel-cells = <0>;
68*f33a1f9aSErnest Van Hoecke		io-channels = <&ivy_adc2 1>;
69*f33a1f9aSErnest Van Hoecke		shunt-resistor-micro-ohms = <100000000>;
70*f33a1f9aSErnest Van Hoecke	};
71*f33a1f9aSErnest Van Hoecke
72*f33a1f9aSErnest Van Hoecke	/* Ivy Power Supply Input Voltage */
73*f33a1f9aSErnest Van Hoecke	ivy-1v8-voltage {
74*f33a1f9aSErnest Van Hoecke		compatible = "voltage-divider";
75*f33a1f9aSErnest Van Hoecke		/* Verdin ADC_4 */
76*f33a1f9aSErnest Van Hoecke		io-channels = <&adc1 3>;
77*f33a1f9aSErnest Van Hoecke		full-ohms = <39000>; /* 12k + 27k */
78*f33a1f9aSErnest Van Hoecke		output-ohms = <27000>;
79*f33a1f9aSErnest Van Hoecke	};
80*f33a1f9aSErnest Van Hoecke
81*f33a1f9aSErnest Van Hoecke	ivy-3v3-voltage {
82*f33a1f9aSErnest Van Hoecke		compatible = "voltage-divider";
83*f33a1f9aSErnest Van Hoecke		/* Verdin ADC_3 */
84*f33a1f9aSErnest Van Hoecke		io-channels = <&adc1 2>;
85*f33a1f9aSErnest Van Hoecke		full-ohms = <54000>; /* 27k + 27k */
86*f33a1f9aSErnest Van Hoecke		output-ohms = <27000>;
87*f33a1f9aSErnest Van Hoecke	};
88*f33a1f9aSErnest Van Hoecke
89*f33a1f9aSErnest Van Hoecke	ivy-5v-voltage {
90*f33a1f9aSErnest Van Hoecke		compatible = "voltage-divider";
91*f33a1f9aSErnest Van Hoecke		/* Verdin ADC_2 */
92*f33a1f9aSErnest Van Hoecke		io-channels = <&adc1 1>;
93*f33a1f9aSErnest Van Hoecke		full-ohms = <39000>; /* 27k + 12k */
94*f33a1f9aSErnest Van Hoecke		output-ohms = <12000>;
95*f33a1f9aSErnest Van Hoecke	};
96*f33a1f9aSErnest Van Hoecke
97*f33a1f9aSErnest Van Hoecke	ivy-input-voltage {
98*f33a1f9aSErnest Van Hoecke		compatible = "voltage-divider";
99*f33a1f9aSErnest Van Hoecke		/* Verdin ADC_1 */
100*f33a1f9aSErnest Van Hoecke		io-channels = <&adc1 0>;
101*f33a1f9aSErnest Van Hoecke		full-ohms = <204700>; /* 200k + 4.7k */
102*f33a1f9aSErnest Van Hoecke		output-ohms = <4700>;
103*f33a1f9aSErnest Van Hoecke	};
104*f33a1f9aSErnest Van Hoecke
105*f33a1f9aSErnest Van Hoecke	leds {
106*f33a1f9aSErnest Van Hoecke		compatible = "gpio-leds";
107*f33a1f9aSErnest Van Hoecke		pinctrl-names = "default";
108*f33a1f9aSErnest Van Hoecke		pinctrl-0 = <&pinctrl_ivy_leds>;
109*f33a1f9aSErnest Van Hoecke
110*f33a1f9aSErnest Van Hoecke		/* D7 Blue - SODIMM 30 - LEDs.GPIO1 */
111*f33a1f9aSErnest Van Hoecke		led-0 {
112*f33a1f9aSErnest Van Hoecke			color = <LED_COLOR_ID_BLUE>;
113*f33a1f9aSErnest Van Hoecke			default-state = "off";
114*f33a1f9aSErnest Van Hoecke			function = LED_FUNCTION_STATUS;
115*f33a1f9aSErnest Van Hoecke			function-enumerator = <1>;
116*f33a1f9aSErnest Van Hoecke			gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
117*f33a1f9aSErnest Van Hoecke		};
118*f33a1f9aSErnest Van Hoecke
119*f33a1f9aSErnest Van Hoecke		/* D7 Green - SODIMM 32 - LEDs.GPIO2 */
120*f33a1f9aSErnest Van Hoecke		led-1 {
121*f33a1f9aSErnest Van Hoecke			color = <LED_COLOR_ID_GREEN>;
122*f33a1f9aSErnest Van Hoecke			default-state = "off";
123*f33a1f9aSErnest Van Hoecke			function = LED_FUNCTION_STATUS;
124*f33a1f9aSErnest Van Hoecke			function-enumerator = <1>;
125*f33a1f9aSErnest Van Hoecke			gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
126*f33a1f9aSErnest Van Hoecke		};
127*f33a1f9aSErnest Van Hoecke
128*f33a1f9aSErnest Van Hoecke		/* D7 Red - SODIMM 34 - LEDs.GPIO3 */
129*f33a1f9aSErnest Van Hoecke		led-2 {
130*f33a1f9aSErnest Van Hoecke			color = <LED_COLOR_ID_RED>;
131*f33a1f9aSErnest Van Hoecke			default-state = "off";
132*f33a1f9aSErnest Van Hoecke			function = LED_FUNCTION_STATUS;
133*f33a1f9aSErnest Van Hoecke			function-enumerator = <1>;
134*f33a1f9aSErnest Van Hoecke			gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
135*f33a1f9aSErnest Van Hoecke		};
136*f33a1f9aSErnest Van Hoecke
137*f33a1f9aSErnest Van Hoecke		/* D8 Blue - SODIMM 36 - LEDs.GPIO4 */
138*f33a1f9aSErnest Van Hoecke		led-3 {
139*f33a1f9aSErnest Van Hoecke			color = <LED_COLOR_ID_BLUE>;
140*f33a1f9aSErnest Van Hoecke			default-state = "off";
141*f33a1f9aSErnest Van Hoecke			function = LED_FUNCTION_STATUS;
142*f33a1f9aSErnest Van Hoecke			function-enumerator = <2>;
143*f33a1f9aSErnest Van Hoecke			gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
144*f33a1f9aSErnest Van Hoecke		};
145*f33a1f9aSErnest Van Hoecke
146*f33a1f9aSErnest Van Hoecke		/* D8 Green - SODIMM 54 - LEDs.GPIO5 */
147*f33a1f9aSErnest Van Hoecke		led-4 {
148*f33a1f9aSErnest Van Hoecke			color = <LED_COLOR_ID_GREEN>;
149*f33a1f9aSErnest Van Hoecke			default-state = "off";
150*f33a1f9aSErnest Van Hoecke			function = LED_FUNCTION_STATUS;
151*f33a1f9aSErnest Van Hoecke			function-enumerator = <2>;
152*f33a1f9aSErnest Van Hoecke			gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
153*f33a1f9aSErnest Van Hoecke		};
154*f33a1f9aSErnest Van Hoecke
155*f33a1f9aSErnest Van Hoecke		/* D8 Red - SODIMM 44 - LEDs.GPIO6 */
156*f33a1f9aSErnest Van Hoecke		led-5 {
157*f33a1f9aSErnest Van Hoecke			color = <LED_COLOR_ID_RED>;
158*f33a1f9aSErnest Van Hoecke			default-state = "off";
159*f33a1f9aSErnest Van Hoecke			function = LED_FUNCTION_STATUS;
160*f33a1f9aSErnest Van Hoecke			function-enumerator = <2>;
161*f33a1f9aSErnest Van Hoecke			gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
162*f33a1f9aSErnest Van Hoecke		};
163*f33a1f9aSErnest Van Hoecke
164*f33a1f9aSErnest Van Hoecke		/* D9 Blue - SODIMM 46 - LEDs.GPIO7 */
165*f33a1f9aSErnest Van Hoecke		led-6 {
166*f33a1f9aSErnest Van Hoecke			color = <LED_COLOR_ID_BLUE>;
167*f33a1f9aSErnest Van Hoecke			default-state = "off";
168*f33a1f9aSErnest Van Hoecke			function = LED_FUNCTION_STATUS;
169*f33a1f9aSErnest Van Hoecke			function-enumerator = <3>;
170*f33a1f9aSErnest Van Hoecke			gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
171*f33a1f9aSErnest Van Hoecke		};
172*f33a1f9aSErnest Van Hoecke
173*f33a1f9aSErnest Van Hoecke		/* D9 Red - SODIMM 48 - LEDs.GPIO8 */
174*f33a1f9aSErnest Van Hoecke		led-7 {
175*f33a1f9aSErnest Van Hoecke			color = <LED_COLOR_ID_RED>;
176*f33a1f9aSErnest Van Hoecke			default-state = "off";
177*f33a1f9aSErnest Van Hoecke			function = LED_FUNCTION_STATUS;
178*f33a1f9aSErnest Van Hoecke			function-enumerator = <3>;
179*f33a1f9aSErnest Van Hoecke			gpios = <&gpio5 7 GPIO_ACTIVE_HIGH>;
180*f33a1f9aSErnest Van Hoecke		};
181*f33a1f9aSErnest Van Hoecke	};
182*f33a1f9aSErnest Van Hoecke
183*f33a1f9aSErnest Van Hoecke	/* AIN1_MODE - SODIMM 216 */
184*f33a1f9aSErnest Van Hoecke	ain1_mode_mux_ctrl: mux-controller-0 {
185*f33a1f9aSErnest Van Hoecke		compatible = "gpio-mux";
186*f33a1f9aSErnest Van Hoecke		pinctrl-names = "default";
187*f33a1f9aSErnest Van Hoecke		pinctrl-0 = <&pinctrl_gpio5>;
188*f33a1f9aSErnest Van Hoecke		#mux-control-cells = <0>;
189*f33a1f9aSErnest Van Hoecke		mux-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
190*f33a1f9aSErnest Van Hoecke	};
191*f33a1f9aSErnest Van Hoecke
192*f33a1f9aSErnest Van Hoecke	/* AIN2_MODE - SODIMM 218 */
193*f33a1f9aSErnest Van Hoecke	ain2_mode_mux_ctrl: mux-controller-1 {
194*f33a1f9aSErnest Van Hoecke		compatible = "gpio-mux";
195*f33a1f9aSErnest Van Hoecke		pinctrl-names = "default";
196*f33a1f9aSErnest Van Hoecke		pinctrl-0 = <&pinctrl_gpio6>;
197*f33a1f9aSErnest Van Hoecke		#mux-control-cells = <0>;
198*f33a1f9aSErnest Van Hoecke		mux-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
199*f33a1f9aSErnest Van Hoecke	};
200*f33a1f9aSErnest Van Hoecke
201*f33a1f9aSErnest Van Hoecke	reg_3v2_ain1: regulator-3v2-ain1 {
202*f33a1f9aSErnest Van Hoecke		compatible = "regulator-fixed";
203*f33a1f9aSErnest Van Hoecke		regulator-max-microvolt = <3200000>;
204*f33a1f9aSErnest Van Hoecke		regulator-min-microvolt = <3200000>;
205*f33a1f9aSErnest Van Hoecke		regulator-name = "+3V2_AIN1";
206*f33a1f9aSErnest Van Hoecke	};
207*f33a1f9aSErnest Van Hoecke
208*f33a1f9aSErnest Van Hoecke	reg_3v2_ain2: regulator-3v2-ain2 {
209*f33a1f9aSErnest Van Hoecke		compatible = "regulator-fixed";
210*f33a1f9aSErnest Van Hoecke		regulator-max-microvolt = <3200000>;
211*f33a1f9aSErnest Van Hoecke		regulator-min-microvolt = <3200000>;
212*f33a1f9aSErnest Van Hoecke		regulator-name = "+3V2_AIN2";
213*f33a1f9aSErnest Van Hoecke	};
214*f33a1f9aSErnest Van Hoecke
215*f33a1f9aSErnest Van Hoecke	/* AIN1 Voltage w/o AIN1_MODE gpio control */
216*f33a1f9aSErnest Van Hoecke	ain1_voltage_unmanaged: voltage-divider-ain1 {
217*f33a1f9aSErnest Van Hoecke		compatible = "voltage-divider";
218*f33a1f9aSErnest Van Hoecke		#io-channel-cells = <1>;
219*f33a1f9aSErnest Van Hoecke		io-channels = <&ivy_adc1 0>;
220*f33a1f9aSErnest Van Hoecke		full-ohms = <19>;
221*f33a1f9aSErnest Van Hoecke		output-ohms = <1>;
222*f33a1f9aSErnest Van Hoecke	};
223*f33a1f9aSErnest Van Hoecke
224*f33a1f9aSErnest Van Hoecke	/* AIN2 Voltage w/o AIN2_MODE gpio control */
225*f33a1f9aSErnest Van Hoecke	ain2_voltage_unmanaged: voltage-divider-ain2 {
226*f33a1f9aSErnest Van Hoecke		compatible = "voltage-divider";
227*f33a1f9aSErnest Van Hoecke		#io-channel-cells = <1>;
228*f33a1f9aSErnest Van Hoecke		io-channels = <&ivy_adc2 0>;
229*f33a1f9aSErnest Van Hoecke		full-ohms = <19>;
230*f33a1f9aSErnest Van Hoecke		output-ohms = <1>;
231*f33a1f9aSErnest Van Hoecke	};
232*f33a1f9aSErnest Van Hoecke};
233*f33a1f9aSErnest Van Hoecke
234*f33a1f9aSErnest Van Hoecke/* Verdin ADC_1, ADC_2, ADC_3 and ADC_4 */
235*f33a1f9aSErnest Van Hoecke&adc1 {
236*f33a1f9aSErnest Van Hoecke	status = "okay";
237*f33a1f9aSErnest Van Hoecke};
238*f33a1f9aSErnest Van Hoecke
239*f33a1f9aSErnest Van Hoecke/* Verdin ETH_1 (On-module PHY) */
240*f33a1f9aSErnest Van Hoecke&enetc_port0 {
241*f33a1f9aSErnest Van Hoecke	status = "okay";
242*f33a1f9aSErnest Van Hoecke};
243*f33a1f9aSErnest Van Hoecke
244*f33a1f9aSErnest Van Hoecke/* Verdin ETH_2_RGMII */
245*f33a1f9aSErnest Van Hoecke&enetc_port1 {
246*f33a1f9aSErnest Van Hoecke	phy-handle = <&ethphy2>;
247*f33a1f9aSErnest Van Hoecke	phy-mode = "rgmii-id";
248*f33a1f9aSErnest Van Hoecke
249*f33a1f9aSErnest Van Hoecke	status = "okay";
250*f33a1f9aSErnest Van Hoecke};
251*f33a1f9aSErnest Van Hoecke
252*f33a1f9aSErnest Van Hoecke/* Verdin CAN_1 */
253*f33a1f9aSErnest Van Hoecke&flexcan1 {
254*f33a1f9aSErnest Van Hoecke	status = "okay";
255*f33a1f9aSErnest Van Hoecke};
256*f33a1f9aSErnest Van Hoecke
257*f33a1f9aSErnest Van Hoecke/* Verdin CAN_2 */
258*f33a1f9aSErnest Van Hoecke&flexcan2 {
259*f33a1f9aSErnest Van Hoecke	status = "okay";
260*f33a1f9aSErnest Van Hoecke};
261*f33a1f9aSErnest Van Hoecke
262*f33a1f9aSErnest Van Hoecke&gpio1 {
263*f33a1f9aSErnest Van Hoecke	pinctrl-names = "default";
264*f33a1f9aSErnest Van Hoecke	pinctrl-0 = <&pinctrl_ctrl_sleep_moci>;
265*f33a1f9aSErnest Van Hoecke	gpio-line-names = "";
266*f33a1f9aSErnest Van Hoecke};
267*f33a1f9aSErnest Van Hoecke
268*f33a1f9aSErnest Van Hoecke&gpio2 {
269*f33a1f9aSErnest Van Hoecke	pinctrl-names = "default";
270*f33a1f9aSErnest Van Hoecke	pinctrl-0 = <&pinctrl_gpio2>,
271*f33a1f9aSErnest Van Hoecke		    <&pinctrl_gpio3>;
272*f33a1f9aSErnest Van Hoecke	gpio-line-names =
273*f33a1f9aSErnest Van Hoecke		"", /* 0 */
274*f33a1f9aSErnest Van Hoecke		"",
275*f33a1f9aSErnest Van Hoecke		"",
276*f33a1f9aSErnest Van Hoecke		"",
277*f33a1f9aSErnest Van Hoecke		"",
278*f33a1f9aSErnest Van Hoecke		"",
279*f33a1f9aSErnest Van Hoecke		"",
280*f33a1f9aSErnest Van Hoecke		"",
281*f33a1f9aSErnest Van Hoecke		"",
282*f33a1f9aSErnest Van Hoecke		"",
283*f33a1f9aSErnest Van Hoecke		"", /* 10 */
284*f33a1f9aSErnest Van Hoecke		"",
285*f33a1f9aSErnest Van Hoecke		"",
286*f33a1f9aSErnest Van Hoecke		"",
287*f33a1f9aSErnest Van Hoecke		"",
288*f33a1f9aSErnest Van Hoecke		"",
289*f33a1f9aSErnest Van Hoecke		"",
290*f33a1f9aSErnest Van Hoecke		"",
291*f33a1f9aSErnest Van Hoecke		"GPIO2", /* Verdin GPIO_2 - SODIMM 208 */
292*f33a1f9aSErnest Van Hoecke		"",
293*f33a1f9aSErnest Van Hoecke		"", /* 20 */
294*f33a1f9aSErnest Van Hoecke		"",
295*f33a1f9aSErnest Van Hoecke		"",
296*f33a1f9aSErnest Van Hoecke		"",
297*f33a1f9aSErnest Van Hoecke		"GPIO3", /* Verdin GPIO_3 - SODIMM 210 */
298*f33a1f9aSErnest Van Hoecke		"",
299*f33a1f9aSErnest Van Hoecke		"",
300*f33a1f9aSErnest Van Hoecke		"",
301*f33a1f9aSErnest Van Hoecke		"",
302*f33a1f9aSErnest Van Hoecke		"",
303*f33a1f9aSErnest Van Hoecke		"", /* 30 */
304*f33a1f9aSErnest Van Hoecke		"";
305*f33a1f9aSErnest Van Hoecke};
306*f33a1f9aSErnest Van Hoecke
307*f33a1f9aSErnest Van Hoecke&gpio3 {
308*f33a1f9aSErnest Van Hoecke	gpio-line-names = "";
309*f33a1f9aSErnest Van Hoecke};
310*f33a1f9aSErnest Van Hoecke
311*f33a1f9aSErnest Van Hoecke&gpio4 {
312*f33a1f9aSErnest Van Hoecke	gpio-line-names = "";
313*f33a1f9aSErnest Van Hoecke};
314*f33a1f9aSErnest Van Hoecke
315*f33a1f9aSErnest Van Hoecke&gpio5 {
316*f33a1f9aSErnest Van Hoecke	pinctrl-names = "default";
317*f33a1f9aSErnest Van Hoecke	pinctrl-0 = <&pinctrl_qspi1_cs2_gpio>,
318*f33a1f9aSErnest Van Hoecke		    <&pinctrl_qspi1_dqs_gpio>,
319*f33a1f9aSErnest Van Hoecke		    <&pinctrl_qspi1_io0_gpio>,
320*f33a1f9aSErnest Van Hoecke		    <&pinctrl_qspi1_io1_gpio>,
321*f33a1f9aSErnest Van Hoecke		    <&pinctrl_qspi1_io2_gpio>,
322*f33a1f9aSErnest Van Hoecke		    <&pinctrl_qspi1_io3_gpio>;
323*f33a1f9aSErnest Van Hoecke	gpio-line-names =
324*f33a1f9aSErnest Van Hoecke		"DIGI_1", /* SODIMM 56 */
325*f33a1f9aSErnest Van Hoecke		"DIGI_2", /* SODIMM 58 */
326*f33a1f9aSErnest Van Hoecke		"REL1",   /* SODIMM 60 */
327*f33a1f9aSErnest Van Hoecke		"REL2",   /* SODIMM 62 */
328*f33a1f9aSErnest Van Hoecke		"",
329*f33a1f9aSErnest Van Hoecke		"",
330*f33a1f9aSErnest Van Hoecke		"",
331*f33a1f9aSErnest Van Hoecke		"",
332*f33a1f9aSErnest Van Hoecke		"REL4", /* SODIMM 66 */
333*f33a1f9aSErnest Van Hoecke		"",
334*f33a1f9aSErnest Van Hoecke		"", /* 10 */
335*f33a1f9aSErnest Van Hoecke		"REL3", /* SODIMM 64 */
336*f33a1f9aSErnest Van Hoecke		"",
337*f33a1f9aSErnest Van Hoecke		"",
338*f33a1f9aSErnest Van Hoecke		"",
339*f33a1f9aSErnest Van Hoecke		"",
340*f33a1f9aSErnest Van Hoecke		"",
341*f33a1f9aSErnest Van Hoecke		"";
342*f33a1f9aSErnest Van Hoecke};
343*f33a1f9aSErnest Van Hoecke
344*f33a1f9aSErnest Van Hoecke/* Verdin I2C_1 */
345*f33a1f9aSErnest Van Hoecke&lpi2c4 {
346*f33a1f9aSErnest Van Hoecke	status = "okay";
347*f33a1f9aSErnest Van Hoecke
348*f33a1f9aSErnest Van Hoecke	temperature-sensor@4f {
349*f33a1f9aSErnest Van Hoecke		compatible = "ti,tmp1075";
350*f33a1f9aSErnest Van Hoecke		reg = <0x4f>;
351*f33a1f9aSErnest Van Hoecke	};
352*f33a1f9aSErnest Van Hoecke
353*f33a1f9aSErnest Van Hoecke	carrier_eeprom: eeprom@57 {
354*f33a1f9aSErnest Van Hoecke		compatible = "st,24c02", "atmel,24c02";
355*f33a1f9aSErnest Van Hoecke		reg = <0x57>;
356*f33a1f9aSErnest Van Hoecke		pagesize = <16>;
357*f33a1f9aSErnest Van Hoecke	};
358*f33a1f9aSErnest Van Hoecke};
359*f33a1f9aSErnest Van Hoecke
360*f33a1f9aSErnest Van Hoecke/* Verdin I2C_4_CSI */
361*f33a1f9aSErnest Van Hoecke&lpi2c5 {
362*f33a1f9aSErnest Van Hoecke	status = "okay";
363*f33a1f9aSErnest Van Hoecke
364*f33a1f9aSErnest Van Hoecke	ivy_adc1: adc@40 {
365*f33a1f9aSErnest Van Hoecke		compatible = "ti,ads1119";
366*f33a1f9aSErnest Van Hoecke		reg = <0x40>;
367*f33a1f9aSErnest Van Hoecke		interrupt-parent = <&som_gpio_expander>;
368*f33a1f9aSErnest Van Hoecke		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
369*f33a1f9aSErnest Van Hoecke		avdd-supply = <&reg_3v2_ain1>;
370*f33a1f9aSErnest Van Hoecke		dvdd-supply = <&reg_3v2_ain1>;
371*f33a1f9aSErnest Van Hoecke		vref-supply = <&reg_3v2_ain1>;
372*f33a1f9aSErnest Van Hoecke		#address-cells = <1>;
373*f33a1f9aSErnest Van Hoecke		#io-channel-cells = <1>;
374*f33a1f9aSErnest Van Hoecke		#size-cells = <0>;
375*f33a1f9aSErnest Van Hoecke
376*f33a1f9aSErnest Van Hoecke		/* AIN1 0-33V Voltage Input */
377*f33a1f9aSErnest Van Hoecke		channel@0 {
378*f33a1f9aSErnest Van Hoecke			reg = <0>;
379*f33a1f9aSErnest Van Hoecke			diff-channels = <0 1>;
380*f33a1f9aSErnest Van Hoecke		};
381*f33a1f9aSErnest Van Hoecke
382*f33a1f9aSErnest Van Hoecke		/* AIN1 0-20mA Current Input */
383*f33a1f9aSErnest Van Hoecke		channel@1 {
384*f33a1f9aSErnest Van Hoecke			reg = <1>;
385*f33a1f9aSErnest Van Hoecke			diff-channels = <2 3>;
386*f33a1f9aSErnest Van Hoecke		};
387*f33a1f9aSErnest Van Hoecke	};
388*f33a1f9aSErnest Van Hoecke
389*f33a1f9aSErnest Van Hoecke	ivy_adc2: adc@41 {
390*f33a1f9aSErnest Van Hoecke		compatible = "ti,ads1119";
391*f33a1f9aSErnest Van Hoecke		reg = <0x41>;
392*f33a1f9aSErnest Van Hoecke		interrupt-parent = <&som_gpio_expander>;
393*f33a1f9aSErnest Van Hoecke		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
394*f33a1f9aSErnest Van Hoecke		avdd-supply = <&reg_3v2_ain2>;
395*f33a1f9aSErnest Van Hoecke		dvdd-supply = <&reg_3v2_ain2>;
396*f33a1f9aSErnest Van Hoecke		vref-supply = <&reg_3v2_ain2>;
397*f33a1f9aSErnest Van Hoecke		#address-cells = <1>;
398*f33a1f9aSErnest Van Hoecke		#io-channel-cells = <1>;
399*f33a1f9aSErnest Van Hoecke		#size-cells = <0>;
400*f33a1f9aSErnest Van Hoecke
401*f33a1f9aSErnest Van Hoecke		/* AIN2 0-33V Voltage Input */
402*f33a1f9aSErnest Van Hoecke		channel@0 {
403*f33a1f9aSErnest Van Hoecke			reg = <0>;
404*f33a1f9aSErnest Van Hoecke			diff-channels = <0 1>;
405*f33a1f9aSErnest Van Hoecke		};
406*f33a1f9aSErnest Van Hoecke
407*f33a1f9aSErnest Van Hoecke		/* AIN2 0-20mA Current Input */
408*f33a1f9aSErnest Van Hoecke		channel@1 {
409*f33a1f9aSErnest Van Hoecke			reg = <1>;
410*f33a1f9aSErnest Van Hoecke			diff-channels = <2 3>;
411*f33a1f9aSErnest Van Hoecke		};
412*f33a1f9aSErnest Van Hoecke	};
413*f33a1f9aSErnest Van Hoecke};
414*f33a1f9aSErnest Van Hoecke
415*f33a1f9aSErnest Van Hoecke/* Verdin SPI_1 */
416*f33a1f9aSErnest Van Hoecke&lpspi6 {
417*f33a1f9aSErnest Van Hoecke	pinctrl-names = "default";
418*f33a1f9aSErnest Van Hoecke	pinctrl-0 = <&pinctrl_lpspi6>,
419*f33a1f9aSErnest Van Hoecke		    <&pinctrl_spi1_cs>,
420*f33a1f9aSErnest Van Hoecke		    <&pinctrl_gpio1>,
421*f33a1f9aSErnest Van Hoecke		    <&pinctrl_gpio4>;
422*f33a1f9aSErnest Van Hoecke	cs-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>,
423*f33a1f9aSErnest Van Hoecke		   <&som_gpio_expander 13 GPIO_ACTIVE_LOW>,
424*f33a1f9aSErnest Van Hoecke		   <&gpio2 0 GPIO_ACTIVE_LOW>,
425*f33a1f9aSErnest Van Hoecke		   <&gpio5 12 GPIO_ACTIVE_LOW>;
426*f33a1f9aSErnest Van Hoecke
427*f33a1f9aSErnest Van Hoecke	tpm@2 {
428*f33a1f9aSErnest Van Hoecke		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
429*f33a1f9aSErnest Van Hoecke		reg = <2>;
430*f33a1f9aSErnest Van Hoecke		spi-max-frequency = <18500000>;
431*f33a1f9aSErnest Van Hoecke	};
432*f33a1f9aSErnest Van Hoecke
433*f33a1f9aSErnest Van Hoecke	fram@3 {
434*f33a1f9aSErnest Van Hoecke		compatible = "fujitsu,mb85rs256", "atmel,at25";
435*f33a1f9aSErnest Van Hoecke		reg = <3>;
436*f33a1f9aSErnest Van Hoecke		address-width = <16>;
437*f33a1f9aSErnest Van Hoecke		size = <32768>;
438*f33a1f9aSErnest Van Hoecke		spi-max-frequency = <33000000>;
439*f33a1f9aSErnest Van Hoecke		pagesize = <1>;
440*f33a1f9aSErnest Van Hoecke	};
441*f33a1f9aSErnest Van Hoecke};
442*f33a1f9aSErnest Van Hoecke
443*f33a1f9aSErnest Van Hoecke/* Verdin UART_3, used as the Linux console */
444*f33a1f9aSErnest Van Hoecke&lpuart1 {
445*f33a1f9aSErnest Van Hoecke	status = "okay";
446*f33a1f9aSErnest Van Hoecke};
447*f33a1f9aSErnest Van Hoecke
448*f33a1f9aSErnest Van Hoecke/* Verdin UART_1 */
449*f33a1f9aSErnest Van Hoecke&lpuart7 {
450*f33a1f9aSErnest Van Hoecke	status = "okay";
451*f33a1f9aSErnest Van Hoecke};
452*f33a1f9aSErnest Van Hoecke
453*f33a1f9aSErnest Van Hoecke/* Verdin UART_2, through RS485 transceiver */
454*f33a1f9aSErnest Van Hoecke&lpuart8 {
455*f33a1f9aSErnest Van Hoecke	rs485-rts-active-low;
456*f33a1f9aSErnest Van Hoecke	rs485-rx-during-tx;
457*f33a1f9aSErnest Van Hoecke	linux,rs485-enabled-at-boot-time;
458*f33a1f9aSErnest Van Hoecke
459*f33a1f9aSErnest Van Hoecke	status = "okay";
460*f33a1f9aSErnest Van Hoecke};
461*f33a1f9aSErnest Van Hoecke
462*f33a1f9aSErnest Van Hoecke&netc_emdio {
463*f33a1f9aSErnest Van Hoecke	ethphy2: ethernet-phy@2 {
464*f33a1f9aSErnest Van Hoecke		reg = <2>;
465*f33a1f9aSErnest Van Hoecke		pinctrl-names = "default";
466*f33a1f9aSErnest Van Hoecke		pinctrl-0 = <&pinctrl_eth2_rgmii_int>;
467*f33a1f9aSErnest Van Hoecke		interrupt-parent = <&gpio1>;
468*f33a1f9aSErnest Van Hoecke		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
469*f33a1f9aSErnest Van Hoecke		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
470*f33a1f9aSErnest Van Hoecke		ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
471*f33a1f9aSErnest Van Hoecke	};
472*f33a1f9aSErnest Van Hoecke};
473*f33a1f9aSErnest Van Hoecke
474*f33a1f9aSErnest Van Hoecke/* Verdin PCIE_1 */
475*f33a1f9aSErnest Van Hoecke&pcie0 {
476*f33a1f9aSErnest Van Hoecke	status = "okay";
477*f33a1f9aSErnest Van Hoecke};
478*f33a1f9aSErnest Van Hoecke
479*f33a1f9aSErnest Van Hoecke&som_gpio_expander {
480*f33a1f9aSErnest Van Hoecke	gpio-line-names = "";
481*f33a1f9aSErnest Van Hoecke};
482*f33a1f9aSErnest Van Hoecke
483*f33a1f9aSErnest Van Hoecke/* Verdin USB_1 */
484*f33a1f9aSErnest Van Hoecke&usb2 {
485*f33a1f9aSErnest Van Hoecke	status = "okay";
486*f33a1f9aSErnest Van Hoecke};
487*f33a1f9aSErnest Van Hoecke
488*f33a1f9aSErnest Van Hoecke/* Verdin USB_2 */
489*f33a1f9aSErnest Van Hoecke&usb3 {
490*f33a1f9aSErnest Van Hoecke	fsl,permanently-attached;
491*f33a1f9aSErnest Van Hoecke
492*f33a1f9aSErnest Van Hoecke	status = "okay";
493*f33a1f9aSErnest Van Hoecke};
494*f33a1f9aSErnest Van Hoecke
495*f33a1f9aSErnest Van Hoecke&usb3_phy {
496*f33a1f9aSErnest Van Hoecke	status = "okay";
497*f33a1f9aSErnest Van Hoecke};
498*f33a1f9aSErnest Van Hoecke
499*f33a1f9aSErnest Van Hoecke/* Verdin SD_1 */
500*f33a1f9aSErnest Van Hoecke&usdhc2 {
501*f33a1f9aSErnest Van Hoecke	status = "okay";
502*f33a1f9aSErnest Van Hoecke};
503*f33a1f9aSErnest Van Hoecke
504*f33a1f9aSErnest Van Hoecke&scmi_iomuxc {
505*f33a1f9aSErnest Van Hoecke	pinctrl_ivy_leds: ivyledsgrp {
506*f33a1f9aSErnest Van Hoecke		fsl,pins = <IMX95_PAD_GPIO_IO16__GPIO2_IO_BIT16		0x11e>, /* SODIMM 30 */
507*f33a1f9aSErnest Van Hoecke			   <IMX95_PAD_GPIO_IO26__GPIO2_IO_BIT26		0x11e>, /* SODIMM 32 */
508*f33a1f9aSErnest Van Hoecke			   <IMX95_PAD_GPIO_IO21__GPIO2_IO_BIT21		0x11e>, /* SODIMM 34 */
509*f33a1f9aSErnest Van Hoecke			   <IMX95_PAD_GPIO_IO20__GPIO2_IO_BIT20		0x11e>, /* SODIMM 36 */
510*f33a1f9aSErnest Van Hoecke			   <IMX95_PAD_XSPI1_DATA5__GPIO5_IO_BIT5	0x11e>, /* SODIMM 44 */
511*f33a1f9aSErnest Van Hoecke			   <IMX95_PAD_XSPI1_DATA4__GPIO5_IO_BIT4	0x11e>, /* SODIMM 46 */
512*f33a1f9aSErnest Van Hoecke			   <IMX95_PAD_XSPI1_DATA7__GPIO5_IO_BIT7	0x11e>, /* SODIMM 48 */
513*f33a1f9aSErnest Van Hoecke			   <IMX95_PAD_XSPI1_SS0_B__GPIO5_IO_BIT10	0x11e>; /* SODIMM 54 */
514*f33a1f9aSErnest Van Hoecke	};
515*f33a1f9aSErnest Van Hoecke};
516