xref: /linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mp-hummingboard-pulse-m2con.dtsi (revision 0f048c878ee32a4259dbf28e0ad8fd0b71ee0085)
1*2a222aa2SJosua Mayer// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*2a222aa2SJosua Mayer/*
3*2a222aa2SJosua Mayer * Copyright 2025 Josua Mayer <josua@solid-run.com>
4*2a222aa2SJosua Mayer */
5*2a222aa2SJosua Mayer
6*2a222aa2SJosua Mayer/ {
7*2a222aa2SJosua Mayer	rfkill-m2-gnss {
8*2a222aa2SJosua Mayer		compatible = "rfkill-gpio";
9*2a222aa2SJosua Mayer		pinctrl-names = "default";
10*2a222aa2SJosua Mayer		pinctrl-0 = <&m2_gnss_rfkill_pins>;
11*2a222aa2SJosua Mayer		label = "m.2 GNSS";
12*2a222aa2SJosua Mayer		radio-type = "gps";
13*2a222aa2SJosua Mayer		/* rfkill-gpio inverts internally */
14*2a222aa2SJosua Mayer		shutdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
15*2a222aa2SJosua Mayer	};
16*2a222aa2SJosua Mayer
17*2a222aa2SJosua Mayer	/* M.2 is B-keyed, so w-disable is for WWAN */
18*2a222aa2SJosua Mayer	rfkill-m2-wwan {
19*2a222aa2SJosua Mayer		compatible = "rfkill-gpio";
20*2a222aa2SJosua Mayer		pinctrl-names = "default";
21*2a222aa2SJosua Mayer		pinctrl-0 = <&m2_wwan_rfkill_pins>;
22*2a222aa2SJosua Mayer		label = "m.2 WWAN";
23*2a222aa2SJosua Mayer		radio-type = "wwan";
24*2a222aa2SJosua Mayer		/* rfkill-gpio inverts internally */
25*2a222aa2SJosua Mayer		shutdown-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
26*2a222aa2SJosua Mayer	};
27*2a222aa2SJosua Mayer};
28*2a222aa2SJosua Mayer
29*2a222aa2SJosua Mayer&iomuxc {
30*2a222aa2SJosua Mayer	m2_gnss_rfkill_pins: pinctrl-m2-gnss-rfkill-grp {
31*2a222aa2SJosua Mayer		fsl,pins = <
32*2a222aa2SJosua Mayer			/* weak i/o, open drain */
33*2a222aa2SJosua Mayer			MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07		0x20
34*2a222aa2SJosua Mayer		>;
35*2a222aa2SJosua Mayer	};
36*2a222aa2SJosua Mayer
37*2a222aa2SJosua Mayer	m2_reset_pins: pinctrl-m2-reset-grp {
38*2a222aa2SJosua Mayer		fsl,pins = <
39*2a222aa2SJosua Mayer			/*
40*2a222aa2SJosua Mayer			 * 3.3V domain on SoC, set open-drain to ensure
41*2a222aa2SJosua Mayer			 * 1.8V logic on connector
42*2a222aa2SJosua Mayer			 */
43*2a222aa2SJosua Mayer			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x20
44*2a222aa2SJosua Mayer		>;
45*2a222aa2SJosua Mayer	};
46*2a222aa2SJosua Mayer
47*2a222aa2SJosua Mayer	m2_wwan_rfkill_pins: pinctrl-m2-wwan-rfkill-grp {
48*2a222aa2SJosua Mayer		fsl,pins = <
49*2a222aa2SJosua Mayer			/* weak i/o, open drain */
50*2a222aa2SJosua Mayer			MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13		0x20
51*2a222aa2SJosua Mayer		>;
52*2a222aa2SJosua Mayer	};
53*2a222aa2SJosua Mayer
54*2a222aa2SJosua Mayer	m2_wwan_wake_pins: pinctrl-m2-wwan-wake-grp {
55*2a222aa2SJosua Mayer		fsl,pins = <
56*2a222aa2SJosua Mayer			/* weak i/o, open drain */
57*2a222aa2SJosua Mayer			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12		0x20
58*2a222aa2SJosua Mayer		>;
59*2a222aa2SJosua Mayer	};
60*2a222aa2SJosua Mayer};
61