xref: /linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mn-vhip4-evalboard-v2.dts (revision 6589b3d76db2d6adbf8f2084c303fb24252a0dc6)
1*5eb7405dSFedor Ross// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*5eb7405dSFedor Ross/*
3*5eb7405dSFedor Ross * Copyright 2024 Fedor Ross <fedor.ross@ifm.com>
4*5eb7405dSFedor Ross */
5*5eb7405dSFedor Ross
6*5eb7405dSFedor Ross/dts-v1/;
7*5eb7405dSFedor Ross
8*5eb7405dSFedor Ross#include "imx8mn-vhip4-evalboard-common.dtsi"
9*5eb7405dSFedor Ross
10*5eb7405dSFedor Ross/ {
11*5eb7405dSFedor Ross	model = "ifm i.MX8MNano VHIP4 Evaluation Board v2";
12*5eb7405dSFedor Ross	compatible = "ifm,imx8mn-vhip4-evalboard-v2", "ifm,imx8mn-vhip4-evalboard",
13*5eb7405dSFedor Ross		     "ifm,imx8mn-vhip4", "fsl,imx8mn";
14*5eb7405dSFedor Ross
15*5eb7405dSFedor Ross	multi-led {
16*5eb7405dSFedor Ross		compatible = "leds-group-multicolor";
17*5eb7405dSFedor Ross		color = <LED_COLOR_ID_RGB>;
18*5eb7405dSFedor Ross		function = LED_FUNCTION_INDICATOR;
19*5eb7405dSFedor Ross		leds = <&rgb_0>, <&rgb_1>, <&rgb_2>;
20*5eb7405dSFedor Ross	};
21*5eb7405dSFedor Ross};
22*5eb7405dSFedor Ross
23*5eb7405dSFedor Ross&ifm_led {
24*5eb7405dSFedor Ross	pinctrl-1 = <&pinctrl_gpio_led_v2>;
25*5eb7405dSFedor Ross
26*5eb7405dSFedor Ross	rgb_0: rgb-led-red {
27*5eb7405dSFedor Ross		color = <LED_COLOR_ID_RED>;
28*5eb7405dSFedor Ross		gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
29*5eb7405dSFedor Ross		default-state = "keep";
30*5eb7405dSFedor Ross	};
31*5eb7405dSFedor Ross
32*5eb7405dSFedor Ross	rgb_1: rgb-led-green {
33*5eb7405dSFedor Ross		color = <LED_COLOR_ID_GREEN>;
34*5eb7405dSFedor Ross		gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
35*5eb7405dSFedor Ross		default-state = "keep";
36*5eb7405dSFedor Ross	};
37*5eb7405dSFedor Ross
38*5eb7405dSFedor Ross	rgb_2: rgb-led-blue {
39*5eb7405dSFedor Ross		color = <LED_COLOR_ID_BLUE>;
40*5eb7405dSFedor Ross		gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
41*5eb7405dSFedor Ross		default-state = "keep";
42*5eb7405dSFedor Ross	};
43*5eb7405dSFedor Ross};
44*5eb7405dSFedor Ross
45*5eb7405dSFedor Ross&ecspi1 {
46*5eb7405dSFedor Ross	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, <&gpio1 11 GPIO_ACTIVE_LOW>;
47*5eb7405dSFedor Ross	status = "okay";
48*5eb7405dSFedor Ross
49*5eb7405dSFedor Ross	eeprom@0 {
50*5eb7405dSFedor Ross		compatible = "fujitsu,mb85rs64", "atmel,at25";
51*5eb7405dSFedor Ross		reg = <0>;
52*5eb7405dSFedor Ross		spi-max-frequency = <20000000>;
53*5eb7405dSFedor Ross		spi-cpha;
54*5eb7405dSFedor Ross		spi-cpol;
55*5eb7405dSFedor Ross		pagesize = <1>;
56*5eb7405dSFedor Ross		size = <32768>;
57*5eb7405dSFedor Ross		address-width = <16>;
58*5eb7405dSFedor Ross	};
59*5eb7405dSFedor Ross};
60*5eb7405dSFedor Ross
61*5eb7405dSFedor Ross&ecspi3 {
62*5eb7405dSFedor Ross	cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
63*5eb7405dSFedor Ross	status = "okay";
64*5eb7405dSFedor Ross
65*5eb7405dSFedor Ross	can0: can@0 {
66*5eb7405dSFedor Ross		compatible = "microchip,mcp2518fd";
67*5eb7405dSFedor Ross		pinctrl-names = "default";
68*5eb7405dSFedor Ross		pinctrl-0 = <&pinctrl_mcp2518>;
69*5eb7405dSFedor Ross		reg = <0>;
70*5eb7405dSFedor Ross		clocks = <&can_clk40m>;
71*5eb7405dSFedor Ross		interrupt-parent = <&gpio1>;
72*5eb7405dSFedor Ross		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
73*5eb7405dSFedor Ross		microchip,rx-int-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
74*5eb7405dSFedor Ross		spi-max-frequency = <20000000>;
75*5eb7405dSFedor Ross	};
76*5eb7405dSFedor Ross};
77*5eb7405dSFedor Ross
78*5eb7405dSFedor Ross&i2c1 {
79*5eb7405dSFedor Ross	scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
80*5eb7405dSFedor Ross	sda-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
81*5eb7405dSFedor Ross	status = "okay";
82*5eb7405dSFedor Ross
83*5eb7405dSFedor Ross	temperature-sensor@48 {
84*5eb7405dSFedor Ross		compatible = "ti,tmp1075";
85*5eb7405dSFedor Ross		reg = <0x48>;
86*5eb7405dSFedor Ross	};
87*5eb7405dSFedor Ross
88*5eb7405dSFedor Ross	eeprom@54 {
89*5eb7405dSFedor Ross		compatible = "atmel,24c128";
90*5eb7405dSFedor Ross		reg = <0x54>;
91*5eb7405dSFedor Ross	};
92*5eb7405dSFedor Ross};
93*5eb7405dSFedor Ross
94*5eb7405dSFedor Ross&i2c3 {
95*5eb7405dSFedor Ross	scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
96*5eb7405dSFedor Ross	sda-gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
97*5eb7405dSFedor Ross	status = "okay";
98*5eb7405dSFedor Ross};
99*5eb7405dSFedor Ross
100*5eb7405dSFedor Ross&ifm_pmic {
101*5eb7405dSFedor Ross	interrupt-parent = <&gpio5>;
102*5eb7405dSFedor Ross	interrupts = <17 GPIO_ACTIVE_LOW>;
103*5eb7405dSFedor Ross};
104*5eb7405dSFedor Ross
105*5eb7405dSFedor Ross&iomuxc {
106*5eb7405dSFedor Ross	pinctrl_ecspi1_cs: ecspi1-cs-grp {
107*5eb7405dSFedor Ross		fsl,pins = <
108*5eb7405dSFedor Ross			/* KS8794 nCS */
109*5eb7405dSFedor Ross			MX8MN_IOMUXC_GPIO1_IO11_GPIO1_IO11		0x150
110*5eb7405dSFedor Ross			/* Retain memory nCS (FRAM or MRAM) */
111*5eb7405dSFedor Ross			MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9		0x150
112*5eb7405dSFedor Ross			/* RETAIN_nHOLD */
113*5eb7405dSFedor Ross			MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4			0x140
114*5eb7405dSFedor Ross		>;
115*5eb7405dSFedor Ross	};
116*5eb7405dSFedor Ross
117*5eb7405dSFedor Ross	pinctrl_ecspi3_cs: ecspi3-cs-grp {
118*5eb7405dSFedor Ross		fsl,pins = <
119*5eb7405dSFedor Ross			/* MCP2518FD nCS */
120*5eb7405dSFedor Ross			MX8MN_IOMUXC_UART2_TXD_GPIO5_IO25		0x150
121*5eb7405dSFedor Ross		>;
122*5eb7405dSFedor Ross	};
123*5eb7405dSFedor Ross
124*5eb7405dSFedor Ross	pinctrl_gpio_led_v2: gpioled-v2-grp {
125*5eb7405dSFedor Ross		fsl,pins = <
126*5eb7405dSFedor Ross			/* LED_RGB_RED */
127*5eb7405dSFedor Ross			MX8MN_IOMUXC_SD2_DATA2_GPIO2_IO17		0x116
128*5eb7405dSFedor Ross			/* LED_RGB_GREEN */
129*5eb7405dSFedor Ross			MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19		0x116
130*5eb7405dSFedor Ross			/* LED_RGB_BLUE */
131*5eb7405dSFedor Ross			MX8MN_IOMUXC_SD2_WP_GPIO2_IO20			0x116
132*5eb7405dSFedor Ross		>;
133*5eb7405dSFedor Ross	};
134*5eb7405dSFedor Ross
135*5eb7405dSFedor Ross	pinctrl_i2c1: i2c1-grp {
136*5eb7405dSFedor Ross		fsl,pins = <
137*5eb7405dSFedor Ross			MX8MN_IOMUXC_SD1_DATA4_I2C1_SCL			0x40000056
138*5eb7405dSFedor Ross			MX8MN_IOMUXC_SD1_DATA5_I2C1_SDA			0x400000d6
139*5eb7405dSFedor Ross		>;
140*5eb7405dSFedor Ross	};
141*5eb7405dSFedor Ross
142*5eb7405dSFedor Ross	pinctrl_i2c1_gpio: i2c1-gpio-grp {
143*5eb7405dSFedor Ross		fsl,pins = <
144*5eb7405dSFedor Ross			MX8MN_IOMUXC_SD1_DATA4_GPIO2_IO6		0x56
145*5eb7405dSFedor Ross			MX8MN_IOMUXC_SD1_DATA5_GPIO2_IO7		0xd6
146*5eb7405dSFedor Ross			/* CFG_EEPROM_WP */
147*5eb7405dSFedor Ross			MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11		0x140
148*5eb7405dSFedor Ross			/* RTC_nIRQ */
149*5eb7405dSFedor Ross			MX8MN_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5		0x116
150*5eb7405dSFedor Ross			/* LOG_EE_WP */
151*5eb7405dSFedor Ross			MX8MN_IOMUXC_SPDIF_TX_GPIO5_IO3			0x140
152*5eb7405dSFedor Ross		>;
153*5eb7405dSFedor Ross	};
154*5eb7405dSFedor Ross
155*5eb7405dSFedor Ross	pinctrl_i2c3: i2c3-grp {
156*5eb7405dSFedor Ross		fsl,pins = <
157*5eb7405dSFedor Ross			MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL			0x40000056
158*5eb7405dSFedor Ross			MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA			0x400000d6
159*5eb7405dSFedor Ross		>;
160*5eb7405dSFedor Ross	};
161*5eb7405dSFedor Ross
162*5eb7405dSFedor Ross	pinctrl_i2c3_gpio: i2c3-gpio-grp {
163*5eb7405dSFedor Ross		fsl,pins = <
164*5eb7405dSFedor Ross			MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18		0x56
165*5eb7405dSFedor Ross			MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19		0xd6
166*5eb7405dSFedor Ross		>;
167*5eb7405dSFedor Ross	};
168*5eb7405dSFedor Ross
169*5eb7405dSFedor Ross	pinctrl_mcp2518: mcp2518-grp {
170*5eb7405dSFedor Ross		fsl,pins = <
171*5eb7405dSFedor Ross			/* CAN0_CLKO */
172*5eb7405dSFedor Ross			MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0		0x116
173*5eb7405dSFedor Ross			/* CAN0_nINT0 */
174*5eb7405dSFedor Ross			MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x116
175*5eb7405dSFedor Ross			/* CAN0_nINT1 */
176*5eb7405dSFedor Ross			MX8MN_IOMUXC_GPIO1_IO04_GPIO1_IO4		0x116
177*5eb7405dSFedor Ross			/* CAN0_nINT */
178*5eb7405dSFedor Ross			MX8MN_IOMUXC_GPIO1_IO01_GPIO1_IO1		0x116
179*5eb7405dSFedor Ross		>;
180*5eb7405dSFedor Ross	};
181*5eb7405dSFedor Ross
182*5eb7405dSFedor Ross	pinctrl_pmic: pmic-irq-grp {
183*5eb7405dSFedor Ross		fsl,pins = <
184*5eb7405dSFedor Ross			/* PMIC_nIRQ */
185*5eb7405dSFedor Ross			MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17		0x1d6
186*5eb7405dSFedor Ross		>;
187*5eb7405dSFedor Ross	};
188*5eb7405dSFedor Ross
189*5eb7405dSFedor Ross	pinctrl_uart3: uart3-grp {
190*5eb7405dSFedor Ross		fsl,pins = <
191*5eb7405dSFedor Ross			MX8MN_IOMUXC_SD1_DATA6_UART3_DCE_TX		0x142
192*5eb7405dSFedor Ross			MX8MN_IOMUXC_SD1_DATA7_UART3_DCE_RX		0x142
193*5eb7405dSFedor Ross		>;
194*5eb7405dSFedor Ross	};
195*5eb7405dSFedor Ross
196*5eb7405dSFedor Ross	pinctrl_wdog: wdog-grp {
197*5eb7405dSFedor Ross		fsl,pins = <
198*5eb7405dSFedor Ross			MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B		0x64
199*5eb7405dSFedor Ross		>;
200*5eb7405dSFedor Ross	};
201*5eb7405dSFedor Ross};
202*5eb7405dSFedor Ross
203*5eb7405dSFedor Ross&gpio2 {
204*5eb7405dSFedor Ross	gpio-line-names =
205*5eb7405dSFedor Ross		"", "", "", "", "", "", "", "",
206*5eb7405dSFedor Ross		"", "", "",
207*5eb7405dSFedor Ross		"ifm_device_info_eeprom_wp",
208*5eb7405dSFedor Ross		"", "", "", "",
209*5eb7405dSFedor Ross		"", "", "", "", "", "", "", "",
210*5eb7405dSFedor Ross		"", "", "", "", "", "", "", "";
211*5eb7405dSFedor Ross};
212*5eb7405dSFedor Ross
213*5eb7405dSFedor Ross&gpio5 {
214*5eb7405dSFedor Ross	gpio-line-names =
215*5eb7405dSFedor Ross		"", "", "",
216*5eb7405dSFedor Ross		"ifm_logging_eeprom_wp",
217*5eb7405dSFedor Ross		"", "", "", "",
218*5eb7405dSFedor Ross		"", "", "", "", "", "", "", "",
219*5eb7405dSFedor Ross		"", "", "", "",	"", "", "", "",
220*5eb7405dSFedor Ross		"", "", "", "", "", "", "", "";
221*5eb7405dSFedor Ross};
222