xref: /linux/scripts/dtc/include-prefixes/arm64/broadcom/stingray/bcm958742-base.dtsi (revision 552df26309f3aa5b9ead23c13abc2a3b2dc23eaf)
1d4b4aba6SAnup Patel/*
2d4b4aba6SAnup Patel *  BSD LICENSE
3d4b4aba6SAnup Patel *
4d4b4aba6SAnup Patel *  Copyright(c) 2016-2017 Broadcom.  All rights reserved.
5d4b4aba6SAnup Patel *
6d4b4aba6SAnup Patel *  Redistribution and use in source and binary forms, with or without
7d4b4aba6SAnup Patel *  modification, are permitted provided that the following conditions
8d4b4aba6SAnup Patel *  are met:
9d4b4aba6SAnup Patel *
10d4b4aba6SAnup Patel *    * Redistributions of source code must retain the above copyright
11d4b4aba6SAnup Patel *      notice, this list of conditions and the following disclaimer.
12d4b4aba6SAnup Patel *    * Redistributions in binary form must reproduce the above copyright
13d4b4aba6SAnup Patel *      notice, this list of conditions and the following disclaimer in
14d4b4aba6SAnup Patel *      the documentation and/or other materials provided with the
15d4b4aba6SAnup Patel *      distribution.
16d4b4aba6SAnup Patel *    * Neither the name of Broadcom nor the names of its
17d4b4aba6SAnup Patel *      contributors may be used to endorse or promote products derived
18d4b4aba6SAnup Patel *      from this software without specific prior written permission.
19d4b4aba6SAnup Patel *
20d4b4aba6SAnup Patel *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21d4b4aba6SAnup Patel *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22d4b4aba6SAnup Patel *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23d4b4aba6SAnup Patel *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24d4b4aba6SAnup Patel *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25d4b4aba6SAnup Patel *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26d4b4aba6SAnup Patel *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27d4b4aba6SAnup Patel *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28d4b4aba6SAnup Patel *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29d4b4aba6SAnup Patel *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30d4b4aba6SAnup Patel *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31d4b4aba6SAnup Patel */
32d4b4aba6SAnup Patel
33d4b4aba6SAnup Patel#include "stingray.dtsi"
34d4b4aba6SAnup Patel
35d4b4aba6SAnup Patel/ {
36d4b4aba6SAnup Patel	chosen {
37d4b4aba6SAnup Patel		stdout-path = "serial0:115200n8";
38d4b4aba6SAnup Patel	};
39d4b4aba6SAnup Patel
40d4b4aba6SAnup Patel	aliases {
41d4b4aba6SAnup Patel		serial0 = &uart1;
42d4b4aba6SAnup Patel		serial1 = &uart0;
43d4b4aba6SAnup Patel		serial2 = &uart2;
44d4b4aba6SAnup Patel		serial3 = &uart3;
45d4b4aba6SAnup Patel	};
46*552df263SSrinath Mannam
47*552df263SSrinath Mannam	sdio0_vddo_ctrl_reg: sdio0_vddo_ctrl {
48*552df263SSrinath Mannam		compatible = "regulator-gpio";
49*552df263SSrinath Mannam		regulator-name = "sdio0_vddo_ctrl_reg";
50*552df263SSrinath Mannam		regulator-type = "voltage";
51*552df263SSrinath Mannam		regulator-min-microvolt = <1800000>;
52*552df263SSrinath Mannam		regulator-max-microvolt = <3300000>;
53*552df263SSrinath Mannam		gpios = <&pca9505 18 0>;
54*552df263SSrinath Mannam		states = <3300000 0x0
55*552df263SSrinath Mannam			  1800000 0x1>;
56*552df263SSrinath Mannam	};
57*552df263SSrinath Mannam
58*552df263SSrinath Mannam	sdio1_vddo_ctrl_reg: sdio1_vddo_ctrl {
59*552df263SSrinath Mannam		compatible = "regulator-gpio";
60*552df263SSrinath Mannam		regulator-name = "sdio1_vddo_ctrl_reg";
61*552df263SSrinath Mannam		regulator-type = "voltage";
62*552df263SSrinath Mannam		regulator-min-microvolt = <1800000>;
63*552df263SSrinath Mannam		regulator-max-microvolt = <3300000>;
64*552df263SSrinath Mannam		gpios = <&pca9505 19 0>;
65*552df263SSrinath Mannam		states = <3300000 0x0
66*552df263SSrinath Mannam			  1800000 0x1>;
67*552df263SSrinath Mannam	};
68d4b4aba6SAnup Patel};
69d4b4aba6SAnup Patel
70d4b4aba6SAnup Patel&memory { /* Default DRAM banks */
71d4b4aba6SAnup Patel	reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
72d4b4aba6SAnup Patel	      <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */
73d4b4aba6SAnup Patel};
74d4b4aba6SAnup Patel
75d4b4aba6SAnup Patel&uart1 {
76d4b4aba6SAnup Patel	status = "okay";
77d4b4aba6SAnup Patel};
780f67ae37SPramod Kumar
79*552df263SSrinath Mannam&pwm {
80*552df263SSrinath Mannam	status = "okay";
81*552df263SSrinath Mannam};
82*552df263SSrinath Mannam
831256ea18SOza Pawandeep&i2c0 {
841256ea18SOza Pawandeep	status = "okay";
851256ea18SOza Pawandeep
861256ea18SOza Pawandeep	pca9505: pca9505@20 {
871256ea18SOza Pawandeep		compatible = "nxp,pca9505";
881256ea18SOza Pawandeep		gpio-controller;
891256ea18SOza Pawandeep		#gpio-cells = <2>;
901256ea18SOza Pawandeep		reg = <0x20>;
911256ea18SOza Pawandeep	};
921256ea18SOza Pawandeep};
931256ea18SOza Pawandeep
941256ea18SOza Pawandeep&i2c1 {
951256ea18SOza Pawandeep	status = "okay";
961256ea18SOza Pawandeep
971256ea18SOza Pawandeep	pcf8574: pcf8574@20 {
981256ea18SOza Pawandeep		compatible = "nxp,pcf8574a";
991256ea18SOza Pawandeep		gpio-controller;
1001256ea18SOza Pawandeep		#gpio-cells = <2>;
1011256ea18SOza Pawandeep		reg = <0x27>;
1021256ea18SOza Pawandeep	};
1031256ea18SOza Pawandeep};
1041256ea18SOza Pawandeep
1050f67ae37SPramod Kumar&nand {
1060f67ae37SPramod Kumar	status = "ok";
1070f67ae37SPramod Kumar	nandcs@0 {
1080f67ae37SPramod Kumar		compatible = "brcm,nandcs";
1090f67ae37SPramod Kumar		reg = <0>;
1100f67ae37SPramod Kumar		nand-ecc-mode = "hw";
1110f67ae37SPramod Kumar		nand-ecc-strength = <8>;
1120f67ae37SPramod Kumar		nand-ecc-step-size = <512>;
1130f67ae37SPramod Kumar		nand-bus-width = <16>;
1140f67ae37SPramod Kumar		brcm,nand-oob-sector-size = <16>;
1150f67ae37SPramod Kumar		#address-cells = <1>;
1160f67ae37SPramod Kumar		#size-cells = <1>;
1170f67ae37SPramod Kumar	};
1180f67ae37SPramod Kumar};
119*552df263SSrinath Mannam
120*552df263SSrinath Mannam&sdio0 {
121*552df263SSrinath Mannam	vqmmc-supply = <&sdio0_vddo_ctrl_reg>;
122*552df263SSrinath Mannam	non-removable;
123*552df263SSrinath Mannam	full-pwr-cycle;
124*552df263SSrinath Mannam	status = "okay";
125*552df263SSrinath Mannam};
126*552df263SSrinath Mannam
127*552df263SSrinath Mannam&sdio1 {
128*552df263SSrinath Mannam	vqmmc-supply = <&sdio1_vddo_ctrl_reg>;
129*552df263SSrinath Mannam	full-pwr-cycle;
130*552df263SSrinath Mannam	status = "okay";
131*552df263SSrinath Mannam};
132