xref: /linux/scripts/dtc/include-prefixes/arm64/amlogic/amlogic-a4-reset.h (revision c598d5eb9fb331ba17bc9ad67ae9a2231ca5aca5)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
2 /*
3  * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
4  */
5 
6 #ifndef __DTS_AMLOGIC_A4_RESET_H
7 #define __DTS_AMLOGIC_A4_RESET_H
8 
9 /* RESET0 */
10 /*						0-3 */
11 #define RESET_USB				4
12 /*						5-6*/
13 #define RESET_U2PHY22				7
14 #define RESET_USBPHY20				8
15 #define RESET_U2PHY21				9
16 #define RESET_USB2DRD				10
17 #define RESET_U2H				11
18 #define RESET_LED_CTRL				12
19 /*						13-31 */
20 
21 /* RESET1 */
22 #define RESET_AUDIO				32
23 #define RESET_AUDIO_VAD				33
24 /*						34*/
25 #define RESET_DDR_APB				35
26 #define RESET_DDR				36
27 #define RESET_VOUT_VENC				37
28 #define RESET_VOUT				38
29 /*						39-47 */
30 #define RESET_ETHERNET				48
31 /*						49-63 */
32 
33 /* RESET2 */
34 #define RESET_DEVICE_MMC_ARB			64
35 #define RESET_IRCTRL				65
36 /*						66*/
37 #define RESET_TS_PLL				67
38 /*						68-72*/
39 #define RESET_SPICC_0				73
40 #define RESET_SPICC_1				74
41 /*						75-79*/
42 #define RESET_MSR_CLK				80
43 /*						81*/
44 #define RESET_SAR_ADC				82
45 /*						83-87*/
46 #define RESET_ACODEC				88
47 /*						89-90*/
48 #define RESET_WATCHDOG				91
49 /*						92-95*/
50 
51 /* RESET3 */
52 /*						96-127 */
53 
54 /* RESET4 */
55 /*						128-131 */
56 #define RESET_PWM_AB				132
57 #define RESET_PWM_CD				133
58 #define RESET_PWM_EF				134
59 #define RESET_PWM_GH				135
60 /*						136-137*/
61 #define RESET_UART_A				138
62 #define RESET_UART_B				139
63 /*						140*/
64 #define RESET_UART_D				141
65 #define RESET_UART_E				142
66 /*						143-144*/
67 #define RESET_I2C_M_A				145
68 #define RESET_I2C_M_B				146
69 #define RESET_I2C_M_C				147
70 #define RESET_I2C_M_D				148
71 /*						149-151*/
72 #define RESET_SDEMMC_A				152
73 /*						153*/
74 #define RESET_SDEMMC_C				154
75 /*						155-159*/
76 
77 /* RESET5 */
78 /*						160-175*/
79 #define RESET_BRG_AO_NIC_SYS			176
80 /*						177*/
81 #define RESET_BRG_AO_NIC_MAIN			178
82 #define RESET_BRG_AO_NIC_AUDIO			179
83 /*						180-183*/
84 #define RESET_BRG_AO_NIC_ALL			184
85 /*						185*/
86 #define RESET_BRG_NIC_SDIO			186
87 #define RESET_BRG_NIC_EMMC			187
88 #define RESET_BRG_NIC_DSU			188
89 #define RESET_BRG_NIC_CLK81			189
90 #define RESET_BRG_NIC_MAIN			190
91 #define RESET_BRG_NIC_ALL			191
92 
93 #endif
94