13c0f3b85SDinh Nguyen// SPDX-License-Identifier: GPL-2.0-only 23c0f3b85SDinh Nguyen/* 33c0f3b85SDinh Nguyen * Copyright Altera Corporation (C) 2015. All rights reserved. 43c0f3b85SDinh Nguyen */ 53c0f3b85SDinh Nguyen 63c0f3b85SDinh Nguyen#include "socfpga_stratix10.dtsi" 73c0f3b85SDinh Nguyen 83c0f3b85SDinh Nguyen/ { 93c0f3b85SDinh Nguyen model = "SoCFPGA Stratix 10 SoCDK"; 101c0bd035SKrzysztof Kozlowski compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10"; 113c0f3b85SDinh Nguyen 123c0f3b85SDinh Nguyen aliases { 133c0f3b85SDinh Nguyen serial0 = &uart0; 143c0f3b85SDinh Nguyen ethernet0 = &gmac0; 153c0f3b85SDinh Nguyen ethernet1 = &gmac1; 163c0f3b85SDinh Nguyen ethernet2 = &gmac2; 173c0f3b85SDinh Nguyen }; 183c0f3b85SDinh Nguyen 193c0f3b85SDinh Nguyen chosen { 203c0f3b85SDinh Nguyen stdout-path = "serial0:115200n8"; 213c0f3b85SDinh Nguyen }; 223c0f3b85SDinh Nguyen 233c0f3b85SDinh Nguyen leds { 243c0f3b85SDinh Nguyen compatible = "gpio-leds"; 2589f53accSKrzysztof Kozlowski led-hps0 { 263c0f3b85SDinh Nguyen label = "hps_led0"; 273c0f3b85SDinh Nguyen gpios = <&portb 20 GPIO_ACTIVE_HIGH>; 283c0f3b85SDinh Nguyen }; 293c0f3b85SDinh Nguyen 3089f53accSKrzysztof Kozlowski led-hps1 { 313c0f3b85SDinh Nguyen label = "hps_led1"; 323c0f3b85SDinh Nguyen gpios = <&portb 19 GPIO_ACTIVE_HIGH>; 333c0f3b85SDinh Nguyen }; 343c0f3b85SDinh Nguyen 3589f53accSKrzysztof Kozlowski led-hps2 { 363c0f3b85SDinh Nguyen label = "hps_led2"; 373c0f3b85SDinh Nguyen gpios = <&portb 21 GPIO_ACTIVE_HIGH>; 383c0f3b85SDinh Nguyen }; 393c0f3b85SDinh Nguyen }; 403c0f3b85SDinh Nguyen 41b2c62c39SDinh Nguyen memory@80000000 { 423c0f3b85SDinh Nguyen device_type = "memory"; 433c0f3b85SDinh Nguyen /* We expect the bootloader to fill in the reg */ 44b2c62c39SDinh Nguyen reg = <0 0x80000000 0 0>; 453c0f3b85SDinh Nguyen }; 463c0f3b85SDinh Nguyen 47327a96a1SKrzysztof Kozlowski ref_033v: regulator-v-ref { 483c0f3b85SDinh Nguyen compatible = "regulator-fixed"; 493c0f3b85SDinh Nguyen regulator-name = "0.33V"; 503c0f3b85SDinh Nguyen regulator-min-microvolt = <330000>; 513c0f3b85SDinh Nguyen regulator-max-microvolt = <330000>; 523c0f3b85SDinh Nguyen }; 533c0f3b85SDinh Nguyen 545e53525fSKrzysztof Kozlowski soc@0 { 553c0f3b85SDinh Nguyen eccmgr { 563c0f3b85SDinh Nguyen sdmmca-ecc@ff8c8c00 { 573c0f3b85SDinh Nguyen compatible = "altr,socfpga-s10-sdmmc-ecc", 583c0f3b85SDinh Nguyen "altr,socfpga-sdmmc-ecc"; 593c0f3b85SDinh Nguyen reg = <0xff8c8c00 0x100>; 603c0f3b85SDinh Nguyen altr,ecc-parent = <&mmc>; 613c0f3b85SDinh Nguyen interrupts = <14 4>, 623c0f3b85SDinh Nguyen <15 4>; 633c0f3b85SDinh Nguyen }; 643c0f3b85SDinh Nguyen }; 653c0f3b85SDinh Nguyen }; 663c0f3b85SDinh Nguyen}; 673c0f3b85SDinh Nguyen 683c0f3b85SDinh Nguyen&gpio1 { 693c0f3b85SDinh Nguyen status = "okay"; 703c0f3b85SDinh Nguyen}; 713c0f3b85SDinh Nguyen 723c0f3b85SDinh Nguyen&gmac2 { 733c0f3b85SDinh Nguyen status = "okay"; 743c0f3b85SDinh Nguyen phy-mode = "rgmii"; 753c0f3b85SDinh Nguyen phy-handle = <&phy0>; 763c0f3b85SDinh Nguyen 773c0f3b85SDinh Nguyen max-frame-size = <9000>; 783c0f3b85SDinh Nguyen 793c0f3b85SDinh Nguyen mdio0 { 803c0f3b85SDinh Nguyen #address-cells = <1>; 813c0f3b85SDinh Nguyen #size-cells = <0>; 823c0f3b85SDinh Nguyen compatible = "snps,dwmac-mdio"; 833c0f3b85SDinh Nguyen phy0: ethernet-phy@0 { 843c0f3b85SDinh Nguyen reg = <4>; 853c0f3b85SDinh Nguyen 863c0f3b85SDinh Nguyen txd0-skew-ps = <0>; /* -420ps */ 873c0f3b85SDinh Nguyen txd1-skew-ps = <0>; /* -420ps */ 883c0f3b85SDinh Nguyen txd2-skew-ps = <0>; /* -420ps */ 893c0f3b85SDinh Nguyen txd3-skew-ps = <0>; /* -420ps */ 903c0f3b85SDinh Nguyen rxd0-skew-ps = <420>; /* 0ps */ 913c0f3b85SDinh Nguyen rxd1-skew-ps = <420>; /* 0ps */ 923c0f3b85SDinh Nguyen rxd2-skew-ps = <420>; /* 0ps */ 933c0f3b85SDinh Nguyen rxd3-skew-ps = <420>; /* 0ps */ 943c0f3b85SDinh Nguyen txen-skew-ps = <0>; /* -420ps */ 953c0f3b85SDinh Nguyen txc-skew-ps = <900>; /* 0ps */ 963c0f3b85SDinh Nguyen rxdv-skew-ps = <420>; /* 0ps */ 973c0f3b85SDinh Nguyen rxc-skew-ps = <1680>; /* 780ps */ 983c0f3b85SDinh Nguyen }; 993c0f3b85SDinh Nguyen }; 1003c0f3b85SDinh Nguyen}; 1013c0f3b85SDinh Nguyen 1023c0f3b85SDinh Nguyen&nand { 1033c0f3b85SDinh Nguyen status = "okay"; 1043c0f3b85SDinh Nguyen 105*30bc6904SKrzysztof Kozlowski nand@0 { 106774acd59SDinh Nguyen reg = <0>; 1073c0f3b85SDinh Nguyen #address-cells = <1>; 1083c0f3b85SDinh Nguyen #size-cells = <1>; 1093c0f3b85SDinh Nguyen nand-bus-width = <16>; 1103c0f3b85SDinh Nguyen 1113c0f3b85SDinh Nguyen partition@0 { 1123c0f3b85SDinh Nguyen label = "u-boot"; 1133c0f3b85SDinh Nguyen reg = <0 0x200000>; 1143c0f3b85SDinh Nguyen }; 1153c0f3b85SDinh Nguyen 1163c0f3b85SDinh Nguyen partition@200000 { 1178dce88feSSin Hui Kho label = "root"; 1188dce88feSSin Hui Kho reg = <0x200000 0x3fe00000>; 1193c0f3b85SDinh Nguyen }; 1203c0f3b85SDinh Nguyen }; 1213c0f3b85SDinh Nguyen}; 1223c0f3b85SDinh Nguyen 123357513c0SNiravkumar L Rabara&osc1 { 124357513c0SNiravkumar L Rabara clock-frequency = <25000000>; 125357513c0SNiravkumar L Rabara}; 126357513c0SNiravkumar L Rabara 1273c0f3b85SDinh Nguyen&uart0 { 1283c0f3b85SDinh Nguyen status = "okay"; 1293c0f3b85SDinh Nguyen}; 1303c0f3b85SDinh Nguyen 1313c0f3b85SDinh Nguyen&usb0 { 1323c0f3b85SDinh Nguyen status = "okay"; 1333c0f3b85SDinh Nguyen disable-over-current; 1343c0f3b85SDinh Nguyen}; 1353c0f3b85SDinh Nguyen 1363c0f3b85SDinh Nguyen&watchdog0 { 1373c0f3b85SDinh Nguyen status = "okay"; 1383c0f3b85SDinh Nguyen}; 1393c0f3b85SDinh Nguyen 1403c0f3b85SDinh Nguyen&i2c2 { 1413c0f3b85SDinh Nguyen status = "okay"; 1423c0f3b85SDinh Nguyen clock-frequency = <100000>; 1433c0f3b85SDinh Nguyen i2c-sda-falling-time-ns = <890>; /* hcnt */ 144db66795fSDinh Nguyen i2c-scl-falling-time-ns = <890>; /* lcnt */ 1453c0f3b85SDinh Nguyen 1463c0f3b85SDinh Nguyen adc@14 { 1473c0f3b85SDinh Nguyen compatible = "lltc,ltc2497"; 1483c0f3b85SDinh Nguyen reg = <0x14>; 1493c0f3b85SDinh Nguyen vref-supply = <&ref_033v>; 1503c0f3b85SDinh Nguyen }; 1513c0f3b85SDinh Nguyen 1523c0f3b85SDinh Nguyen temp@4c { 1533c0f3b85SDinh Nguyen compatible = "maxim,max1619"; 1543c0f3b85SDinh Nguyen reg = <0x4c>; 1553c0f3b85SDinh Nguyen }; 1563c0f3b85SDinh Nguyen 1573c0f3b85SDinh Nguyen eeprom@51 { 1583c0f3b85SDinh Nguyen compatible = "atmel,24c32"; 1593c0f3b85SDinh Nguyen reg = <0x51>; 1603c0f3b85SDinh Nguyen pagesize = <32>; 1613c0f3b85SDinh Nguyen }; 1623c0f3b85SDinh Nguyen 1633c0f3b85SDinh Nguyen rtc@68 { 1643c0f3b85SDinh Nguyen compatible = "dallas,ds1339"; 1653c0f3b85SDinh Nguyen reg = <0x68>; 1663c0f3b85SDinh Nguyen }; 1673c0f3b85SDinh Nguyen}; 1683c0f3b85SDinh Nguyen 1693c0f3b85SDinh Nguyen&qspi { 170263a0269SDinh Nguyen status = "okay"; 1713c0f3b85SDinh Nguyen flash@0 { 172f126b670SDinh Nguyen compatible = "micron,mt25qu02g", "jedec,spi-nor"; 1733c0f3b85SDinh Nguyen reg = <0>; 1743c0f3b85SDinh Nguyen spi-max-frequency = <100000000>; 1753c0f3b85SDinh Nguyen 1763c0f3b85SDinh Nguyen m25p,fast-read; 1773c0f3b85SDinh Nguyen cdns,read-delay = <1>; 1783c0f3b85SDinh Nguyen cdns,tshsl-ns = <50>; 1793c0f3b85SDinh Nguyen cdns,tsd2d-ns = <50>; 1803c0f3b85SDinh Nguyen cdns,tchsh-ns = <4>; 1813c0f3b85SDinh Nguyen cdns,tslch-ns = <4>; 1823c0f3b85SDinh Nguyen 1833c0f3b85SDinh Nguyen partitions { 1843c0f3b85SDinh Nguyen compatible = "fixed-partitions"; 1853c0f3b85SDinh Nguyen #address-cells = <1>; 1863c0f3b85SDinh Nguyen #size-cells = <1>; 1873c0f3b85SDinh Nguyen 1883c0f3b85SDinh Nguyen qspi_boot: partition@0 { 1893c0f3b85SDinh Nguyen label = "Boot and fpga data"; 1903bf9b8ffSDinh Nguyen reg = <0x0 0x03FE0000>; 1913c0f3b85SDinh Nguyen }; 1923c0f3b85SDinh Nguyen 193774acd59SDinh Nguyen qspi_rootfs: partition@3fe0000 { 1943c0f3b85SDinh Nguyen label = "Root Filesystem - JFFS2"; 1953bf9b8ffSDinh Nguyen reg = <0x03FE0000 0x0C020000>; 1963c0f3b85SDinh Nguyen }; 1973c0f3b85SDinh Nguyen }; 1983c0f3b85SDinh Nguyen }; 1993c0f3b85SDinh Nguyen}; 200