1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Xilinx ZC770 XM010 board DTS 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2013-2018 Xilinx, Inc. 6*724ba675SRob Herring */ 7*724ba675SRob Herring/dts-v1/; 8*724ba675SRob Herring#include "zynq-7000.dtsi" 9*724ba675SRob Herring 10*724ba675SRob Herring/ { 11*724ba675SRob Herring model = "Xilinx ZC770 XM010 board"; 12*724ba675SRob Herring compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000"; 13*724ba675SRob Herring 14*724ba675SRob Herring aliases { 15*724ba675SRob Herring ethernet0 = &gem0; 16*724ba675SRob Herring i2c0 = &i2c0; 17*724ba675SRob Herring serial0 = &uart1; 18*724ba675SRob Herring spi1 = &spi1; 19*724ba675SRob Herring }; 20*724ba675SRob Herring 21*724ba675SRob Herring chosen { 22*724ba675SRob Herring bootargs = ""; 23*724ba675SRob Herring stdout-path = "serial0:115200n8"; 24*724ba675SRob Herring }; 25*724ba675SRob Herring 26*724ba675SRob Herring memory@0 { 27*724ba675SRob Herring device_type = "memory"; 28*724ba675SRob Herring reg = <0x0 0x40000000>; 29*724ba675SRob Herring }; 30*724ba675SRob Herring 31*724ba675SRob Herring usb_phy0: phy0 { 32*724ba675SRob Herring compatible = "usb-nop-xceiv"; 33*724ba675SRob Herring #phy-cells = <0>; 34*724ba675SRob Herring }; 35*724ba675SRob Herring}; 36*724ba675SRob Herring 37*724ba675SRob Herring&can0 { 38*724ba675SRob Herring status = "okay"; 39*724ba675SRob Herring}; 40*724ba675SRob Herring 41*724ba675SRob Herring&gem0 { 42*724ba675SRob Herring status = "okay"; 43*724ba675SRob Herring phy-mode = "rgmii-id"; 44*724ba675SRob Herring phy-handle = <ðernet_phy>; 45*724ba675SRob Herring 46*724ba675SRob Herring ethernet_phy: ethernet-phy@7 { 47*724ba675SRob Herring reg = <7>; 48*724ba675SRob Herring device_type = "ethernet-phy"; 49*724ba675SRob Herring }; 50*724ba675SRob Herring}; 51*724ba675SRob Herring 52*724ba675SRob Herring&i2c0 { 53*724ba675SRob Herring status = "okay"; 54*724ba675SRob Herring clock-frequency = <400000>; 55*724ba675SRob Herring 56*724ba675SRob Herring eeprom: eeprom@52 { 57*724ba675SRob Herring compatible = "atmel,24c02"; 58*724ba675SRob Herring reg = <0x52>; 59*724ba675SRob Herring }; 60*724ba675SRob Herring 61*724ba675SRob Herring}; 62*724ba675SRob Herring 63*724ba675SRob Herring&sdhci0 { 64*724ba675SRob Herring status = "okay"; 65*724ba675SRob Herring}; 66*724ba675SRob Herring 67*724ba675SRob Herring&spi1 { 68*724ba675SRob Herring status = "okay"; 69*724ba675SRob Herring num-cs = <4>; 70*724ba675SRob Herring is-decoded-cs = <0>; 71*724ba675SRob Herring flash@1 { 72*724ba675SRob Herring compatible = "sst25wf080", "jedec,spi-nor"; 73*724ba675SRob Herring reg = <1>; 74*724ba675SRob Herring spi-max-frequency = <1000000>; 75*724ba675SRob Herring partitions { 76*724ba675SRob Herring compatible = "fixed-partitions"; 77*724ba675SRob Herring #address-cells = <1>; 78*724ba675SRob Herring #size-cells = <1>; 79*724ba675SRob Herring partition@0 { 80*724ba675SRob Herring label = "data"; 81*724ba675SRob Herring reg = <0x0 0x100000>; 82*724ba675SRob Herring }; 83*724ba675SRob Herring }; 84*724ba675SRob Herring }; 85*724ba675SRob Herring}; 86*724ba675SRob Herring 87*724ba675SRob Herring&uart1 { 88*724ba675SRob Herring status = "okay"; 89*724ba675SRob Herring}; 90*724ba675SRob Herring 91*724ba675SRob Herring&usb0 { 92*724ba675SRob Herring status = "okay"; 93*724ba675SRob Herring dr_mode = "host"; 94*724ba675SRob Herring usb-phy = <&usb_phy0>; 95*724ba675SRob Herring}; 96