1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree Source for OMAP4 clock data 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2013 Texas Instruments, Inc. 6*724ba675SRob Herring */ 7*724ba675SRob Herring&prm_clocks { 8*724ba675SRob Herring div_ts_ck: div_ts_ck@1888 { 9*724ba675SRob Herring #clock-cells = <0>; 10*724ba675SRob Herring compatible = "ti,divider-clock"; 11*724ba675SRob Herring clock-output-names = "div_ts_ck"; 12*724ba675SRob Herring clocks = <&l4_wkup_clk_mux_ck>; 13*724ba675SRob Herring ti,bit-shift = <24>; 14*724ba675SRob Herring reg = <0x1888>; 15*724ba675SRob Herring ti,dividers = <8>, <16>, <32>; 16*724ba675SRob Herring }; 17*724ba675SRob Herring 18*724ba675SRob Herring bandgap_ts_fclk: bandgap_ts_fclk@1888 { 19*724ba675SRob Herring #clock-cells = <0>; 20*724ba675SRob Herring compatible = "ti,gate-clock"; 21*724ba675SRob Herring clock-output-names = "bandgap_ts_fclk"; 22*724ba675SRob Herring clocks = <&div_ts_ck>; 23*724ba675SRob Herring ti,bit-shift = <8>; 24*724ba675SRob Herring reg = <0x1888>; 25*724ba675SRob Herring }; 26*724ba675SRob Herring}; 27