1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2724ba675SRob Herring/* 3724ba675SRob Herring * Device Tree Source for OMAP36xx/AM35xx/OMAP34xx clock data 4724ba675SRob Herring * 5724ba675SRob Herring * Copyright (C) 2013 Texas Instruments, Inc. 6724ba675SRob Herring */ 7724ba675SRob Herring&prm_clocks { 8724ba675SRob Herring corex2_d3_fck: corex2_d3_fck { 9724ba675SRob Herring #clock-cells = <0>; 10724ba675SRob Herring compatible = "fixed-factor-clock"; 11724ba675SRob Herring clocks = <&corex2_fck>; 12724ba675SRob Herring clock-mult = <1>; 13724ba675SRob Herring clock-div = <3>; 14724ba675SRob Herring }; 15724ba675SRob Herring 16724ba675SRob Herring corex2_d5_fck: corex2_d5_fck { 17724ba675SRob Herring #clock-cells = <0>; 18724ba675SRob Herring compatible = "fixed-factor-clock"; 19724ba675SRob Herring clocks = <&corex2_fck>; 20724ba675SRob Herring clock-mult = <1>; 21724ba675SRob Herring clock-div = <5>; 22724ba675SRob Herring }; 23724ba675SRob Herring}; 24724ba675SRob Herring&cm_clocks { 25724ba675SRob Herring dpll5_ck: dpll5_ck@d04 { 26724ba675SRob Herring #clock-cells = <0>; 27724ba675SRob Herring compatible = "ti,omap3-dpll-clock"; 28724ba675SRob Herring clocks = <&sys_ck>, <&sys_ck>; 29724ba675SRob Herring reg = <0x0d04>, <0x0d24>, <0x0d4c>, <0x0d34>; 30724ba675SRob Herring ti,low-power-stop; 31724ba675SRob Herring ti,lock; 32724ba675SRob Herring }; 33724ba675SRob Herring 34724ba675SRob Herring dpll5_m2_ck: dpll5_m2_ck@d50 { 35724ba675SRob Herring #clock-cells = <0>; 36724ba675SRob Herring compatible = "ti,divider-clock"; 37724ba675SRob Herring clocks = <&dpll5_ck>; 38724ba675SRob Herring ti,max-div = <31>; 39724ba675SRob Herring reg = <0x0d50>; 40724ba675SRob Herring ti,index-starts-at-one; 41724ba675SRob Herring }; 42724ba675SRob Herring 43724ba675SRob Herring sgx_gate_fck: sgx_gate_fck@b00 { 44724ba675SRob Herring #clock-cells = <0>; 45724ba675SRob Herring compatible = "ti,composite-gate-clock"; 46724ba675SRob Herring clocks = <&core_ck>; 47724ba675SRob Herring ti,bit-shift = <1>; 48724ba675SRob Herring reg = <0x0b00>; 49724ba675SRob Herring }; 50724ba675SRob Herring 51724ba675SRob Herring core_d3_ck: core_d3_ck { 52724ba675SRob Herring #clock-cells = <0>; 53724ba675SRob Herring compatible = "fixed-factor-clock"; 54724ba675SRob Herring clocks = <&core_ck>; 55724ba675SRob Herring clock-mult = <1>; 56724ba675SRob Herring clock-div = <3>; 57724ba675SRob Herring }; 58724ba675SRob Herring 59724ba675SRob Herring core_d4_ck: core_d4_ck { 60724ba675SRob Herring #clock-cells = <0>; 61724ba675SRob Herring compatible = "fixed-factor-clock"; 62724ba675SRob Herring clocks = <&core_ck>; 63724ba675SRob Herring clock-mult = <1>; 64724ba675SRob Herring clock-div = <4>; 65724ba675SRob Herring }; 66724ba675SRob Herring 67724ba675SRob Herring core_d6_ck: core_d6_ck { 68724ba675SRob Herring #clock-cells = <0>; 69724ba675SRob Herring compatible = "fixed-factor-clock"; 70724ba675SRob Herring clocks = <&core_ck>; 71724ba675SRob Herring clock-mult = <1>; 72724ba675SRob Herring clock-div = <6>; 73724ba675SRob Herring }; 74724ba675SRob Herring 75724ba675SRob Herring omap_192m_alwon_fck: omap_192m_alwon_fck { 76724ba675SRob Herring #clock-cells = <0>; 77724ba675SRob Herring compatible = "fixed-factor-clock"; 78724ba675SRob Herring clocks = <&dpll4_m2x2_ck>; 79724ba675SRob Herring clock-mult = <1>; 80724ba675SRob Herring clock-div = <1>; 81724ba675SRob Herring }; 82724ba675SRob Herring 83724ba675SRob Herring core_d2_ck: core_d2_ck { 84724ba675SRob Herring #clock-cells = <0>; 85724ba675SRob Herring compatible = "fixed-factor-clock"; 86724ba675SRob Herring clocks = <&core_ck>; 87724ba675SRob Herring clock-mult = <1>; 88724ba675SRob Herring clock-div = <2>; 89724ba675SRob Herring }; 90724ba675SRob Herring 91724ba675SRob Herring sgx_mux_fck: sgx_mux_fck@b40 { 92724ba675SRob Herring #clock-cells = <0>; 93724ba675SRob Herring compatible = "ti,composite-mux-clock"; 94724ba675SRob Herring clocks = <&core_d3_ck>, <&core_d4_ck>, <&core_d6_ck>, <&cm_96m_fck>, <&omap_192m_alwon_fck>, <&core_d2_ck>, <&corex2_d3_fck>, <&corex2_d5_fck>; 95724ba675SRob Herring reg = <0x0b40>; 96724ba675SRob Herring }; 97724ba675SRob Herring 98724ba675SRob Herring sgx_fck: sgx_fck { 99724ba675SRob Herring #clock-cells = <0>; 100724ba675SRob Herring compatible = "ti,composite-clock"; 101724ba675SRob Herring clocks = <&sgx_gate_fck>, <&sgx_mux_fck>; 102724ba675SRob Herring }; 103724ba675SRob Herring 104724ba675SRob Herring sgx_ick: sgx_ick@b10 { 105724ba675SRob Herring #clock-cells = <0>; 106724ba675SRob Herring compatible = "ti,wait-gate-clock"; 107724ba675SRob Herring clocks = <&l3_ick>; 108724ba675SRob Herring reg = <0x0b10>; 109724ba675SRob Herring ti,bit-shift = <0>; 110724ba675SRob Herring }; 111724ba675SRob Herring 112724ba675SRob Herring cpefuse_fck: cpefuse_fck@a08 { 113724ba675SRob Herring #clock-cells = <0>; 114724ba675SRob Herring compatible = "ti,gate-clock"; 115724ba675SRob Herring clocks = <&sys_ck>; 116724ba675SRob Herring reg = <0x0a08>; 117724ba675SRob Herring ti,bit-shift = <0>; 118724ba675SRob Herring }; 119724ba675SRob Herring 120724ba675SRob Herring ts_fck: ts_fck@a08 { 121724ba675SRob Herring #clock-cells = <0>; 122724ba675SRob Herring compatible = "ti,gate-clock"; 123724ba675SRob Herring clocks = <&omap_32k_fck>; 124724ba675SRob Herring reg = <0x0a08>; 125724ba675SRob Herring ti,bit-shift = <1>; 126724ba675SRob Herring }; 127724ba675SRob Herring 128724ba675SRob Herring usbtll_fck: usbtll_fck@a08 { 129724ba675SRob Herring #clock-cells = <0>; 130724ba675SRob Herring compatible = "ti,wait-gate-clock"; 131724ba675SRob Herring clocks = <&dpll5_m2_ck>; 132724ba675SRob Herring reg = <0x0a08>; 133724ba675SRob Herring ti,bit-shift = <2>; 134724ba675SRob Herring }; 135724ba675SRob Herring 136724ba675SRob Herring /* CM_ICLKEN3_CORE */ 137724ba675SRob Herring clock@a18 { 138724ba675SRob Herring compatible = "ti,clksel"; 139724ba675SRob Herring reg = <0xa18>; 140724ba675SRob Herring #clock-cells = <2>; 141*808e6530STony Lindgren #address-cells = <1>; 142*808e6530STony Lindgren #size-cells = <0>; 143724ba675SRob Herring 144*808e6530STony Lindgren usbtll_ick: clock-usbtll-ick@2 { 145*808e6530STony Lindgren reg = <2>; 146724ba675SRob Herring #clock-cells = <0>; 147724ba675SRob Herring compatible = "ti,omap3-interface-clock"; 148724ba675SRob Herring clock-output-names = "usbtll_ick"; 149724ba675SRob Herring clocks = <&core_l4_ick>; 150724ba675SRob Herring }; 151724ba675SRob Herring }; 152724ba675SRob Herring 153724ba675SRob Herring clock@a10 { 154724ba675SRob Herring compatible = "ti,clksel"; 155724ba675SRob Herring reg = <0xa10>; 156724ba675SRob Herring #clock-cells = <2>; 157*808e6530STony Lindgren #address-cells = <1>; 158*808e6530STony Lindgren #size-cells = <0>; 159724ba675SRob Herring 160*808e6530STony Lindgren mmchs3_ick: clock-mmchs3-ick@30 { 161*808e6530STony Lindgren reg = <30>; 162724ba675SRob Herring #clock-cells = <0>; 163724ba675SRob Herring compatible = "ti,omap3-interface-clock"; 164724ba675SRob Herring clock-output-names = "mmchs3_ick"; 165724ba675SRob Herring clocks = <&core_l4_ick>; 166724ba675SRob Herring }; 167724ba675SRob Herring }; 168724ba675SRob Herring 169724ba675SRob Herring clock@a00 { 170724ba675SRob Herring compatible = "ti,clksel"; 171724ba675SRob Herring reg = <0xa00>; 172724ba675SRob Herring #clock-cells = <2>; 173*808e6530STony Lindgren #address-cells = <1>; 174*808e6530STony Lindgren #size-cells = <0>; 175724ba675SRob Herring 176*808e6530STony Lindgren mmchs3_fck: clock-mmchs3-fck@30 { 177*808e6530STony Lindgren reg = <30>; 178724ba675SRob Herring #clock-cells = <0>; 179724ba675SRob Herring compatible = "ti,wait-gate-clock"; 180724ba675SRob Herring clock-output-names = "mmchs3_fck"; 181724ba675SRob Herring clocks = <&core_96m_fck>; 182724ba675SRob Herring }; 183724ba675SRob Herring }; 184724ba675SRob Herring 185724ba675SRob Herring clock@e00 { 186724ba675SRob Herring compatible = "ti,clksel"; 187724ba675SRob Herring reg = <0xe00>; 188724ba675SRob Herring #clock-cells = <2>; 189*808e6530STony Lindgren #address-cells = <1>; 190*808e6530STony Lindgren #size-cells = <0>; 191724ba675SRob Herring 192*808e6530STony Lindgren dss1_alwon_fck: clock-dss1-alwon-fck-3430es2@0 { 193*808e6530STony Lindgren reg = <0>; 194724ba675SRob Herring #clock-cells = <0>; 195724ba675SRob Herring compatible = "ti,dss-gate-clock"; 196724ba675SRob Herring clock-output-names = "dss1_alwon_fck_3430es2"; 197724ba675SRob Herring clocks = <&dpll4_m4x2_ck>; 198724ba675SRob Herring ti,set-rate-parent; 199724ba675SRob Herring }; 200724ba675SRob Herring }; 201724ba675SRob Herring 202724ba675SRob Herring dss_ick: dss_ick_3430es2@e10 { 203724ba675SRob Herring #clock-cells = <0>; 204724ba675SRob Herring compatible = "ti,omap3-dss-interface-clock"; 205724ba675SRob Herring clocks = <&l4_ick>; 206724ba675SRob Herring reg = <0x0e10>; 207724ba675SRob Herring ti,bit-shift = <0>; 208724ba675SRob Herring }; 209724ba675SRob Herring 210724ba675SRob Herring usbhost_120m_fck: usbhost_120m_fck@1400 { 211724ba675SRob Herring #clock-cells = <0>; 212724ba675SRob Herring compatible = "ti,gate-clock"; 213724ba675SRob Herring clocks = <&dpll5_m2_ck>; 214724ba675SRob Herring reg = <0x1400>; 215724ba675SRob Herring ti,bit-shift = <1>; 216724ba675SRob Herring }; 217724ba675SRob Herring 218724ba675SRob Herring usbhost_48m_fck: usbhost_48m_fck@1400 { 219724ba675SRob Herring #clock-cells = <0>; 220724ba675SRob Herring compatible = "ti,dss-gate-clock"; 221724ba675SRob Herring clocks = <&omap_48m_fck>; 222724ba675SRob Herring reg = <0x1400>; 223724ba675SRob Herring ti,bit-shift = <0>; 224724ba675SRob Herring }; 225724ba675SRob Herring 226724ba675SRob Herring usbhost_ick: usbhost_ick@1410 { 227724ba675SRob Herring #clock-cells = <0>; 228724ba675SRob Herring compatible = "ti,omap3-dss-interface-clock"; 229724ba675SRob Herring clocks = <&l4_ick>; 230724ba675SRob Herring reg = <0x1410>; 231724ba675SRob Herring ti,bit-shift = <0>; 232724ba675SRob Herring }; 233724ba675SRob Herring}; 234724ba675SRob Herring 235724ba675SRob Herring&cm_clockdomains { 236724ba675SRob Herring dpll5_clkdm: dpll5_clkdm { 237724ba675SRob Herring compatible = "ti,clockdomain"; 238724ba675SRob Herring clocks = <&dpll5_ck>; 239724ba675SRob Herring }; 240724ba675SRob Herring 241724ba675SRob Herring sgx_clkdm: sgx_clkdm { 242724ba675SRob Herring compatible = "ti,clockdomain"; 243724ba675SRob Herring clocks = <&sgx_ick>; 244724ba675SRob Herring }; 245724ba675SRob Herring 246724ba675SRob Herring dss_clkdm: dss_clkdm { 247724ba675SRob Herring compatible = "ti,clockdomain"; 248724ba675SRob Herring clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>, 249724ba675SRob Herring <&dss1_alwon_fck>, <&dss_ick>; 250724ba675SRob Herring }; 251724ba675SRob Herring 252724ba675SRob Herring core_l4_clkdm: core_l4_clkdm { 253724ba675SRob Herring compatible = "ti,clockdomain"; 254724ba675SRob Herring clocks = <&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>, 255724ba675SRob Herring <&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>, 256724ba675SRob Herring <&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>, 257724ba675SRob Herring <&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>, 258724ba675SRob Herring <&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>, 259724ba675SRob Herring <&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>, 260724ba675SRob Herring <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>, 261724ba675SRob Herring <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>, 262724ba675SRob Herring <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>, 263724ba675SRob Herring <&cpefuse_fck>, <&ts_fck>, <&usbtll_fck>, 264724ba675SRob Herring <&usbtll_ick>, <&mmchs3_ick>, <&mmchs3_fck>; 265724ba675SRob Herring }; 266724ba675SRob Herring 267724ba675SRob Herring usbhost_clkdm: usbhost_clkdm { 268724ba675SRob Herring compatible = "ti,clockdomain"; 269724ba675SRob Herring clocks = <&usbhost_120m_fck>, <&usbhost_48m_fck>, 270724ba675SRob Herring <&usbhost_ick>; 271724ba675SRob Herring }; 272724ba675SRob Herring}; 273