xref: /linux/scripts/dtc/include-prefixes/arm/ti/omap/omap3-tao3530.dtsi (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
4*724ba675SRob Herring * Copyright (C) 2014 Stefan Roese <sr@denx.de>
5*724ba675SRob Herring */
6*724ba675SRob Herring/dts-v1/;
7*724ba675SRob Herring
8*724ba675SRob Herring#include "omap34xx.dtsi"
9*724ba675SRob Herring
10*724ba675SRob Herring/* Secure omaps have some devices inaccessible depending on the firmware */
11*724ba675SRob Herring&aes1_target {
12*724ba675SRob Herring	status = "disabled";
13*724ba675SRob Herring};
14*724ba675SRob Herring
15*724ba675SRob Herring&aes2_target {
16*724ba675SRob Herring	status = "disabled";
17*724ba675SRob Herring};
18*724ba675SRob Herring
19*724ba675SRob Herring&sham {
20*724ba675SRob Herring	status = "disabled";
21*724ba675SRob Herring};
22*724ba675SRob Herring
23*724ba675SRob Herring/ {
24*724ba675SRob Herring	cpus {
25*724ba675SRob Herring		cpu@0 {
26*724ba675SRob Herring			cpu0-supply = <&vcc>;
27*724ba675SRob Herring		};
28*724ba675SRob Herring	};
29*724ba675SRob Herring
30*724ba675SRob Herring	memory@80000000 {
31*724ba675SRob Herring		device_type = "memory";
32*724ba675SRob Herring		reg = <0x80000000 0x10000000>; /* 256 MB */
33*724ba675SRob Herring	};
34*724ba675SRob Herring
35*724ba675SRob Herring	/* HS USB Port 2 Power */
36*724ba675SRob Herring	hsusb2_power: hsusb2_power_reg {
37*724ba675SRob Herring		compatible = "regulator-fixed";
38*724ba675SRob Herring		regulator-name = "hsusb2_vbus";
39*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
40*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
41*724ba675SRob Herring		gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>;	/* GPIO LEDA */
42*724ba675SRob Herring		startup-delay-us = <70000>;
43*724ba675SRob Herring	};
44*724ba675SRob Herring
45*724ba675SRob Herring	/* HS USB Host PHY on PORT 2 */
46*724ba675SRob Herring	hsusb2_phy: hsusb2-phy-pins {
47*724ba675SRob Herring		compatible = "usb-nop-xceiv";
48*724ba675SRob Herring		reset-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;	/* gpio_162 */
49*724ba675SRob Herring		vcc-supply = <&hsusb2_power>;
50*724ba675SRob Herring		#phy-cells = <0>;
51*724ba675SRob Herring	};
52*724ba675SRob Herring
53*724ba675SRob Herring	sound {
54*724ba675SRob Herring		compatible = "ti,omap-twl4030";
55*724ba675SRob Herring		ti,model = "omap3beagle";
56*724ba675SRob Herring
57*724ba675SRob Herring		/* McBSP2 is used for onboard sound, same as on beagle */
58*724ba675SRob Herring		ti,mcbsp = <&mcbsp2>;
59*724ba675SRob Herring	};
60*724ba675SRob Herring
61*724ba675SRob Herring	/* Regulator to enable/switch the vcc of the Wifi module */
62*724ba675SRob Herring	mmc2_sdio_poweron: regulator-mmc2-sdio-poweron {
63*724ba675SRob Herring		compatible = "regulator-fixed";
64*724ba675SRob Herring		regulator-name = "regulator-mmc2-sdio-poweron";
65*724ba675SRob Herring		regulator-min-microvolt = <3150000>;
66*724ba675SRob Herring		regulator-max-microvolt = <3150000>;
67*724ba675SRob Herring		gpio = <&gpio5 29 GPIO_ACTIVE_LOW>;		/* gpio_157 */
68*724ba675SRob Herring		startup-delay-us = <10000>;
69*724ba675SRob Herring	};
70*724ba675SRob Herring};
71*724ba675SRob Herring
72*724ba675SRob Herring&omap3_pmx_core {
73*724ba675SRob Herring	hsusbb2_pins: hsusbb2-pins {
74*724ba675SRob Herring		pinctrl-single,pins = <
75*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
76*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
77*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
78*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
79*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
80*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
81*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
82*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
83*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
84*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
85*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
86*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
87*724ba675SRob Herring		>;
88*724ba675SRob Herring	};
89*724ba675SRob Herring
90*724ba675SRob Herring	mmc1_pins: mmc1-pins {
91*724ba675SRob Herring		pinctrl-single,pins = <
92*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
93*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
94*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
95*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
96*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
97*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
98*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
99*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
100*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
101*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
102*724ba675SRob Herring		>;
103*724ba675SRob Herring	};
104*724ba675SRob Herring
105*724ba675SRob Herring	mmc2_pins: mmc2-pins {
106*724ba675SRob Herring		pinctrl-single,pins = <
107*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
108*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
109*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat0.sdmmc2_dat0 */
110*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
111*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
112*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
113*724ba675SRob Herring		>;
114*724ba675SRob Herring	};
115*724ba675SRob Herring
116*724ba675SRob Herring	/* wlan GPIO output for WLAN_EN */
117*724ba675SRob Herring	wlan_gpio: wlan-gpio-pins {
118*724ba675SRob Herring		pinctrl-single,pins = <
119*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)	/* mcbsp1_fsr gpio_157 */
120*724ba675SRob Herring		>;
121*724ba675SRob Herring	};
122*724ba675SRob Herring
123*724ba675SRob Herring	uart3_pins: uart3-pins {
124*724ba675SRob Herring		pinctrl-single,pins = <
125*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
126*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx_irtx.uart3_tx_irtx */
127*724ba675SRob Herring		>;
128*724ba675SRob Herring	};
129*724ba675SRob Herring
130*724ba675SRob Herring	i2c3_pins: i2c3-pins {
131*724ba675SRob Herring		pinctrl-single,pins = <
132*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_scl.i2c3_scl */
133*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c3_sda.i2c3_sda */
134*724ba675SRob Herring		>;
135*724ba675SRob Herring	};
136*724ba675SRob Herring
137*724ba675SRob Herring	mcspi1_pins: mcspi1-pins {
138*724ba675SRob Herring		pinctrl-single,pins = <
139*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)	/* mcspi1_clk.mcspi1_clk */
140*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)	/* mcspi1_simo.mcspi1_simo */
141*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mcspi1_somi.mcspi1_somi */
142*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)	/* mcspi1_cs0.mcspi1_cs0 */
143*724ba675SRob Herring		>;
144*724ba675SRob Herring	};
145*724ba675SRob Herring
146*724ba675SRob Herring	mcspi3_pins: mcspi3-pins {
147*724ba675SRob Herring		pinctrl-single,pins = <
148*724ba675SRob Herring                        OMAP3_CORE1_IOPAD(0x25dc, PIN_OUTPUT | MUX_MODE1)	/* etk_d0.mcspi3_simo gpio14 INPUT | MODE1 */
149*724ba675SRob Herring                        OMAP3_CORE1_IOPAD(0x25de, PIN_INPUT_PULLUP | MUX_MODE1)	/* etk_d1.mcspi3_somi gpio15 INPUT | MODE1 */
150*724ba675SRob Herring                        OMAP3_CORE1_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE1)	/* etk_d2.mcspi3_cs0 gpio16 INPUT | MODE1 */
151*724ba675SRob Herring                        OMAP3_CORE1_IOPAD(0x25e2, PIN_INPUT | MUX_MODE1)	/* etk_d3.mcspi3_clk gpio17 INPUT | MODE1 */
152*724ba675SRob Herring		>;
153*724ba675SRob Herring	};
154*724ba675SRob Herring
155*724ba675SRob Herring	mcbsp3_pins: mcbsp3-pins {
156*724ba675SRob Herring		pinctrl-single,pins = <
157*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0)	/* mcbsp3_dx.uart2_cts */
158*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0)	/* mcbsp3_dr.uart2_rts */
159*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0)	/* mcbsp3_clk.uart2_tx */
160*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0)	/* mcbsp3_fsx.uart2_rx */
161*724ba675SRob Herring		>;
162*724ba675SRob Herring	};
163*724ba675SRob Herring};
164*724ba675SRob Herring
165*724ba675SRob Herring/* McBSP1: mux'ed with GPIO158 as clock for HA-DSP */
166*724ba675SRob Herring&mcbsp1 {
167*724ba675SRob Herring	status = "disabled";
168*724ba675SRob Herring};
169*724ba675SRob Herring
170*724ba675SRob Herring&mcbsp2 {
171*724ba675SRob Herring	status = "okay";
172*724ba675SRob Herring};
173*724ba675SRob Herring
174*724ba675SRob Herring&i2c1 {
175*724ba675SRob Herring	clock-frequency = <2600000>;
176*724ba675SRob Herring
177*724ba675SRob Herring	twl: twl@48 {
178*724ba675SRob Herring		reg = <0x48>;
179*724ba675SRob Herring		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
180*724ba675SRob Herring		interrupt-parent = <&intc>;
181*724ba675SRob Herring
182*724ba675SRob Herring		twl_audio: audio {
183*724ba675SRob Herring			compatible = "ti,twl4030-audio";
184*724ba675SRob Herring			codec {
185*724ba675SRob Herring			};
186*724ba675SRob Herring		};
187*724ba675SRob Herring	};
188*724ba675SRob Herring};
189*724ba675SRob Herring
190*724ba675SRob Herring&i2c3 {
191*724ba675SRob Herring	clock-frequency = <100000>;
192*724ba675SRob Herring
193*724ba675SRob Herring	pinctrl-names = "default";
194*724ba675SRob Herring	pinctrl-0 = <&i2c3_pins>;
195*724ba675SRob Herring};
196*724ba675SRob Herring
197*724ba675SRob Herring&mcspi1 {
198*724ba675SRob Herring	pinctrl-names = "default";
199*724ba675SRob Herring	pinctrl-0 = <&mcspi1_pins>;
200*724ba675SRob Herring};
201*724ba675SRob Herring
202*724ba675SRob Herring&mcspi3 {
203*724ba675SRob Herring	pinctrl-names = "default";
204*724ba675SRob Herring	pinctrl-0 = <&mcspi3_pins>;
205*724ba675SRob Herring};
206*724ba675SRob Herring
207*724ba675SRob Herring#include "twl4030.dtsi"
208*724ba675SRob Herring#include "twl4030_omap3.dtsi"
209*724ba675SRob Herring
210*724ba675SRob Herring&mmc1 {
211*724ba675SRob Herring	pinctrl-names = "default";
212*724ba675SRob Herring	pinctrl-0 = <&mmc1_pins>;
213*724ba675SRob Herring	vmmc-supply = <&vmmc1>;
214*724ba675SRob Herring	vqmmc-supply = <&vsim>;
215*724ba675SRob Herring	cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
216*724ba675SRob Herring	bus-width = <8>;
217*724ba675SRob Herring};
218*724ba675SRob Herring
219*724ba675SRob Herring// WiFi (Marvell 88W8686) on MMC2/SDIO
220*724ba675SRob Herring&mmc2 {
221*724ba675SRob Herring	pinctrl-names = "default";
222*724ba675SRob Herring	pinctrl-0 = <&mmc2_pins>;
223*724ba675SRob Herring	vmmc-supply = <&mmc2_sdio_poweron>;
224*724ba675SRob Herring	non-removable;
225*724ba675SRob Herring	bus-width = <4>;
226*724ba675SRob Herring	cap-power-off-card;
227*724ba675SRob Herring};
228*724ba675SRob Herring
229*724ba675SRob Herring&mmc3 {
230*724ba675SRob Herring	status = "disabled";
231*724ba675SRob Herring};
232*724ba675SRob Herring
233*724ba675SRob Herring&usbhshost {
234*724ba675SRob Herring	port2-mode = "ehci-phy";
235*724ba675SRob Herring};
236*724ba675SRob Herring
237*724ba675SRob Herring&usbhsehci {
238*724ba675SRob Herring	phys = <0 &hsusb2_phy>;
239*724ba675SRob Herring};
240*724ba675SRob Herring
241*724ba675SRob Herring&twl_gpio {
242*724ba675SRob Herring	ti,use-leds;
243*724ba675SRob Herring	/* pullups: BIT(1) */
244*724ba675SRob Herring	ti,pullups = <0x000002>;
245*724ba675SRob Herring	/*
246*724ba675SRob Herring	 * pulldowns:
247*724ba675SRob Herring	 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
248*724ba675SRob Herring	 * BIT(15), BIT(16), BIT(17)
249*724ba675SRob Herring	 */
250*724ba675SRob Herring	ti,pulldowns = <0x03a1c4>;
251*724ba675SRob Herring};
252*724ba675SRob Herring
253*724ba675SRob Herring&uart3 {
254*724ba675SRob Herring	pinctrl-names = "default";
255*724ba675SRob Herring	pinctrl-0 = <&uart3_pins>;
256*724ba675SRob Herring};
257*724ba675SRob Herring
258*724ba675SRob Herring&mcbsp3 {
259*724ba675SRob Herring	status = "okay";
260*724ba675SRob Herring	pinctrl-names = "default";
261*724ba675SRob Herring	pinctrl-0 = <&mcbsp3_pins>;
262*724ba675SRob Herring};
263*724ba675SRob Herring
264*724ba675SRob Herring&gpmc {
265*724ba675SRob Herring	ranges = <0 0 0x30000000 0x01000000>;	/* CS0: 16MB for NAND */
266*724ba675SRob Herring
267*724ba675SRob Herring	nand@0,0 {
268*724ba675SRob Herring		compatible = "ti,omap2-nand";
269*724ba675SRob Herring		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
270*724ba675SRob Herring		interrupt-parent = <&gpmc>;
271*724ba675SRob Herring		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
272*724ba675SRob Herring			     <1 IRQ_TYPE_NONE>;	/* termcount */
273*724ba675SRob Herring		nand-bus-width = <16>;
274*724ba675SRob Herring		gpmc,device-width = <2>;	/* GPMC_DEVWIDTH_16BIT */
275*724ba675SRob Herring		ti,nand-ecc-opt = "sw";
276*724ba675SRob Herring
277*724ba675SRob Herring		gpmc,cs-on-ns = <0>;
278*724ba675SRob Herring		gpmc,cs-rd-off-ns = <36>;
279*724ba675SRob Herring		gpmc,cs-wr-off-ns = <36>;
280*724ba675SRob Herring		gpmc,adv-on-ns = <6>;
281*724ba675SRob Herring		gpmc,adv-rd-off-ns = <24>;
282*724ba675SRob Herring		gpmc,adv-wr-off-ns = <36>;
283*724ba675SRob Herring		gpmc,oe-on-ns = <6>;
284*724ba675SRob Herring		gpmc,oe-off-ns = <48>;
285*724ba675SRob Herring		gpmc,we-on-ns = <6>;
286*724ba675SRob Herring		gpmc,we-off-ns = <30>;
287*724ba675SRob Herring		gpmc,rd-cycle-ns = <72>;
288*724ba675SRob Herring		gpmc,wr-cycle-ns = <72>;
289*724ba675SRob Herring		gpmc,access-ns = <54>;
290*724ba675SRob Herring		gpmc,wr-access-ns = <30>;
291*724ba675SRob Herring
292*724ba675SRob Herring		#address-cells = <1>;
293*724ba675SRob Herring		#size-cells = <1>;
294*724ba675SRob Herring
295*724ba675SRob Herring		x-loader@0 {
296*724ba675SRob Herring			label = "X-Loader";
297*724ba675SRob Herring			reg = <0 0x80000>;
298*724ba675SRob Herring		};
299*724ba675SRob Herring
300*724ba675SRob Herring		bootloaders@80000 {
301*724ba675SRob Herring			label = "U-Boot";
302*724ba675SRob Herring			reg = <0x80000 0x1e0000>;
303*724ba675SRob Herring		};
304*724ba675SRob Herring
305*724ba675SRob Herring		bootloaders_env@260000 {
306*724ba675SRob Herring			label = "U-Boot Env";
307*724ba675SRob Herring			reg = <0x260000 0x20000>;
308*724ba675SRob Herring		};
309*724ba675SRob Herring
310*724ba675SRob Herring		kernel@280000 {
311*724ba675SRob Herring			label = "Kernel";
312*724ba675SRob Herring			reg = <0x280000 0x400000>;
313*724ba675SRob Herring		};
314*724ba675SRob Herring
315*724ba675SRob Herring		filesystem@680000 {
316*724ba675SRob Herring			label = "File System";
317*724ba675SRob Herring			reg = <0x680000 0xf980000>;
318*724ba675SRob Herring		};
319*724ba675SRob Herring	};
320*724ba675SRob Herring};
321*724ba675SRob Herring
322*724ba675SRob Herring&usb_otg_hs {
323*724ba675SRob Herring	interface-type = <0>;
324*724ba675SRob Herring	usb-phy = <&usb2_phy>;
325*724ba675SRob Herring	phys = <&usb2_phy>;
326*724ba675SRob Herring	phy-names = "usb2-phy";
327*724ba675SRob Herring	mode = <3>;
328*724ba675SRob Herring	power = <50>;
329*724ba675SRob Herring};
330*724ba675SRob Herring
331*724ba675SRob Herring&vaux2 {
332*724ba675SRob Herring	regulator-name = "vdd_ehci";
333*724ba675SRob Herring	regulator-min-microvolt = <1800000>;
334*724ba675SRob Herring	regulator-max-microvolt = <1800000>;
335*724ba675SRob Herring	regulator-always-on;
336*724ba675SRob Herring};
337